DecaRange RTLS ARM Application
Macros
nrf52_bitfields.h File Reference
#include <core_cm4.h>

Go to the source code of this file.

Macros

#define AAR_INTENSET_NOTRESOLVED_Pos   (2UL)
 
#define AAR_INTENSET_NOTRESOLVED_Msk   (0x1UL << AAR_INTENSET_NOTRESOLVED_Pos)
 
#define AAR_INTENSET_NOTRESOLVED_Disabled   (0UL)
 
#define AAR_INTENSET_NOTRESOLVED_Enabled   (1UL)
 
#define AAR_INTENSET_NOTRESOLVED_Set   (1UL)
 
#define AAR_INTENSET_RESOLVED_Pos   (1UL)
 
#define AAR_INTENSET_RESOLVED_Msk   (0x1UL << AAR_INTENSET_RESOLVED_Pos)
 
#define AAR_INTENSET_RESOLVED_Disabled   (0UL)
 
#define AAR_INTENSET_RESOLVED_Enabled   (1UL)
 
#define AAR_INTENSET_RESOLVED_Set   (1UL)
 
#define AAR_INTENSET_END_Pos   (0UL)
 
#define AAR_INTENSET_END_Msk   (0x1UL << AAR_INTENSET_END_Pos)
 
#define AAR_INTENSET_END_Disabled   (0UL)
 
#define AAR_INTENSET_END_Enabled   (1UL)
 
#define AAR_INTENSET_END_Set   (1UL)
 
#define AAR_INTENCLR_NOTRESOLVED_Pos   (2UL)
 
#define AAR_INTENCLR_NOTRESOLVED_Msk   (0x1UL << AAR_INTENCLR_NOTRESOLVED_Pos)
 
#define AAR_INTENCLR_NOTRESOLVED_Disabled   (0UL)
 
#define AAR_INTENCLR_NOTRESOLVED_Enabled   (1UL)
 
#define AAR_INTENCLR_NOTRESOLVED_Clear   (1UL)
 
#define AAR_INTENCLR_RESOLVED_Pos   (1UL)
 
#define AAR_INTENCLR_RESOLVED_Msk   (0x1UL << AAR_INTENCLR_RESOLVED_Pos)
 
#define AAR_INTENCLR_RESOLVED_Disabled   (0UL)
 
#define AAR_INTENCLR_RESOLVED_Enabled   (1UL)
 
#define AAR_INTENCLR_RESOLVED_Clear   (1UL)
 
#define AAR_INTENCLR_END_Pos   (0UL)
 
#define AAR_INTENCLR_END_Msk   (0x1UL << AAR_INTENCLR_END_Pos)
 
#define AAR_INTENCLR_END_Disabled   (0UL)
 
#define AAR_INTENCLR_END_Enabled   (1UL)
 
#define AAR_INTENCLR_END_Clear   (1UL)
 
#define AAR_STATUS_STATUS_Pos   (0UL)
 
#define AAR_STATUS_STATUS_Msk   (0xFUL << AAR_STATUS_STATUS_Pos)
 
#define AAR_ENABLE_ENABLE_Pos   (0UL)
 
#define AAR_ENABLE_ENABLE_Msk   (0x3UL << AAR_ENABLE_ENABLE_Pos)
 
#define AAR_ENABLE_ENABLE_Disabled   (0UL)
 
#define AAR_ENABLE_ENABLE_Enabled   (3UL)
 
#define AAR_NIRK_NIRK_Pos   (0UL)
 
#define AAR_NIRK_NIRK_Msk   (0x1FUL << AAR_NIRK_NIRK_Pos)
 
#define AAR_IRKPTR_IRKPTR_Pos   (0UL)
 
#define AAR_IRKPTR_IRKPTR_Msk   (0xFFFFFFFFUL << AAR_IRKPTR_IRKPTR_Pos)
 
#define AAR_ADDRPTR_ADDRPTR_Pos   (0UL)
 
#define AAR_ADDRPTR_ADDRPTR_Msk   (0xFFFFFFFFUL << AAR_ADDRPTR_ADDRPTR_Pos)
 
#define AAR_SCRATCHPTR_SCRATCHPTR_Pos   (0UL)
 
#define AAR_SCRATCHPTR_SCRATCHPTR_Msk   (0xFFFFFFFFUL << AAR_SCRATCHPTR_SCRATCHPTR_Pos)
 
#define BPROT_CONFIG0_REGION31_Pos   (31UL)
 
#define BPROT_CONFIG0_REGION31_Msk   (0x1UL << BPROT_CONFIG0_REGION31_Pos)
 
#define BPROT_CONFIG0_REGION31_Disabled   (0UL)
 
#define BPROT_CONFIG0_REGION31_Enabled   (1UL)
 
#define BPROT_CONFIG0_REGION30_Pos   (30UL)
 
#define BPROT_CONFIG0_REGION30_Msk   (0x1UL << BPROT_CONFIG0_REGION30_Pos)
 
#define BPROT_CONFIG0_REGION30_Disabled   (0UL)
 
#define BPROT_CONFIG0_REGION30_Enabled   (1UL)
 
#define BPROT_CONFIG0_REGION29_Pos   (29UL)
 
#define BPROT_CONFIG0_REGION29_Msk   (0x1UL << BPROT_CONFIG0_REGION29_Pos)
 
#define BPROT_CONFIG0_REGION29_Disabled   (0UL)
 
#define BPROT_CONFIG0_REGION29_Enabled   (1UL)
 
#define BPROT_CONFIG0_REGION28_Pos   (28UL)
 
#define BPROT_CONFIG0_REGION28_Msk   (0x1UL << BPROT_CONFIG0_REGION28_Pos)
 
#define BPROT_CONFIG0_REGION28_Disabled   (0UL)
 
#define BPROT_CONFIG0_REGION28_Enabled   (1UL)
 
#define BPROT_CONFIG0_REGION27_Pos   (27UL)
 
#define BPROT_CONFIG0_REGION27_Msk   (0x1UL << BPROT_CONFIG0_REGION27_Pos)
 
#define BPROT_CONFIG0_REGION27_Disabled   (0UL)
 
#define BPROT_CONFIG0_REGION27_Enabled   (1UL)
 
#define BPROT_CONFIG0_REGION26_Pos   (26UL)
 
#define BPROT_CONFIG0_REGION26_Msk   (0x1UL << BPROT_CONFIG0_REGION26_Pos)
 
#define BPROT_CONFIG0_REGION26_Disabled   (0UL)
 
#define BPROT_CONFIG0_REGION26_Enabled   (1UL)
 
#define BPROT_CONFIG0_REGION25_Pos   (25UL)
 
#define BPROT_CONFIG0_REGION25_Msk   (0x1UL << BPROT_CONFIG0_REGION25_Pos)
 
#define BPROT_CONFIG0_REGION25_Disabled   (0UL)
 
#define BPROT_CONFIG0_REGION25_Enabled   (1UL)
 
#define BPROT_CONFIG0_REGION24_Pos   (24UL)
 
#define BPROT_CONFIG0_REGION24_Msk   (0x1UL << BPROT_CONFIG0_REGION24_Pos)
 
#define BPROT_CONFIG0_REGION24_Disabled   (0UL)
 
#define BPROT_CONFIG0_REGION24_Enabled   (1UL)
 
#define BPROT_CONFIG0_REGION23_Pos   (23UL)
 
#define BPROT_CONFIG0_REGION23_Msk   (0x1UL << BPROT_CONFIG0_REGION23_Pos)
 
#define BPROT_CONFIG0_REGION23_Disabled   (0UL)
 
#define BPROT_CONFIG0_REGION23_Enabled   (1UL)
 
#define BPROT_CONFIG0_REGION22_Pos   (22UL)
 
#define BPROT_CONFIG0_REGION22_Msk   (0x1UL << BPROT_CONFIG0_REGION22_Pos)
 
#define BPROT_CONFIG0_REGION22_Disabled   (0UL)
 
#define BPROT_CONFIG0_REGION22_Enabled   (1UL)
 
#define BPROT_CONFIG0_REGION21_Pos   (21UL)
 
#define BPROT_CONFIG0_REGION21_Msk   (0x1UL << BPROT_CONFIG0_REGION21_Pos)
 
#define BPROT_CONFIG0_REGION21_Disabled   (0UL)
 
#define BPROT_CONFIG0_REGION21_Enabled   (1UL)
 
#define BPROT_CONFIG0_REGION20_Pos   (20UL)
 
#define BPROT_CONFIG0_REGION20_Msk   (0x1UL << BPROT_CONFIG0_REGION20_Pos)
 
#define BPROT_CONFIG0_REGION20_Disabled   (0UL)
 
#define BPROT_CONFIG0_REGION20_Enabled   (1UL)
 
#define BPROT_CONFIG0_REGION19_Pos   (19UL)
 
#define BPROT_CONFIG0_REGION19_Msk   (0x1UL << BPROT_CONFIG0_REGION19_Pos)
 
#define BPROT_CONFIG0_REGION19_Disabled   (0UL)
 
#define BPROT_CONFIG0_REGION19_Enabled   (1UL)
 
#define BPROT_CONFIG0_REGION18_Pos   (18UL)
 
#define BPROT_CONFIG0_REGION18_Msk   (0x1UL << BPROT_CONFIG0_REGION18_Pos)
 
#define BPROT_CONFIG0_REGION18_Disabled   (0UL)
 
#define BPROT_CONFIG0_REGION18_Enabled   (1UL)
 
#define BPROT_CONFIG0_REGION17_Pos   (17UL)
 
#define BPROT_CONFIG0_REGION17_Msk   (0x1UL << BPROT_CONFIG0_REGION17_Pos)
 
#define BPROT_CONFIG0_REGION17_Disabled   (0UL)
 
#define BPROT_CONFIG0_REGION17_Enabled   (1UL)
 
#define BPROT_CONFIG0_REGION16_Pos   (16UL)
 
#define BPROT_CONFIG0_REGION16_Msk   (0x1UL << BPROT_CONFIG0_REGION16_Pos)
 
#define BPROT_CONFIG0_REGION16_Disabled   (0UL)
 
#define BPROT_CONFIG0_REGION16_Enabled   (1UL)
 
#define BPROT_CONFIG0_REGION15_Pos   (15UL)
 
#define BPROT_CONFIG0_REGION15_Msk   (0x1UL << BPROT_CONFIG0_REGION15_Pos)
 
#define BPROT_CONFIG0_REGION15_Disabled   (0UL)
 
#define BPROT_CONFIG0_REGION15_Enabled   (1UL)
 
#define BPROT_CONFIG0_REGION14_Pos   (14UL)
 
#define BPROT_CONFIG0_REGION14_Msk   (0x1UL << BPROT_CONFIG0_REGION14_Pos)
 
#define BPROT_CONFIG0_REGION14_Disabled   (0UL)
 
#define BPROT_CONFIG0_REGION14_Enabled   (1UL)
 
#define BPROT_CONFIG0_REGION13_Pos   (13UL)
 
#define BPROT_CONFIG0_REGION13_Msk   (0x1UL << BPROT_CONFIG0_REGION13_Pos)
 
#define BPROT_CONFIG0_REGION13_Disabled   (0UL)
 
#define BPROT_CONFIG0_REGION13_Enabled   (1UL)
 
#define BPROT_CONFIG0_REGION12_Pos   (12UL)
 
#define BPROT_CONFIG0_REGION12_Msk   (0x1UL << BPROT_CONFIG0_REGION12_Pos)
 
#define BPROT_CONFIG0_REGION12_Disabled   (0UL)
 
#define BPROT_CONFIG0_REGION12_Enabled   (1UL)
 
#define BPROT_CONFIG0_REGION11_Pos   (11UL)
 
#define BPROT_CONFIG0_REGION11_Msk   (0x1UL << BPROT_CONFIG0_REGION11_Pos)
 
#define BPROT_CONFIG0_REGION11_Disabled   (0UL)
 
#define BPROT_CONFIG0_REGION11_Enabled   (1UL)
 
#define BPROT_CONFIG0_REGION10_Pos   (10UL)
 
#define BPROT_CONFIG0_REGION10_Msk   (0x1UL << BPROT_CONFIG0_REGION10_Pos)
 
#define BPROT_CONFIG0_REGION10_Disabled   (0UL)
 
#define BPROT_CONFIG0_REGION10_Enabled   (1UL)
 
#define BPROT_CONFIG0_REGION9_Pos   (9UL)
 
#define BPROT_CONFIG0_REGION9_Msk   (0x1UL << BPROT_CONFIG0_REGION9_Pos)
 
#define BPROT_CONFIG0_REGION9_Disabled   (0UL)
 
#define BPROT_CONFIG0_REGION9_Enabled   (1UL)
 
#define BPROT_CONFIG0_REGION8_Pos   (8UL)
 
#define BPROT_CONFIG0_REGION8_Msk   (0x1UL << BPROT_CONFIG0_REGION8_Pos)
 
#define BPROT_CONFIG0_REGION8_Disabled   (0UL)
 
#define BPROT_CONFIG0_REGION8_Enabled   (1UL)
 
#define BPROT_CONFIG0_REGION7_Pos   (7UL)
 
#define BPROT_CONFIG0_REGION7_Msk   (0x1UL << BPROT_CONFIG0_REGION7_Pos)
 
#define BPROT_CONFIG0_REGION7_Disabled   (0UL)
 
#define BPROT_CONFIG0_REGION7_Enabled   (1UL)
 
#define BPROT_CONFIG0_REGION6_Pos   (6UL)
 
#define BPROT_CONFIG0_REGION6_Msk   (0x1UL << BPROT_CONFIG0_REGION6_Pos)
 
#define BPROT_CONFIG0_REGION6_Disabled   (0UL)
 
#define BPROT_CONFIG0_REGION6_Enabled   (1UL)
 
#define BPROT_CONFIG0_REGION5_Pos   (5UL)
 
#define BPROT_CONFIG0_REGION5_Msk   (0x1UL << BPROT_CONFIG0_REGION5_Pos)
 
#define BPROT_CONFIG0_REGION5_Disabled   (0UL)
 
#define BPROT_CONFIG0_REGION5_Enabled   (1UL)
 
#define BPROT_CONFIG0_REGION4_Pos   (4UL)
 
#define BPROT_CONFIG0_REGION4_Msk   (0x1UL << BPROT_CONFIG0_REGION4_Pos)
 
#define BPROT_CONFIG0_REGION4_Disabled   (0UL)
 
#define BPROT_CONFIG0_REGION4_Enabled   (1UL)
 
#define BPROT_CONFIG0_REGION3_Pos   (3UL)
 
#define BPROT_CONFIG0_REGION3_Msk   (0x1UL << BPROT_CONFIG0_REGION3_Pos)
 
#define BPROT_CONFIG0_REGION3_Disabled   (0UL)
 
#define BPROT_CONFIG0_REGION3_Enabled   (1UL)
 
#define BPROT_CONFIG0_REGION2_Pos   (2UL)
 
#define BPROT_CONFIG0_REGION2_Msk   (0x1UL << BPROT_CONFIG0_REGION2_Pos)
 
#define BPROT_CONFIG0_REGION2_Disabled   (0UL)
 
#define BPROT_CONFIG0_REGION2_Enabled   (1UL)
 
#define BPROT_CONFIG0_REGION1_Pos   (1UL)
 
#define BPROT_CONFIG0_REGION1_Msk   (0x1UL << BPROT_CONFIG0_REGION1_Pos)
 
#define BPROT_CONFIG0_REGION1_Disabled   (0UL)
 
#define BPROT_CONFIG0_REGION1_Enabled   (1UL)
 
#define BPROT_CONFIG0_REGION0_Pos   (0UL)
 
#define BPROT_CONFIG0_REGION0_Msk   (0x1UL << BPROT_CONFIG0_REGION0_Pos)
 
#define BPROT_CONFIG0_REGION0_Disabled   (0UL)
 
#define BPROT_CONFIG0_REGION0_Enabled   (1UL)
 
#define BPROT_CONFIG1_REGION63_Pos   (31UL)
 
#define BPROT_CONFIG1_REGION63_Msk   (0x1UL << BPROT_CONFIG1_REGION63_Pos)
 
#define BPROT_CONFIG1_REGION63_Disabled   (0UL)
 
#define BPROT_CONFIG1_REGION63_Enabled   (1UL)
 
#define BPROT_CONFIG1_REGION62_Pos   (30UL)
 
#define BPROT_CONFIG1_REGION62_Msk   (0x1UL << BPROT_CONFIG1_REGION62_Pos)
 
#define BPROT_CONFIG1_REGION62_Disabled   (0UL)
 
#define BPROT_CONFIG1_REGION62_Enabled   (1UL)
 
#define BPROT_CONFIG1_REGION61_Pos   (29UL)
 
#define BPROT_CONFIG1_REGION61_Msk   (0x1UL << BPROT_CONFIG1_REGION61_Pos)
 
#define BPROT_CONFIG1_REGION61_Disabled   (0UL)
 
#define BPROT_CONFIG1_REGION61_Enabled   (1UL)
 
#define BPROT_CONFIG1_REGION60_Pos   (28UL)
 
#define BPROT_CONFIG1_REGION60_Msk   (0x1UL << BPROT_CONFIG1_REGION60_Pos)
 
#define BPROT_CONFIG1_REGION60_Disabled   (0UL)
 
#define BPROT_CONFIG1_REGION60_Enabled   (1UL)
 
#define BPROT_CONFIG1_REGION59_Pos   (27UL)
 
#define BPROT_CONFIG1_REGION59_Msk   (0x1UL << BPROT_CONFIG1_REGION59_Pos)
 
#define BPROT_CONFIG1_REGION59_Disabled   (0UL)
 
#define BPROT_CONFIG1_REGION59_Enabled   (1UL)
 
#define BPROT_CONFIG1_REGION58_Pos   (26UL)
 
#define BPROT_CONFIG1_REGION58_Msk   (0x1UL << BPROT_CONFIG1_REGION58_Pos)
 
#define BPROT_CONFIG1_REGION58_Disabled   (0UL)
 
#define BPROT_CONFIG1_REGION58_Enabled   (1UL)
 
#define BPROT_CONFIG1_REGION57_Pos   (25UL)
 
#define BPROT_CONFIG1_REGION57_Msk   (0x1UL << BPROT_CONFIG1_REGION57_Pos)
 
#define BPROT_CONFIG1_REGION57_Disabled   (0UL)
 
#define BPROT_CONFIG1_REGION57_Enabled   (1UL)
 
#define BPROT_CONFIG1_REGION56_Pos   (24UL)
 
#define BPROT_CONFIG1_REGION56_Msk   (0x1UL << BPROT_CONFIG1_REGION56_Pos)
 
#define BPROT_CONFIG1_REGION56_Disabled   (0UL)
 
#define BPROT_CONFIG1_REGION56_Enabled   (1UL)
 
#define BPROT_CONFIG1_REGION55_Pos   (23UL)
 
#define BPROT_CONFIG1_REGION55_Msk   (0x1UL << BPROT_CONFIG1_REGION55_Pos)
 
#define BPROT_CONFIG1_REGION55_Disabled   (0UL)
 
#define BPROT_CONFIG1_REGION55_Enabled   (1UL)
 
#define BPROT_CONFIG1_REGION54_Pos   (22UL)
 
#define BPROT_CONFIG1_REGION54_Msk   (0x1UL << BPROT_CONFIG1_REGION54_Pos)
 
#define BPROT_CONFIG1_REGION54_Disabled   (0UL)
 
#define BPROT_CONFIG1_REGION54_Enabled   (1UL)
 
#define BPROT_CONFIG1_REGION53_Pos   (21UL)
 
#define BPROT_CONFIG1_REGION53_Msk   (0x1UL << BPROT_CONFIG1_REGION53_Pos)
 
#define BPROT_CONFIG1_REGION53_Disabled   (0UL)
 
#define BPROT_CONFIG1_REGION53_Enabled   (1UL)
 
#define BPROT_CONFIG1_REGION52_Pos   (20UL)
 
#define BPROT_CONFIG1_REGION52_Msk   (0x1UL << BPROT_CONFIG1_REGION52_Pos)
 
#define BPROT_CONFIG1_REGION52_Disabled   (0UL)
 
#define BPROT_CONFIG1_REGION52_Enabled   (1UL)
 
#define BPROT_CONFIG1_REGION51_Pos   (19UL)
 
#define BPROT_CONFIG1_REGION51_Msk   (0x1UL << BPROT_CONFIG1_REGION51_Pos)
 
#define BPROT_CONFIG1_REGION51_Disabled   (0UL)
 
#define BPROT_CONFIG1_REGION51_Enabled   (1UL)
 
#define BPROT_CONFIG1_REGION50_Pos   (18UL)
 
#define BPROT_CONFIG1_REGION50_Msk   (0x1UL << BPROT_CONFIG1_REGION50_Pos)
 
#define BPROT_CONFIG1_REGION50_Disabled   (0UL)
 
#define BPROT_CONFIG1_REGION50_Enabled   (1UL)
 
#define BPROT_CONFIG1_REGION49_Pos   (17UL)
 
#define BPROT_CONFIG1_REGION49_Msk   (0x1UL << BPROT_CONFIG1_REGION49_Pos)
 
#define BPROT_CONFIG1_REGION49_Disabled   (0UL)
 
#define BPROT_CONFIG1_REGION49_Enabled   (1UL)
 
#define BPROT_CONFIG1_REGION48_Pos   (16UL)
 
#define BPROT_CONFIG1_REGION48_Msk   (0x1UL << BPROT_CONFIG1_REGION48_Pos)
 
#define BPROT_CONFIG1_REGION48_Disabled   (0UL)
 
#define BPROT_CONFIG1_REGION48_Enabled   (1UL)
 
#define BPROT_CONFIG1_REGION47_Pos   (15UL)
 
#define BPROT_CONFIG1_REGION47_Msk   (0x1UL << BPROT_CONFIG1_REGION47_Pos)
 
#define BPROT_CONFIG1_REGION47_Disabled   (0UL)
 
#define BPROT_CONFIG1_REGION47_Enabled   (1UL)
 
#define BPROT_CONFIG1_REGION46_Pos   (14UL)
 
#define BPROT_CONFIG1_REGION46_Msk   (0x1UL << BPROT_CONFIG1_REGION46_Pos)
 
#define BPROT_CONFIG1_REGION46_Disabled   (0UL)
 
#define BPROT_CONFIG1_REGION46_Enabled   (1UL)
 
#define BPROT_CONFIG1_REGION45_Pos   (13UL)
 
#define BPROT_CONFIG1_REGION45_Msk   (0x1UL << BPROT_CONFIG1_REGION45_Pos)
 
#define BPROT_CONFIG1_REGION45_Disabled   (0UL)
 
#define BPROT_CONFIG1_REGION45_Enabled   (1UL)
 
#define BPROT_CONFIG1_REGION44_Pos   (12UL)
 
#define BPROT_CONFIG1_REGION44_Msk   (0x1UL << BPROT_CONFIG1_REGION44_Pos)
 
#define BPROT_CONFIG1_REGION44_Disabled   (0UL)
 
#define BPROT_CONFIG1_REGION44_Enabled   (1UL)
 
#define BPROT_CONFIG1_REGION43_Pos   (11UL)
 
#define BPROT_CONFIG1_REGION43_Msk   (0x1UL << BPROT_CONFIG1_REGION43_Pos)
 
#define BPROT_CONFIG1_REGION43_Disabled   (0UL)
 
#define BPROT_CONFIG1_REGION43_Enabled   (1UL)
 
#define BPROT_CONFIG1_REGION42_Pos   (10UL)
 
#define BPROT_CONFIG1_REGION42_Msk   (0x1UL << BPROT_CONFIG1_REGION42_Pos)
 
#define BPROT_CONFIG1_REGION42_Disabled   (0UL)
 
#define BPROT_CONFIG1_REGION42_Enabled   (1UL)
 
#define BPROT_CONFIG1_REGION41_Pos   (9UL)
 
#define BPROT_CONFIG1_REGION41_Msk   (0x1UL << BPROT_CONFIG1_REGION41_Pos)
 
#define BPROT_CONFIG1_REGION41_Disabled   (0UL)
 
#define BPROT_CONFIG1_REGION41_Enabled   (1UL)
 
#define BPROT_CONFIG1_REGION40_Pos   (8UL)
 
#define BPROT_CONFIG1_REGION40_Msk   (0x1UL << BPROT_CONFIG1_REGION40_Pos)
 
#define BPROT_CONFIG1_REGION40_Disabled   (0UL)
 
#define BPROT_CONFIG1_REGION40_Enabled   (1UL)
 
#define BPROT_CONFIG1_REGION39_Pos   (7UL)
 
#define BPROT_CONFIG1_REGION39_Msk   (0x1UL << BPROT_CONFIG1_REGION39_Pos)
 
#define BPROT_CONFIG1_REGION39_Disabled   (0UL)
 
#define BPROT_CONFIG1_REGION39_Enabled   (1UL)
 
#define BPROT_CONFIG1_REGION38_Pos   (6UL)
 
#define BPROT_CONFIG1_REGION38_Msk   (0x1UL << BPROT_CONFIG1_REGION38_Pos)
 
#define BPROT_CONFIG1_REGION38_Disabled   (0UL)
 
#define BPROT_CONFIG1_REGION38_Enabled   (1UL)
 
#define BPROT_CONFIG1_REGION37_Pos   (5UL)
 
#define BPROT_CONFIG1_REGION37_Msk   (0x1UL << BPROT_CONFIG1_REGION37_Pos)
 
#define BPROT_CONFIG1_REGION37_Disabled   (0UL)
 
#define BPROT_CONFIG1_REGION37_Enabled   (1UL)
 
#define BPROT_CONFIG1_REGION36_Pos   (4UL)
 
#define BPROT_CONFIG1_REGION36_Msk   (0x1UL << BPROT_CONFIG1_REGION36_Pos)
 
#define BPROT_CONFIG1_REGION36_Disabled   (0UL)
 
#define BPROT_CONFIG1_REGION36_Enabled   (1UL)
 
#define BPROT_CONFIG1_REGION35_Pos   (3UL)
 
#define BPROT_CONFIG1_REGION35_Msk   (0x1UL << BPROT_CONFIG1_REGION35_Pos)
 
#define BPROT_CONFIG1_REGION35_Disabled   (0UL)
 
#define BPROT_CONFIG1_REGION35_Enabled   (1UL)
 
#define BPROT_CONFIG1_REGION34_Pos   (2UL)
 
#define BPROT_CONFIG1_REGION34_Msk   (0x1UL << BPROT_CONFIG1_REGION34_Pos)
 
#define BPROT_CONFIG1_REGION34_Disabled   (0UL)
 
#define BPROT_CONFIG1_REGION34_Enabled   (1UL)
 
#define BPROT_CONFIG1_REGION33_Pos   (1UL)
 
#define BPROT_CONFIG1_REGION33_Msk   (0x1UL << BPROT_CONFIG1_REGION33_Pos)
 
#define BPROT_CONFIG1_REGION33_Disabled   (0UL)
 
#define BPROT_CONFIG1_REGION33_Enabled   (1UL)
 
#define BPROT_CONFIG1_REGION32_Pos   (0UL)
 
#define BPROT_CONFIG1_REGION32_Msk   (0x1UL << BPROT_CONFIG1_REGION32_Pos)
 
#define BPROT_CONFIG1_REGION32_Disabled   (0UL)
 
#define BPROT_CONFIG1_REGION32_Enabled   (1UL)
 
#define BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Pos   (0UL)
 
#define BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Msk   (0x1UL << BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Pos)
 
#define BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Enabled   (0UL)
 
#define BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Disabled   (1UL)
 
#define BPROT_CONFIG2_REGION95_Pos   (31UL)
 
#define BPROT_CONFIG2_REGION95_Msk   (0x1UL << BPROT_CONFIG2_REGION95_Pos)
 
#define BPROT_CONFIG2_REGION95_Disabled   (0UL)
 
#define BPROT_CONFIG2_REGION95_Enabled   (1UL)
 
#define BPROT_CONFIG2_REGION94_Pos   (30UL)
 
#define BPROT_CONFIG2_REGION94_Msk   (0x1UL << BPROT_CONFIG2_REGION94_Pos)
 
#define BPROT_CONFIG2_REGION94_Disabled   (0UL)
 
#define BPROT_CONFIG2_REGION94_Enabled   (1UL)
 
#define BPROT_CONFIG2_REGION93_Pos   (29UL)
 
#define BPROT_CONFIG2_REGION93_Msk   (0x1UL << BPROT_CONFIG2_REGION93_Pos)
 
#define BPROT_CONFIG2_REGION93_Disabled   (0UL)
 
#define BPROT_CONFIG2_REGION93_Enabled   (1UL)
 
#define BPROT_CONFIG2_REGION92_Pos   (28UL)
 
#define BPROT_CONFIG2_REGION92_Msk   (0x1UL << BPROT_CONFIG2_REGION92_Pos)
 
#define BPROT_CONFIG2_REGION92_Disabled   (0UL)
 
#define BPROT_CONFIG2_REGION92_Enabled   (1UL)
 
#define BPROT_CONFIG2_REGION91_Pos   (27UL)
 
#define BPROT_CONFIG2_REGION91_Msk   (0x1UL << BPROT_CONFIG2_REGION91_Pos)
 
#define BPROT_CONFIG2_REGION91_Disabled   (0UL)
 
#define BPROT_CONFIG2_REGION91_Enabled   (1UL)
 
#define BPROT_CONFIG2_REGION90_Pos   (26UL)
 
#define BPROT_CONFIG2_REGION90_Msk   (0x1UL << BPROT_CONFIG2_REGION90_Pos)
 
#define BPROT_CONFIG2_REGION90_Disabled   (0UL)
 
#define BPROT_CONFIG2_REGION90_Enabled   (1UL)
 
#define BPROT_CONFIG2_REGION89_Pos   (25UL)
 
#define BPROT_CONFIG2_REGION89_Msk   (0x1UL << BPROT_CONFIG2_REGION89_Pos)
 
#define BPROT_CONFIG2_REGION89_Disabled   (0UL)
 
#define BPROT_CONFIG2_REGION89_Enabled   (1UL)
 
#define BPROT_CONFIG2_REGION88_Pos   (24UL)
 
#define BPROT_CONFIG2_REGION88_Msk   (0x1UL << BPROT_CONFIG2_REGION88_Pos)
 
#define BPROT_CONFIG2_REGION88_Disabled   (0UL)
 
#define BPROT_CONFIG2_REGION88_Enabled   (1UL)
 
#define BPROT_CONFIG2_REGION87_Pos   (23UL)
 
#define BPROT_CONFIG2_REGION87_Msk   (0x1UL << BPROT_CONFIG2_REGION87_Pos)
 
#define BPROT_CONFIG2_REGION87_Disabled   (0UL)
 
#define BPROT_CONFIG2_REGION87_Enabled   (1UL)
 
#define BPROT_CONFIG2_REGION86_Pos   (22UL)
 
#define BPROT_CONFIG2_REGION86_Msk   (0x1UL << BPROT_CONFIG2_REGION86_Pos)
 
#define BPROT_CONFIG2_REGION86_Disabled   (0UL)
 
#define BPROT_CONFIG2_REGION86_Enabled   (1UL)
 
#define BPROT_CONFIG2_REGION85_Pos   (21UL)
 
#define BPROT_CONFIG2_REGION85_Msk   (0x1UL << BPROT_CONFIG2_REGION85_Pos)
 
#define BPROT_CONFIG2_REGION85_Disabled   (0UL)
 
#define BPROT_CONFIG2_REGION85_Enabled   (1UL)
 
#define BPROT_CONFIG2_REGION84_Pos   (20UL)
 
#define BPROT_CONFIG2_REGION84_Msk   (0x1UL << BPROT_CONFIG2_REGION84_Pos)
 
#define BPROT_CONFIG2_REGION84_Disabled   (0UL)
 
#define BPROT_CONFIG2_REGION84_Enabled   (1UL)
 
#define BPROT_CONFIG2_REGION83_Pos   (19UL)
 
#define BPROT_CONFIG2_REGION83_Msk   (0x1UL << BPROT_CONFIG2_REGION83_Pos)
 
#define BPROT_CONFIG2_REGION83_Disabled   (0UL)
 
#define BPROT_CONFIG2_REGION83_Enabled   (1UL)
 
#define BPROT_CONFIG2_REGION82_Pos   (18UL)
 
#define BPROT_CONFIG2_REGION82_Msk   (0x1UL << BPROT_CONFIG2_REGION82_Pos)
 
#define BPROT_CONFIG2_REGION82_Disabled   (0UL)
 
#define BPROT_CONFIG2_REGION82_Enabled   (1UL)
 
#define BPROT_CONFIG2_REGION81_Pos   (17UL)
 
#define BPROT_CONFIG2_REGION81_Msk   (0x1UL << BPROT_CONFIG2_REGION81_Pos)
 
#define BPROT_CONFIG2_REGION81_Disabled   (0UL)
 
#define BPROT_CONFIG2_REGION81_Enabled   (1UL)
 
#define BPROT_CONFIG2_REGION80_Pos   (16UL)
 
#define BPROT_CONFIG2_REGION80_Msk   (0x1UL << BPROT_CONFIG2_REGION80_Pos)
 
#define BPROT_CONFIG2_REGION80_Disabled   (0UL)
 
#define BPROT_CONFIG2_REGION80_Enabled   (1UL)
 
#define BPROT_CONFIG2_REGION79_Pos   (15UL)
 
#define BPROT_CONFIG2_REGION79_Msk   (0x1UL << BPROT_CONFIG2_REGION79_Pos)
 
#define BPROT_CONFIG2_REGION79_Disabled   (0UL)
 
#define BPROT_CONFIG2_REGION79_Enabled   (1UL)
 
#define BPROT_CONFIG2_REGION78_Pos   (14UL)
 
#define BPROT_CONFIG2_REGION78_Msk   (0x1UL << BPROT_CONFIG2_REGION78_Pos)
 
#define BPROT_CONFIG2_REGION78_Disabled   (0UL)
 
#define BPROT_CONFIG2_REGION78_Enabled   (1UL)
 
#define BPROT_CONFIG2_REGION77_Pos   (13UL)
 
#define BPROT_CONFIG2_REGION77_Msk   (0x1UL << BPROT_CONFIG2_REGION77_Pos)
 
#define BPROT_CONFIG2_REGION77_Disabled   (0UL)
 
#define BPROT_CONFIG2_REGION77_Enabled   (1UL)
 
#define BPROT_CONFIG2_REGION76_Pos   (12UL)
 
#define BPROT_CONFIG2_REGION76_Msk   (0x1UL << BPROT_CONFIG2_REGION76_Pos)
 
#define BPROT_CONFIG2_REGION76_Disabled   (0UL)
 
#define BPROT_CONFIG2_REGION76_Enabled   (1UL)
 
#define BPROT_CONFIG2_REGION75_Pos   (11UL)
 
#define BPROT_CONFIG2_REGION75_Msk   (0x1UL << BPROT_CONFIG2_REGION75_Pos)
 
#define BPROT_CONFIG2_REGION75_Disabled   (0UL)
 
#define BPROT_CONFIG2_REGION75_Enabled   (1UL)
 
#define BPROT_CONFIG2_REGION74_Pos   (10UL)
 
#define BPROT_CONFIG2_REGION74_Msk   (0x1UL << BPROT_CONFIG2_REGION74_Pos)
 
#define BPROT_CONFIG2_REGION74_Disabled   (0UL)
 
#define BPROT_CONFIG2_REGION74_Enabled   (1UL)
 
#define BPROT_CONFIG2_REGION73_Pos   (9UL)
 
#define BPROT_CONFIG2_REGION73_Msk   (0x1UL << BPROT_CONFIG2_REGION73_Pos)
 
#define BPROT_CONFIG2_REGION73_Disabled   (0UL)
 
#define BPROT_CONFIG2_REGION73_Enabled   (1UL)
 
#define BPROT_CONFIG2_REGION72_Pos   (8UL)
 
#define BPROT_CONFIG2_REGION72_Msk   (0x1UL << BPROT_CONFIG2_REGION72_Pos)
 
#define BPROT_CONFIG2_REGION72_Disabled   (0UL)
 
#define BPROT_CONFIG2_REGION72_Enabled   (1UL)
 
#define BPROT_CONFIG2_REGION71_Pos   (7UL)
 
#define BPROT_CONFIG2_REGION71_Msk   (0x1UL << BPROT_CONFIG2_REGION71_Pos)
 
#define BPROT_CONFIG2_REGION71_Disabled   (0UL)
 
#define BPROT_CONFIG2_REGION71_Enabled   (1UL)
 
#define BPROT_CONFIG2_REGION70_Pos   (6UL)
 
#define BPROT_CONFIG2_REGION70_Msk   (0x1UL << BPROT_CONFIG2_REGION70_Pos)
 
#define BPROT_CONFIG2_REGION70_Disabled   (0UL)
 
#define BPROT_CONFIG2_REGION70_Enabled   (1UL)
 
#define BPROT_CONFIG2_REGION69_Pos   (5UL)
 
#define BPROT_CONFIG2_REGION69_Msk   (0x1UL << BPROT_CONFIG2_REGION69_Pos)
 
#define BPROT_CONFIG2_REGION69_Disabled   (0UL)
 
#define BPROT_CONFIG2_REGION69_Enabled   (1UL)
 
#define BPROT_CONFIG2_REGION68_Pos   (4UL)
 
#define BPROT_CONFIG2_REGION68_Msk   (0x1UL << BPROT_CONFIG2_REGION68_Pos)
 
#define BPROT_CONFIG2_REGION68_Disabled   (0UL)
 
#define BPROT_CONFIG2_REGION68_Enabled   (1UL)
 
#define BPROT_CONFIG2_REGION67_Pos   (3UL)
 
#define BPROT_CONFIG2_REGION67_Msk   (0x1UL << BPROT_CONFIG2_REGION67_Pos)
 
#define BPROT_CONFIG2_REGION67_Disabled   (0UL)
 
#define BPROT_CONFIG2_REGION67_Enabled   (1UL)
 
#define BPROT_CONFIG2_REGION66_Pos   (2UL)
 
#define BPROT_CONFIG2_REGION66_Msk   (0x1UL << BPROT_CONFIG2_REGION66_Pos)
 
#define BPROT_CONFIG2_REGION66_Disabled   (0UL)
 
#define BPROT_CONFIG2_REGION66_Enabled   (1UL)
 
#define BPROT_CONFIG2_REGION65_Pos   (1UL)
 
#define BPROT_CONFIG2_REGION65_Msk   (0x1UL << BPROT_CONFIG2_REGION65_Pos)
 
#define BPROT_CONFIG2_REGION65_Disabled   (0UL)
 
#define BPROT_CONFIG2_REGION65_Enabled   (1UL)
 
#define BPROT_CONFIG2_REGION64_Pos   (0UL)
 
#define BPROT_CONFIG2_REGION64_Msk   (0x1UL << BPROT_CONFIG2_REGION64_Pos)
 
#define BPROT_CONFIG2_REGION64_Disabled   (0UL)
 
#define BPROT_CONFIG2_REGION64_Enabled   (1UL)
 
#define BPROT_CONFIG3_REGION127_Pos   (31UL)
 
#define BPROT_CONFIG3_REGION127_Msk   (0x1UL << BPROT_CONFIG3_REGION127_Pos)
 
#define BPROT_CONFIG3_REGION127_Disabled   (0UL)
 
#define BPROT_CONFIG3_REGION127_Enabled   (1UL)
 
#define BPROT_CONFIG3_REGION126_Pos   (30UL)
 
#define BPROT_CONFIG3_REGION126_Msk   (0x1UL << BPROT_CONFIG3_REGION126_Pos)
 
#define BPROT_CONFIG3_REGION126_Disabled   (0UL)
 
#define BPROT_CONFIG3_REGION126_Enabled   (1UL)
 
#define BPROT_CONFIG3_REGION125_Pos   (29UL)
 
#define BPROT_CONFIG3_REGION125_Msk   (0x1UL << BPROT_CONFIG3_REGION125_Pos)
 
#define BPROT_CONFIG3_REGION125_Disabled   (0UL)
 
#define BPROT_CONFIG3_REGION125_Enabled   (1UL)
 
#define BPROT_CONFIG3_REGION124_Pos   (28UL)
 
#define BPROT_CONFIG3_REGION124_Msk   (0x1UL << BPROT_CONFIG3_REGION124_Pos)
 
#define BPROT_CONFIG3_REGION124_Disabled   (0UL)
 
#define BPROT_CONFIG3_REGION124_Enabled   (1UL)
 
#define BPROT_CONFIG3_REGION123_Pos   (27UL)
 
#define BPROT_CONFIG3_REGION123_Msk   (0x1UL << BPROT_CONFIG3_REGION123_Pos)
 
#define BPROT_CONFIG3_REGION123_Disabled   (0UL)
 
#define BPROT_CONFIG3_REGION123_Enabled   (1UL)
 
#define BPROT_CONFIG3_REGION122_Pos   (26UL)
 
#define BPROT_CONFIG3_REGION122_Msk   (0x1UL << BPROT_CONFIG3_REGION122_Pos)
 
#define BPROT_CONFIG3_REGION122_Disabled   (0UL)
 
#define BPROT_CONFIG3_REGION122_Enabled   (1UL)
 
#define BPROT_CONFIG3_REGION121_Pos   (25UL)
 
#define BPROT_CONFIG3_REGION121_Msk   (0x1UL << BPROT_CONFIG3_REGION121_Pos)
 
#define BPROT_CONFIG3_REGION121_Disabled   (0UL)
 
#define BPROT_CONFIG3_REGION121_Enabled   (1UL)
 
#define BPROT_CONFIG3_REGION120_Pos   (24UL)
 
#define BPROT_CONFIG3_REGION120_Msk   (0x1UL << BPROT_CONFIG3_REGION120_Pos)
 
#define BPROT_CONFIG3_REGION120_Disabled   (0UL)
 
#define BPROT_CONFIG3_REGION120_Enabled   (1UL)
 
#define BPROT_CONFIG3_REGION119_Pos   (23UL)
 
#define BPROT_CONFIG3_REGION119_Msk   (0x1UL << BPROT_CONFIG3_REGION119_Pos)
 
#define BPROT_CONFIG3_REGION119_Disabled   (0UL)
 
#define BPROT_CONFIG3_REGION119_Enabled   (1UL)
 
#define BPROT_CONFIG3_REGION118_Pos   (22UL)
 
#define BPROT_CONFIG3_REGION118_Msk   (0x1UL << BPROT_CONFIG3_REGION118_Pos)
 
#define BPROT_CONFIG3_REGION118_Disabled   (0UL)
 
#define BPROT_CONFIG3_REGION118_Enabled   (1UL)
 
#define BPROT_CONFIG3_REGION117_Pos   (21UL)
 
#define BPROT_CONFIG3_REGION117_Msk   (0x1UL << BPROT_CONFIG3_REGION117_Pos)
 
#define BPROT_CONFIG3_REGION117_Disabled   (0UL)
 
#define BPROT_CONFIG3_REGION117_Enabled   (1UL)
 
#define BPROT_CONFIG3_REGION116_Pos   (20UL)
 
#define BPROT_CONFIG3_REGION116_Msk   (0x1UL << BPROT_CONFIG3_REGION116_Pos)
 
#define BPROT_CONFIG3_REGION116_Disabled   (0UL)
 
#define BPROT_CONFIG3_REGION116_Enabled   (1UL)
 
#define BPROT_CONFIG3_REGION115_Pos   (19UL)
 
#define BPROT_CONFIG3_REGION115_Msk   (0x1UL << BPROT_CONFIG3_REGION115_Pos)
 
#define BPROT_CONFIG3_REGION115_Disabled   (0UL)
 
#define BPROT_CONFIG3_REGION115_Enabled   (1UL)
 
#define BPROT_CONFIG3_REGION114_Pos   (18UL)
 
#define BPROT_CONFIG3_REGION114_Msk   (0x1UL << BPROT_CONFIG3_REGION114_Pos)
 
#define BPROT_CONFIG3_REGION114_Disabled   (0UL)
 
#define BPROT_CONFIG3_REGION114_Enabled   (1UL)
 
#define BPROT_CONFIG3_REGION113_Pos   (17UL)
 
#define BPROT_CONFIG3_REGION113_Msk   (0x1UL << BPROT_CONFIG3_REGION113_Pos)
 
#define BPROT_CONFIG3_REGION113_Disabled   (0UL)
 
#define BPROT_CONFIG3_REGION113_Enabled   (1UL)
 
#define BPROT_CONFIG3_REGION112_Pos   (16UL)
 
#define BPROT_CONFIG3_REGION112_Msk   (0x1UL << BPROT_CONFIG3_REGION112_Pos)
 
#define BPROT_CONFIG3_REGION112_Disabled   (0UL)
 
#define BPROT_CONFIG3_REGION112_Enabled   (1UL)
 
#define BPROT_CONFIG3_REGION111_Pos   (15UL)
 
#define BPROT_CONFIG3_REGION111_Msk   (0x1UL << BPROT_CONFIG3_REGION111_Pos)
 
#define BPROT_CONFIG3_REGION111_Disabled   (0UL)
 
#define BPROT_CONFIG3_REGION111_Enabled   (1UL)
 
#define BPROT_CONFIG3_REGION110_Pos   (14UL)
 
#define BPROT_CONFIG3_REGION110_Msk   (0x1UL << BPROT_CONFIG3_REGION110_Pos)
 
#define BPROT_CONFIG3_REGION110_Disabled   (0UL)
 
#define BPROT_CONFIG3_REGION110_Enabled   (1UL)
 
#define BPROT_CONFIG3_REGION109_Pos   (13UL)
 
#define BPROT_CONFIG3_REGION109_Msk   (0x1UL << BPROT_CONFIG3_REGION109_Pos)
 
#define BPROT_CONFIG3_REGION109_Disabled   (0UL)
 
#define BPROT_CONFIG3_REGION109_Enabled   (1UL)
 
#define BPROT_CONFIG3_REGION108_Pos   (12UL)
 
#define BPROT_CONFIG3_REGION108_Msk   (0x1UL << BPROT_CONFIG3_REGION108_Pos)
 
#define BPROT_CONFIG3_REGION108_Disabled   (0UL)
 
#define BPROT_CONFIG3_REGION108_Enabled   (1UL)
 
#define BPROT_CONFIG3_REGION107_Pos   (11UL)
 
#define BPROT_CONFIG3_REGION107_Msk   (0x1UL << BPROT_CONFIG3_REGION107_Pos)
 
#define BPROT_CONFIG3_REGION107_Disabled   (0UL)
 
#define BPROT_CONFIG3_REGION107_Enabled   (1UL)
 
#define BPROT_CONFIG3_REGION106_Pos   (10UL)
 
#define BPROT_CONFIG3_REGION106_Msk   (0x1UL << BPROT_CONFIG3_REGION106_Pos)
 
#define BPROT_CONFIG3_REGION106_Disabled   (0UL)
 
#define BPROT_CONFIG3_REGION106_Enabled   (1UL)
 
#define BPROT_CONFIG3_REGION105_Pos   (9UL)
 
#define BPROT_CONFIG3_REGION105_Msk   (0x1UL << BPROT_CONFIG3_REGION105_Pos)
 
#define BPROT_CONFIG3_REGION105_Disabled   (0UL)
 
#define BPROT_CONFIG3_REGION105_Enabled   (1UL)
 
#define BPROT_CONFIG3_REGION104_Pos   (8UL)
 
#define BPROT_CONFIG3_REGION104_Msk   (0x1UL << BPROT_CONFIG3_REGION104_Pos)
 
#define BPROT_CONFIG3_REGION104_Disabled   (0UL)
 
#define BPROT_CONFIG3_REGION104_Enabled   (1UL)
 
#define BPROT_CONFIG3_REGION103_Pos   (7UL)
 
#define BPROT_CONFIG3_REGION103_Msk   (0x1UL << BPROT_CONFIG3_REGION103_Pos)
 
#define BPROT_CONFIG3_REGION103_Disabled   (0UL)
 
#define BPROT_CONFIG3_REGION103_Enabled   (1UL)
 
#define BPROT_CONFIG3_REGION102_Pos   (6UL)
 
#define BPROT_CONFIG3_REGION102_Msk   (0x1UL << BPROT_CONFIG3_REGION102_Pos)
 
#define BPROT_CONFIG3_REGION102_Disabled   (0UL)
 
#define BPROT_CONFIG3_REGION102_Enabled   (1UL)
 
#define BPROT_CONFIG3_REGION101_Pos   (5UL)
 
#define BPROT_CONFIG3_REGION101_Msk   (0x1UL << BPROT_CONFIG3_REGION101_Pos)
 
#define BPROT_CONFIG3_REGION101_Disabled   (0UL)
 
#define BPROT_CONFIG3_REGION101_Enabled   (1UL)
 
#define BPROT_CONFIG3_REGION100_Pos   (4UL)
 
#define BPROT_CONFIG3_REGION100_Msk   (0x1UL << BPROT_CONFIG3_REGION100_Pos)
 
#define BPROT_CONFIG3_REGION100_Disabled   (0UL)
 
#define BPROT_CONFIG3_REGION100_Enabled   (1UL)
 
#define BPROT_CONFIG3_REGION99_Pos   (3UL)
 
#define BPROT_CONFIG3_REGION99_Msk   (0x1UL << BPROT_CONFIG3_REGION99_Pos)
 
#define BPROT_CONFIG3_REGION99_Disabled   (0UL)
 
#define BPROT_CONFIG3_REGION99_Enabled   (1UL)
 
#define BPROT_CONFIG3_REGION98_Pos   (2UL)
 
#define BPROT_CONFIG3_REGION98_Msk   (0x1UL << BPROT_CONFIG3_REGION98_Pos)
 
#define BPROT_CONFIG3_REGION98_Disabled   (0UL)
 
#define BPROT_CONFIG3_REGION98_Enabled   (1UL)
 
#define BPROT_CONFIG3_REGION97_Pos   (1UL)
 
#define BPROT_CONFIG3_REGION97_Msk   (0x1UL << BPROT_CONFIG3_REGION97_Pos)
 
#define BPROT_CONFIG3_REGION97_Disabled   (0UL)
 
#define BPROT_CONFIG3_REGION97_Enabled   (1UL)
 
#define BPROT_CONFIG3_REGION96_Pos   (0UL)
 
#define BPROT_CONFIG3_REGION96_Msk   (0x1UL << BPROT_CONFIG3_REGION96_Pos)
 
#define BPROT_CONFIG3_REGION96_Disabled   (0UL)
 
#define BPROT_CONFIG3_REGION96_Enabled   (1UL)
 
#define CCM_SHORTS_ENDKSGEN_CRYPT_Pos   (0UL)
 
#define CCM_SHORTS_ENDKSGEN_CRYPT_Msk   (0x1UL << CCM_SHORTS_ENDKSGEN_CRYPT_Pos)
 
#define CCM_SHORTS_ENDKSGEN_CRYPT_Disabled   (0UL)
 
#define CCM_SHORTS_ENDKSGEN_CRYPT_Enabled   (1UL)
 
#define CCM_INTENSET_ERROR_Pos   (2UL)
 
#define CCM_INTENSET_ERROR_Msk   (0x1UL << CCM_INTENSET_ERROR_Pos)
 
#define CCM_INTENSET_ERROR_Disabled   (0UL)
 
#define CCM_INTENSET_ERROR_Enabled   (1UL)
 
#define CCM_INTENSET_ERROR_Set   (1UL)
 
#define CCM_INTENSET_ENDCRYPT_Pos   (1UL)
 
#define CCM_INTENSET_ENDCRYPT_Msk   (0x1UL << CCM_INTENSET_ENDCRYPT_Pos)
 
#define CCM_INTENSET_ENDCRYPT_Disabled   (0UL)
 
#define CCM_INTENSET_ENDCRYPT_Enabled   (1UL)
 
#define CCM_INTENSET_ENDCRYPT_Set   (1UL)
 
#define CCM_INTENSET_ENDKSGEN_Pos   (0UL)
 
#define CCM_INTENSET_ENDKSGEN_Msk   (0x1UL << CCM_INTENSET_ENDKSGEN_Pos)
 
#define CCM_INTENSET_ENDKSGEN_Disabled   (0UL)
 
#define CCM_INTENSET_ENDKSGEN_Enabled   (1UL)
 
#define CCM_INTENSET_ENDKSGEN_Set   (1UL)
 
#define CCM_INTENCLR_ERROR_Pos   (2UL)
 
#define CCM_INTENCLR_ERROR_Msk   (0x1UL << CCM_INTENCLR_ERROR_Pos)
 
#define CCM_INTENCLR_ERROR_Disabled   (0UL)
 
#define CCM_INTENCLR_ERROR_Enabled   (1UL)
 
#define CCM_INTENCLR_ERROR_Clear   (1UL)
 
#define CCM_INTENCLR_ENDCRYPT_Pos   (1UL)
 
#define CCM_INTENCLR_ENDCRYPT_Msk   (0x1UL << CCM_INTENCLR_ENDCRYPT_Pos)
 
#define CCM_INTENCLR_ENDCRYPT_Disabled   (0UL)
 
#define CCM_INTENCLR_ENDCRYPT_Enabled   (1UL)
 
#define CCM_INTENCLR_ENDCRYPT_Clear   (1UL)
 
#define CCM_INTENCLR_ENDKSGEN_Pos   (0UL)
 
#define CCM_INTENCLR_ENDKSGEN_Msk   (0x1UL << CCM_INTENCLR_ENDKSGEN_Pos)
 
#define CCM_INTENCLR_ENDKSGEN_Disabled   (0UL)
 
#define CCM_INTENCLR_ENDKSGEN_Enabled   (1UL)
 
#define CCM_INTENCLR_ENDKSGEN_Clear   (1UL)
 
#define CCM_MICSTATUS_MICSTATUS_Pos   (0UL)
 
#define CCM_MICSTATUS_MICSTATUS_Msk   (0x1UL << CCM_MICSTATUS_MICSTATUS_Pos)
 
#define CCM_MICSTATUS_MICSTATUS_CheckFailed   (0UL)
 
#define CCM_MICSTATUS_MICSTATUS_CheckPassed   (1UL)
 
#define CCM_ENABLE_ENABLE_Pos   (0UL)
 
#define CCM_ENABLE_ENABLE_Msk   (0x3UL << CCM_ENABLE_ENABLE_Pos)
 
#define CCM_ENABLE_ENABLE_Disabled   (0UL)
 
#define CCM_ENABLE_ENABLE_Enabled   (2UL)
 
#define CCM_MODE_LENGTH_Pos   (24UL)
 
#define CCM_MODE_LENGTH_Msk   (0x1UL << CCM_MODE_LENGTH_Pos)
 
#define CCM_MODE_LENGTH_Default   (0UL)
 
#define CCM_MODE_LENGTH_Extended   (1UL)
 
#define CCM_MODE_DATARATE_Pos   (16UL)
 
#define CCM_MODE_DATARATE_Msk   (0x1UL << CCM_MODE_DATARATE_Pos)
 
#define CCM_MODE_DATARATE_1Mbit   (0UL)
 
#define CCM_MODE_DATARATE_2Mbit   (1UL)
 
#define CCM_MODE_MODE_Pos   (0UL)
 
#define CCM_MODE_MODE_Msk   (0x1UL << CCM_MODE_MODE_Pos)
 
#define CCM_MODE_MODE_Encryption   (0UL)
 
#define CCM_MODE_MODE_Decryption   (1UL)
 
#define CCM_CNFPTR_CNFPTR_Pos   (0UL)
 
#define CCM_CNFPTR_CNFPTR_Msk   (0xFFFFFFFFUL << CCM_CNFPTR_CNFPTR_Pos)
 
#define CCM_INPTR_INPTR_Pos   (0UL)
 
#define CCM_INPTR_INPTR_Msk   (0xFFFFFFFFUL << CCM_INPTR_INPTR_Pos)
 
#define CCM_OUTPTR_OUTPTR_Pos   (0UL)
 
#define CCM_OUTPTR_OUTPTR_Msk   (0xFFFFFFFFUL << CCM_OUTPTR_OUTPTR_Pos)
 
#define CCM_SCRATCHPTR_SCRATCHPTR_Pos   (0UL)
 
#define CCM_SCRATCHPTR_SCRATCHPTR_Msk   (0xFFFFFFFFUL << CCM_SCRATCHPTR_SCRATCHPTR_Pos)
 
#define CLOCK_INTENSET_CTTO_Pos   (4UL)
 
#define CLOCK_INTENSET_CTTO_Msk   (0x1UL << CLOCK_INTENSET_CTTO_Pos)
 
#define CLOCK_INTENSET_CTTO_Disabled   (0UL)
 
#define CLOCK_INTENSET_CTTO_Enabled   (1UL)
 
#define CLOCK_INTENSET_CTTO_Set   (1UL)
 
#define CLOCK_INTENSET_DONE_Pos   (3UL)
 
#define CLOCK_INTENSET_DONE_Msk   (0x1UL << CLOCK_INTENSET_DONE_Pos)
 
#define CLOCK_INTENSET_DONE_Disabled   (0UL)
 
#define CLOCK_INTENSET_DONE_Enabled   (1UL)
 
#define CLOCK_INTENSET_DONE_Set   (1UL)
 
#define CLOCK_INTENSET_LFCLKSTARTED_Pos   (1UL)
 
#define CLOCK_INTENSET_LFCLKSTARTED_Msk   (0x1UL << CLOCK_INTENSET_LFCLKSTARTED_Pos)
 
#define CLOCK_INTENSET_LFCLKSTARTED_Disabled   (0UL)
 
#define CLOCK_INTENSET_LFCLKSTARTED_Enabled   (1UL)
 
#define CLOCK_INTENSET_LFCLKSTARTED_Set   (1UL)
 
#define CLOCK_INTENSET_HFCLKSTARTED_Pos   (0UL)
 
#define CLOCK_INTENSET_HFCLKSTARTED_Msk   (0x1UL << CLOCK_INTENSET_HFCLKSTARTED_Pos)
 
#define CLOCK_INTENSET_HFCLKSTARTED_Disabled   (0UL)
 
#define CLOCK_INTENSET_HFCLKSTARTED_Enabled   (1UL)
 
#define CLOCK_INTENSET_HFCLKSTARTED_Set   (1UL)
 
#define CLOCK_INTENCLR_CTTO_Pos   (4UL)
 
#define CLOCK_INTENCLR_CTTO_Msk   (0x1UL << CLOCK_INTENCLR_CTTO_Pos)
 
#define CLOCK_INTENCLR_CTTO_Disabled   (0UL)
 
#define CLOCK_INTENCLR_CTTO_Enabled   (1UL)
 
#define CLOCK_INTENCLR_CTTO_Clear   (1UL)
 
#define CLOCK_INTENCLR_DONE_Pos   (3UL)
 
#define CLOCK_INTENCLR_DONE_Msk   (0x1UL << CLOCK_INTENCLR_DONE_Pos)
 
#define CLOCK_INTENCLR_DONE_Disabled   (0UL)
 
#define CLOCK_INTENCLR_DONE_Enabled   (1UL)
 
#define CLOCK_INTENCLR_DONE_Clear   (1UL)
 
#define CLOCK_INTENCLR_LFCLKSTARTED_Pos   (1UL)
 
#define CLOCK_INTENCLR_LFCLKSTARTED_Msk   (0x1UL << CLOCK_INTENCLR_LFCLKSTARTED_Pos)
 
#define CLOCK_INTENCLR_LFCLKSTARTED_Disabled   (0UL)
 
#define CLOCK_INTENCLR_LFCLKSTARTED_Enabled   (1UL)
 
#define CLOCK_INTENCLR_LFCLKSTARTED_Clear   (1UL)
 
#define CLOCK_INTENCLR_HFCLKSTARTED_Pos   (0UL)
 
#define CLOCK_INTENCLR_HFCLKSTARTED_Msk   (0x1UL << CLOCK_INTENCLR_HFCLKSTARTED_Pos)
 
#define CLOCK_INTENCLR_HFCLKSTARTED_Disabled   (0UL)
 
#define CLOCK_INTENCLR_HFCLKSTARTED_Enabled   (1UL)
 
#define CLOCK_INTENCLR_HFCLKSTARTED_Clear   (1UL)
 
#define CLOCK_HFCLKRUN_STATUS_Pos   (0UL)
 
#define CLOCK_HFCLKRUN_STATUS_Msk   (0x1UL << CLOCK_HFCLKRUN_STATUS_Pos)
 
#define CLOCK_HFCLKRUN_STATUS_NotTriggered   (0UL)
 
#define CLOCK_HFCLKRUN_STATUS_Triggered   (1UL)
 
#define CLOCK_HFCLKSTAT_STATE_Pos   (16UL)
 
#define CLOCK_HFCLKSTAT_STATE_Msk   (0x1UL << CLOCK_HFCLKSTAT_STATE_Pos)
 
#define CLOCK_HFCLKSTAT_STATE_NotRunning   (0UL)
 
#define CLOCK_HFCLKSTAT_STATE_Running   (1UL)
 
#define CLOCK_HFCLKSTAT_SRC_Pos   (0UL)
 
#define CLOCK_HFCLKSTAT_SRC_Msk   (0x1UL << CLOCK_HFCLKSTAT_SRC_Pos)
 
#define CLOCK_HFCLKSTAT_SRC_RC   (0UL)
 
#define CLOCK_HFCLKSTAT_SRC_Xtal   (1UL)
 
#define CLOCK_LFCLKRUN_STATUS_Pos   (0UL)
 
#define CLOCK_LFCLKRUN_STATUS_Msk   (0x1UL << CLOCK_LFCLKRUN_STATUS_Pos)
 
#define CLOCK_LFCLKRUN_STATUS_NotTriggered   (0UL)
 
#define CLOCK_LFCLKRUN_STATUS_Triggered   (1UL)
 
#define CLOCK_LFCLKSTAT_STATE_Pos   (16UL)
 
#define CLOCK_LFCLKSTAT_STATE_Msk   (0x1UL << CLOCK_LFCLKSTAT_STATE_Pos)
 
#define CLOCK_LFCLKSTAT_STATE_NotRunning   (0UL)
 
#define CLOCK_LFCLKSTAT_STATE_Running   (1UL)
 
#define CLOCK_LFCLKSTAT_SRC_Pos   (0UL)
 
#define CLOCK_LFCLKSTAT_SRC_Msk   (0x3UL << CLOCK_LFCLKSTAT_SRC_Pos)
 
#define CLOCK_LFCLKSTAT_SRC_RC   (0UL)
 
#define CLOCK_LFCLKSTAT_SRC_Xtal   (1UL)
 
#define CLOCK_LFCLKSTAT_SRC_Synth   (2UL)
 
#define CLOCK_LFCLKSRCCOPY_SRC_Pos   (0UL)
 
#define CLOCK_LFCLKSRCCOPY_SRC_Msk   (0x3UL << CLOCK_LFCLKSRCCOPY_SRC_Pos)
 
#define CLOCK_LFCLKSRCCOPY_SRC_RC   (0UL)
 
#define CLOCK_LFCLKSRCCOPY_SRC_Xtal   (1UL)
 
#define CLOCK_LFCLKSRCCOPY_SRC_Synth   (2UL)
 
#define CLOCK_LFCLKSRC_SRC_Pos   (0UL)
 
#define CLOCK_LFCLKSRC_SRC_Msk   (0x3UL << CLOCK_LFCLKSRC_SRC_Pos)
 
#define CLOCK_LFCLKSRC_SRC_RC   (0UL)
 
#define CLOCK_LFCLKSRC_SRC_Xtal   (1UL)
 
#define CLOCK_LFCLKSRC_SRC_Synth   (2UL)
 
#define CLOCK_CTIV_CTIV_Pos   (0UL)
 
#define CLOCK_CTIV_CTIV_Msk   (0x7FUL << CLOCK_CTIV_CTIV_Pos)
 
#define CLOCK_TRACECONFIG_TRACEMUX_Pos   (16UL)
 
#define CLOCK_TRACECONFIG_TRACEMUX_Msk   (0x3UL << CLOCK_TRACECONFIG_TRACEMUX_Pos)
 
#define CLOCK_TRACECONFIG_TRACEMUX_GPIO   (0UL)
 
#define CLOCK_TRACECONFIG_TRACEMUX_Serial   (1UL)
 
#define CLOCK_TRACECONFIG_TRACEMUX_Parallel   (2UL)
 
#define CLOCK_TRACECONFIG_TRACEPORTSPEED_Pos   (0UL)
 
#define CLOCK_TRACECONFIG_TRACEPORTSPEED_Msk   (0x3UL << CLOCK_TRACECONFIG_TRACEPORTSPEED_Pos)
 
#define CLOCK_TRACECONFIG_TRACEPORTSPEED_32MHz   (0UL)
 
#define CLOCK_TRACECONFIG_TRACEPORTSPEED_16MHz   (1UL)
 
#define CLOCK_TRACECONFIG_TRACEPORTSPEED_8MHz   (2UL)
 
#define CLOCK_TRACECONFIG_TRACEPORTSPEED_4MHz   (3UL)
 
#define COMP_SHORTS_CROSS_STOP_Pos   (4UL)
 
#define COMP_SHORTS_CROSS_STOP_Msk   (0x1UL << COMP_SHORTS_CROSS_STOP_Pos)
 
#define COMP_SHORTS_CROSS_STOP_Disabled   (0UL)
 
#define COMP_SHORTS_CROSS_STOP_Enabled   (1UL)
 
#define COMP_SHORTS_UP_STOP_Pos   (3UL)
 
#define COMP_SHORTS_UP_STOP_Msk   (0x1UL << COMP_SHORTS_UP_STOP_Pos)
 
#define COMP_SHORTS_UP_STOP_Disabled   (0UL)
 
#define COMP_SHORTS_UP_STOP_Enabled   (1UL)
 
#define COMP_SHORTS_DOWN_STOP_Pos   (2UL)
 
#define COMP_SHORTS_DOWN_STOP_Msk   (0x1UL << COMP_SHORTS_DOWN_STOP_Pos)
 
#define COMP_SHORTS_DOWN_STOP_Disabled   (0UL)
 
#define COMP_SHORTS_DOWN_STOP_Enabled   (1UL)
 
#define COMP_SHORTS_READY_STOP_Pos   (1UL)
 
#define COMP_SHORTS_READY_STOP_Msk   (0x1UL << COMP_SHORTS_READY_STOP_Pos)
 
#define COMP_SHORTS_READY_STOP_Disabled   (0UL)
 
#define COMP_SHORTS_READY_STOP_Enabled   (1UL)
 
#define COMP_SHORTS_READY_SAMPLE_Pos   (0UL)
 
#define COMP_SHORTS_READY_SAMPLE_Msk   (0x1UL << COMP_SHORTS_READY_SAMPLE_Pos)
 
#define COMP_SHORTS_READY_SAMPLE_Disabled   (0UL)
 
#define COMP_SHORTS_READY_SAMPLE_Enabled   (1UL)
 
#define COMP_INTEN_CROSS_Pos   (3UL)
 
#define COMP_INTEN_CROSS_Msk   (0x1UL << COMP_INTEN_CROSS_Pos)
 
#define COMP_INTEN_CROSS_Disabled   (0UL)
 
#define COMP_INTEN_CROSS_Enabled   (1UL)
 
#define COMP_INTEN_UP_Pos   (2UL)
 
#define COMP_INTEN_UP_Msk   (0x1UL << COMP_INTEN_UP_Pos)
 
#define COMP_INTEN_UP_Disabled   (0UL)
 
#define COMP_INTEN_UP_Enabled   (1UL)
 
#define COMP_INTEN_DOWN_Pos   (1UL)
 
#define COMP_INTEN_DOWN_Msk   (0x1UL << COMP_INTEN_DOWN_Pos)
 
#define COMP_INTEN_DOWN_Disabled   (0UL)
 
#define COMP_INTEN_DOWN_Enabled   (1UL)
 
#define COMP_INTEN_READY_Pos   (0UL)
 
#define COMP_INTEN_READY_Msk   (0x1UL << COMP_INTEN_READY_Pos)
 
#define COMP_INTEN_READY_Disabled   (0UL)
 
#define COMP_INTEN_READY_Enabled   (1UL)
 
#define COMP_INTENSET_CROSS_Pos   (3UL)
 
#define COMP_INTENSET_CROSS_Msk   (0x1UL << COMP_INTENSET_CROSS_Pos)
 
#define COMP_INTENSET_CROSS_Disabled   (0UL)
 
#define COMP_INTENSET_CROSS_Enabled   (1UL)
 
#define COMP_INTENSET_CROSS_Set   (1UL)
 
#define COMP_INTENSET_UP_Pos   (2UL)
 
#define COMP_INTENSET_UP_Msk   (0x1UL << COMP_INTENSET_UP_Pos)
 
#define COMP_INTENSET_UP_Disabled   (0UL)
 
#define COMP_INTENSET_UP_Enabled   (1UL)
 
#define COMP_INTENSET_UP_Set   (1UL)
 
#define COMP_INTENSET_DOWN_Pos   (1UL)
 
#define COMP_INTENSET_DOWN_Msk   (0x1UL << COMP_INTENSET_DOWN_Pos)
 
#define COMP_INTENSET_DOWN_Disabled   (0UL)
 
#define COMP_INTENSET_DOWN_Enabled   (1UL)
 
#define COMP_INTENSET_DOWN_Set   (1UL)
 
#define COMP_INTENSET_READY_Pos   (0UL)
 
#define COMP_INTENSET_READY_Msk   (0x1UL << COMP_INTENSET_READY_Pos)
 
#define COMP_INTENSET_READY_Disabled   (0UL)
 
#define COMP_INTENSET_READY_Enabled   (1UL)
 
#define COMP_INTENSET_READY_Set   (1UL)
 
#define COMP_INTENCLR_CROSS_Pos   (3UL)
 
#define COMP_INTENCLR_CROSS_Msk   (0x1UL << COMP_INTENCLR_CROSS_Pos)
 
#define COMP_INTENCLR_CROSS_Disabled   (0UL)
 
#define COMP_INTENCLR_CROSS_Enabled   (1UL)
 
#define COMP_INTENCLR_CROSS_Clear   (1UL)
 
#define COMP_INTENCLR_UP_Pos   (2UL)
 
#define COMP_INTENCLR_UP_Msk   (0x1UL << COMP_INTENCLR_UP_Pos)
 
#define COMP_INTENCLR_UP_Disabled   (0UL)
 
#define COMP_INTENCLR_UP_Enabled   (1UL)
 
#define COMP_INTENCLR_UP_Clear   (1UL)
 
#define COMP_INTENCLR_DOWN_Pos   (1UL)
 
#define COMP_INTENCLR_DOWN_Msk   (0x1UL << COMP_INTENCLR_DOWN_Pos)
 
#define COMP_INTENCLR_DOWN_Disabled   (0UL)
 
#define COMP_INTENCLR_DOWN_Enabled   (1UL)
 
#define COMP_INTENCLR_DOWN_Clear   (1UL)
 
#define COMP_INTENCLR_READY_Pos   (0UL)
 
#define COMP_INTENCLR_READY_Msk   (0x1UL << COMP_INTENCLR_READY_Pos)
 
#define COMP_INTENCLR_READY_Disabled   (0UL)
 
#define COMP_INTENCLR_READY_Enabled   (1UL)
 
#define COMP_INTENCLR_READY_Clear   (1UL)
 
#define COMP_RESULT_RESULT_Pos   (0UL)
 
#define COMP_RESULT_RESULT_Msk   (0x1UL << COMP_RESULT_RESULT_Pos)
 
#define COMP_RESULT_RESULT_Below   (0UL)
 
#define COMP_RESULT_RESULT_Above   (1UL)
 
#define COMP_ENABLE_ENABLE_Pos   (0UL)
 
#define COMP_ENABLE_ENABLE_Msk   (0x3UL << COMP_ENABLE_ENABLE_Pos)
 
#define COMP_ENABLE_ENABLE_Disabled   (0UL)
 
#define COMP_ENABLE_ENABLE_Enabled   (2UL)
 
#define COMP_PSEL_PSEL_Pos   (0UL)
 
#define COMP_PSEL_PSEL_Msk   (0x7UL << COMP_PSEL_PSEL_Pos)
 
#define COMP_PSEL_PSEL_AnalogInput0   (0UL)
 
#define COMP_PSEL_PSEL_AnalogInput1   (1UL)
 
#define COMP_PSEL_PSEL_AnalogInput2   (2UL)
 
#define COMP_PSEL_PSEL_AnalogInput3   (3UL)
 
#define COMP_PSEL_PSEL_AnalogInput4   (4UL)
 
#define COMP_PSEL_PSEL_AnalogInput5   (5UL)
 
#define COMP_PSEL_PSEL_AnalogInput6   (6UL)
 
#define COMP_PSEL_PSEL_AnalogInput7   (7UL)
 
#define COMP_REFSEL_REFSEL_Pos   (0UL)
 
#define COMP_REFSEL_REFSEL_Msk   (0x7UL << COMP_REFSEL_REFSEL_Pos)
 
#define COMP_REFSEL_REFSEL_Int1V2   (0UL)
 
#define COMP_REFSEL_REFSEL_Int1V8   (1UL)
 
#define COMP_REFSEL_REFSEL_Int2V4   (2UL)
 
#define COMP_REFSEL_REFSEL_VDD   (4UL)
 
#define COMP_REFSEL_REFSEL_ARef   (5UL)
 
#define COMP_EXTREFSEL_EXTREFSEL_Pos   (0UL)
 
#define COMP_EXTREFSEL_EXTREFSEL_Msk   (0x1UL << COMP_EXTREFSEL_EXTREFSEL_Pos)
 
#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference0   (0UL)
 
#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference1   (1UL)
 
#define COMP_TH_THDOWN_Pos   (8UL)
 
#define COMP_TH_THDOWN_Msk   (0x3FUL << COMP_TH_THDOWN_Pos)
 
#define COMP_TH_THUP_Pos   (0UL)
 
#define COMP_TH_THUP_Msk   (0x3FUL << COMP_TH_THUP_Pos)
 
#define COMP_MODE_MAIN_Pos   (8UL)
 
#define COMP_MODE_MAIN_Msk   (0x1UL << COMP_MODE_MAIN_Pos)
 
#define COMP_MODE_MAIN_SE   (0UL)
 
#define COMP_MODE_MAIN_Diff   (1UL)
 
#define COMP_MODE_SP_Pos   (0UL)
 
#define COMP_MODE_SP_Msk   (0x3UL << COMP_MODE_SP_Pos)
 
#define COMP_MODE_SP_Low   (0UL)
 
#define COMP_MODE_SP_Normal   (1UL)
 
#define COMP_MODE_SP_High   (2UL)
 
#define COMP_HYST_HYST_Pos   (0UL)
 
#define COMP_HYST_HYST_Msk   (0x1UL << COMP_HYST_HYST_Pos)
 
#define COMP_HYST_HYST_NoHyst   (0UL)
 
#define COMP_HYST_HYST_Hyst50mV   (1UL)
 
#define COMP_ISOURCE_ISOURCE_Pos   (0UL)
 
#define COMP_ISOURCE_ISOURCE_Msk   (0x3UL << COMP_ISOURCE_ISOURCE_Pos)
 
#define COMP_ISOURCE_ISOURCE_Off   (0UL)
 
#define COMP_ISOURCE_ISOURCE_Ien2mA5   (1UL)
 
#define COMP_ISOURCE_ISOURCE_Ien5mA   (2UL)
 
#define COMP_ISOURCE_ISOURCE_Ien10mA   (3UL)
 
#define ECB_INTENSET_ERRORECB_Pos   (1UL)
 
#define ECB_INTENSET_ERRORECB_Msk   (0x1UL << ECB_INTENSET_ERRORECB_Pos)
 
#define ECB_INTENSET_ERRORECB_Disabled   (0UL)
 
#define ECB_INTENSET_ERRORECB_Enabled   (1UL)
 
#define ECB_INTENSET_ERRORECB_Set   (1UL)
 
#define ECB_INTENSET_ENDECB_Pos   (0UL)
 
#define ECB_INTENSET_ENDECB_Msk   (0x1UL << ECB_INTENSET_ENDECB_Pos)
 
#define ECB_INTENSET_ENDECB_Disabled   (0UL)
 
#define ECB_INTENSET_ENDECB_Enabled   (1UL)
 
#define ECB_INTENSET_ENDECB_Set   (1UL)
 
#define ECB_INTENCLR_ERRORECB_Pos   (1UL)
 
#define ECB_INTENCLR_ERRORECB_Msk   (0x1UL << ECB_INTENCLR_ERRORECB_Pos)
 
#define ECB_INTENCLR_ERRORECB_Disabled   (0UL)
 
#define ECB_INTENCLR_ERRORECB_Enabled   (1UL)
 
#define ECB_INTENCLR_ERRORECB_Clear   (1UL)
 
#define ECB_INTENCLR_ENDECB_Pos   (0UL)
 
#define ECB_INTENCLR_ENDECB_Msk   (0x1UL << ECB_INTENCLR_ENDECB_Pos)
 
#define ECB_INTENCLR_ENDECB_Disabled   (0UL)
 
#define ECB_INTENCLR_ENDECB_Enabled   (1UL)
 
#define ECB_INTENCLR_ENDECB_Clear   (1UL)
 
#define ECB_ECBDATAPTR_ECBDATAPTR_Pos   (0UL)
 
#define ECB_ECBDATAPTR_ECBDATAPTR_Msk   (0xFFFFFFFFUL << ECB_ECBDATAPTR_ECBDATAPTR_Pos)
 
#define EGU_INTEN_TRIGGERED15_Pos   (15UL)
 
#define EGU_INTEN_TRIGGERED15_Msk   (0x1UL << EGU_INTEN_TRIGGERED15_Pos)
 
#define EGU_INTEN_TRIGGERED15_Disabled   (0UL)
 
#define EGU_INTEN_TRIGGERED15_Enabled   (1UL)
 
#define EGU_INTEN_TRIGGERED14_Pos   (14UL)
 
#define EGU_INTEN_TRIGGERED14_Msk   (0x1UL << EGU_INTEN_TRIGGERED14_Pos)
 
#define EGU_INTEN_TRIGGERED14_Disabled   (0UL)
 
#define EGU_INTEN_TRIGGERED14_Enabled   (1UL)
 
#define EGU_INTEN_TRIGGERED13_Pos   (13UL)
 
#define EGU_INTEN_TRIGGERED13_Msk   (0x1UL << EGU_INTEN_TRIGGERED13_Pos)
 
#define EGU_INTEN_TRIGGERED13_Disabled   (0UL)
 
#define EGU_INTEN_TRIGGERED13_Enabled   (1UL)
 
#define EGU_INTEN_TRIGGERED12_Pos   (12UL)
 
#define EGU_INTEN_TRIGGERED12_Msk   (0x1UL << EGU_INTEN_TRIGGERED12_Pos)
 
#define EGU_INTEN_TRIGGERED12_Disabled   (0UL)
 
#define EGU_INTEN_TRIGGERED12_Enabled   (1UL)
 
#define EGU_INTEN_TRIGGERED11_Pos   (11UL)
 
#define EGU_INTEN_TRIGGERED11_Msk   (0x1UL << EGU_INTEN_TRIGGERED11_Pos)
 
#define EGU_INTEN_TRIGGERED11_Disabled   (0UL)
 
#define EGU_INTEN_TRIGGERED11_Enabled   (1UL)
 
#define EGU_INTEN_TRIGGERED10_Pos   (10UL)
 
#define EGU_INTEN_TRIGGERED10_Msk   (0x1UL << EGU_INTEN_TRIGGERED10_Pos)
 
#define EGU_INTEN_TRIGGERED10_Disabled   (0UL)
 
#define EGU_INTEN_TRIGGERED10_Enabled   (1UL)
 
#define EGU_INTEN_TRIGGERED9_Pos   (9UL)
 
#define EGU_INTEN_TRIGGERED9_Msk   (0x1UL << EGU_INTEN_TRIGGERED9_Pos)
 
#define EGU_INTEN_TRIGGERED9_Disabled   (0UL)
 
#define EGU_INTEN_TRIGGERED9_Enabled   (1UL)
 
#define EGU_INTEN_TRIGGERED8_Pos   (8UL)
 
#define EGU_INTEN_TRIGGERED8_Msk   (0x1UL << EGU_INTEN_TRIGGERED8_Pos)
 
#define EGU_INTEN_TRIGGERED8_Disabled   (0UL)
 
#define EGU_INTEN_TRIGGERED8_Enabled   (1UL)
 
#define EGU_INTEN_TRIGGERED7_Pos   (7UL)
 
#define EGU_INTEN_TRIGGERED7_Msk   (0x1UL << EGU_INTEN_TRIGGERED7_Pos)
 
#define EGU_INTEN_TRIGGERED7_Disabled   (0UL)
 
#define EGU_INTEN_TRIGGERED7_Enabled   (1UL)
 
#define EGU_INTEN_TRIGGERED6_Pos   (6UL)
 
#define EGU_INTEN_TRIGGERED6_Msk   (0x1UL << EGU_INTEN_TRIGGERED6_Pos)
 
#define EGU_INTEN_TRIGGERED6_Disabled   (0UL)
 
#define EGU_INTEN_TRIGGERED6_Enabled   (1UL)
 
#define EGU_INTEN_TRIGGERED5_Pos   (5UL)
 
#define EGU_INTEN_TRIGGERED5_Msk   (0x1UL << EGU_INTEN_TRIGGERED5_Pos)
 
#define EGU_INTEN_TRIGGERED5_Disabled   (0UL)
 
#define EGU_INTEN_TRIGGERED5_Enabled   (1UL)
 
#define EGU_INTEN_TRIGGERED4_Pos   (4UL)
 
#define EGU_INTEN_TRIGGERED4_Msk   (0x1UL << EGU_INTEN_TRIGGERED4_Pos)
 
#define EGU_INTEN_TRIGGERED4_Disabled   (0UL)
 
#define EGU_INTEN_TRIGGERED4_Enabled   (1UL)
 
#define EGU_INTEN_TRIGGERED3_Pos   (3UL)
 
#define EGU_INTEN_TRIGGERED3_Msk   (0x1UL << EGU_INTEN_TRIGGERED3_Pos)
 
#define EGU_INTEN_TRIGGERED3_Disabled   (0UL)
 
#define EGU_INTEN_TRIGGERED3_Enabled   (1UL)
 
#define EGU_INTEN_TRIGGERED2_Pos   (2UL)
 
#define EGU_INTEN_TRIGGERED2_Msk   (0x1UL << EGU_INTEN_TRIGGERED2_Pos)
 
#define EGU_INTEN_TRIGGERED2_Disabled   (0UL)
 
#define EGU_INTEN_TRIGGERED2_Enabled   (1UL)
 
#define EGU_INTEN_TRIGGERED1_Pos   (1UL)
 
#define EGU_INTEN_TRIGGERED1_Msk   (0x1UL << EGU_INTEN_TRIGGERED1_Pos)
 
#define EGU_INTEN_TRIGGERED1_Disabled   (0UL)
 
#define EGU_INTEN_TRIGGERED1_Enabled   (1UL)
 
#define EGU_INTEN_TRIGGERED0_Pos   (0UL)
 
#define EGU_INTEN_TRIGGERED0_Msk   (0x1UL << EGU_INTEN_TRIGGERED0_Pos)
 
#define EGU_INTEN_TRIGGERED0_Disabled   (0UL)
 
#define EGU_INTEN_TRIGGERED0_Enabled   (1UL)
 
#define EGU_INTENSET_TRIGGERED15_Pos   (15UL)
 
#define EGU_INTENSET_TRIGGERED15_Msk   (0x1UL << EGU_INTENSET_TRIGGERED15_Pos)
 
#define EGU_INTENSET_TRIGGERED15_Disabled   (0UL)
 
#define EGU_INTENSET_TRIGGERED15_Enabled   (1UL)
 
#define EGU_INTENSET_TRIGGERED15_Set   (1UL)
 
#define EGU_INTENSET_TRIGGERED14_Pos   (14UL)
 
#define EGU_INTENSET_TRIGGERED14_Msk   (0x1UL << EGU_INTENSET_TRIGGERED14_Pos)
 
#define EGU_INTENSET_TRIGGERED14_Disabled   (0UL)
 
#define EGU_INTENSET_TRIGGERED14_Enabled   (1UL)
 
#define EGU_INTENSET_TRIGGERED14_Set   (1UL)
 
#define EGU_INTENSET_TRIGGERED13_Pos   (13UL)
 
#define EGU_INTENSET_TRIGGERED13_Msk   (0x1UL << EGU_INTENSET_TRIGGERED13_Pos)
 
#define EGU_INTENSET_TRIGGERED13_Disabled   (0UL)
 
#define EGU_INTENSET_TRIGGERED13_Enabled   (1UL)
 
#define EGU_INTENSET_TRIGGERED13_Set   (1UL)
 
#define EGU_INTENSET_TRIGGERED12_Pos   (12UL)
 
#define EGU_INTENSET_TRIGGERED12_Msk   (0x1UL << EGU_INTENSET_TRIGGERED12_Pos)
 
#define EGU_INTENSET_TRIGGERED12_Disabled   (0UL)
 
#define EGU_INTENSET_TRIGGERED12_Enabled   (1UL)
 
#define EGU_INTENSET_TRIGGERED12_Set   (1UL)
 
#define EGU_INTENSET_TRIGGERED11_Pos   (11UL)
 
#define EGU_INTENSET_TRIGGERED11_Msk   (0x1UL << EGU_INTENSET_TRIGGERED11_Pos)
 
#define EGU_INTENSET_TRIGGERED11_Disabled   (0UL)
 
#define EGU_INTENSET_TRIGGERED11_Enabled   (1UL)
 
#define EGU_INTENSET_TRIGGERED11_Set   (1UL)
 
#define EGU_INTENSET_TRIGGERED10_Pos   (10UL)
 
#define EGU_INTENSET_TRIGGERED10_Msk   (0x1UL << EGU_INTENSET_TRIGGERED10_Pos)
 
#define EGU_INTENSET_TRIGGERED10_Disabled   (0UL)
 
#define EGU_INTENSET_TRIGGERED10_Enabled   (1UL)
 
#define EGU_INTENSET_TRIGGERED10_Set   (1UL)
 
#define EGU_INTENSET_TRIGGERED9_Pos   (9UL)
 
#define EGU_INTENSET_TRIGGERED9_Msk   (0x1UL << EGU_INTENSET_TRIGGERED9_Pos)
 
#define EGU_INTENSET_TRIGGERED9_Disabled   (0UL)
 
#define EGU_INTENSET_TRIGGERED9_Enabled   (1UL)
 
#define EGU_INTENSET_TRIGGERED9_Set   (1UL)
 
#define EGU_INTENSET_TRIGGERED8_Pos   (8UL)
 
#define EGU_INTENSET_TRIGGERED8_Msk   (0x1UL << EGU_INTENSET_TRIGGERED8_Pos)
 
#define EGU_INTENSET_TRIGGERED8_Disabled   (0UL)
 
#define EGU_INTENSET_TRIGGERED8_Enabled   (1UL)
 
#define EGU_INTENSET_TRIGGERED8_Set   (1UL)
 
#define EGU_INTENSET_TRIGGERED7_Pos   (7UL)
 
#define EGU_INTENSET_TRIGGERED7_Msk   (0x1UL << EGU_INTENSET_TRIGGERED7_Pos)
 
#define EGU_INTENSET_TRIGGERED7_Disabled   (0UL)
 
#define EGU_INTENSET_TRIGGERED7_Enabled   (1UL)
 
#define EGU_INTENSET_TRIGGERED7_Set   (1UL)
 
#define EGU_INTENSET_TRIGGERED6_Pos   (6UL)
 
#define EGU_INTENSET_TRIGGERED6_Msk   (0x1UL << EGU_INTENSET_TRIGGERED6_Pos)
 
#define EGU_INTENSET_TRIGGERED6_Disabled   (0UL)
 
#define EGU_INTENSET_TRIGGERED6_Enabled   (1UL)
 
#define EGU_INTENSET_TRIGGERED6_Set   (1UL)
 
#define EGU_INTENSET_TRIGGERED5_Pos   (5UL)
 
#define EGU_INTENSET_TRIGGERED5_Msk   (0x1UL << EGU_INTENSET_TRIGGERED5_Pos)
 
#define EGU_INTENSET_TRIGGERED5_Disabled   (0UL)
 
#define EGU_INTENSET_TRIGGERED5_Enabled   (1UL)
 
#define EGU_INTENSET_TRIGGERED5_Set   (1UL)
 
#define EGU_INTENSET_TRIGGERED4_Pos   (4UL)
 
#define EGU_INTENSET_TRIGGERED4_Msk   (0x1UL << EGU_INTENSET_TRIGGERED4_Pos)
 
#define EGU_INTENSET_TRIGGERED4_Disabled   (0UL)
 
#define EGU_INTENSET_TRIGGERED4_Enabled   (1UL)
 
#define EGU_INTENSET_TRIGGERED4_Set   (1UL)
 
#define EGU_INTENSET_TRIGGERED3_Pos   (3UL)
 
#define EGU_INTENSET_TRIGGERED3_Msk   (0x1UL << EGU_INTENSET_TRIGGERED3_Pos)
 
#define EGU_INTENSET_TRIGGERED3_Disabled   (0UL)
 
#define EGU_INTENSET_TRIGGERED3_Enabled   (1UL)
 
#define EGU_INTENSET_TRIGGERED3_Set   (1UL)
 
#define EGU_INTENSET_TRIGGERED2_Pos   (2UL)
 
#define EGU_INTENSET_TRIGGERED2_Msk   (0x1UL << EGU_INTENSET_TRIGGERED2_Pos)
 
#define EGU_INTENSET_TRIGGERED2_Disabled   (0UL)
 
#define EGU_INTENSET_TRIGGERED2_Enabled   (1UL)
 
#define EGU_INTENSET_TRIGGERED2_Set   (1UL)
 
#define EGU_INTENSET_TRIGGERED1_Pos   (1UL)
 
#define EGU_INTENSET_TRIGGERED1_Msk   (0x1UL << EGU_INTENSET_TRIGGERED1_Pos)
 
#define EGU_INTENSET_TRIGGERED1_Disabled   (0UL)
 
#define EGU_INTENSET_TRIGGERED1_Enabled   (1UL)
 
#define EGU_INTENSET_TRIGGERED1_Set   (1UL)
 
#define EGU_INTENSET_TRIGGERED0_Pos   (0UL)
 
#define EGU_INTENSET_TRIGGERED0_Msk   (0x1UL << EGU_INTENSET_TRIGGERED0_Pos)
 
#define EGU_INTENSET_TRIGGERED0_Disabled   (0UL)
 
#define EGU_INTENSET_TRIGGERED0_Enabled   (1UL)
 
#define EGU_INTENSET_TRIGGERED0_Set   (1UL)
 
#define EGU_INTENCLR_TRIGGERED15_Pos   (15UL)
 
#define EGU_INTENCLR_TRIGGERED15_Msk   (0x1UL << EGU_INTENCLR_TRIGGERED15_Pos)
 
#define EGU_INTENCLR_TRIGGERED15_Disabled   (0UL)
 
#define EGU_INTENCLR_TRIGGERED15_Enabled   (1UL)
 
#define EGU_INTENCLR_TRIGGERED15_Clear   (1UL)
 
#define EGU_INTENCLR_TRIGGERED14_Pos   (14UL)
 
#define EGU_INTENCLR_TRIGGERED14_Msk   (0x1UL << EGU_INTENCLR_TRIGGERED14_Pos)
 
#define EGU_INTENCLR_TRIGGERED14_Disabled   (0UL)
 
#define EGU_INTENCLR_TRIGGERED14_Enabled   (1UL)
 
#define EGU_INTENCLR_TRIGGERED14_Clear   (1UL)
 
#define EGU_INTENCLR_TRIGGERED13_Pos   (13UL)
 
#define EGU_INTENCLR_TRIGGERED13_Msk   (0x1UL << EGU_INTENCLR_TRIGGERED13_Pos)
 
#define EGU_INTENCLR_TRIGGERED13_Disabled   (0UL)
 
#define EGU_INTENCLR_TRIGGERED13_Enabled   (1UL)
 
#define EGU_INTENCLR_TRIGGERED13_Clear   (1UL)
 
#define EGU_INTENCLR_TRIGGERED12_Pos   (12UL)
 
#define EGU_INTENCLR_TRIGGERED12_Msk   (0x1UL << EGU_INTENCLR_TRIGGERED12_Pos)
 
#define EGU_INTENCLR_TRIGGERED12_Disabled   (0UL)
 
#define EGU_INTENCLR_TRIGGERED12_Enabled   (1UL)
 
#define EGU_INTENCLR_TRIGGERED12_Clear   (1UL)
 
#define EGU_INTENCLR_TRIGGERED11_Pos   (11UL)
 
#define EGU_INTENCLR_TRIGGERED11_Msk   (0x1UL << EGU_INTENCLR_TRIGGERED11_Pos)
 
#define EGU_INTENCLR_TRIGGERED11_Disabled   (0UL)
 
#define EGU_INTENCLR_TRIGGERED11_Enabled   (1UL)
 
#define EGU_INTENCLR_TRIGGERED11_Clear   (1UL)
 
#define EGU_INTENCLR_TRIGGERED10_Pos   (10UL)
 
#define EGU_INTENCLR_TRIGGERED10_Msk   (0x1UL << EGU_INTENCLR_TRIGGERED10_Pos)
 
#define EGU_INTENCLR_TRIGGERED10_Disabled   (0UL)
 
#define EGU_INTENCLR_TRIGGERED10_Enabled   (1UL)
 
#define EGU_INTENCLR_TRIGGERED10_Clear   (1UL)
 
#define EGU_INTENCLR_TRIGGERED9_Pos   (9UL)
 
#define EGU_INTENCLR_TRIGGERED9_Msk   (0x1UL << EGU_INTENCLR_TRIGGERED9_Pos)
 
#define EGU_INTENCLR_TRIGGERED9_Disabled   (0UL)
 
#define EGU_INTENCLR_TRIGGERED9_Enabled   (1UL)
 
#define EGU_INTENCLR_TRIGGERED9_Clear   (1UL)
 
#define EGU_INTENCLR_TRIGGERED8_Pos   (8UL)
 
#define EGU_INTENCLR_TRIGGERED8_Msk   (0x1UL << EGU_INTENCLR_TRIGGERED8_Pos)
 
#define EGU_INTENCLR_TRIGGERED8_Disabled   (0UL)
 
#define EGU_INTENCLR_TRIGGERED8_Enabled   (1UL)
 
#define EGU_INTENCLR_TRIGGERED8_Clear   (1UL)
 
#define EGU_INTENCLR_TRIGGERED7_Pos   (7UL)
 
#define EGU_INTENCLR_TRIGGERED7_Msk   (0x1UL << EGU_INTENCLR_TRIGGERED7_Pos)
 
#define EGU_INTENCLR_TRIGGERED7_Disabled   (0UL)
 
#define EGU_INTENCLR_TRIGGERED7_Enabled   (1UL)
 
#define EGU_INTENCLR_TRIGGERED7_Clear   (1UL)
 
#define EGU_INTENCLR_TRIGGERED6_Pos   (6UL)
 
#define EGU_INTENCLR_TRIGGERED6_Msk   (0x1UL << EGU_INTENCLR_TRIGGERED6_Pos)
 
#define EGU_INTENCLR_TRIGGERED6_Disabled   (0UL)
 
#define EGU_INTENCLR_TRIGGERED6_Enabled   (1UL)
 
#define EGU_INTENCLR_TRIGGERED6_Clear   (1UL)
 
#define EGU_INTENCLR_TRIGGERED5_Pos   (5UL)
 
#define EGU_INTENCLR_TRIGGERED5_Msk   (0x1UL << EGU_INTENCLR_TRIGGERED5_Pos)
 
#define EGU_INTENCLR_TRIGGERED5_Disabled   (0UL)
 
#define EGU_INTENCLR_TRIGGERED5_Enabled   (1UL)
 
#define EGU_INTENCLR_TRIGGERED5_Clear   (1UL)
 
#define EGU_INTENCLR_TRIGGERED4_Pos   (4UL)
 
#define EGU_INTENCLR_TRIGGERED4_Msk   (0x1UL << EGU_INTENCLR_TRIGGERED4_Pos)
 
#define EGU_INTENCLR_TRIGGERED4_Disabled   (0UL)
 
#define EGU_INTENCLR_TRIGGERED4_Enabled   (1UL)
 
#define EGU_INTENCLR_TRIGGERED4_Clear   (1UL)
 
#define EGU_INTENCLR_TRIGGERED3_Pos   (3UL)
 
#define EGU_INTENCLR_TRIGGERED3_Msk   (0x1UL << EGU_INTENCLR_TRIGGERED3_Pos)
 
#define EGU_INTENCLR_TRIGGERED3_Disabled   (0UL)
 
#define EGU_INTENCLR_TRIGGERED3_Enabled   (1UL)
 
#define EGU_INTENCLR_TRIGGERED3_Clear   (1UL)
 
#define EGU_INTENCLR_TRIGGERED2_Pos   (2UL)
 
#define EGU_INTENCLR_TRIGGERED2_Msk   (0x1UL << EGU_INTENCLR_TRIGGERED2_Pos)
 
#define EGU_INTENCLR_TRIGGERED2_Disabled   (0UL)
 
#define EGU_INTENCLR_TRIGGERED2_Enabled   (1UL)
 
#define EGU_INTENCLR_TRIGGERED2_Clear   (1UL)
 
#define EGU_INTENCLR_TRIGGERED1_Pos   (1UL)
 
#define EGU_INTENCLR_TRIGGERED1_Msk   (0x1UL << EGU_INTENCLR_TRIGGERED1_Pos)
 
#define EGU_INTENCLR_TRIGGERED1_Disabled   (0UL)
 
#define EGU_INTENCLR_TRIGGERED1_Enabled   (1UL)
 
#define EGU_INTENCLR_TRIGGERED1_Clear   (1UL)
 
#define EGU_INTENCLR_TRIGGERED0_Pos   (0UL)
 
#define EGU_INTENCLR_TRIGGERED0_Msk   (0x1UL << EGU_INTENCLR_TRIGGERED0_Pos)
 
#define EGU_INTENCLR_TRIGGERED0_Disabled   (0UL)
 
#define EGU_INTENCLR_TRIGGERED0_Enabled   (1UL)
 
#define EGU_INTENCLR_TRIGGERED0_Clear   (1UL)
 
#define FICR_CODEPAGESIZE_CODEPAGESIZE_Pos   (0UL)
 
#define FICR_CODEPAGESIZE_CODEPAGESIZE_Msk   (0xFFFFFFFFUL << FICR_CODEPAGESIZE_CODEPAGESIZE_Pos)
 
#define FICR_CODESIZE_CODESIZE_Pos   (0UL)
 
#define FICR_CODESIZE_CODESIZE_Msk   (0xFFFFFFFFUL << FICR_CODESIZE_CODESIZE_Pos)
 
#define FICR_CONFIGID_FWID_Pos   (16UL)
 
#define FICR_CONFIGID_FWID_Msk   (0xFFFFUL << FICR_CONFIGID_FWID_Pos)
 
#define FICR_CONFIGID_HWID_Pos   (0UL)
 
#define FICR_CONFIGID_HWID_Msk   (0xFFFFUL << FICR_CONFIGID_HWID_Pos)
 
#define FICR_DEVICEID_DEVICEID_Pos   (0UL)
 
#define FICR_DEVICEID_DEVICEID_Msk   (0xFFFFFFFFUL << FICR_DEVICEID_DEVICEID_Pos)
 
#define FICR_ER_ER_Pos   (0UL)
 
#define FICR_ER_ER_Msk   (0xFFFFFFFFUL << FICR_ER_ER_Pos)
 
#define FICR_IR_IR_Pos   (0UL)
 
#define FICR_IR_IR_Msk   (0xFFFFFFFFUL << FICR_IR_IR_Pos)
 
#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Pos   (0UL)
 
#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Msk   (0x1UL << FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Pos)
 
#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Public   (0UL)
 
#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Random   (1UL)
 
#define FICR_DEVICEADDR_DEVICEADDR_Pos   (0UL)
 
#define FICR_DEVICEADDR_DEVICEADDR_Msk   (0xFFFFFFFFUL << FICR_DEVICEADDR_DEVICEADDR_Pos)
 
#define FICR_INFO_PART_PART_Pos   (0UL)
 
#define FICR_INFO_PART_PART_Msk   (0xFFFFFFFFUL << FICR_INFO_PART_PART_Pos)
 
#define FICR_INFO_PART_PART_N51422   (0x51422UL)
 
#define FICR_INFO_PART_PART_N51822   (0x51822UL)
 
#define FICR_INFO_PART_PART_N52000   (0x52000UL)
 
#define FICR_INFO_PART_PART_Unspecified   (0xFFFFFFFFUL)
 
#define FICR_INFO_VARIANT_VARIANT_Pos   (0UL)
 
#define FICR_INFO_VARIANT_VARIANT_Msk   (0xFFFFFFFFUL << FICR_INFO_VARIANT_VARIANT_Pos)
 
#define FICR_INFO_VARIANT_VARIANT_nRF51C   (0x1002UL)
 
#define FICR_INFO_VARIANT_VARIANT_nRF51D   (0x1003UL)
 
#define FICR_INFO_VARIANT_VARIANT_nRF51E   (0x1004UL)
 
#define FICR_INFO_VARIANT_VARIANT_Unspecified   (0xFFFFFFFFUL)
 
#define FICR_INFO_PACKAGE_PACKAGE_Pos   (0UL)
 
#define FICR_INFO_PACKAGE_PACKAGE_Msk   (0xFFFFFFFFUL << FICR_INFO_PACKAGE_PACKAGE_Pos)
 
#define FICR_INFO_PACKAGE_PACKAGE_QFN48   (0x0000UL)
 
#define FICR_INFO_PACKAGE_PACKAGE_nRF51CSP56A   (0x1000UL)
 
#define FICR_INFO_PACKAGE_PACKAGE_nRF51CSP62A   (0x1001UL)
 
#define FICR_INFO_PACKAGE_PACKAGE_nRF51CSP62B   (0x1002UL)
 
#define FICR_INFO_PACKAGE_PACKAGE_nRF51CSP62C   (0x1003UL)
 
#define FICR_INFO_PACKAGE_PACKAGE_Unspecified   (0xFFFFFFFFUL)
 
#define FICR_INFO_RAM_RAM_Pos   (0UL)
 
#define FICR_INFO_RAM_RAM_Msk   (0xFFFFFFFFUL << FICR_INFO_RAM_RAM_Pos)
 
#define FICR_INFO_RAM_RAM_K16   (16UL)
 
#define FICR_INFO_RAM_RAM_K32   (32UL)
 
#define FICR_INFO_RAM_RAM_K64   (64UL)
 
#define FICR_INFO_RAM_RAM_Unspecified   (0xFFFFFFFFUL)
 
#define FICR_INFO_FLASH_FLASH_Pos   (0UL)
 
#define FICR_INFO_FLASH_FLASH_Msk   (0xFFFFFFFFUL << FICR_INFO_FLASH_FLASH_Pos)
 
#define FICR_INFO_FLASH_FLASH_K128   (128UL)
 
#define FICR_INFO_FLASH_FLASH_K256   (256UL)
 
#define FICR_INFO_FLASH_FLASH_K512   (512UL)
 
#define FICR_INFO_FLASH_FLASH_Unspecified   (0xFFFFFFFFUL)
 
#define FICR_NFC_TAGHEADER0_UD3_Pos   (24UL)
 
#define FICR_NFC_TAGHEADER0_UD3_Msk   (0xFFUL << FICR_NFC_TAGHEADER0_UD3_Pos)
 
#define FICR_NFC_TAGHEADER0_UD2_Pos   (16UL)
 
#define FICR_NFC_TAGHEADER0_UD2_Msk   (0xFFUL << FICR_NFC_TAGHEADER0_UD2_Pos)
 
#define FICR_NFC_TAGHEADER0_UD1_Pos   (8UL)
 
#define FICR_NFC_TAGHEADER0_UD1_Msk   (0xFFUL << FICR_NFC_TAGHEADER0_UD1_Pos)
 
#define FICR_NFC_TAGHEADER0_MFGID_Pos   (0UL)
 
#define FICR_NFC_TAGHEADER0_MFGID_Msk   (0xFFUL << FICR_NFC_TAGHEADER0_MFGID_Pos)
 
#define FICR_NFC_TAGHEADER1_UD7_Pos   (24UL)
 
#define FICR_NFC_TAGHEADER1_UD7_Msk   (0xFFUL << FICR_NFC_TAGHEADER1_UD7_Pos)
 
#define FICR_NFC_TAGHEADER1_UD6_Pos   (16UL)
 
#define FICR_NFC_TAGHEADER1_UD6_Msk   (0xFFUL << FICR_NFC_TAGHEADER1_UD6_Pos)
 
#define FICR_NFC_TAGHEADER1_UD5_Pos   (8UL)
 
#define FICR_NFC_TAGHEADER1_UD5_Msk   (0xFFUL << FICR_NFC_TAGHEADER1_UD5_Pos)
 
#define FICR_NFC_TAGHEADER1_UD4_Pos   (0UL)
 
#define FICR_NFC_TAGHEADER1_UD4_Msk   (0xFFUL << FICR_NFC_TAGHEADER1_UD4_Pos)
 
#define FICR_NFC_TAGHEADER2_UD11_Pos   (24UL)
 
#define FICR_NFC_TAGHEADER2_UD11_Msk   (0xFFUL << FICR_NFC_TAGHEADER2_UD11_Pos)
 
#define FICR_NFC_TAGHEADER2_UD10_Pos   (16UL)
 
#define FICR_NFC_TAGHEADER2_UD10_Msk   (0xFFUL << FICR_NFC_TAGHEADER2_UD10_Pos)
 
#define FICR_NFC_TAGHEADER2_UD9_Pos   (8UL)
 
#define FICR_NFC_TAGHEADER2_UD9_Msk   (0xFFUL << FICR_NFC_TAGHEADER2_UD9_Pos)
 
#define FICR_NFC_TAGHEADER2_UD8_Pos   (0UL)
 
#define FICR_NFC_TAGHEADER2_UD8_Msk   (0xFFUL << FICR_NFC_TAGHEADER2_UD8_Pos)
 
#define FICR_NFC_TAGHEADER3_UD15_Pos   (24UL)
 
#define FICR_NFC_TAGHEADER3_UD15_Msk   (0xFFUL << FICR_NFC_TAGHEADER3_UD15_Pos)
 
#define FICR_NFC_TAGHEADER3_UD14_Pos   (16UL)
 
#define FICR_NFC_TAGHEADER3_UD14_Msk   (0xFFUL << FICR_NFC_TAGHEADER3_UD14_Pos)
 
#define FICR_NFC_TAGHEADER3_UD13_Pos   (8UL)
 
#define FICR_NFC_TAGHEADER3_UD13_Msk   (0xFFUL << FICR_NFC_TAGHEADER3_UD13_Pos)
 
#define FICR_NFC_TAGHEADER3_UD12_Pos   (0UL)
 
#define FICR_NFC_TAGHEADER3_UD12_Msk   (0xFFUL << FICR_NFC_TAGHEADER3_UD12_Pos)
 
#define GPIOTE_INTENSET_PORT_Pos   (31UL)
 
#define GPIOTE_INTENSET_PORT_Msk   (0x1UL << GPIOTE_INTENSET_PORT_Pos)
 
#define GPIOTE_INTENSET_PORT_Disabled   (0UL)
 
#define GPIOTE_INTENSET_PORT_Enabled   (1UL)
 
#define GPIOTE_INTENSET_PORT_Set   (1UL)
 
#define GPIOTE_INTENSET_IN7_Pos   (7UL)
 
#define GPIOTE_INTENSET_IN7_Msk   (0x1UL << GPIOTE_INTENSET_IN7_Pos)
 
#define GPIOTE_INTENSET_IN7_Disabled   (0UL)
 
#define GPIOTE_INTENSET_IN7_Enabled   (1UL)
 
#define GPIOTE_INTENSET_IN7_Set   (1UL)
 
#define GPIOTE_INTENSET_IN6_Pos   (6UL)
 
#define GPIOTE_INTENSET_IN6_Msk   (0x1UL << GPIOTE_INTENSET_IN6_Pos)
 
#define GPIOTE_INTENSET_IN6_Disabled   (0UL)
 
#define GPIOTE_INTENSET_IN6_Enabled   (1UL)
 
#define GPIOTE_INTENSET_IN6_Set   (1UL)
 
#define GPIOTE_INTENSET_IN5_Pos   (5UL)
 
#define GPIOTE_INTENSET_IN5_Msk   (0x1UL << GPIOTE_INTENSET_IN5_Pos)
 
#define GPIOTE_INTENSET_IN5_Disabled   (0UL)
 
#define GPIOTE_INTENSET_IN5_Enabled   (1UL)
 
#define GPIOTE_INTENSET_IN5_Set   (1UL)
 
#define GPIOTE_INTENSET_IN4_Pos   (4UL)
 
#define GPIOTE_INTENSET_IN4_Msk   (0x1UL << GPIOTE_INTENSET_IN4_Pos)
 
#define GPIOTE_INTENSET_IN4_Disabled   (0UL)
 
#define GPIOTE_INTENSET_IN4_Enabled   (1UL)
 
#define GPIOTE_INTENSET_IN4_Set   (1UL)
 
#define GPIOTE_INTENSET_IN3_Pos   (3UL)
 
#define GPIOTE_INTENSET_IN3_Msk   (0x1UL << GPIOTE_INTENSET_IN3_Pos)
 
#define GPIOTE_INTENSET_IN3_Disabled   (0UL)
 
#define GPIOTE_INTENSET_IN3_Enabled   (1UL)
 
#define GPIOTE_INTENSET_IN3_Set   (1UL)
 
#define GPIOTE_INTENSET_IN2_Pos   (2UL)
 
#define GPIOTE_INTENSET_IN2_Msk   (0x1UL << GPIOTE_INTENSET_IN2_Pos)
 
#define GPIOTE_INTENSET_IN2_Disabled   (0UL)
 
#define GPIOTE_INTENSET_IN2_Enabled   (1UL)
 
#define GPIOTE_INTENSET_IN2_Set   (1UL)
 
#define GPIOTE_INTENSET_IN1_Pos   (1UL)
 
#define GPIOTE_INTENSET_IN1_Msk   (0x1UL << GPIOTE_INTENSET_IN1_Pos)
 
#define GPIOTE_INTENSET_IN1_Disabled   (0UL)
 
#define GPIOTE_INTENSET_IN1_Enabled   (1UL)
 
#define GPIOTE_INTENSET_IN1_Set   (1UL)
 
#define GPIOTE_INTENSET_IN0_Pos   (0UL)
 
#define GPIOTE_INTENSET_IN0_Msk   (0x1UL << GPIOTE_INTENSET_IN0_Pos)
 
#define GPIOTE_INTENSET_IN0_Disabled   (0UL)
 
#define GPIOTE_INTENSET_IN0_Enabled   (1UL)
 
#define GPIOTE_INTENSET_IN0_Set   (1UL)
 
#define GPIOTE_INTENCLR_PORT_Pos   (31UL)
 
#define GPIOTE_INTENCLR_PORT_Msk   (0x1UL << GPIOTE_INTENCLR_PORT_Pos)
 
#define GPIOTE_INTENCLR_PORT_Disabled   (0UL)
 
#define GPIOTE_INTENCLR_PORT_Enabled   (1UL)
 
#define GPIOTE_INTENCLR_PORT_Clear   (1UL)
 
#define GPIOTE_INTENCLR_IN7_Pos   (7UL)
 
#define GPIOTE_INTENCLR_IN7_Msk   (0x1UL << GPIOTE_INTENCLR_IN7_Pos)
 
#define GPIOTE_INTENCLR_IN7_Disabled   (0UL)
 
#define GPIOTE_INTENCLR_IN7_Enabled   (1UL)
 
#define GPIOTE_INTENCLR_IN7_Clear   (1UL)
 
#define GPIOTE_INTENCLR_IN6_Pos   (6UL)
 
#define GPIOTE_INTENCLR_IN6_Msk   (0x1UL << GPIOTE_INTENCLR_IN6_Pos)
 
#define GPIOTE_INTENCLR_IN6_Disabled   (0UL)
 
#define GPIOTE_INTENCLR_IN6_Enabled   (1UL)
 
#define GPIOTE_INTENCLR_IN6_Clear   (1UL)
 
#define GPIOTE_INTENCLR_IN5_Pos   (5UL)
 
#define GPIOTE_INTENCLR_IN5_Msk   (0x1UL << GPIOTE_INTENCLR_IN5_Pos)
 
#define GPIOTE_INTENCLR_IN5_Disabled   (0UL)
 
#define GPIOTE_INTENCLR_IN5_Enabled   (1UL)
 
#define GPIOTE_INTENCLR_IN5_Clear   (1UL)
 
#define GPIOTE_INTENCLR_IN4_Pos   (4UL)
 
#define GPIOTE_INTENCLR_IN4_Msk   (0x1UL << GPIOTE_INTENCLR_IN4_Pos)
 
#define GPIOTE_INTENCLR_IN4_Disabled   (0UL)
 
#define GPIOTE_INTENCLR_IN4_Enabled   (1UL)
 
#define GPIOTE_INTENCLR_IN4_Clear   (1UL)
 
#define GPIOTE_INTENCLR_IN3_Pos   (3UL)
 
#define GPIOTE_INTENCLR_IN3_Msk   (0x1UL << GPIOTE_INTENCLR_IN3_Pos)
 
#define GPIOTE_INTENCLR_IN3_Disabled   (0UL)
 
#define GPIOTE_INTENCLR_IN3_Enabled   (1UL)
 
#define GPIOTE_INTENCLR_IN3_Clear   (1UL)
 
#define GPIOTE_INTENCLR_IN2_Pos   (2UL)
 
#define GPIOTE_INTENCLR_IN2_Msk   (0x1UL << GPIOTE_INTENCLR_IN2_Pos)
 
#define GPIOTE_INTENCLR_IN2_Disabled   (0UL)
 
#define GPIOTE_INTENCLR_IN2_Enabled   (1UL)
 
#define GPIOTE_INTENCLR_IN2_Clear   (1UL)
 
#define GPIOTE_INTENCLR_IN1_Pos   (1UL)
 
#define GPIOTE_INTENCLR_IN1_Msk   (0x1UL << GPIOTE_INTENCLR_IN1_Pos)
 
#define GPIOTE_INTENCLR_IN1_Disabled   (0UL)
 
#define GPIOTE_INTENCLR_IN1_Enabled   (1UL)
 
#define GPIOTE_INTENCLR_IN1_Clear   (1UL)
 
#define GPIOTE_INTENCLR_IN0_Pos   (0UL)
 
#define GPIOTE_INTENCLR_IN0_Msk   (0x1UL << GPIOTE_INTENCLR_IN0_Pos)
 
#define GPIOTE_INTENCLR_IN0_Disabled   (0UL)
 
#define GPIOTE_INTENCLR_IN0_Enabled   (1UL)
 
#define GPIOTE_INTENCLR_IN0_Clear   (1UL)
 
#define GPIOTE_CONFIG_OUTINIT_Pos   (20UL)
 
#define GPIOTE_CONFIG_OUTINIT_Msk   (0x1UL << GPIOTE_CONFIG_OUTINIT_Pos)
 
#define GPIOTE_CONFIG_OUTINIT_Low   (0UL)
 
#define GPIOTE_CONFIG_OUTINIT_High   (1UL)
 
#define GPIOTE_CONFIG_POLARITY_Pos   (16UL)
 
#define GPIOTE_CONFIG_POLARITY_Msk   (0x3UL << GPIOTE_CONFIG_POLARITY_Pos)
 
#define GPIOTE_CONFIG_POLARITY_None   (0UL)
 
#define GPIOTE_CONFIG_POLARITY_LoToHi   (1UL)
 
#define GPIOTE_CONFIG_POLARITY_HiToLo   (2UL)
 
#define GPIOTE_CONFIG_POLARITY_Toggle   (3UL)
 
#define GPIOTE_CONFIG_PSEL_Pos   (8UL)
 
#define GPIOTE_CONFIG_PSEL_Msk   (0x1FUL << GPIOTE_CONFIG_PSEL_Pos)
 
#define GPIOTE_CONFIG_MODE_Pos   (0UL)
 
#define GPIOTE_CONFIG_MODE_Msk   (0x3UL << GPIOTE_CONFIG_MODE_Pos)
 
#define GPIOTE_CONFIG_MODE_Disabled   (0UL)
 
#define GPIOTE_CONFIG_MODE_Event   (1UL)
 
#define GPIOTE_CONFIG_MODE_Task   (3UL)
 
#define I2S_INTEN_TXPTRUPD_Pos   (5UL)
 
#define I2S_INTEN_TXPTRUPD_Msk   (0x1UL << I2S_INTEN_TXPTRUPD_Pos)
 
#define I2S_INTEN_TXPTRUPD_Disabled   (0UL)
 
#define I2S_INTEN_TXPTRUPD_Enabled   (1UL)
 
#define I2S_INTEN_STOPPED_Pos   (2UL)
 
#define I2S_INTEN_STOPPED_Msk   (0x1UL << I2S_INTEN_STOPPED_Pos)
 
#define I2S_INTEN_STOPPED_Disabled   (0UL)
 
#define I2S_INTEN_STOPPED_Enabled   (1UL)
 
#define I2S_INTEN_RXPTRUPD_Pos   (1UL)
 
#define I2S_INTEN_RXPTRUPD_Msk   (0x1UL << I2S_INTEN_RXPTRUPD_Pos)
 
#define I2S_INTEN_RXPTRUPD_Disabled   (0UL)
 
#define I2S_INTEN_RXPTRUPD_Enabled   (1UL)
 
#define I2S_INTENSET_TXPTRUPD_Pos   (5UL)
 
#define I2S_INTENSET_TXPTRUPD_Msk   (0x1UL << I2S_INTENSET_TXPTRUPD_Pos)
 
#define I2S_INTENSET_TXPTRUPD_Disabled   (0UL)
 
#define I2S_INTENSET_TXPTRUPD_Enabled   (1UL)
 
#define I2S_INTENSET_TXPTRUPD_Set   (1UL)
 
#define I2S_INTENSET_STOPPED_Pos   (2UL)
 
#define I2S_INTENSET_STOPPED_Msk   (0x1UL << I2S_INTENSET_STOPPED_Pos)
 
#define I2S_INTENSET_STOPPED_Disabled   (0UL)
 
#define I2S_INTENSET_STOPPED_Enabled   (1UL)
 
#define I2S_INTENSET_STOPPED_Set   (1UL)
 
#define I2S_INTENSET_RXPTRUPD_Pos   (1UL)
 
#define I2S_INTENSET_RXPTRUPD_Msk   (0x1UL << I2S_INTENSET_RXPTRUPD_Pos)
 
#define I2S_INTENSET_RXPTRUPD_Disabled   (0UL)
 
#define I2S_INTENSET_RXPTRUPD_Enabled   (1UL)
 
#define I2S_INTENSET_RXPTRUPD_Set   (1UL)
 
#define I2S_INTENCLR_TXPTRUPD_Pos   (5UL)
 
#define I2S_INTENCLR_TXPTRUPD_Msk   (0x1UL << I2S_INTENCLR_TXPTRUPD_Pos)
 
#define I2S_INTENCLR_TXPTRUPD_Disabled   (0UL)
 
#define I2S_INTENCLR_TXPTRUPD_Enabled   (1UL)
 
#define I2S_INTENCLR_TXPTRUPD_Clear   (1UL)
 
#define I2S_INTENCLR_STOPPED_Pos   (2UL)
 
#define I2S_INTENCLR_STOPPED_Msk   (0x1UL << I2S_INTENCLR_STOPPED_Pos)
 
#define I2S_INTENCLR_STOPPED_Disabled   (0UL)
 
#define I2S_INTENCLR_STOPPED_Enabled   (1UL)
 
#define I2S_INTENCLR_STOPPED_Clear   (1UL)
 
#define I2S_INTENCLR_RXPTRUPD_Pos   (1UL)
 
#define I2S_INTENCLR_RXPTRUPD_Msk   (0x1UL << I2S_INTENCLR_RXPTRUPD_Pos)
 
#define I2S_INTENCLR_RXPTRUPD_Disabled   (0UL)
 
#define I2S_INTENCLR_RXPTRUPD_Enabled   (1UL)
 
#define I2S_INTENCLR_RXPTRUPD_Clear   (1UL)
 
#define I2S_ENABLE_ENABLE_Pos   (0UL)
 
#define I2S_ENABLE_ENABLE_Msk   (0x1UL << I2S_ENABLE_ENABLE_Pos)
 
#define I2S_ENABLE_ENABLE_DISABLE   (0UL)
 
#define I2S_ENABLE_ENABLE_ENABLE   (1UL)
 
#define I2S_CONFIG_MODE_MODE_Pos   (0UL)
 
#define I2S_CONFIG_MODE_MODE_Msk   (0x1UL << I2S_CONFIG_MODE_MODE_Pos)
 
#define I2S_CONFIG_MODE_MODE_MASTER   (0UL)
 
#define I2S_CONFIG_MODE_MODE_SLAVE   (1UL)
 
#define I2S_CONFIG_RXEN_RXEN_Pos   (0UL)
 
#define I2S_CONFIG_RXEN_RXEN_Msk   (0x1UL << I2S_CONFIG_RXEN_RXEN_Pos)
 
#define I2S_CONFIG_RXEN_RXEN_DISABLE   (0UL)
 
#define I2S_CONFIG_RXEN_RXEN_ENABLE   (1UL)
 
#define I2S_CONFIG_TXEN_TXEN_Pos   (0UL)
 
#define I2S_CONFIG_TXEN_TXEN_Msk   (0x1UL << I2S_CONFIG_TXEN_TXEN_Pos)
 
#define I2S_CONFIG_TXEN_TXEN_DISABLE   (0UL)
 
#define I2S_CONFIG_TXEN_TXEN_ENABLE   (1UL)
 
#define I2S_CONFIG_MCKEN_MCKEN_Pos   (0UL)
 
#define I2S_CONFIG_MCKEN_MCKEN_Msk   (0x1UL << I2S_CONFIG_MCKEN_MCKEN_Pos)
 
#define I2S_CONFIG_MCKEN_MCKEN_DISABLE   (0UL)
 
#define I2S_CONFIG_MCKEN_MCKEN_ENABLE   (1UL)
 
#define I2S_CONFIG_MCKFREQ_MCKFREQ_Pos   (0UL)
 
#define I2S_CONFIG_MCKFREQ_MCKFREQ_Msk   (0xFFFFFFFFUL << I2S_CONFIG_MCKFREQ_MCKFREQ_Pos)
 
#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV125   (0x020C0000UL)
 
#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV63   (0x04100000UL)
 
#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV42   (0x06000000UL)
 
#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV31   (0x08200000UL)
 
#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV23   (0x0B000000UL)
 
#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV21   (0x0C000000UL)
 
#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV16   (0x10000000UL)
 
#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV15   (0x11000000UL)
 
#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV11   (0x16000000UL)
 
#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV10   (0x18000000UL)
 
#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV8   (0x20000000UL)
 
#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV6   (0x28000000UL)
 
#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV5   (0x30000000UL)
 
#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV4   (0x40000000UL)
 
#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV3   (0x50000000UL)
 
#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV2   (0x80000000UL)
 
#define I2S_CONFIG_RATIO_RATIO_Pos   (0UL)
 
#define I2S_CONFIG_RATIO_RATIO_Msk   (0xFUL << I2S_CONFIG_RATIO_RATIO_Pos)
 
#define I2S_CONFIG_RATIO_RATIO_32X   (0UL)
 
#define I2S_CONFIG_RATIO_RATIO_48X   (1UL)
 
#define I2S_CONFIG_RATIO_RATIO_64X   (2UL)
 
#define I2S_CONFIG_RATIO_RATIO_96X   (3UL)
 
#define I2S_CONFIG_RATIO_RATIO_128X   (4UL)
 
#define I2S_CONFIG_RATIO_RATIO_192X   (5UL)
 
#define I2S_CONFIG_RATIO_RATIO_256X   (6UL)
 
#define I2S_CONFIG_RATIO_RATIO_384X   (7UL)
 
#define I2S_CONFIG_RATIO_RATIO_512X   (8UL)
 
#define I2S_CONFIG_SWIDTH_SWIDTH_Pos   (0UL)
 
#define I2S_CONFIG_SWIDTH_SWIDTH_Msk   (0x3UL << I2S_CONFIG_SWIDTH_SWIDTH_Pos)
 
#define I2S_CONFIG_SWIDTH_SWIDTH_8BIT   (0UL)
 
#define I2S_CONFIG_SWIDTH_SWIDTH_16BIT   (1UL)
 
#define I2S_CONFIG_SWIDTH_SWIDTH_24BIT   (2UL)
 
#define I2S_CONFIG_ALIGN_ALIGN_Pos   (0UL)
 
#define I2S_CONFIG_ALIGN_ALIGN_Msk   (0x1UL << I2S_CONFIG_ALIGN_ALIGN_Pos)
 
#define I2S_CONFIG_ALIGN_ALIGN_LEFT   (0UL)
 
#define I2S_CONFIG_ALIGN_ALIGN_RIGHT   (1UL)
 
#define I2S_CONFIG_FORMAT_FORMAT_Pos   (0UL)
 
#define I2S_CONFIG_FORMAT_FORMAT_Msk   (0x1UL << I2S_CONFIG_FORMAT_FORMAT_Pos)
 
#define I2S_CONFIG_FORMAT_FORMAT_I2S   (0UL)
 
#define I2S_CONFIG_FORMAT_FORMAT_DSP   (1UL)
 
#define I2S_CONFIG_CHANNELS_CHANNELS_Pos   (0UL)
 
#define I2S_CONFIG_CHANNELS_CHANNELS_Msk   (0x3UL << I2S_CONFIG_CHANNELS_CHANNELS_Pos)
 
#define I2S_CONFIG_CHANNELS_CHANNELS_STEREO   (0UL)
 
#define I2S_CONFIG_CHANNELS_CHANNELS_LEFT   (1UL)
 
#define I2S_CONFIG_CHANNELS_CHANNELS_RIGHT   (2UL)
 
#define I2S_RXD_PTR_PTR_Pos   (0UL)
 
#define I2S_RXD_PTR_PTR_Msk   (0xFFFFFFFFUL << I2S_RXD_PTR_PTR_Pos)
 
#define I2S_TXD_PTR_PTR_Pos   (0UL)
 
#define I2S_TXD_PTR_PTR_Msk   (0xFFFFFFFFUL << I2S_TXD_PTR_PTR_Pos)
 
#define I2S_RXTXD_MAXCNT_MAXCNT_Pos   (0UL)
 
#define I2S_RXTXD_MAXCNT_MAXCNT_Msk   (0x3FFFUL << I2S_RXTXD_MAXCNT_MAXCNT_Pos)
 
#define I2S_PSEL_MCK_CONNECT_Pos   (31UL)
 
#define I2S_PSEL_MCK_CONNECT_Msk   (0x1UL << I2S_PSEL_MCK_CONNECT_Pos)
 
#define I2S_PSEL_MCK_CONNECT_Connected   (0UL)
 
#define I2S_PSEL_MCK_CONNECT_Disconnected   (1UL)
 
#define I2S_PSEL_MCK_PIN_Pos   (0UL)
 
#define I2S_PSEL_MCK_PIN_Msk   (0x1FUL << I2S_PSEL_MCK_PIN_Pos)
 
#define I2S_PSEL_SCK_CONNECT_Pos   (31UL)
 
#define I2S_PSEL_SCK_CONNECT_Msk   (0x1UL << I2S_PSEL_SCK_CONNECT_Pos)
 
#define I2S_PSEL_SCK_CONNECT_Connected   (0UL)
 
#define I2S_PSEL_SCK_CONNECT_Disconnected   (1UL)
 
#define I2S_PSEL_SCK_PIN_Pos   (0UL)
 
#define I2S_PSEL_SCK_PIN_Msk   (0x1FUL << I2S_PSEL_SCK_PIN_Pos)
 
#define I2S_PSEL_LRCK_CONNECT_Pos   (31UL)
 
#define I2S_PSEL_LRCK_CONNECT_Msk   (0x1UL << I2S_PSEL_LRCK_CONNECT_Pos)
 
#define I2S_PSEL_LRCK_CONNECT_Connected   (0UL)
 
#define I2S_PSEL_LRCK_CONNECT_Disconnected   (1UL)
 
#define I2S_PSEL_LRCK_PIN_Pos   (0UL)
 
#define I2S_PSEL_LRCK_PIN_Msk   (0x1FUL << I2S_PSEL_LRCK_PIN_Pos)
 
#define I2S_PSEL_SDIN_CONNECT_Pos   (31UL)
 
#define I2S_PSEL_SDIN_CONNECT_Msk   (0x1UL << I2S_PSEL_SDIN_CONNECT_Pos)
 
#define I2S_PSEL_SDIN_CONNECT_Connected   (0UL)
 
#define I2S_PSEL_SDIN_CONNECT_Disconnected   (1UL)
 
#define I2S_PSEL_SDIN_PIN_Pos   (0UL)
 
#define I2S_PSEL_SDIN_PIN_Msk   (0x1FUL << I2S_PSEL_SDIN_PIN_Pos)
 
#define I2S_PSEL_SDOUT_CONNECT_Pos   (31UL)
 
#define I2S_PSEL_SDOUT_CONNECT_Msk   (0x1UL << I2S_PSEL_SDOUT_CONNECT_Pos)
 
#define I2S_PSEL_SDOUT_CONNECT_Connected   (0UL)
 
#define I2S_PSEL_SDOUT_CONNECT_Disconnected   (1UL)
 
#define I2S_PSEL_SDOUT_PIN_Pos   (0UL)
 
#define I2S_PSEL_SDOUT_PIN_Msk   (0x1FUL << I2S_PSEL_SDOUT_PIN_Pos)
 
#define LPCOMP_SHORTS_CROSS_STOP_Pos   (4UL)
 
#define LPCOMP_SHORTS_CROSS_STOP_Msk   (0x1UL << LPCOMP_SHORTS_CROSS_STOP_Pos)
 
#define LPCOMP_SHORTS_CROSS_STOP_Disabled   (0UL)
 
#define LPCOMP_SHORTS_CROSS_STOP_Enabled   (1UL)
 
#define LPCOMP_SHORTS_UP_STOP_Pos   (3UL)
 
#define LPCOMP_SHORTS_UP_STOP_Msk   (0x1UL << LPCOMP_SHORTS_UP_STOP_Pos)
 
#define LPCOMP_SHORTS_UP_STOP_Disabled   (0UL)
 
#define LPCOMP_SHORTS_UP_STOP_Enabled   (1UL)
 
#define LPCOMP_SHORTS_DOWN_STOP_Pos   (2UL)
 
#define LPCOMP_SHORTS_DOWN_STOP_Msk   (0x1UL << LPCOMP_SHORTS_DOWN_STOP_Pos)
 
#define LPCOMP_SHORTS_DOWN_STOP_Disabled   (0UL)
 
#define LPCOMP_SHORTS_DOWN_STOP_Enabled   (1UL)
 
#define LPCOMP_SHORTS_READY_STOP_Pos   (1UL)
 
#define LPCOMP_SHORTS_READY_STOP_Msk   (0x1UL << LPCOMP_SHORTS_READY_STOP_Pos)
 
#define LPCOMP_SHORTS_READY_STOP_Disabled   (0UL)
 
#define LPCOMP_SHORTS_READY_STOP_Enabled   (1UL)
 
#define LPCOMP_SHORTS_READY_SAMPLE_Pos   (0UL)
 
#define LPCOMP_SHORTS_READY_SAMPLE_Msk   (0x1UL << LPCOMP_SHORTS_READY_SAMPLE_Pos)
 
#define LPCOMP_SHORTS_READY_SAMPLE_Disabled   (0UL)
 
#define LPCOMP_SHORTS_READY_SAMPLE_Enabled   (1UL)
 
#define LPCOMP_INTENSET_CROSS_Pos   (3UL)
 
#define LPCOMP_INTENSET_CROSS_Msk   (0x1UL << LPCOMP_INTENSET_CROSS_Pos)
 
#define LPCOMP_INTENSET_CROSS_Disabled   (0UL)
 
#define LPCOMP_INTENSET_CROSS_Enabled   (1UL)
 
#define LPCOMP_INTENSET_CROSS_Set   (1UL)
 
#define LPCOMP_INTENSET_UP_Pos   (2UL)
 
#define LPCOMP_INTENSET_UP_Msk   (0x1UL << LPCOMP_INTENSET_UP_Pos)
 
#define LPCOMP_INTENSET_UP_Disabled   (0UL)
 
#define LPCOMP_INTENSET_UP_Enabled   (1UL)
 
#define LPCOMP_INTENSET_UP_Set   (1UL)
 
#define LPCOMP_INTENSET_DOWN_Pos   (1UL)
 
#define LPCOMP_INTENSET_DOWN_Msk   (0x1UL << LPCOMP_INTENSET_DOWN_Pos)
 
#define LPCOMP_INTENSET_DOWN_Disabled   (0UL)
 
#define LPCOMP_INTENSET_DOWN_Enabled   (1UL)
 
#define LPCOMP_INTENSET_DOWN_Set   (1UL)
 
#define LPCOMP_INTENSET_READY_Pos   (0UL)
 
#define LPCOMP_INTENSET_READY_Msk   (0x1UL << LPCOMP_INTENSET_READY_Pos)
 
#define LPCOMP_INTENSET_READY_Disabled   (0UL)
 
#define LPCOMP_INTENSET_READY_Enabled   (1UL)
 
#define LPCOMP_INTENSET_READY_Set   (1UL)
 
#define LPCOMP_INTENCLR_CROSS_Pos   (3UL)
 
#define LPCOMP_INTENCLR_CROSS_Msk   (0x1UL << LPCOMP_INTENCLR_CROSS_Pos)
 
#define LPCOMP_INTENCLR_CROSS_Disabled   (0UL)
 
#define LPCOMP_INTENCLR_CROSS_Enabled   (1UL)
 
#define LPCOMP_INTENCLR_CROSS_Clear   (1UL)
 
#define LPCOMP_INTENCLR_UP_Pos   (2UL)
 
#define LPCOMP_INTENCLR_UP_Msk   (0x1UL << LPCOMP_INTENCLR_UP_Pos)
 
#define LPCOMP_INTENCLR_UP_Disabled   (0UL)
 
#define LPCOMP_INTENCLR_UP_Enabled   (1UL)
 
#define LPCOMP_INTENCLR_UP_Clear   (1UL)
 
#define LPCOMP_INTENCLR_DOWN_Pos   (1UL)
 
#define LPCOMP_INTENCLR_DOWN_Msk   (0x1UL << LPCOMP_INTENCLR_DOWN_Pos)
 
#define LPCOMP_INTENCLR_DOWN_Disabled   (0UL)
 
#define LPCOMP_INTENCLR_DOWN_Enabled   (1UL)
 
#define LPCOMP_INTENCLR_DOWN_Clear   (1UL)
 
#define LPCOMP_INTENCLR_READY_Pos   (0UL)
 
#define LPCOMP_INTENCLR_READY_Msk   (0x1UL << LPCOMP_INTENCLR_READY_Pos)
 
#define LPCOMP_INTENCLR_READY_Disabled   (0UL)
 
#define LPCOMP_INTENCLR_READY_Enabled   (1UL)
 
#define LPCOMP_INTENCLR_READY_Clear   (1UL)
 
#define LPCOMP_RESULT_RESULT_Pos   (0UL)
 
#define LPCOMP_RESULT_RESULT_Msk   (0x1UL << LPCOMP_RESULT_RESULT_Pos)
 
#define LPCOMP_RESULT_RESULT_Bellow   (0UL)
 
#define LPCOMP_RESULT_RESULT_Above   (1UL)
 
#define LPCOMP_ENABLE_ENABLE_Pos   (0UL)
 
#define LPCOMP_ENABLE_ENABLE_Msk   (0x3UL << LPCOMP_ENABLE_ENABLE_Pos)
 
#define LPCOMP_ENABLE_ENABLE_Disabled   (0UL)
 
#define LPCOMP_ENABLE_ENABLE_Enabled   (1UL)
 
#define LPCOMP_PSEL_PSEL_Pos   (0UL)
 
#define LPCOMP_PSEL_PSEL_Msk   (0x7UL << LPCOMP_PSEL_PSEL_Pos)
 
#define LPCOMP_PSEL_PSEL_AnalogInput0   (0UL)
 
#define LPCOMP_PSEL_PSEL_AnalogInput1   (1UL)
 
#define LPCOMP_PSEL_PSEL_AnalogInput2   (2UL)
 
#define LPCOMP_PSEL_PSEL_AnalogInput3   (3UL)
 
#define LPCOMP_PSEL_PSEL_AnalogInput4   (4UL)
 
#define LPCOMP_PSEL_PSEL_AnalogInput5   (5UL)
 
#define LPCOMP_PSEL_PSEL_AnalogInput6   (6UL)
 
#define LPCOMP_PSEL_PSEL_AnalogInput7   (7UL)
 
#define LPCOMP_REFSEL_REFSEL_Pos   (0UL)
 
#define LPCOMP_REFSEL_REFSEL_Msk   (0xFUL << LPCOMP_REFSEL_REFSEL_Pos)
 
#define LPCOMP_REFSEL_REFSEL_Ref1_8Vdd   (0UL)
 
#define LPCOMP_REFSEL_REFSEL_Ref2_8Vdd   (1UL)
 
#define LPCOMP_REFSEL_REFSEL_Ref3_8Vdd   (2UL)
 
#define LPCOMP_REFSEL_REFSEL_Ref4_8Vdd   (3UL)
 
#define LPCOMP_REFSEL_REFSEL_Ref5_8Vdd   (4UL)
 
#define LPCOMP_REFSEL_REFSEL_Ref6_8Vdd   (5UL)
 
#define LPCOMP_REFSEL_REFSEL_Ref7_8Vdd   (6UL)
 
#define LPCOMP_REFSEL_REFSEL_ARef   (7UL)
 
#define LPCOMP_REFSEL_REFSEL_Ref1_16Vdd   (8UL)
 
#define LPCOMP_REFSEL_REFSEL_Ref3_16Vdd   (9UL)
 
#define LPCOMP_REFSEL_REFSEL_Ref5_16Vdd   (10UL)
 
#define LPCOMP_REFSEL_REFSEL_Ref7_16Vdd   (11UL)
 
#define LPCOMP_REFSEL_REFSEL_Ref9_16Vdd   (12UL)
 
#define LPCOMP_REFSEL_REFSEL_Ref11_16Vdd   (13UL)
 
#define LPCOMP_REFSEL_REFSEL_Ref13_16Vdd   (14UL)
 
#define LPCOMP_REFSEL_REFSEL_Ref15_16Vdd   (15UL)
 
#define LPCOMP_EXTREFSEL_EXTREFSEL_Pos   (0UL)
 
#define LPCOMP_EXTREFSEL_EXTREFSEL_Msk   (0x1UL << LPCOMP_EXTREFSEL_EXTREFSEL_Pos)
 
#define LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference0   (0UL)
 
#define LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference1   (1UL)
 
#define LPCOMP_ANADETECT_ANADETECT_Pos   (0UL)
 
#define LPCOMP_ANADETECT_ANADETECT_Msk   (0x3UL << LPCOMP_ANADETECT_ANADETECT_Pos)
 
#define LPCOMP_ANADETECT_ANADETECT_Cross   (0UL)
 
#define LPCOMP_ANADETECT_ANADETECT_Up   (1UL)
 
#define LPCOMP_ANADETECT_ANADETECT_Down   (2UL)
 
#define LPCOMP_HYST_HYST_Pos   (0UL)
 
#define LPCOMP_HYST_HYST_Msk   (0x1UL << LPCOMP_HYST_HYST_Pos)
 
#define LPCOMP_HYST_HYST_NoHyst   (0UL)
 
#define LPCOMP_HYST_HYST_Hyst50mV   (1UL)
 
#define MWU_INTEN_PREGION1RA_Pos   (27UL)
 
#define MWU_INTEN_PREGION1RA_Msk   (0x1UL << MWU_INTEN_PREGION1RA_Pos)
 
#define MWU_INTEN_PREGION1RA_Disabled   (0UL)
 
#define MWU_INTEN_PREGION1RA_Enabled   (1UL)
 
#define MWU_INTEN_PREGION1WA_Pos   (26UL)
 
#define MWU_INTEN_PREGION1WA_Msk   (0x1UL << MWU_INTEN_PREGION1WA_Pos)
 
#define MWU_INTEN_PREGION1WA_Disabled   (0UL)
 
#define MWU_INTEN_PREGION1WA_Enabled   (1UL)
 
#define MWU_INTEN_PREGION0RA_Pos   (25UL)
 
#define MWU_INTEN_PREGION0RA_Msk   (0x1UL << MWU_INTEN_PREGION0RA_Pos)
 
#define MWU_INTEN_PREGION0RA_Disabled   (0UL)
 
#define MWU_INTEN_PREGION0RA_Enabled   (1UL)
 
#define MWU_INTEN_PREGION0WA_Pos   (24UL)
 
#define MWU_INTEN_PREGION0WA_Msk   (0x1UL << MWU_INTEN_PREGION0WA_Pos)
 
#define MWU_INTEN_PREGION0WA_Disabled   (0UL)
 
#define MWU_INTEN_PREGION0WA_Enabled   (1UL)
 
#define MWU_INTEN_REGION3RA_Pos   (7UL)
 
#define MWU_INTEN_REGION3RA_Msk   (0x1UL << MWU_INTEN_REGION3RA_Pos)
 
#define MWU_INTEN_REGION3RA_Disabled   (0UL)
 
#define MWU_INTEN_REGION3RA_Enabled   (1UL)
 
#define MWU_INTEN_REGION3WA_Pos   (6UL)
 
#define MWU_INTEN_REGION3WA_Msk   (0x1UL << MWU_INTEN_REGION3WA_Pos)
 
#define MWU_INTEN_REGION3WA_Disabled   (0UL)
 
#define MWU_INTEN_REGION3WA_Enabled   (1UL)
 
#define MWU_INTEN_REGION2RA_Pos   (5UL)
 
#define MWU_INTEN_REGION2RA_Msk   (0x1UL << MWU_INTEN_REGION2RA_Pos)
 
#define MWU_INTEN_REGION2RA_Disabled   (0UL)
 
#define MWU_INTEN_REGION2RA_Enabled   (1UL)
 
#define MWU_INTEN_REGION2WA_Pos   (4UL)
 
#define MWU_INTEN_REGION2WA_Msk   (0x1UL << MWU_INTEN_REGION2WA_Pos)
 
#define MWU_INTEN_REGION2WA_Disabled   (0UL)
 
#define MWU_INTEN_REGION2WA_Enabled   (1UL)
 
#define MWU_INTEN_REGION1RA_Pos   (3UL)
 
#define MWU_INTEN_REGION1RA_Msk   (0x1UL << MWU_INTEN_REGION1RA_Pos)
 
#define MWU_INTEN_REGION1RA_Disabled   (0UL)
 
#define MWU_INTEN_REGION1RA_Enabled   (1UL)
 
#define MWU_INTEN_REGION1WA_Pos   (2UL)
 
#define MWU_INTEN_REGION1WA_Msk   (0x1UL << MWU_INTEN_REGION1WA_Pos)
 
#define MWU_INTEN_REGION1WA_Disabled   (0UL)
 
#define MWU_INTEN_REGION1WA_Enabled   (1UL)
 
#define MWU_INTEN_REGION0RA_Pos   (1UL)
 
#define MWU_INTEN_REGION0RA_Msk   (0x1UL << MWU_INTEN_REGION0RA_Pos)
 
#define MWU_INTEN_REGION0RA_Disabled   (0UL)
 
#define MWU_INTEN_REGION0RA_Enabled   (1UL)
 
#define MWU_INTEN_REGION0WA_Pos   (0UL)
 
#define MWU_INTEN_REGION0WA_Msk   (0x1UL << MWU_INTEN_REGION0WA_Pos)
 
#define MWU_INTEN_REGION0WA_Disabled   (0UL)
 
#define MWU_INTEN_REGION0WA_Enabled   (1UL)
 
#define MWU_INTENSET_PREGION1RA_Pos   (27UL)
 
#define MWU_INTENSET_PREGION1RA_Msk   (0x1UL << MWU_INTENSET_PREGION1RA_Pos)
 
#define MWU_INTENSET_PREGION1RA_Disabled   (0UL)
 
#define MWU_INTENSET_PREGION1RA_Enabled   (1UL)
 
#define MWU_INTENSET_PREGION1RA_Set   (1UL)
 
#define MWU_INTENSET_PREGION1WA_Pos   (26UL)
 
#define MWU_INTENSET_PREGION1WA_Msk   (0x1UL << MWU_INTENSET_PREGION1WA_Pos)
 
#define MWU_INTENSET_PREGION1WA_Disabled   (0UL)
 
#define MWU_INTENSET_PREGION1WA_Enabled   (1UL)
 
#define MWU_INTENSET_PREGION1WA_Set   (1UL)
 
#define MWU_INTENSET_PREGION0RA_Pos   (25UL)
 
#define MWU_INTENSET_PREGION0RA_Msk   (0x1UL << MWU_INTENSET_PREGION0RA_Pos)
 
#define MWU_INTENSET_PREGION0RA_Disabled   (0UL)
 
#define MWU_INTENSET_PREGION0RA_Enabled   (1UL)
 
#define MWU_INTENSET_PREGION0RA_Set   (1UL)
 
#define MWU_INTENSET_PREGION0WA_Pos   (24UL)
 
#define MWU_INTENSET_PREGION0WA_Msk   (0x1UL << MWU_INTENSET_PREGION0WA_Pos)
 
#define MWU_INTENSET_PREGION0WA_Disabled   (0UL)
 
#define MWU_INTENSET_PREGION0WA_Enabled   (1UL)
 
#define MWU_INTENSET_PREGION0WA_Set   (1UL)
 
#define MWU_INTENSET_REGION3RA_Pos   (7UL)
 
#define MWU_INTENSET_REGION3RA_Msk   (0x1UL << MWU_INTENSET_REGION3RA_Pos)
 
#define MWU_INTENSET_REGION3RA_Disabled   (0UL)
 
#define MWU_INTENSET_REGION3RA_Enabled   (1UL)
 
#define MWU_INTENSET_REGION3RA_Set   (1UL)
 
#define MWU_INTENSET_REGION3WA_Pos   (6UL)
 
#define MWU_INTENSET_REGION3WA_Msk   (0x1UL << MWU_INTENSET_REGION3WA_Pos)
 
#define MWU_INTENSET_REGION3WA_Disabled   (0UL)
 
#define MWU_INTENSET_REGION3WA_Enabled   (1UL)
 
#define MWU_INTENSET_REGION3WA_Set   (1UL)
 
#define MWU_INTENSET_REGION2RA_Pos   (5UL)
 
#define MWU_INTENSET_REGION2RA_Msk   (0x1UL << MWU_INTENSET_REGION2RA_Pos)
 
#define MWU_INTENSET_REGION2RA_Disabled   (0UL)
 
#define MWU_INTENSET_REGION2RA_Enabled   (1UL)
 
#define MWU_INTENSET_REGION2RA_Set   (1UL)
 
#define MWU_INTENSET_REGION2WA_Pos   (4UL)
 
#define MWU_INTENSET_REGION2WA_Msk   (0x1UL << MWU_INTENSET_REGION2WA_Pos)
 
#define MWU_INTENSET_REGION2WA_Disabled   (0UL)
 
#define MWU_INTENSET_REGION2WA_Enabled   (1UL)
 
#define MWU_INTENSET_REGION2WA_Set   (1UL)
 
#define MWU_INTENSET_REGION1RA_Pos   (3UL)
 
#define MWU_INTENSET_REGION1RA_Msk   (0x1UL << MWU_INTENSET_REGION1RA_Pos)
 
#define MWU_INTENSET_REGION1RA_Disabled   (0UL)
 
#define MWU_INTENSET_REGION1RA_Enabled   (1UL)
 
#define MWU_INTENSET_REGION1RA_Set   (1UL)
 
#define MWU_INTENSET_REGION1WA_Pos   (2UL)
 
#define MWU_INTENSET_REGION1WA_Msk   (0x1UL << MWU_INTENSET_REGION1WA_Pos)
 
#define MWU_INTENSET_REGION1WA_Disabled   (0UL)
 
#define MWU_INTENSET_REGION1WA_Enabled   (1UL)
 
#define MWU_INTENSET_REGION1WA_Set   (1UL)
 
#define MWU_INTENSET_REGION0RA_Pos   (1UL)
 
#define MWU_INTENSET_REGION0RA_Msk   (0x1UL << MWU_INTENSET_REGION0RA_Pos)
 
#define MWU_INTENSET_REGION0RA_Disabled   (0UL)
 
#define MWU_INTENSET_REGION0RA_Enabled   (1UL)
 
#define MWU_INTENSET_REGION0RA_Set   (1UL)
 
#define MWU_INTENSET_REGION0WA_Pos   (0UL)
 
#define MWU_INTENSET_REGION0WA_Msk   (0x1UL << MWU_INTENSET_REGION0WA_Pos)
 
#define MWU_INTENSET_REGION0WA_Disabled   (0UL)
 
#define MWU_INTENSET_REGION0WA_Enabled   (1UL)
 
#define MWU_INTENSET_REGION0WA_Set   (1UL)
 
#define MWU_INTENCLR_PREGION1RA_Pos   (27UL)
 
#define MWU_INTENCLR_PREGION1RA_Msk   (0x1UL << MWU_INTENCLR_PREGION1RA_Pos)
 
#define MWU_INTENCLR_PREGION1RA_Disabled   (0UL)
 
#define MWU_INTENCLR_PREGION1RA_Enabled   (1UL)
 
#define MWU_INTENCLR_PREGION1RA_Clear   (1UL)
 
#define MWU_INTENCLR_PREGION1WA_Pos   (26UL)
 
#define MWU_INTENCLR_PREGION1WA_Msk   (0x1UL << MWU_INTENCLR_PREGION1WA_Pos)
 
#define MWU_INTENCLR_PREGION1WA_Disabled   (0UL)
 
#define MWU_INTENCLR_PREGION1WA_Enabled   (1UL)
 
#define MWU_INTENCLR_PREGION1WA_Clear   (1UL)
 
#define MWU_INTENCLR_PREGION0RA_Pos   (25UL)
 
#define MWU_INTENCLR_PREGION0RA_Msk   (0x1UL << MWU_INTENCLR_PREGION0RA_Pos)
 
#define MWU_INTENCLR_PREGION0RA_Disabled   (0UL)
 
#define MWU_INTENCLR_PREGION0RA_Enabled   (1UL)
 
#define MWU_INTENCLR_PREGION0RA_Clear   (1UL)
 
#define MWU_INTENCLR_PREGION0WA_Pos   (24UL)
 
#define MWU_INTENCLR_PREGION0WA_Msk   (0x1UL << MWU_INTENCLR_PREGION0WA_Pos)
 
#define MWU_INTENCLR_PREGION0WA_Disabled   (0UL)
 
#define MWU_INTENCLR_PREGION0WA_Enabled   (1UL)
 
#define MWU_INTENCLR_PREGION0WA_Clear   (1UL)
 
#define MWU_INTENCLR_REGION3RA_Pos   (7UL)
 
#define MWU_INTENCLR_REGION3RA_Msk   (0x1UL << MWU_INTENCLR_REGION3RA_Pos)
 
#define MWU_INTENCLR_REGION3RA_Disabled   (0UL)
 
#define MWU_INTENCLR_REGION3RA_Enabled   (1UL)
 
#define MWU_INTENCLR_REGION3RA_Clear   (1UL)
 
#define MWU_INTENCLR_REGION3WA_Pos   (6UL)
 
#define MWU_INTENCLR_REGION3WA_Msk   (0x1UL << MWU_INTENCLR_REGION3WA_Pos)
 
#define MWU_INTENCLR_REGION3WA_Disabled   (0UL)
 
#define MWU_INTENCLR_REGION3WA_Enabled   (1UL)
 
#define MWU_INTENCLR_REGION3WA_Clear   (1UL)
 
#define MWU_INTENCLR_REGION2RA_Pos   (5UL)
 
#define MWU_INTENCLR_REGION2RA_Msk   (0x1UL << MWU_INTENCLR_REGION2RA_Pos)
 
#define MWU_INTENCLR_REGION2RA_Disabled   (0UL)
 
#define MWU_INTENCLR_REGION2RA_Enabled   (1UL)
 
#define MWU_INTENCLR_REGION2RA_Clear   (1UL)
 
#define MWU_INTENCLR_REGION2WA_Pos   (4UL)
 
#define MWU_INTENCLR_REGION2WA_Msk   (0x1UL << MWU_INTENCLR_REGION2WA_Pos)
 
#define MWU_INTENCLR_REGION2WA_Disabled   (0UL)
 
#define MWU_INTENCLR_REGION2WA_Enabled   (1UL)
 
#define MWU_INTENCLR_REGION2WA_Clear   (1UL)
 
#define MWU_INTENCLR_REGION1RA_Pos   (3UL)
 
#define MWU_INTENCLR_REGION1RA_Msk   (0x1UL << MWU_INTENCLR_REGION1RA_Pos)
 
#define MWU_INTENCLR_REGION1RA_Disabled   (0UL)
 
#define MWU_INTENCLR_REGION1RA_Enabled   (1UL)
 
#define MWU_INTENCLR_REGION1RA_Clear   (1UL)
 
#define MWU_INTENCLR_REGION1WA_Pos   (2UL)
 
#define MWU_INTENCLR_REGION1WA_Msk   (0x1UL << MWU_INTENCLR_REGION1WA_Pos)
 
#define MWU_INTENCLR_REGION1WA_Disabled   (0UL)
 
#define MWU_INTENCLR_REGION1WA_Enabled   (1UL)
 
#define MWU_INTENCLR_REGION1WA_Clear   (1UL)
 
#define MWU_INTENCLR_REGION0RA_Pos   (1UL)
 
#define MWU_INTENCLR_REGION0RA_Msk   (0x1UL << MWU_INTENCLR_REGION0RA_Pos)
 
#define MWU_INTENCLR_REGION0RA_Disabled   (0UL)
 
#define MWU_INTENCLR_REGION0RA_Enabled   (1UL)
 
#define MWU_INTENCLR_REGION0RA_Clear   (1UL)
 
#define MWU_INTENCLR_REGION0WA_Pos   (0UL)
 
#define MWU_INTENCLR_REGION0WA_Msk   (0x1UL << MWU_INTENCLR_REGION0WA_Pos)
 
#define MWU_INTENCLR_REGION0WA_Disabled   (0UL)
 
#define MWU_INTENCLR_REGION0WA_Enabled   (1UL)
 
#define MWU_INTENCLR_REGION0WA_Clear   (1UL)
 
#define MWU_NMIEN_PREGION1RA_Pos   (27UL)
 
#define MWU_NMIEN_PREGION1RA_Msk   (0x1UL << MWU_NMIEN_PREGION1RA_Pos)
 
#define MWU_NMIEN_PREGION1RA_Disabled   (0UL)
 
#define MWU_NMIEN_PREGION1RA_Enabled   (1UL)
 
#define MWU_NMIEN_PREGION1WA_Pos   (26UL)
 
#define MWU_NMIEN_PREGION1WA_Msk   (0x1UL << MWU_NMIEN_PREGION1WA_Pos)
 
#define MWU_NMIEN_PREGION1WA_Disabled   (0UL)
 
#define MWU_NMIEN_PREGION1WA_Enabled   (1UL)
 
#define MWU_NMIEN_PREGION0RA_Pos   (25UL)
 
#define MWU_NMIEN_PREGION0RA_Msk   (0x1UL << MWU_NMIEN_PREGION0RA_Pos)
 
#define MWU_NMIEN_PREGION0RA_Disabled   (0UL)
 
#define MWU_NMIEN_PREGION0RA_Enabled   (1UL)
 
#define MWU_NMIEN_PREGION0WA_Pos   (24UL)
 
#define MWU_NMIEN_PREGION0WA_Msk   (0x1UL << MWU_NMIEN_PREGION0WA_Pos)
 
#define MWU_NMIEN_PREGION0WA_Disabled   (0UL)
 
#define MWU_NMIEN_PREGION0WA_Enabled   (1UL)
 
#define MWU_NMIEN_REGION3RA_Pos   (7UL)
 
#define MWU_NMIEN_REGION3RA_Msk   (0x1UL << MWU_NMIEN_REGION3RA_Pos)
 
#define MWU_NMIEN_REGION3RA_Disabled   (0UL)
 
#define MWU_NMIEN_REGION3RA_Enabled   (1UL)
 
#define MWU_NMIEN_REGION3WA_Pos   (6UL)
 
#define MWU_NMIEN_REGION3WA_Msk   (0x1UL << MWU_NMIEN_REGION3WA_Pos)
 
#define MWU_NMIEN_REGION3WA_Disabled   (0UL)
 
#define MWU_NMIEN_REGION3WA_Enabled   (1UL)
 
#define MWU_NMIEN_REGION2RA_Pos   (5UL)
 
#define MWU_NMIEN_REGION2RA_Msk   (0x1UL << MWU_NMIEN_REGION2RA_Pos)
 
#define MWU_NMIEN_REGION2RA_Disabled   (0UL)
 
#define MWU_NMIEN_REGION2RA_Enabled   (1UL)
 
#define MWU_NMIEN_REGION2WA_Pos   (4UL)
 
#define MWU_NMIEN_REGION2WA_Msk   (0x1UL << MWU_NMIEN_REGION2WA_Pos)
 
#define MWU_NMIEN_REGION2WA_Disabled   (0UL)
 
#define MWU_NMIEN_REGION2WA_Enabled   (1UL)
 
#define MWU_NMIEN_REGION1RA_Pos   (3UL)
 
#define MWU_NMIEN_REGION1RA_Msk   (0x1UL << MWU_NMIEN_REGION1RA_Pos)
 
#define MWU_NMIEN_REGION1RA_Disabled   (0UL)
 
#define MWU_NMIEN_REGION1RA_Enabled   (1UL)
 
#define MWU_NMIEN_REGION1WA_Pos   (2UL)
 
#define MWU_NMIEN_REGION1WA_Msk   (0x1UL << MWU_NMIEN_REGION1WA_Pos)
 
#define MWU_NMIEN_REGION1WA_Disabled   (0UL)
 
#define MWU_NMIEN_REGION1WA_Enabled   (1UL)
 
#define MWU_NMIEN_REGION0RA_Pos   (1UL)
 
#define MWU_NMIEN_REGION0RA_Msk   (0x1UL << MWU_NMIEN_REGION0RA_Pos)
 
#define MWU_NMIEN_REGION0RA_Disabled   (0UL)
 
#define MWU_NMIEN_REGION0RA_Enabled   (1UL)
 
#define MWU_NMIEN_REGION0WA_Pos   (0UL)
 
#define MWU_NMIEN_REGION0WA_Msk   (0x1UL << MWU_NMIEN_REGION0WA_Pos)
 
#define MWU_NMIEN_REGION0WA_Disabled   (0UL)
 
#define MWU_NMIEN_REGION0WA_Enabled   (1UL)
 
#define MWU_NMIENSET_PREGION1RA_Pos   (27UL)
 
#define MWU_NMIENSET_PREGION1RA_Msk   (0x1UL << MWU_NMIENSET_PREGION1RA_Pos)
 
#define MWU_NMIENSET_PREGION1RA_Disabled   (0UL)
 
#define MWU_NMIENSET_PREGION1RA_Enabled   (1UL)
 
#define MWU_NMIENSET_PREGION1RA_Set   (1UL)
 
#define MWU_NMIENSET_PREGION1WA_Pos   (26UL)
 
#define MWU_NMIENSET_PREGION1WA_Msk   (0x1UL << MWU_NMIENSET_PREGION1WA_Pos)
 
#define MWU_NMIENSET_PREGION1WA_Disabled   (0UL)
 
#define MWU_NMIENSET_PREGION1WA_Enabled   (1UL)
 
#define MWU_NMIENSET_PREGION1WA_Set   (1UL)
 
#define MWU_NMIENSET_PREGION0RA_Pos   (25UL)
 
#define MWU_NMIENSET_PREGION0RA_Msk   (0x1UL << MWU_NMIENSET_PREGION0RA_Pos)
 
#define MWU_NMIENSET_PREGION0RA_Disabled   (0UL)
 
#define MWU_NMIENSET_PREGION0RA_Enabled   (1UL)
 
#define MWU_NMIENSET_PREGION0RA_Set   (1UL)
 
#define MWU_NMIENSET_PREGION0WA_Pos   (24UL)
 
#define MWU_NMIENSET_PREGION0WA_Msk   (0x1UL << MWU_NMIENSET_PREGION0WA_Pos)
 
#define MWU_NMIENSET_PREGION0WA_Disabled   (0UL)
 
#define MWU_NMIENSET_PREGION0WA_Enabled   (1UL)
 
#define MWU_NMIENSET_PREGION0WA_Set   (1UL)
 
#define MWU_NMIENSET_REGION3RA_Pos   (7UL)
 
#define MWU_NMIENSET_REGION3RA_Msk   (0x1UL << MWU_NMIENSET_REGION3RA_Pos)
 
#define MWU_NMIENSET_REGION3RA_Disabled   (0UL)
 
#define MWU_NMIENSET_REGION3RA_Enabled   (1UL)
 
#define MWU_NMIENSET_REGION3RA_Set   (1UL)
 
#define MWU_NMIENSET_REGION3WA_Pos   (6UL)
 
#define MWU_NMIENSET_REGION3WA_Msk   (0x1UL << MWU_NMIENSET_REGION3WA_Pos)
 
#define MWU_NMIENSET_REGION3WA_Disabled   (0UL)
 
#define MWU_NMIENSET_REGION3WA_Enabled   (1UL)
 
#define MWU_NMIENSET_REGION3WA_Set   (1UL)
 
#define MWU_NMIENSET_REGION2RA_Pos   (5UL)
 
#define MWU_NMIENSET_REGION2RA_Msk   (0x1UL << MWU_NMIENSET_REGION2RA_Pos)
 
#define MWU_NMIENSET_REGION2RA_Disabled   (0UL)
 
#define MWU_NMIENSET_REGION2RA_Enabled   (1UL)
 
#define MWU_NMIENSET_REGION2RA_Set   (1UL)
 
#define MWU_NMIENSET_REGION2WA_Pos   (4UL)
 
#define MWU_NMIENSET_REGION2WA_Msk   (0x1UL << MWU_NMIENSET_REGION2WA_Pos)
 
#define MWU_NMIENSET_REGION2WA_Disabled   (0UL)
 
#define MWU_NMIENSET_REGION2WA_Enabled   (1UL)
 
#define MWU_NMIENSET_REGION2WA_Set   (1UL)
 
#define MWU_NMIENSET_REGION1RA_Pos   (3UL)
 
#define MWU_NMIENSET_REGION1RA_Msk   (0x1UL << MWU_NMIENSET_REGION1RA_Pos)
 
#define MWU_NMIENSET_REGION1RA_Disabled   (0UL)
 
#define MWU_NMIENSET_REGION1RA_Enabled   (1UL)
 
#define MWU_NMIENSET_REGION1RA_Set   (1UL)
 
#define MWU_NMIENSET_REGION1WA_Pos   (2UL)
 
#define MWU_NMIENSET_REGION1WA_Msk   (0x1UL << MWU_NMIENSET_REGION1WA_Pos)
 
#define MWU_NMIENSET_REGION1WA_Disabled   (0UL)
 
#define MWU_NMIENSET_REGION1WA_Enabled   (1UL)
 
#define MWU_NMIENSET_REGION1WA_Set   (1UL)
 
#define MWU_NMIENSET_REGION0RA_Pos   (1UL)
 
#define MWU_NMIENSET_REGION0RA_Msk   (0x1UL << MWU_NMIENSET_REGION0RA_Pos)
 
#define MWU_NMIENSET_REGION0RA_Disabled   (0UL)
 
#define MWU_NMIENSET_REGION0RA_Enabled   (1UL)
 
#define MWU_NMIENSET_REGION0RA_Set   (1UL)
 
#define MWU_NMIENSET_REGION0WA_Pos   (0UL)
 
#define MWU_NMIENSET_REGION0WA_Msk   (0x1UL << MWU_NMIENSET_REGION0WA_Pos)
 
#define MWU_NMIENSET_REGION0WA_Disabled   (0UL)
 
#define MWU_NMIENSET_REGION0WA_Enabled   (1UL)
 
#define MWU_NMIENSET_REGION0WA_Set   (1UL)
 
#define MWU_NMIENCLR_PREGION1RA_Pos   (27UL)
 
#define MWU_NMIENCLR_PREGION1RA_Msk   (0x1UL << MWU_NMIENCLR_PREGION1RA_Pos)
 
#define MWU_NMIENCLR_PREGION1RA_Disabled   (0UL)
 
#define MWU_NMIENCLR_PREGION1RA_Enabled   (1UL)
 
#define MWU_NMIENCLR_PREGION1RA_Clear   (1UL)
 
#define MWU_NMIENCLR_PREGION1WA_Pos   (26UL)
 
#define MWU_NMIENCLR_PREGION1WA_Msk   (0x1UL << MWU_NMIENCLR_PREGION1WA_Pos)
 
#define MWU_NMIENCLR_PREGION1WA_Disabled   (0UL)
 
#define MWU_NMIENCLR_PREGION1WA_Enabled   (1UL)
 
#define MWU_NMIENCLR_PREGION1WA_Clear   (1UL)
 
#define MWU_NMIENCLR_PREGION0RA_Pos   (25UL)
 
#define MWU_NMIENCLR_PREGION0RA_Msk   (0x1UL << MWU_NMIENCLR_PREGION0RA_Pos)
 
#define MWU_NMIENCLR_PREGION0RA_Disabled   (0UL)
 
#define MWU_NMIENCLR_PREGION0RA_Enabled   (1UL)
 
#define MWU_NMIENCLR_PREGION0RA_Clear   (1UL)
 
#define MWU_NMIENCLR_PREGION0WA_Pos   (24UL)
 
#define MWU_NMIENCLR_PREGION0WA_Msk   (0x1UL << MWU_NMIENCLR_PREGION0WA_Pos)
 
#define MWU_NMIENCLR_PREGION0WA_Disabled   (0UL)
 
#define MWU_NMIENCLR_PREGION0WA_Enabled   (1UL)
 
#define MWU_NMIENCLR_PREGION0WA_Clear   (1UL)
 
#define MWU_NMIENCLR_REGION3RA_Pos   (7UL)
 
#define MWU_NMIENCLR_REGION3RA_Msk   (0x1UL << MWU_NMIENCLR_REGION3RA_Pos)
 
#define MWU_NMIENCLR_REGION3RA_Disabled   (0UL)
 
#define MWU_NMIENCLR_REGION3RA_Enabled   (1UL)
 
#define MWU_NMIENCLR_REGION3RA_Clear   (1UL)
 
#define MWU_NMIENCLR_REGION3WA_Pos   (6UL)
 
#define MWU_NMIENCLR_REGION3WA_Msk   (0x1UL << MWU_NMIENCLR_REGION3WA_Pos)
 
#define MWU_NMIENCLR_REGION3WA_Disabled   (0UL)
 
#define MWU_NMIENCLR_REGION3WA_Enabled   (1UL)
 
#define MWU_NMIENCLR_REGION3WA_Clear   (1UL)
 
#define MWU_NMIENCLR_REGION2RA_Pos   (5UL)
 
#define MWU_NMIENCLR_REGION2RA_Msk   (0x1UL << MWU_NMIENCLR_REGION2RA_Pos)
 
#define MWU_NMIENCLR_REGION2RA_Disabled   (0UL)
 
#define MWU_NMIENCLR_REGION2RA_Enabled   (1UL)
 
#define MWU_NMIENCLR_REGION2RA_Clear   (1UL)
 
#define MWU_NMIENCLR_REGION2WA_Pos   (4UL)
 
#define MWU_NMIENCLR_REGION2WA_Msk   (0x1UL << MWU_NMIENCLR_REGION2WA_Pos)
 
#define MWU_NMIENCLR_REGION2WA_Disabled   (0UL)
 
#define MWU_NMIENCLR_REGION2WA_Enabled   (1UL)
 
#define MWU_NMIENCLR_REGION2WA_Clear   (1UL)
 
#define MWU_NMIENCLR_REGION1RA_Pos   (3UL)
 
#define MWU_NMIENCLR_REGION1RA_Msk   (0x1UL << MWU_NMIENCLR_REGION1RA_Pos)
 
#define MWU_NMIENCLR_REGION1RA_Disabled   (0UL)
 
#define MWU_NMIENCLR_REGION1RA_Enabled   (1UL)
 
#define MWU_NMIENCLR_REGION1RA_Clear   (1UL)
 
#define MWU_NMIENCLR_REGION1WA_Pos   (2UL)
 
#define MWU_NMIENCLR_REGION1WA_Msk   (0x1UL << MWU_NMIENCLR_REGION1WA_Pos)
 
#define MWU_NMIENCLR_REGION1WA_Disabled   (0UL)
 
#define MWU_NMIENCLR_REGION1WA_Enabled   (1UL)
 
#define MWU_NMIENCLR_REGION1WA_Clear   (1UL)
 
#define MWU_NMIENCLR_REGION0RA_Pos   (1UL)
 
#define MWU_NMIENCLR_REGION0RA_Msk   (0x1UL << MWU_NMIENCLR_REGION0RA_Pos)
 
#define MWU_NMIENCLR_REGION0RA_Disabled   (0UL)
 
#define MWU_NMIENCLR_REGION0RA_Enabled   (1UL)
 
#define MWU_NMIENCLR_REGION0RA_Clear   (1UL)
 
#define MWU_NMIENCLR_REGION0WA_Pos   (0UL)
 
#define MWU_NMIENCLR_REGION0WA_Msk   (0x1UL << MWU_NMIENCLR_REGION0WA_Pos)
 
#define MWU_NMIENCLR_REGION0WA_Disabled   (0UL)
 
#define MWU_NMIENCLR_REGION0WA_Enabled   (1UL)
 
#define MWU_NMIENCLR_REGION0WA_Clear   (1UL)
 
#define MWU_PERREGION_SUBSTATWA_SR31_Pos   (31UL)
 
#define MWU_PERREGION_SUBSTATWA_SR31_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR31_Pos)
 
#define MWU_PERREGION_SUBSTATWA_SR31_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATWA_SR31_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATWA_SR30_Pos   (30UL)
 
#define MWU_PERREGION_SUBSTATWA_SR30_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR30_Pos)
 
#define MWU_PERREGION_SUBSTATWA_SR30_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATWA_SR30_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATWA_SR29_Pos   (29UL)
 
#define MWU_PERREGION_SUBSTATWA_SR29_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR29_Pos)
 
#define MWU_PERREGION_SUBSTATWA_SR29_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATWA_SR29_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATWA_SR28_Pos   (28UL)
 
#define MWU_PERREGION_SUBSTATWA_SR28_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR28_Pos)
 
#define MWU_PERREGION_SUBSTATWA_SR28_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATWA_SR28_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATWA_SR27_Pos   (27UL)
 
#define MWU_PERREGION_SUBSTATWA_SR27_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR27_Pos)
 
#define MWU_PERREGION_SUBSTATWA_SR27_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATWA_SR27_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATWA_SR26_Pos   (26UL)
 
#define MWU_PERREGION_SUBSTATWA_SR26_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR26_Pos)
 
#define MWU_PERREGION_SUBSTATWA_SR26_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATWA_SR26_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATWA_SR25_Pos   (25UL)
 
#define MWU_PERREGION_SUBSTATWA_SR25_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR25_Pos)
 
#define MWU_PERREGION_SUBSTATWA_SR25_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATWA_SR25_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATWA_SR24_Pos   (24UL)
 
#define MWU_PERREGION_SUBSTATWA_SR24_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR24_Pos)
 
#define MWU_PERREGION_SUBSTATWA_SR24_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATWA_SR24_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATWA_SR23_Pos   (23UL)
 
#define MWU_PERREGION_SUBSTATWA_SR23_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR23_Pos)
 
#define MWU_PERREGION_SUBSTATWA_SR23_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATWA_SR23_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATWA_SR22_Pos   (22UL)
 
#define MWU_PERREGION_SUBSTATWA_SR22_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR22_Pos)
 
#define MWU_PERREGION_SUBSTATWA_SR22_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATWA_SR22_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATWA_SR21_Pos   (21UL)
 
#define MWU_PERREGION_SUBSTATWA_SR21_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR21_Pos)
 
#define MWU_PERREGION_SUBSTATWA_SR21_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATWA_SR21_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATWA_SR20_Pos   (20UL)
 
#define MWU_PERREGION_SUBSTATWA_SR20_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR20_Pos)
 
#define MWU_PERREGION_SUBSTATWA_SR20_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATWA_SR20_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATWA_SR19_Pos   (19UL)
 
#define MWU_PERREGION_SUBSTATWA_SR19_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR19_Pos)
 
#define MWU_PERREGION_SUBSTATWA_SR19_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATWA_SR19_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATWA_SR18_Pos   (18UL)
 
#define MWU_PERREGION_SUBSTATWA_SR18_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR18_Pos)
 
#define MWU_PERREGION_SUBSTATWA_SR18_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATWA_SR18_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATWA_SR17_Pos   (17UL)
 
#define MWU_PERREGION_SUBSTATWA_SR17_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR17_Pos)
 
#define MWU_PERREGION_SUBSTATWA_SR17_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATWA_SR17_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATWA_SR16_Pos   (16UL)
 
#define MWU_PERREGION_SUBSTATWA_SR16_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR16_Pos)
 
#define MWU_PERREGION_SUBSTATWA_SR16_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATWA_SR16_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATWA_SR15_Pos   (15UL)
 
#define MWU_PERREGION_SUBSTATWA_SR15_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR15_Pos)
 
#define MWU_PERREGION_SUBSTATWA_SR15_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATWA_SR15_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATWA_SR14_Pos   (14UL)
 
#define MWU_PERREGION_SUBSTATWA_SR14_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR14_Pos)
 
#define MWU_PERREGION_SUBSTATWA_SR14_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATWA_SR14_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATWA_SR13_Pos   (13UL)
 
#define MWU_PERREGION_SUBSTATWA_SR13_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR13_Pos)
 
#define MWU_PERREGION_SUBSTATWA_SR13_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATWA_SR13_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATWA_SR12_Pos   (12UL)
 
#define MWU_PERREGION_SUBSTATWA_SR12_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR12_Pos)
 
#define MWU_PERREGION_SUBSTATWA_SR12_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATWA_SR12_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATWA_SR11_Pos   (11UL)
 
#define MWU_PERREGION_SUBSTATWA_SR11_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR11_Pos)
 
#define MWU_PERREGION_SUBSTATWA_SR11_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATWA_SR11_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATWA_SR10_Pos   (10UL)
 
#define MWU_PERREGION_SUBSTATWA_SR10_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR10_Pos)
 
#define MWU_PERREGION_SUBSTATWA_SR10_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATWA_SR10_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATWA_SR9_Pos   (9UL)
 
#define MWU_PERREGION_SUBSTATWA_SR9_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR9_Pos)
 
#define MWU_PERREGION_SUBSTATWA_SR9_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATWA_SR9_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATWA_SR8_Pos   (8UL)
 
#define MWU_PERREGION_SUBSTATWA_SR8_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR8_Pos)
 
#define MWU_PERREGION_SUBSTATWA_SR8_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATWA_SR8_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATWA_SR7_Pos   (7UL)
 
#define MWU_PERREGION_SUBSTATWA_SR7_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR7_Pos)
 
#define MWU_PERREGION_SUBSTATWA_SR7_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATWA_SR7_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATWA_SR6_Pos   (6UL)
 
#define MWU_PERREGION_SUBSTATWA_SR6_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR6_Pos)
 
#define MWU_PERREGION_SUBSTATWA_SR6_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATWA_SR6_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATWA_SR5_Pos   (5UL)
 
#define MWU_PERREGION_SUBSTATWA_SR5_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR5_Pos)
 
#define MWU_PERREGION_SUBSTATWA_SR5_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATWA_SR5_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATWA_SR4_Pos   (4UL)
 
#define MWU_PERREGION_SUBSTATWA_SR4_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR4_Pos)
 
#define MWU_PERREGION_SUBSTATWA_SR4_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATWA_SR4_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATWA_SR3_Pos   (3UL)
 
#define MWU_PERREGION_SUBSTATWA_SR3_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR3_Pos)
 
#define MWU_PERREGION_SUBSTATWA_SR3_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATWA_SR3_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATWA_SR2_Pos   (2UL)
 
#define MWU_PERREGION_SUBSTATWA_SR2_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR2_Pos)
 
#define MWU_PERREGION_SUBSTATWA_SR2_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATWA_SR2_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATWA_SR1_Pos   (1UL)
 
#define MWU_PERREGION_SUBSTATWA_SR1_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR1_Pos)
 
#define MWU_PERREGION_SUBSTATWA_SR1_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATWA_SR1_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATWA_SR0_Pos   (0UL)
 
#define MWU_PERREGION_SUBSTATWA_SR0_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR0_Pos)
 
#define MWU_PERREGION_SUBSTATWA_SR0_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATWA_SR0_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATRA_SR31_Pos   (31UL)
 
#define MWU_PERREGION_SUBSTATRA_SR31_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR31_Pos)
 
#define MWU_PERREGION_SUBSTATRA_SR31_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATRA_SR31_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATRA_SR30_Pos   (30UL)
 
#define MWU_PERREGION_SUBSTATRA_SR30_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR30_Pos)
 
#define MWU_PERREGION_SUBSTATRA_SR30_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATRA_SR30_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATRA_SR29_Pos   (29UL)
 
#define MWU_PERREGION_SUBSTATRA_SR29_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR29_Pos)
 
#define MWU_PERREGION_SUBSTATRA_SR29_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATRA_SR29_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATRA_SR28_Pos   (28UL)
 
#define MWU_PERREGION_SUBSTATRA_SR28_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR28_Pos)
 
#define MWU_PERREGION_SUBSTATRA_SR28_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATRA_SR28_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATRA_SR27_Pos   (27UL)
 
#define MWU_PERREGION_SUBSTATRA_SR27_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR27_Pos)
 
#define MWU_PERREGION_SUBSTATRA_SR27_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATRA_SR27_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATRA_SR26_Pos   (26UL)
 
#define MWU_PERREGION_SUBSTATRA_SR26_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR26_Pos)
 
#define MWU_PERREGION_SUBSTATRA_SR26_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATRA_SR26_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATRA_SR25_Pos   (25UL)
 
#define MWU_PERREGION_SUBSTATRA_SR25_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR25_Pos)
 
#define MWU_PERREGION_SUBSTATRA_SR25_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATRA_SR25_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATRA_SR24_Pos   (24UL)
 
#define MWU_PERREGION_SUBSTATRA_SR24_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR24_Pos)
 
#define MWU_PERREGION_SUBSTATRA_SR24_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATRA_SR24_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATRA_SR23_Pos   (23UL)
 
#define MWU_PERREGION_SUBSTATRA_SR23_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR23_Pos)
 
#define MWU_PERREGION_SUBSTATRA_SR23_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATRA_SR23_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATRA_SR22_Pos   (22UL)
 
#define MWU_PERREGION_SUBSTATRA_SR22_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR22_Pos)
 
#define MWU_PERREGION_SUBSTATRA_SR22_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATRA_SR22_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATRA_SR21_Pos   (21UL)
 
#define MWU_PERREGION_SUBSTATRA_SR21_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR21_Pos)
 
#define MWU_PERREGION_SUBSTATRA_SR21_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATRA_SR21_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATRA_SR20_Pos   (20UL)
 
#define MWU_PERREGION_SUBSTATRA_SR20_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR20_Pos)
 
#define MWU_PERREGION_SUBSTATRA_SR20_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATRA_SR20_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATRA_SR19_Pos   (19UL)
 
#define MWU_PERREGION_SUBSTATRA_SR19_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR19_Pos)
 
#define MWU_PERREGION_SUBSTATRA_SR19_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATRA_SR19_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATRA_SR18_Pos   (18UL)
 
#define MWU_PERREGION_SUBSTATRA_SR18_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR18_Pos)
 
#define MWU_PERREGION_SUBSTATRA_SR18_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATRA_SR18_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATRA_SR17_Pos   (17UL)
 
#define MWU_PERREGION_SUBSTATRA_SR17_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR17_Pos)
 
#define MWU_PERREGION_SUBSTATRA_SR17_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATRA_SR17_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATRA_SR16_Pos   (16UL)
 
#define MWU_PERREGION_SUBSTATRA_SR16_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR16_Pos)
 
#define MWU_PERREGION_SUBSTATRA_SR16_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATRA_SR16_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATRA_SR15_Pos   (15UL)
 
#define MWU_PERREGION_SUBSTATRA_SR15_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR15_Pos)
 
#define MWU_PERREGION_SUBSTATRA_SR15_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATRA_SR15_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATRA_SR14_Pos   (14UL)
 
#define MWU_PERREGION_SUBSTATRA_SR14_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR14_Pos)
 
#define MWU_PERREGION_SUBSTATRA_SR14_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATRA_SR14_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATRA_SR13_Pos   (13UL)
 
#define MWU_PERREGION_SUBSTATRA_SR13_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR13_Pos)
 
#define MWU_PERREGION_SUBSTATRA_SR13_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATRA_SR13_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATRA_SR12_Pos   (12UL)
 
#define MWU_PERREGION_SUBSTATRA_SR12_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR12_Pos)
 
#define MWU_PERREGION_SUBSTATRA_SR12_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATRA_SR12_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATRA_SR11_Pos   (11UL)
 
#define MWU_PERREGION_SUBSTATRA_SR11_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR11_Pos)
 
#define MWU_PERREGION_SUBSTATRA_SR11_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATRA_SR11_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATRA_SR10_Pos   (10UL)
 
#define MWU_PERREGION_SUBSTATRA_SR10_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR10_Pos)
 
#define MWU_PERREGION_SUBSTATRA_SR10_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATRA_SR10_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATRA_SR9_Pos   (9UL)
 
#define MWU_PERREGION_SUBSTATRA_SR9_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR9_Pos)
 
#define MWU_PERREGION_SUBSTATRA_SR9_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATRA_SR9_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATRA_SR8_Pos   (8UL)
 
#define MWU_PERREGION_SUBSTATRA_SR8_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR8_Pos)
 
#define MWU_PERREGION_SUBSTATRA_SR8_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATRA_SR8_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATRA_SR7_Pos   (7UL)
 
#define MWU_PERREGION_SUBSTATRA_SR7_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR7_Pos)
 
#define MWU_PERREGION_SUBSTATRA_SR7_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATRA_SR7_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATRA_SR6_Pos   (6UL)
 
#define MWU_PERREGION_SUBSTATRA_SR6_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR6_Pos)
 
#define MWU_PERREGION_SUBSTATRA_SR6_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATRA_SR6_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATRA_SR5_Pos   (5UL)
 
#define MWU_PERREGION_SUBSTATRA_SR5_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR5_Pos)
 
#define MWU_PERREGION_SUBSTATRA_SR5_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATRA_SR5_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATRA_SR4_Pos   (4UL)
 
#define MWU_PERREGION_SUBSTATRA_SR4_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR4_Pos)
 
#define MWU_PERREGION_SUBSTATRA_SR4_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATRA_SR4_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATRA_SR3_Pos   (3UL)
 
#define MWU_PERREGION_SUBSTATRA_SR3_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR3_Pos)
 
#define MWU_PERREGION_SUBSTATRA_SR3_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATRA_SR3_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATRA_SR2_Pos   (2UL)
 
#define MWU_PERREGION_SUBSTATRA_SR2_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR2_Pos)
 
#define MWU_PERREGION_SUBSTATRA_SR2_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATRA_SR2_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATRA_SR1_Pos   (1UL)
 
#define MWU_PERREGION_SUBSTATRA_SR1_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR1_Pos)
 
#define MWU_PERREGION_SUBSTATRA_SR1_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATRA_SR1_Access   (1UL)
 
#define MWU_PERREGION_SUBSTATRA_SR0_Pos   (0UL)
 
#define MWU_PERREGION_SUBSTATRA_SR0_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR0_Pos)
 
#define MWU_PERREGION_SUBSTATRA_SR0_NoAccess   (0UL)
 
#define MWU_PERREGION_SUBSTATRA_SR0_Access   (1UL)
 
#define MWU_REGIONEN_PRGN1RA_Pos   (27UL)
 
#define MWU_REGIONEN_PRGN1RA_Msk   (0x1UL << MWU_REGIONEN_PRGN1RA_Pos)
 
#define MWU_REGIONEN_PRGN1RA_Disable   (0UL)
 
#define MWU_REGIONEN_PRGN1RA_Enable   (1UL)
 
#define MWU_REGIONEN_PRGN1WA_Pos   (26UL)
 
#define MWU_REGIONEN_PRGN1WA_Msk   (0x1UL << MWU_REGIONEN_PRGN1WA_Pos)
 
#define MWU_REGIONEN_PRGN1WA_Disable   (0UL)
 
#define MWU_REGIONEN_PRGN1WA_Enable   (1UL)
 
#define MWU_REGIONEN_PRGN0RA_Pos   (25UL)
 
#define MWU_REGIONEN_PRGN0RA_Msk   (0x1UL << MWU_REGIONEN_PRGN0RA_Pos)
 
#define MWU_REGIONEN_PRGN0RA_Disable   (0UL)
 
#define MWU_REGIONEN_PRGN0RA_Enable   (1UL)
 
#define MWU_REGIONEN_PRGN0WA_Pos   (24UL)
 
#define MWU_REGIONEN_PRGN0WA_Msk   (0x1UL << MWU_REGIONEN_PRGN0WA_Pos)
 
#define MWU_REGIONEN_PRGN0WA_Disable   (0UL)
 
#define MWU_REGIONEN_PRGN0WA_Enable   (1UL)
 
#define MWU_REGIONEN_RGN3RA_Pos   (7UL)
 
#define MWU_REGIONEN_RGN3RA_Msk   (0x1UL << MWU_REGIONEN_RGN3RA_Pos)
 
#define MWU_REGIONEN_RGN3RA_Disable   (0UL)
 
#define MWU_REGIONEN_RGN3RA_Enable   (1UL)
 
#define MWU_REGIONEN_RGN3WA_Pos   (6UL)
 
#define MWU_REGIONEN_RGN3WA_Msk   (0x1UL << MWU_REGIONEN_RGN3WA_Pos)
 
#define MWU_REGIONEN_RGN3WA_Disable   (0UL)
 
#define MWU_REGIONEN_RGN3WA_Enable   (1UL)
 
#define MWU_REGIONEN_RGN2RA_Pos   (5UL)
 
#define MWU_REGIONEN_RGN2RA_Msk   (0x1UL << MWU_REGIONEN_RGN2RA_Pos)
 
#define MWU_REGIONEN_RGN2RA_Disable   (0UL)
 
#define MWU_REGIONEN_RGN2RA_Enable   (1UL)
 
#define MWU_REGIONEN_RGN2WA_Pos   (4UL)
 
#define MWU_REGIONEN_RGN2WA_Msk   (0x1UL << MWU_REGIONEN_RGN2WA_Pos)
 
#define MWU_REGIONEN_RGN2WA_Disable   (0UL)
 
#define MWU_REGIONEN_RGN2WA_Enable   (1UL)
 
#define MWU_REGIONEN_RGN1RA_Pos   (3UL)
 
#define MWU_REGIONEN_RGN1RA_Msk   (0x1UL << MWU_REGIONEN_RGN1RA_Pos)
 
#define MWU_REGIONEN_RGN1RA_Disable   (0UL)
 
#define MWU_REGIONEN_RGN1RA_Enable   (1UL)
 
#define MWU_REGIONEN_RGN1WA_Pos   (2UL)
 
#define MWU_REGIONEN_RGN1WA_Msk   (0x1UL << MWU_REGIONEN_RGN1WA_Pos)
 
#define MWU_REGIONEN_RGN1WA_Disable   (0UL)
 
#define MWU_REGIONEN_RGN1WA_Enable   (1UL)
 
#define MWU_REGIONEN_RGN0RA_Pos   (1UL)
 
#define MWU_REGIONEN_RGN0RA_Msk   (0x1UL << MWU_REGIONEN_RGN0RA_Pos)
 
#define MWU_REGIONEN_RGN0RA_Disable   (0UL)
 
#define MWU_REGIONEN_RGN0RA_Enable   (1UL)
 
#define MWU_REGIONEN_RGN0WA_Pos   (0UL)
 
#define MWU_REGIONEN_RGN0WA_Msk   (0x1UL << MWU_REGIONEN_RGN0WA_Pos)
 
#define MWU_REGIONEN_RGN0WA_Disable   (0UL)
 
#define MWU_REGIONEN_RGN0WA_Enable   (1UL)
 
#define MWU_REGIONENSET_PRGN1RA_Pos   (27UL)
 
#define MWU_REGIONENSET_PRGN1RA_Msk   (0x1UL << MWU_REGIONENSET_PRGN1RA_Pos)
 
#define MWU_REGIONENSET_PRGN1RA_Disabled   (0UL)
 
#define MWU_REGIONENSET_PRGN1RA_Enabled   (1UL)
 
#define MWU_REGIONENSET_PRGN1RA_Set   (1UL)
 
#define MWU_REGIONENSET_PRGN1WA_Pos   (26UL)
 
#define MWU_REGIONENSET_PRGN1WA_Msk   (0x1UL << MWU_REGIONENSET_PRGN1WA_Pos)
 
#define MWU_REGIONENSET_PRGN1WA_Disabled   (0UL)
 
#define MWU_REGIONENSET_PRGN1WA_Enabled   (1UL)
 
#define MWU_REGIONENSET_PRGN1WA_Set   (1UL)
 
#define MWU_REGIONENSET_PRGN0RA_Pos   (25UL)
 
#define MWU_REGIONENSET_PRGN0RA_Msk   (0x1UL << MWU_REGIONENSET_PRGN0RA_Pos)
 
#define MWU_REGIONENSET_PRGN0RA_Disabled   (0UL)
 
#define MWU_REGIONENSET_PRGN0RA_Enabled   (1UL)
 
#define MWU_REGIONENSET_PRGN0RA_Set   (1UL)
 
#define MWU_REGIONENSET_PRGN0WA_Pos   (24UL)
 
#define MWU_REGIONENSET_PRGN0WA_Msk   (0x1UL << MWU_REGIONENSET_PRGN0WA_Pos)
 
#define MWU_REGIONENSET_PRGN0WA_Disabled   (0UL)
 
#define MWU_REGIONENSET_PRGN0WA_Enabled   (1UL)
 
#define MWU_REGIONENSET_PRGN0WA_Set   (1UL)
 
#define MWU_REGIONENSET_RGN3RA_Pos   (7UL)
 
#define MWU_REGIONENSET_RGN3RA_Msk   (0x1UL << MWU_REGIONENSET_RGN3RA_Pos)
 
#define MWU_REGIONENSET_RGN3RA_Disabled   (0UL)
 
#define MWU_REGIONENSET_RGN3RA_Enabled   (1UL)
 
#define MWU_REGIONENSET_RGN3RA_Set   (1UL)
 
#define MWU_REGIONENSET_RGN3WA_Pos   (6UL)
 
#define MWU_REGIONENSET_RGN3WA_Msk   (0x1UL << MWU_REGIONENSET_RGN3WA_Pos)
 
#define MWU_REGIONENSET_RGN3WA_Disabled   (0UL)
 
#define MWU_REGIONENSET_RGN3WA_Enabled   (1UL)
 
#define MWU_REGIONENSET_RGN3WA_Set   (1UL)
 
#define MWU_REGIONENSET_RGN2RA_Pos   (5UL)
 
#define MWU_REGIONENSET_RGN2RA_Msk   (0x1UL << MWU_REGIONENSET_RGN2RA_Pos)
 
#define MWU_REGIONENSET_RGN2RA_Disabled   (0UL)
 
#define MWU_REGIONENSET_RGN2RA_Enabled   (1UL)
 
#define MWU_REGIONENSET_RGN2RA_Set   (1UL)
 
#define MWU_REGIONENSET_RGN2WA_Pos   (4UL)
 
#define MWU_REGIONENSET_RGN2WA_Msk   (0x1UL << MWU_REGIONENSET_RGN2WA_Pos)
 
#define MWU_REGIONENSET_RGN2WA_Disabled   (0UL)
 
#define MWU_REGIONENSET_RGN2WA_Enabled   (1UL)
 
#define MWU_REGIONENSET_RGN2WA_Set   (1UL)
 
#define MWU_REGIONENSET_RGN1RA_Pos   (3UL)
 
#define MWU_REGIONENSET_RGN1RA_Msk   (0x1UL << MWU_REGIONENSET_RGN1RA_Pos)
 
#define MWU_REGIONENSET_RGN1RA_Disabled   (0UL)
 
#define MWU_REGIONENSET_RGN1RA_Enabled   (1UL)
 
#define MWU_REGIONENSET_RGN1RA_Set   (1UL)
 
#define MWU_REGIONENSET_RGN1WA_Pos   (2UL)
 
#define MWU_REGIONENSET_RGN1WA_Msk   (0x1UL << MWU_REGIONENSET_RGN1WA_Pos)
 
#define MWU_REGIONENSET_RGN1WA_Disabled   (0UL)
 
#define MWU_REGIONENSET_RGN1WA_Enabled   (1UL)
 
#define MWU_REGIONENSET_RGN1WA_Set   (1UL)
 
#define MWU_REGIONENSET_RGN0RA_Pos   (1UL)
 
#define MWU_REGIONENSET_RGN0RA_Msk   (0x1UL << MWU_REGIONENSET_RGN0RA_Pos)
 
#define MWU_REGIONENSET_RGN0RA_Disabled   (0UL)
 
#define MWU_REGIONENSET_RGN0RA_Enabled   (1UL)
 
#define MWU_REGIONENSET_RGN0RA_Set   (1UL)
 
#define MWU_REGIONENSET_RGN0WA_Pos   (0UL)
 
#define MWU_REGIONENSET_RGN0WA_Msk   (0x1UL << MWU_REGIONENSET_RGN0WA_Pos)
 
#define MWU_REGIONENSET_RGN0WA_Disabled   (0UL)
 
#define MWU_REGIONENSET_RGN0WA_Enabled   (1UL)
 
#define MWU_REGIONENSET_RGN0WA_Set   (1UL)
 
#define MWU_REGIONENCLR_PRGN1RA_Pos   (27UL)
 
#define MWU_REGIONENCLR_PRGN1RA_Msk   (0x1UL << MWU_REGIONENCLR_PRGN1RA_Pos)
 
#define MWU_REGIONENCLR_PRGN1RA_Disabled   (0UL)
 
#define MWU_REGIONENCLR_PRGN1RA_Enabled   (1UL)
 
#define MWU_REGIONENCLR_PRGN1RA_Clear   (1UL)
 
#define MWU_REGIONENCLR_PRGN1WA_Pos   (26UL)
 
#define MWU_REGIONENCLR_PRGN1WA_Msk   (0x1UL << MWU_REGIONENCLR_PRGN1WA_Pos)
 
#define MWU_REGIONENCLR_PRGN1WA_Disabled   (0UL)
 
#define MWU_REGIONENCLR_PRGN1WA_Enabled   (1UL)
 
#define MWU_REGIONENCLR_PRGN1WA_Clear   (1UL)
 
#define MWU_REGIONENCLR_PRGN0RA_Pos   (25UL)
 
#define MWU_REGIONENCLR_PRGN0RA_Msk   (0x1UL << MWU_REGIONENCLR_PRGN0RA_Pos)
 
#define MWU_REGIONENCLR_PRGN0RA_Disabled   (0UL)
 
#define MWU_REGIONENCLR_PRGN0RA_Enabled   (1UL)
 
#define MWU_REGIONENCLR_PRGN0RA_Clear   (1UL)
 
#define MWU_REGIONENCLR_PRGN0WA_Pos   (24UL)
 
#define MWU_REGIONENCLR_PRGN0WA_Msk   (0x1UL << MWU_REGIONENCLR_PRGN0WA_Pos)
 
#define MWU_REGIONENCLR_PRGN0WA_Disabled   (0UL)
 
#define MWU_REGIONENCLR_PRGN0WA_Enabled   (1UL)
 
#define MWU_REGIONENCLR_PRGN0WA_Clear   (1UL)
 
#define MWU_REGIONENCLR_RGN3RA_Pos   (7UL)
 
#define MWU_REGIONENCLR_RGN3RA_Msk   (0x1UL << MWU_REGIONENCLR_RGN3RA_Pos)
 
#define MWU_REGIONENCLR_RGN3RA_Disabled   (0UL)
 
#define MWU_REGIONENCLR_RGN3RA_Enabled   (1UL)
 
#define MWU_REGIONENCLR_RGN3RA_Clear   (1UL)
 
#define MWU_REGIONENCLR_RGN3WA_Pos   (6UL)
 
#define MWU_REGIONENCLR_RGN3WA_Msk   (0x1UL << MWU_REGIONENCLR_RGN3WA_Pos)
 
#define MWU_REGIONENCLR_RGN3WA_Disabled   (0UL)
 
#define MWU_REGIONENCLR_RGN3WA_Enabled   (1UL)
 
#define MWU_REGIONENCLR_RGN3WA_Clear   (1UL)
 
#define MWU_REGIONENCLR_RGN2RA_Pos   (5UL)
 
#define MWU_REGIONENCLR_RGN2RA_Msk   (0x1UL << MWU_REGIONENCLR_RGN2RA_Pos)
 
#define MWU_REGIONENCLR_RGN2RA_Disabled   (0UL)
 
#define MWU_REGIONENCLR_RGN2RA_Enabled   (1UL)
 
#define MWU_REGIONENCLR_RGN2RA_Clear   (1UL)
 
#define MWU_REGIONENCLR_RGN2WA_Pos   (4UL)
 
#define MWU_REGIONENCLR_RGN2WA_Msk   (0x1UL << MWU_REGIONENCLR_RGN2WA_Pos)
 
#define MWU_REGIONENCLR_RGN2WA_Disabled   (0UL)
 
#define MWU_REGIONENCLR_RGN2WA_Enabled   (1UL)
 
#define MWU_REGIONENCLR_RGN2WA_Clear   (1UL)
 
#define MWU_REGIONENCLR_RGN1RA_Pos   (3UL)
 
#define MWU_REGIONENCLR_RGN1RA_Msk   (0x1UL << MWU_REGIONENCLR_RGN1RA_Pos)
 
#define MWU_REGIONENCLR_RGN1RA_Disabled   (0UL)
 
#define MWU_REGIONENCLR_RGN1RA_Enabled   (1UL)
 
#define MWU_REGIONENCLR_RGN1RA_Clear   (1UL)
 
#define MWU_REGIONENCLR_RGN1WA_Pos   (2UL)
 
#define MWU_REGIONENCLR_RGN1WA_Msk   (0x1UL << MWU_REGIONENCLR_RGN1WA_Pos)
 
#define MWU_REGIONENCLR_RGN1WA_Disabled   (0UL)
 
#define MWU_REGIONENCLR_RGN1WA_Enabled   (1UL)
 
#define MWU_REGIONENCLR_RGN1WA_Clear   (1UL)
 
#define MWU_REGIONENCLR_RGN0RA_Pos   (1UL)
 
#define MWU_REGIONENCLR_RGN0RA_Msk   (0x1UL << MWU_REGIONENCLR_RGN0RA_Pos)
 
#define MWU_REGIONENCLR_RGN0RA_Disabled   (0UL)
 
#define MWU_REGIONENCLR_RGN0RA_Enabled   (1UL)
 
#define MWU_REGIONENCLR_RGN0RA_Clear   (1UL)
 
#define MWU_REGIONENCLR_RGN0WA_Pos   (0UL)
 
#define MWU_REGIONENCLR_RGN0WA_Msk   (0x1UL << MWU_REGIONENCLR_RGN0WA_Pos)
 
#define MWU_REGIONENCLR_RGN0WA_Disabled   (0UL)
 
#define MWU_REGIONENCLR_RGN0WA_Enabled   (1UL)
 
#define MWU_REGIONENCLR_RGN0WA_Clear   (1UL)
 
#define MWU_REGION_START_START_Pos   (0UL)
 
#define MWU_REGION_START_START_Msk   (0xFFFFFFFFUL << MWU_REGION_START_START_Pos)
 
#define MWU_REGION_END_END_Pos   (0UL)
 
#define MWU_REGION_END_END_Msk   (0xFFFFFFFFUL << MWU_REGION_END_END_Pos)
 
#define MWU_REGION_END_END_OneByte   (0UL)
 
#define MWU_PREGION_START_START_Pos   (0UL)
 
#define MWU_PREGION_START_START_Msk   (0xFFFFFFFFUL << MWU_PREGION_START_START_Pos)
 
#define MWU_PREGION_END_END_Pos   (0UL)
 
#define MWU_PREGION_END_END_Msk   (0xFFFFFFFFUL << MWU_PREGION_END_END_Pos)
 
#define MWU_PREGION_SUBS_SR31_Pos   (31UL)
 
#define MWU_PREGION_SUBS_SR31_Msk   (0x1UL << MWU_PREGION_SUBS_SR31_Pos)
 
#define MWU_PREGION_SUBS_SR31_Exclude   (0UL)
 
#define MWU_PREGION_SUBS_SR31_Include   (1UL)
 
#define MWU_PREGION_SUBS_SR30_Pos   (30UL)
 
#define MWU_PREGION_SUBS_SR30_Msk   (0x1UL << MWU_PREGION_SUBS_SR30_Pos)
 
#define MWU_PREGION_SUBS_SR30_Exclude   (0UL)
 
#define MWU_PREGION_SUBS_SR30_Include   (1UL)
 
#define MWU_PREGION_SUBS_SR29_Pos   (29UL)
 
#define MWU_PREGION_SUBS_SR29_Msk   (0x1UL << MWU_PREGION_SUBS_SR29_Pos)
 
#define MWU_PREGION_SUBS_SR29_Exclude   (0UL)
 
#define MWU_PREGION_SUBS_SR29_Include   (1UL)
 
#define MWU_PREGION_SUBS_SR28_Pos   (28UL)
 
#define MWU_PREGION_SUBS_SR28_Msk   (0x1UL << MWU_PREGION_SUBS_SR28_Pos)
 
#define MWU_PREGION_SUBS_SR28_Exclude   (0UL)
 
#define MWU_PREGION_SUBS_SR28_Include   (1UL)
 
#define MWU_PREGION_SUBS_SR27_Pos   (27UL)
 
#define MWU_PREGION_SUBS_SR27_Msk   (0x1UL << MWU_PREGION_SUBS_SR27_Pos)
 
#define MWU_PREGION_SUBS_SR27_Exclude   (0UL)
 
#define MWU_PREGION_SUBS_SR27_Include   (1UL)
 
#define MWU_PREGION_SUBS_SR26_Pos   (26UL)
 
#define MWU_PREGION_SUBS_SR26_Msk   (0x1UL << MWU_PREGION_SUBS_SR26_Pos)
 
#define MWU_PREGION_SUBS_SR26_Exclude   (0UL)
 
#define MWU_PREGION_SUBS_SR26_Include   (1UL)
 
#define MWU_PREGION_SUBS_SR25_Pos   (25UL)
 
#define MWU_PREGION_SUBS_SR25_Msk   (0x1UL << MWU_PREGION_SUBS_SR25_Pos)
 
#define MWU_PREGION_SUBS_SR25_Exclude   (0UL)
 
#define MWU_PREGION_SUBS_SR25_Include   (1UL)
 
#define MWU_PREGION_SUBS_SR24_Pos   (24UL)
 
#define MWU_PREGION_SUBS_SR24_Msk   (0x1UL << MWU_PREGION_SUBS_SR24_Pos)
 
#define MWU_PREGION_SUBS_SR24_Exclude   (0UL)
 
#define MWU_PREGION_SUBS_SR24_Include   (1UL)
 
#define MWU_PREGION_SUBS_SR23_Pos   (23UL)
 
#define MWU_PREGION_SUBS_SR23_Msk   (0x1UL << MWU_PREGION_SUBS_SR23_Pos)
 
#define MWU_PREGION_SUBS_SR23_Exclude   (0UL)
 
#define MWU_PREGION_SUBS_SR23_Include   (1UL)
 
#define MWU_PREGION_SUBS_SR22_Pos   (22UL)
 
#define MWU_PREGION_SUBS_SR22_Msk   (0x1UL << MWU_PREGION_SUBS_SR22_Pos)
 
#define MWU_PREGION_SUBS_SR22_Exclude   (0UL)
 
#define MWU_PREGION_SUBS_SR22_Include   (1UL)
 
#define MWU_PREGION_SUBS_SR21_Pos   (21UL)
 
#define MWU_PREGION_SUBS_SR21_Msk   (0x1UL << MWU_PREGION_SUBS_SR21_Pos)
 
#define MWU_PREGION_SUBS_SR21_Exclude   (0UL)
 
#define MWU_PREGION_SUBS_SR21_Include   (1UL)
 
#define MWU_PREGION_SUBS_SR20_Pos   (20UL)
 
#define MWU_PREGION_SUBS_SR20_Msk   (0x1UL << MWU_PREGION_SUBS_SR20_Pos)
 
#define MWU_PREGION_SUBS_SR20_Exclude   (0UL)
 
#define MWU_PREGION_SUBS_SR20_Include   (1UL)
 
#define MWU_PREGION_SUBS_SR19_Pos   (19UL)
 
#define MWU_PREGION_SUBS_SR19_Msk   (0x1UL << MWU_PREGION_SUBS_SR19_Pos)
 
#define MWU_PREGION_SUBS_SR19_Exclude   (0UL)
 
#define MWU_PREGION_SUBS_SR19_Include   (1UL)
 
#define MWU_PREGION_SUBS_SR18_Pos   (18UL)
 
#define MWU_PREGION_SUBS_SR18_Msk   (0x1UL << MWU_PREGION_SUBS_SR18_Pos)
 
#define MWU_PREGION_SUBS_SR18_Exclude   (0UL)
 
#define MWU_PREGION_SUBS_SR18_Include   (1UL)
 
#define MWU_PREGION_SUBS_SR17_Pos   (17UL)
 
#define MWU_PREGION_SUBS_SR17_Msk   (0x1UL << MWU_PREGION_SUBS_SR17_Pos)
 
#define MWU_PREGION_SUBS_SR17_Exclude   (0UL)
 
#define MWU_PREGION_SUBS_SR17_Include   (1UL)
 
#define MWU_PREGION_SUBS_SR16_Pos   (16UL)
 
#define MWU_PREGION_SUBS_SR16_Msk   (0x1UL << MWU_PREGION_SUBS_SR16_Pos)
 
#define MWU_PREGION_SUBS_SR16_Exclude   (0UL)
 
#define MWU_PREGION_SUBS_SR16_Include   (1UL)
 
#define MWU_PREGION_SUBS_SR15_Pos   (15UL)
 
#define MWU_PREGION_SUBS_SR15_Msk   (0x1UL << MWU_PREGION_SUBS_SR15_Pos)
 
#define MWU_PREGION_SUBS_SR15_Exclude   (0UL)
 
#define MWU_PREGION_SUBS_SR15_Include   (1UL)
 
#define MWU_PREGION_SUBS_SR14_Pos   (14UL)
 
#define MWU_PREGION_SUBS_SR14_Msk   (0x1UL << MWU_PREGION_SUBS_SR14_Pos)
 
#define MWU_PREGION_SUBS_SR14_Exclude   (0UL)
 
#define MWU_PREGION_SUBS_SR14_Include   (1UL)
 
#define MWU_PREGION_SUBS_SR13_Pos   (13UL)
 
#define MWU_PREGION_SUBS_SR13_Msk   (0x1UL << MWU_PREGION_SUBS_SR13_Pos)
 
#define MWU_PREGION_SUBS_SR13_Exclude   (0UL)
 
#define MWU_PREGION_SUBS_SR13_Include   (1UL)
 
#define MWU_PREGION_SUBS_SR12_Pos   (12UL)
 
#define MWU_PREGION_SUBS_SR12_Msk   (0x1UL << MWU_PREGION_SUBS_SR12_Pos)
 
#define MWU_PREGION_SUBS_SR12_Exclude   (0UL)
 
#define MWU_PREGION_SUBS_SR12_Include   (1UL)
 
#define MWU_PREGION_SUBS_SR11_Pos   (11UL)
 
#define MWU_PREGION_SUBS_SR11_Msk   (0x1UL << MWU_PREGION_SUBS_SR11_Pos)
 
#define MWU_PREGION_SUBS_SR11_Exclude   (0UL)
 
#define MWU_PREGION_SUBS_SR11_Include   (1UL)
 
#define MWU_PREGION_SUBS_SR10_Pos   (10UL)
 
#define MWU_PREGION_SUBS_SR10_Msk   (0x1UL << MWU_PREGION_SUBS_SR10_Pos)
 
#define MWU_PREGION_SUBS_SR10_Exclude   (0UL)
 
#define MWU_PREGION_SUBS_SR10_Include   (1UL)
 
#define MWU_PREGION_SUBS_SR9_Pos   (9UL)
 
#define MWU_PREGION_SUBS_SR9_Msk   (0x1UL << MWU_PREGION_SUBS_SR9_Pos)
 
#define MWU_PREGION_SUBS_SR9_Exclude   (0UL)
 
#define MWU_PREGION_SUBS_SR9_Include   (1UL)
 
#define MWU_PREGION_SUBS_SR8_Pos   (8UL)
 
#define MWU_PREGION_SUBS_SR8_Msk   (0x1UL << MWU_PREGION_SUBS_SR8_Pos)
 
#define MWU_PREGION_SUBS_SR8_Exclude   (0UL)
 
#define MWU_PREGION_SUBS_SR8_Include   (1UL)
 
#define MWU_PREGION_SUBS_SR7_Pos   (7UL)
 
#define MWU_PREGION_SUBS_SR7_Msk   (0x1UL << MWU_PREGION_SUBS_SR7_Pos)
 
#define MWU_PREGION_SUBS_SR7_Exclude   (0UL)
 
#define MWU_PREGION_SUBS_SR7_Include   (1UL)
 
#define MWU_PREGION_SUBS_SR6_Pos   (6UL)
 
#define MWU_PREGION_SUBS_SR6_Msk   (0x1UL << MWU_PREGION_SUBS_SR6_Pos)
 
#define MWU_PREGION_SUBS_SR6_Exclude   (0UL)
 
#define MWU_PREGION_SUBS_SR6_Include   (1UL)
 
#define MWU_PREGION_SUBS_SR5_Pos   (5UL)
 
#define MWU_PREGION_SUBS_SR5_Msk   (0x1UL << MWU_PREGION_SUBS_SR5_Pos)
 
#define MWU_PREGION_SUBS_SR5_Exclude   (0UL)
 
#define MWU_PREGION_SUBS_SR5_Include   (1UL)
 
#define MWU_PREGION_SUBS_SR4_Pos   (4UL)
 
#define MWU_PREGION_SUBS_SR4_Msk   (0x1UL << MWU_PREGION_SUBS_SR4_Pos)
 
#define MWU_PREGION_SUBS_SR4_Exclude   (0UL)
 
#define MWU_PREGION_SUBS_SR4_Include   (1UL)
 
#define MWU_PREGION_SUBS_SR3_Pos   (3UL)
 
#define MWU_PREGION_SUBS_SR3_Msk   (0x1UL << MWU_PREGION_SUBS_SR3_Pos)
 
#define MWU_PREGION_SUBS_SR3_Exclude   (0UL)
 
#define MWU_PREGION_SUBS_SR3_Include   (1UL)
 
#define MWU_PREGION_SUBS_SR2_Pos   (2UL)
 
#define MWU_PREGION_SUBS_SR2_Msk   (0x1UL << MWU_PREGION_SUBS_SR2_Pos)
 
#define MWU_PREGION_SUBS_SR2_Exclude   (0UL)
 
#define MWU_PREGION_SUBS_SR2_Include   (1UL)
 
#define MWU_PREGION_SUBS_SR1_Pos   (1UL)
 
#define MWU_PREGION_SUBS_SR1_Msk   (0x1UL << MWU_PREGION_SUBS_SR1_Pos)
 
#define MWU_PREGION_SUBS_SR1_Exclude   (0UL)
 
#define MWU_PREGION_SUBS_SR1_Include   (1UL)
 
#define MWU_PREGION_SUBS_SR0_Pos   (0UL)
 
#define MWU_PREGION_SUBS_SR0_Msk   (0x1UL << MWU_PREGION_SUBS_SR0_Pos)
 
#define MWU_PREGION_SUBS_SR0_Exclude   (0UL)
 
#define MWU_PREGION_SUBS_SR0_Include   (1UL)
 
#define NFCT_SHORTS_FIELDLOST_SENSE_Pos   (1UL)
 
#define NFCT_SHORTS_FIELDLOST_SENSE_Msk   (0x1UL << NFCT_SHORTS_FIELDLOST_SENSE_Pos)
 
#define NFCT_SHORTS_FIELDLOST_SENSE_Disabled   (0UL)
 
#define NFCT_SHORTS_FIELDLOST_SENSE_Enabled   (1UL)
 
#define NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Pos   (0UL)
 
#define NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Msk   (0x1UL << NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Pos)
 
#define NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Disabled   (0UL)
 
#define NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Enabled   (1UL)
 
#define NFCT_INTEN_STARTED_Pos   (20UL)
 
#define NFCT_INTEN_STARTED_Msk   (0x1UL << NFCT_INTEN_STARTED_Pos)
 
#define NFCT_INTEN_STARTED_Disabled   (0UL)
 
#define NFCT_INTEN_STARTED_Enabled   (1UL)
 
#define NFCT_INTEN_SELECTED_Pos   (19UL)
 
#define NFCT_INTEN_SELECTED_Msk   (0x1UL << NFCT_INTEN_SELECTED_Pos)
 
#define NFCT_INTEN_SELECTED_Disabled   (0UL)
 
#define NFCT_INTEN_SELECTED_Enabled   (1UL)
 
#define NFCT_INTEN_COLLISION_Pos   (18UL)
 
#define NFCT_INTEN_COLLISION_Msk   (0x1UL << NFCT_INTEN_COLLISION_Pos)
 
#define NFCT_INTEN_COLLISION_Disabled   (0UL)
 
#define NFCT_INTEN_COLLISION_Enabled   (1UL)
 
#define NFCT_INTEN_AUTOCOLRESSTARTED_Pos   (14UL)
 
#define NFCT_INTEN_AUTOCOLRESSTARTED_Msk   (0x1UL << NFCT_INTEN_AUTOCOLRESSTARTED_Pos)
 
#define NFCT_INTEN_AUTOCOLRESSTARTED_Disabled   (0UL)
 
#define NFCT_INTEN_AUTOCOLRESSTARTED_Enabled   (1UL)
 
#define NFCT_INTEN_ENDTX_Pos   (12UL)
 
#define NFCT_INTEN_ENDTX_Msk   (0x1UL << NFCT_INTEN_ENDTX_Pos)
 
#define NFCT_INTEN_ENDTX_Disabled   (0UL)
 
#define NFCT_INTEN_ENDTX_Enabled   (1UL)
 
#define NFCT_INTEN_ENDRX_Pos   (11UL)
 
#define NFCT_INTEN_ENDRX_Msk   (0x1UL << NFCT_INTEN_ENDRX_Pos)
 
#define NFCT_INTEN_ENDRX_Disabled   (0UL)
 
#define NFCT_INTEN_ENDRX_Enabled   (1UL)
 
#define NFCT_INTEN_RXERROR_Pos   (10UL)
 
#define NFCT_INTEN_RXERROR_Msk   (0x1UL << NFCT_INTEN_RXERROR_Pos)
 
#define NFCT_INTEN_RXERROR_Disabled   (0UL)
 
#define NFCT_INTEN_RXERROR_Enabled   (1UL)
 
#define NFCT_INTEN_ERROR_Pos   (7UL)
 
#define NFCT_INTEN_ERROR_Msk   (0x1UL << NFCT_INTEN_ERROR_Pos)
 
#define NFCT_INTEN_ERROR_Disabled   (0UL)
 
#define NFCT_INTEN_ERROR_Enabled   (1UL)
 
#define NFCT_INTEN_RXFRAMEEND_Pos   (6UL)
 
#define NFCT_INTEN_RXFRAMEEND_Msk   (0x1UL << NFCT_INTEN_RXFRAMEEND_Pos)
 
#define NFCT_INTEN_RXFRAMEEND_Disabled   (0UL)
 
#define NFCT_INTEN_RXFRAMEEND_Enabled   (1UL)
 
#define NFCT_INTEN_RXFRAMESTART_Pos   (5UL)
 
#define NFCT_INTEN_RXFRAMESTART_Msk   (0x1UL << NFCT_INTEN_RXFRAMESTART_Pos)
 
#define NFCT_INTEN_RXFRAMESTART_Disabled   (0UL)
 
#define NFCT_INTEN_RXFRAMESTART_Enabled   (1UL)
 
#define NFCT_INTEN_TXFRAMEEND_Pos   (4UL)
 
#define NFCT_INTEN_TXFRAMEEND_Msk   (0x1UL << NFCT_INTEN_TXFRAMEEND_Pos)
 
#define NFCT_INTEN_TXFRAMEEND_Disabled   (0UL)
 
#define NFCT_INTEN_TXFRAMEEND_Enabled   (1UL)
 
#define NFCT_INTEN_TXFRAMESTART_Pos   (3UL)
 
#define NFCT_INTEN_TXFRAMESTART_Msk   (0x1UL << NFCT_INTEN_TXFRAMESTART_Pos)
 
#define NFCT_INTEN_TXFRAMESTART_Disabled   (0UL)
 
#define NFCT_INTEN_TXFRAMESTART_Enabled   (1UL)
 
#define NFCT_INTEN_FIELDLOST_Pos   (2UL)
 
#define NFCT_INTEN_FIELDLOST_Msk   (0x1UL << NFCT_INTEN_FIELDLOST_Pos)
 
#define NFCT_INTEN_FIELDLOST_Disabled   (0UL)
 
#define NFCT_INTEN_FIELDLOST_Enabled   (1UL)
 
#define NFCT_INTEN_FIELDDETECTED_Pos   (1UL)
 
#define NFCT_INTEN_FIELDDETECTED_Msk   (0x1UL << NFCT_INTEN_FIELDDETECTED_Pos)
 
#define NFCT_INTEN_FIELDDETECTED_Disabled   (0UL)
 
#define NFCT_INTEN_FIELDDETECTED_Enabled   (1UL)
 
#define NFCT_INTEN_READY_Pos   (0UL)
 
#define NFCT_INTEN_READY_Msk   (0x1UL << NFCT_INTEN_READY_Pos)
 
#define NFCT_INTEN_READY_Disabled   (0UL)
 
#define NFCT_INTEN_READY_Enabled   (1UL)
 
#define NFCT_INTENSET_STARTED_Pos   (20UL)
 
#define NFCT_INTENSET_STARTED_Msk   (0x1UL << NFCT_INTENSET_STARTED_Pos)
 
#define NFCT_INTENSET_STARTED_Disabled   (0UL)
 
#define NFCT_INTENSET_STARTED_Enabled   (1UL)
 
#define NFCT_INTENSET_STARTED_Set   (1UL)
 
#define NFCT_INTENSET_SELECTED_Pos   (19UL)
 
#define NFCT_INTENSET_SELECTED_Msk   (0x1UL << NFCT_INTENSET_SELECTED_Pos)
 
#define NFCT_INTENSET_SELECTED_Disabled   (0UL)
 
#define NFCT_INTENSET_SELECTED_Enabled   (1UL)
 
#define NFCT_INTENSET_SELECTED_Set   (1UL)
 
#define NFCT_INTENSET_COLLISION_Pos   (18UL)
 
#define NFCT_INTENSET_COLLISION_Msk   (0x1UL << NFCT_INTENSET_COLLISION_Pos)
 
#define NFCT_INTENSET_COLLISION_Disabled   (0UL)
 
#define NFCT_INTENSET_COLLISION_Enabled   (1UL)
 
#define NFCT_INTENSET_COLLISION_Set   (1UL)
 
#define NFCT_INTENSET_AUTOCOLRESSTARTED_Pos   (14UL)
 
#define NFCT_INTENSET_AUTOCOLRESSTARTED_Msk   (0x1UL << NFCT_INTENSET_AUTOCOLRESSTARTED_Pos)
 
#define NFCT_INTENSET_AUTOCOLRESSTARTED_Disabled   (0UL)
 
#define NFCT_INTENSET_AUTOCOLRESSTARTED_Enabled   (1UL)
 
#define NFCT_INTENSET_AUTOCOLRESSTARTED_Set   (1UL)
 
#define NFCT_INTENSET_ENDTX_Pos   (12UL)
 
#define NFCT_INTENSET_ENDTX_Msk   (0x1UL << NFCT_INTENSET_ENDTX_Pos)
 
#define NFCT_INTENSET_ENDTX_Disabled   (0UL)
 
#define NFCT_INTENSET_ENDTX_Enabled   (1UL)
 
#define NFCT_INTENSET_ENDTX_Set   (1UL)
 
#define NFCT_INTENSET_ENDRX_Pos   (11UL)
 
#define NFCT_INTENSET_ENDRX_Msk   (0x1UL << NFCT_INTENSET_ENDRX_Pos)
 
#define NFCT_INTENSET_ENDRX_Disabled   (0UL)
 
#define NFCT_INTENSET_ENDRX_Enabled   (1UL)
 
#define NFCT_INTENSET_ENDRX_Set   (1UL)
 
#define NFCT_INTENSET_RXERROR_Pos   (10UL)
 
#define NFCT_INTENSET_RXERROR_Msk   (0x1UL << NFCT_INTENSET_RXERROR_Pos)
 
#define NFCT_INTENSET_RXERROR_Disabled   (0UL)
 
#define NFCT_INTENSET_RXERROR_Enabled   (1UL)
 
#define NFCT_INTENSET_RXERROR_Set   (1UL)
 
#define NFCT_INTENSET_ERROR_Pos   (7UL)
 
#define NFCT_INTENSET_ERROR_Msk   (0x1UL << NFCT_INTENSET_ERROR_Pos)
 
#define NFCT_INTENSET_ERROR_Disabled   (0UL)
 
#define NFCT_INTENSET_ERROR_Enabled   (1UL)
 
#define NFCT_INTENSET_ERROR_Set   (1UL)
 
#define NFCT_INTENSET_RXFRAMEEND_Pos   (6UL)
 
#define NFCT_INTENSET_RXFRAMEEND_Msk   (0x1UL << NFCT_INTENSET_RXFRAMEEND_Pos)
 
#define NFCT_INTENSET_RXFRAMEEND_Disabled   (0UL)
 
#define NFCT_INTENSET_RXFRAMEEND_Enabled   (1UL)
 
#define NFCT_INTENSET_RXFRAMEEND_Set   (1UL)
 
#define NFCT_INTENSET_RXFRAMESTART_Pos   (5UL)
 
#define NFCT_INTENSET_RXFRAMESTART_Msk   (0x1UL << NFCT_INTENSET_RXFRAMESTART_Pos)
 
#define NFCT_INTENSET_RXFRAMESTART_Disabled   (0UL)
 
#define NFCT_INTENSET_RXFRAMESTART_Enabled   (1UL)
 
#define NFCT_INTENSET_RXFRAMESTART_Set   (1UL)
 
#define NFCT_INTENSET_TXFRAMEEND_Pos   (4UL)
 
#define NFCT_INTENSET_TXFRAMEEND_Msk   (0x1UL << NFCT_INTENSET_TXFRAMEEND_Pos)
 
#define NFCT_INTENSET_TXFRAMEEND_Disabled   (0UL)
 
#define NFCT_INTENSET_TXFRAMEEND_Enabled   (1UL)
 
#define NFCT_INTENSET_TXFRAMEEND_Set   (1UL)
 
#define NFCT_INTENSET_TXFRAMESTART_Pos   (3UL)
 
#define NFCT_INTENSET_TXFRAMESTART_Msk   (0x1UL << NFCT_INTENSET_TXFRAMESTART_Pos)
 
#define NFCT_INTENSET_TXFRAMESTART_Disabled   (0UL)
 
#define NFCT_INTENSET_TXFRAMESTART_Enabled   (1UL)
 
#define NFCT_INTENSET_TXFRAMESTART_Set   (1UL)
 
#define NFCT_INTENSET_FIELDLOST_Pos   (2UL)
 
#define NFCT_INTENSET_FIELDLOST_Msk   (0x1UL << NFCT_INTENSET_FIELDLOST_Pos)
 
#define NFCT_INTENSET_FIELDLOST_Disabled   (0UL)
 
#define NFCT_INTENSET_FIELDLOST_Enabled   (1UL)
 
#define NFCT_INTENSET_FIELDLOST_Set   (1UL)
 
#define NFCT_INTENSET_FIELDDETECTED_Pos   (1UL)
 
#define NFCT_INTENSET_FIELDDETECTED_Msk   (0x1UL << NFCT_INTENSET_FIELDDETECTED_Pos)
 
#define NFCT_INTENSET_FIELDDETECTED_Disabled   (0UL)
 
#define NFCT_INTENSET_FIELDDETECTED_Enabled   (1UL)
 
#define NFCT_INTENSET_FIELDDETECTED_Set   (1UL)
 
#define NFCT_INTENSET_READY_Pos   (0UL)
 
#define NFCT_INTENSET_READY_Msk   (0x1UL << NFCT_INTENSET_READY_Pos)
 
#define NFCT_INTENSET_READY_Disabled   (0UL)
 
#define NFCT_INTENSET_READY_Enabled   (1UL)
 
#define NFCT_INTENSET_READY_Set   (1UL)
 
#define NFCT_INTENCLR_STARTED_Pos   (20UL)
 
#define NFCT_INTENCLR_STARTED_Msk   (0x1UL << NFCT_INTENCLR_STARTED_Pos)
 
#define NFCT_INTENCLR_STARTED_Disabled   (0UL)
 
#define NFCT_INTENCLR_STARTED_Enabled   (1UL)
 
#define NFCT_INTENCLR_STARTED_Clear   (1UL)
 
#define NFCT_INTENCLR_SELECTED_Pos   (19UL)
 
#define NFCT_INTENCLR_SELECTED_Msk   (0x1UL << NFCT_INTENCLR_SELECTED_Pos)
 
#define NFCT_INTENCLR_SELECTED_Disabled   (0UL)
 
#define NFCT_INTENCLR_SELECTED_Enabled   (1UL)
 
#define NFCT_INTENCLR_SELECTED_Clear   (1UL)
 
#define NFCT_INTENCLR_COLLISION_Pos   (18UL)
 
#define NFCT_INTENCLR_COLLISION_Msk   (0x1UL << NFCT_INTENCLR_COLLISION_Pos)
 
#define NFCT_INTENCLR_COLLISION_Disabled   (0UL)
 
#define NFCT_INTENCLR_COLLISION_Enabled   (1UL)
 
#define NFCT_INTENCLR_COLLISION_Clear   (1UL)
 
#define NFCT_INTENCLR_AUTOCOLRESSTARTED_Pos   (14UL)
 
#define NFCT_INTENCLR_AUTOCOLRESSTARTED_Msk   (0x1UL << NFCT_INTENCLR_AUTOCOLRESSTARTED_Pos)
 
#define NFCT_INTENCLR_AUTOCOLRESSTARTED_Disabled   (0UL)
 
#define NFCT_INTENCLR_AUTOCOLRESSTARTED_Enabled   (1UL)
 
#define NFCT_INTENCLR_AUTOCOLRESSTARTED_Clear   (1UL)
 
#define NFCT_INTENCLR_ENDTX_Pos   (12UL)
 
#define NFCT_INTENCLR_ENDTX_Msk   (0x1UL << NFCT_INTENCLR_ENDTX_Pos)
 
#define NFCT_INTENCLR_ENDTX_Disabled   (0UL)
 
#define NFCT_INTENCLR_ENDTX_Enabled   (1UL)
 
#define NFCT_INTENCLR_ENDTX_Clear   (1UL)
 
#define NFCT_INTENCLR_ENDRX_Pos   (11UL)
 
#define NFCT_INTENCLR_ENDRX_Msk   (0x1UL << NFCT_INTENCLR_ENDRX_Pos)
 
#define NFCT_INTENCLR_ENDRX_Disabled   (0UL)
 
#define NFCT_INTENCLR_ENDRX_Enabled   (1UL)
 
#define NFCT_INTENCLR_ENDRX_Clear   (1UL)
 
#define NFCT_INTENCLR_RXERROR_Pos   (10UL)
 
#define NFCT_INTENCLR_RXERROR_Msk   (0x1UL << NFCT_INTENCLR_RXERROR_Pos)
 
#define NFCT_INTENCLR_RXERROR_Disabled   (0UL)
 
#define NFCT_INTENCLR_RXERROR_Enabled   (1UL)
 
#define NFCT_INTENCLR_RXERROR_Clear   (1UL)
 
#define NFCT_INTENCLR_ERROR_Pos   (7UL)
 
#define NFCT_INTENCLR_ERROR_Msk   (0x1UL << NFCT_INTENCLR_ERROR_Pos)
 
#define NFCT_INTENCLR_ERROR_Disabled   (0UL)
 
#define NFCT_INTENCLR_ERROR_Enabled   (1UL)
 
#define NFCT_INTENCLR_ERROR_Clear   (1UL)
 
#define NFCT_INTENCLR_RXFRAMEEND_Pos   (6UL)
 
#define NFCT_INTENCLR_RXFRAMEEND_Msk   (0x1UL << NFCT_INTENCLR_RXFRAMEEND_Pos)
 
#define NFCT_INTENCLR_RXFRAMEEND_Disabled   (0UL)
 
#define NFCT_INTENCLR_RXFRAMEEND_Enabled   (1UL)
 
#define NFCT_INTENCLR_RXFRAMEEND_Clear   (1UL)
 
#define NFCT_INTENCLR_RXFRAMESTART_Pos   (5UL)
 
#define NFCT_INTENCLR_RXFRAMESTART_Msk   (0x1UL << NFCT_INTENCLR_RXFRAMESTART_Pos)
 
#define NFCT_INTENCLR_RXFRAMESTART_Disabled   (0UL)
 
#define NFCT_INTENCLR_RXFRAMESTART_Enabled   (1UL)
 
#define NFCT_INTENCLR_RXFRAMESTART_Clear   (1UL)
 
#define NFCT_INTENCLR_TXFRAMEEND_Pos   (4UL)
 
#define NFCT_INTENCLR_TXFRAMEEND_Msk   (0x1UL << NFCT_INTENCLR_TXFRAMEEND_Pos)
 
#define NFCT_INTENCLR_TXFRAMEEND_Disabled   (0UL)
 
#define NFCT_INTENCLR_TXFRAMEEND_Enabled   (1UL)
 
#define NFCT_INTENCLR_TXFRAMEEND_Clear   (1UL)
 
#define NFCT_INTENCLR_TXFRAMESTART_Pos   (3UL)
 
#define NFCT_INTENCLR_TXFRAMESTART_Msk   (0x1UL << NFCT_INTENCLR_TXFRAMESTART_Pos)
 
#define NFCT_INTENCLR_TXFRAMESTART_Disabled   (0UL)
 
#define NFCT_INTENCLR_TXFRAMESTART_Enabled   (1UL)
 
#define NFCT_INTENCLR_TXFRAMESTART_Clear   (1UL)
 
#define NFCT_INTENCLR_FIELDLOST_Pos   (2UL)
 
#define NFCT_INTENCLR_FIELDLOST_Msk   (0x1UL << NFCT_INTENCLR_FIELDLOST_Pos)
 
#define NFCT_INTENCLR_FIELDLOST_Disabled   (0UL)
 
#define NFCT_INTENCLR_FIELDLOST_Enabled   (1UL)
 
#define NFCT_INTENCLR_FIELDLOST_Clear   (1UL)
 
#define NFCT_INTENCLR_FIELDDETECTED_Pos   (1UL)
 
#define NFCT_INTENCLR_FIELDDETECTED_Msk   (0x1UL << NFCT_INTENCLR_FIELDDETECTED_Pos)
 
#define NFCT_INTENCLR_FIELDDETECTED_Disabled   (0UL)
 
#define NFCT_INTENCLR_FIELDDETECTED_Enabled   (1UL)
 
#define NFCT_INTENCLR_FIELDDETECTED_Clear   (1UL)
 
#define NFCT_INTENCLR_READY_Pos   (0UL)
 
#define NFCT_INTENCLR_READY_Msk   (0x1UL << NFCT_INTENCLR_READY_Pos)
 
#define NFCT_INTENCLR_READY_Disabled   (0UL)
 
#define NFCT_INTENCLR_READY_Enabled   (1UL)
 
#define NFCT_INTENCLR_READY_Clear   (1UL)
 
#define NFCT_ERRORSTATUS_EOFERROR_Pos   (6UL)
 
#define NFCT_ERRORSTATUS_EOFERROR_Msk   (0x1UL << NFCT_ERRORSTATUS_EOFERROR_Pos)
 
#define NFCT_ERRORSTATUS_NFCFIELDTOOWEAK_Pos   (3UL)
 
#define NFCT_ERRORSTATUS_NFCFIELDTOOWEAK_Msk   (0x1UL << NFCT_ERRORSTATUS_NFCFIELDTOOWEAK_Pos)
 
#define NFCT_ERRORSTATUS_NFCFIELDTOOSTRONG_Pos   (2UL)
 
#define NFCT_ERRORSTATUS_NFCFIELDTOOSTRONG_Msk   (0x1UL << NFCT_ERRORSTATUS_NFCFIELDTOOSTRONG_Pos)
 
#define NFCT_ERRORSTATUS_INVALIDNFCSYMBOL_Pos   (1UL)
 
#define NFCT_ERRORSTATUS_INVALIDNFCSYMBOL_Msk   (0x1UL << NFCT_ERRORSTATUS_INVALIDNFCSYMBOL_Pos)
 
#define NFCT_ERRORSTATUS_FRAMEDELAYTIMEOUT_Pos   (0UL)
 
#define NFCT_ERRORSTATUS_FRAMEDELAYTIMEOUT_Msk   (0x1UL << NFCT_ERRORSTATUS_FRAMEDELAYTIMEOUT_Pos)
 
#define NFCT_FRAMESTATUS_RX_OVERRUN_Pos   (3UL)
 
#define NFCT_FRAMESTATUS_RX_OVERRUN_Msk   (0x1UL << NFCT_FRAMESTATUS_RX_OVERRUN_Pos)
 
#define NFCT_FRAMESTATUS_RX_OVERRUN_NoOverrun   (0UL)
 
#define NFCT_FRAMESTATUS_RX_OVERRUN_Overrun   (1UL)
 
#define NFCT_FRAMESTATUS_RX_PARITYSTATUS_Pos   (2UL)
 
#define NFCT_FRAMESTATUS_RX_PARITYSTATUS_Msk   (0x1UL << NFCT_FRAMESTATUS_RX_PARITYSTATUS_Pos)
 
#define NFCT_FRAMESTATUS_RX_PARITYSTATUS_ParityOK   (0UL)
 
#define NFCT_FRAMESTATUS_RX_PARITYSTATUS_ParityError   (1UL)
 
#define NFCT_FRAMESTATUS_RX_CRCERROR_Pos   (0UL)
 
#define NFCT_FRAMESTATUS_RX_CRCERROR_Msk   (0x1UL << NFCT_FRAMESTATUS_RX_CRCERROR_Pos)
 
#define NFCT_FRAMESTATUS_RX_CRCERROR_CRCCorrect   (0UL)
 
#define NFCT_FRAMESTATUS_RX_CRCERROR_CRCError   (1UL)
 
#define NFCT_CURRENTLOADCTRL_CURRENTLOADCTRL_Pos   (0UL)
 
#define NFCT_CURRENTLOADCTRL_CURRENTLOADCTRL_Msk   (0x3FUL << NFCT_CURRENTLOADCTRL_CURRENTLOADCTRL_Pos)
 
#define NFCT_FIELDPRESENT_LOCKDETECT_Pos   (1UL)
 
#define NFCT_FIELDPRESENT_LOCKDETECT_Msk   (0x1UL << NFCT_FIELDPRESENT_LOCKDETECT_Pos)
 
#define NFCT_FIELDPRESENT_LOCKDETECT_NotLocked   (0UL)
 
#define NFCT_FIELDPRESENT_LOCKDETECT_Locked   (1UL)
 
#define NFCT_FIELDPRESENT_FIELDPRESENT_Pos   (0UL)
 
#define NFCT_FIELDPRESENT_FIELDPRESENT_Msk   (0x1UL << NFCT_FIELDPRESENT_FIELDPRESENT_Pos)
 
#define NFCT_FIELDPRESENT_FIELDPRESENT_NoField   (0UL)
 
#define NFCT_FIELDPRESENT_FIELDPRESENT_FieldPresent   (1UL)
 
#define NFCT_FRAMEDELAYMIN_FRAMEDELAYMIN_Pos   (0UL)
 
#define NFCT_FRAMEDELAYMIN_FRAMEDELAYMIN_Msk   (0xFFFFUL << NFCT_FRAMEDELAYMIN_FRAMEDELAYMIN_Pos)
 
#define NFCT_FRAMEDELAYMAX_FRAMEDELAYMAX_Pos   (0UL)
 
#define NFCT_FRAMEDELAYMAX_FRAMEDELAYMAX_Msk   (0xFFFFUL << NFCT_FRAMEDELAYMAX_FRAMEDELAYMAX_Pos)
 
#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_Pos   (0UL)
 
#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_Msk   (0x3UL << NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_Pos)
 
#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_FreeRun   (0UL)
 
#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_Window   (1UL)
 
#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_ExactVal   (2UL)
 
#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_WindowGrid   (3UL)
 
#define NFCT_PACKETPTR_PTR_Pos   (0UL)
 
#define NFCT_PACKETPTR_PTR_Msk   (0xFFFFFFFFUL << NFCT_PACKETPTR_PTR_Pos)
 
#define NFCT_MAXLEN_MAXLEN_Pos   (0UL)
 
#define NFCT_MAXLEN_MAXLEN_Msk   (0x1FFUL << NFCT_MAXLEN_MAXLEN_Pos)
 
#define NFCT_TXD_FRAMECONFIG_CRCMODETX_Pos   (4UL)
 
#define NFCT_TXD_FRAMECONFIG_CRCMODETX_Msk   (0x1UL << NFCT_TXD_FRAMECONFIG_CRCMODETX_Pos)
 
#define NFCT_TXD_FRAMECONFIG_CRCMODETX_NoCRCTX   (0UL)
 
#define NFCT_TXD_FRAMECONFIG_CRCMODETX_CRC16TX   (1UL)
 
#define NFCT_TXD_FRAMECONFIG_SOF_Pos   (2UL)
 
#define NFCT_TXD_FRAMECONFIG_SOF_Msk   (0x1UL << NFCT_TXD_FRAMECONFIG_SOF_Pos)
 
#define NFCT_TXD_FRAMECONFIG_SOF_NoSoF   (0UL)
 
#define NFCT_TXD_FRAMECONFIG_SOF_SoF   (1UL)
 
#define NFCT_TXD_FRAMECONFIG_DISCARDMODE_Pos   (1UL)
 
#define NFCT_TXD_FRAMECONFIG_DISCARDMODE_Msk   (0x1UL << NFCT_TXD_FRAMECONFIG_DISCARDMODE_Pos)
 
#define NFCT_TXD_FRAMECONFIG_DISCARDMODE_DiscardEnd   (0UL)
 
#define NFCT_TXD_FRAMECONFIG_DISCARDMODE_DiscardStart   (1UL)
 
#define NFCT_TXD_FRAMECONFIG_PARITY_Pos   (0UL)
 
#define NFCT_TXD_FRAMECONFIG_PARITY_Msk   (0x1UL << NFCT_TXD_FRAMECONFIG_PARITY_Pos)
 
#define NFCT_TXD_FRAMECONFIG_PARITY_NoParity   (0UL)
 
#define NFCT_TXD_FRAMECONFIG_PARITY_Parity   (1UL)
 
#define NFCT_TXD_AMOUNT_TXDATABYTES_Pos   (3UL)
 
#define NFCT_TXD_AMOUNT_TXDATABYTES_Msk   (0x1FFUL << NFCT_TXD_AMOUNT_TXDATABYTES_Pos)
 
#define NFCT_TXD_AMOUNT_TXDATABITS_Pos   (0UL)
 
#define NFCT_TXD_AMOUNT_TXDATABITS_Msk   (0x7UL << NFCT_TXD_AMOUNT_TXDATABITS_Pos)
 
#define NFCT_RXD_FRAMECONFIG_CRCMODERX_Pos   (4UL)
 
#define NFCT_RXD_FRAMECONFIG_CRCMODERX_Msk   (0x1UL << NFCT_RXD_FRAMECONFIG_CRCMODERX_Pos)
 
#define NFCT_RXD_FRAMECONFIG_CRCMODERX_NoCRCRX   (0UL)
 
#define NFCT_RXD_FRAMECONFIG_CRCMODERX_CRC16RX   (1UL)
 
#define NFCT_RXD_FRAMECONFIG_SOF_Pos   (2UL)
 
#define NFCT_RXD_FRAMECONFIG_SOF_Msk   (0x1UL << NFCT_RXD_FRAMECONFIG_SOF_Pos)
 
#define NFCT_RXD_FRAMECONFIG_SOF_NoSoF   (0UL)
 
#define NFCT_RXD_FRAMECONFIG_SOF_SoF   (1UL)
 
#define NFCT_RXD_FRAMECONFIG_PARITY_Pos   (0UL)
 
#define NFCT_RXD_FRAMECONFIG_PARITY_Msk   (0x1UL << NFCT_RXD_FRAMECONFIG_PARITY_Pos)
 
#define NFCT_RXD_FRAMECONFIG_PARITY_NoParity   (0UL)
 
#define NFCT_RXD_FRAMECONFIG_PARITY_Parity   (1UL)
 
#define NFCT_RXD_AMOUNT_RXDATABYTES_Pos   (3UL)
 
#define NFCT_RXD_AMOUNT_RXDATABYTES_Msk   (0x1FFUL << NFCT_RXD_AMOUNT_RXDATABYTES_Pos)
 
#define NFCT_RXD_AMOUNT_RXDATABITS_Pos   (0UL)
 
#define NFCT_RXD_AMOUNT_RXDATABITS_Msk   (0x7UL << NFCT_RXD_AMOUNT_RXDATABITS_Pos)
 
#define NFCT_NFCID1_LAST_NFCID1_W_Pos   (24UL)
 
#define NFCT_NFCID1_LAST_NFCID1_W_Msk   (0xFFUL << NFCT_NFCID1_LAST_NFCID1_W_Pos)
 
#define NFCT_NFCID1_LAST_NFCID1_X_Pos   (16UL)
 
#define NFCT_NFCID1_LAST_NFCID1_X_Msk   (0xFFUL << NFCT_NFCID1_LAST_NFCID1_X_Pos)
 
#define NFCT_NFCID1_LAST_NFCID1_Y_Pos   (8UL)
 
#define NFCT_NFCID1_LAST_NFCID1_Y_Msk   (0xFFUL << NFCT_NFCID1_LAST_NFCID1_Y_Pos)
 
#define NFCT_NFCID1_LAST_NFCID1_Z_Pos   (0UL)
 
#define NFCT_NFCID1_LAST_NFCID1_Z_Msk   (0xFFUL << NFCT_NFCID1_LAST_NFCID1_Z_Pos)
 
#define NFCT_NFCID1_2ND_LAST_NFCID1_T_Pos   (16UL)
 
#define NFCT_NFCID1_2ND_LAST_NFCID1_T_Msk   (0xFFUL << NFCT_NFCID1_2ND_LAST_NFCID1_T_Pos)
 
#define NFCT_NFCID1_2ND_LAST_NFCID1_U_Pos   (8UL)
 
#define NFCT_NFCID1_2ND_LAST_NFCID1_U_Msk   (0xFFUL << NFCT_NFCID1_2ND_LAST_NFCID1_U_Pos)
 
#define NFCT_NFCID1_2ND_LAST_NFCID1_V_Pos   (0UL)
 
#define NFCT_NFCID1_2ND_LAST_NFCID1_V_Msk   (0xFFUL << NFCT_NFCID1_2ND_LAST_NFCID1_V_Pos)
 
#define NFCT_NFCID1_3RD_LAST_NFCID1_Q_Pos   (16UL)
 
#define NFCT_NFCID1_3RD_LAST_NFCID1_Q_Msk   (0xFFUL << NFCT_NFCID1_3RD_LAST_NFCID1_Q_Pos)
 
#define NFCT_NFCID1_3RD_LAST_NFCID1_R_Pos   (8UL)
 
#define NFCT_NFCID1_3RD_LAST_NFCID1_R_Msk   (0xFFUL << NFCT_NFCID1_3RD_LAST_NFCID1_R_Pos)
 
#define NFCT_NFCID1_3RD_LAST_NFCID1_S_Pos   (0UL)
 
#define NFCT_NFCID1_3RD_LAST_NFCID1_S_Msk   (0xFFUL << NFCT_NFCID1_3RD_LAST_NFCID1_S_Pos)
 
#define NFCT_AUTOCOLRESCONFIG_FILTER_Pos   (1UL)
 
#define NFCT_AUTOCOLRESCONFIG_FILTER_Msk   (0x1UL << NFCT_AUTOCOLRESCONFIG_FILTER_Pos)
 
#define NFCT_AUTOCOLRESCONFIG_FILTER_Off   (0UL)
 
#define NFCT_AUTOCOLRESCONFIG_FILTER_On   (1UL)
 
#define NFCT_AUTOCOLRESCONFIG_MODE_Pos   (0UL)
 
#define NFCT_AUTOCOLRESCONFIG_MODE_Msk   (0x1UL << NFCT_AUTOCOLRESCONFIG_MODE_Pos)
 
#define NFCT_AUTOCOLRESCONFIG_MODE_Enabled   (0UL)
 
#define NFCT_AUTOCOLRESCONFIG_MODE_Disabled   (1UL)
 
#define NFCT_SENSRES_RFU74_Pos   (12UL)
 
#define NFCT_SENSRES_RFU74_Msk   (0xFUL << NFCT_SENSRES_RFU74_Pos)
 
#define NFCT_SENSRES_PLATFCONFIG_Pos   (8UL)
 
#define NFCT_SENSRES_PLATFCONFIG_Msk   (0xFUL << NFCT_SENSRES_PLATFCONFIG_Pos)
 
#define NFCT_SENSRES_NFCIDSIZE_Pos   (6UL)
 
#define NFCT_SENSRES_NFCIDSIZE_Msk   (0x3UL << NFCT_SENSRES_NFCIDSIZE_Pos)
 
#define NFCT_SENSRES_NFCIDSIZE_NFCID1Single   (0UL)
 
#define NFCT_SENSRES_NFCIDSIZE_NFCID1Double   (1UL)
 
#define NFCT_SENSRES_NFCIDSIZE_NFCID1Triple   (2UL)
 
#define NFCT_SENSRES_RFU5_Pos   (5UL)
 
#define NFCT_SENSRES_RFU5_Msk   (0x1UL << NFCT_SENSRES_RFU5_Pos)
 
#define NFCT_SENSRES_BITFRAMESDD_Pos   (0UL)
 
#define NFCT_SENSRES_BITFRAMESDD_Msk   (0x1FUL << NFCT_SENSRES_BITFRAMESDD_Pos)
 
#define NFCT_SENSRES_BITFRAMESDD_SDD00000   (0UL)
 
#define NFCT_SENSRES_BITFRAMESDD_SDD00001   (1UL)
 
#define NFCT_SENSRES_BITFRAMESDD_SDD00010   (2UL)
 
#define NFCT_SENSRES_BITFRAMESDD_SDD00100   (4UL)
 
#define NFCT_SENSRES_BITFRAMESDD_SDD01000   (8UL)
 
#define NFCT_SENSRES_BITFRAMESDD_SDD10000   (16UL)
 
#define NFCT_SELRES_RFU7_Pos   (7UL)
 
#define NFCT_SELRES_RFU7_Msk   (0x1UL << NFCT_SELRES_RFU7_Pos)
 
#define NFCT_SELRES_PROTOCOL_Pos   (5UL)
 
#define NFCT_SELRES_PROTOCOL_Msk   (0x3UL << NFCT_SELRES_PROTOCOL_Pos)
 
#define NFCT_SELRES_RFU43_Pos   (3UL)
 
#define NFCT_SELRES_RFU43_Msk   (0x3UL << NFCT_SELRES_RFU43_Pos)
 
#define NFCT_SELRES_CASCADE_Pos   (2UL)
 
#define NFCT_SELRES_CASCADE_Msk   (0x1UL << NFCT_SELRES_CASCADE_Pos)
 
#define NFCT_SELRES_CASCADE_Complete   (0UL)
 
#define NFCT_SELRES_CASCADE_NotComplete   (1UL)
 
#define NFCT_SELRES_RFU10_Pos   (0UL)
 
#define NFCT_SELRES_RFU10_Msk   (0x3UL << NFCT_SELRES_RFU10_Pos)
 
#define NVMC_READY_READY_Pos   (0UL)
 
#define NVMC_READY_READY_Msk   (0x1UL << NVMC_READY_READY_Pos)
 
#define NVMC_READY_READY_Busy   (0UL)
 
#define NVMC_READY_READY_Ready   (1UL)
 
#define NVMC_CONFIG_WEN_Pos   (0UL)
 
#define NVMC_CONFIG_WEN_Msk   (0x3UL << NVMC_CONFIG_WEN_Pos)
 
#define NVMC_CONFIG_WEN_Ren   (0UL)
 
#define NVMC_CONFIG_WEN_Wen   (1UL)
 
#define NVMC_CONFIG_WEN_Een   (2UL)
 
#define NVMC_ERASEPAGE_ERASEPAGE_Pos   (0UL)
 
#define NVMC_ERASEPAGE_ERASEPAGE_Msk   (0xFFFFFFFFUL << NVMC_ERASEPAGE_ERASEPAGE_Pos)
 
#define NVMC_ERASEPCR1_ERASEPCR1_Pos   (0UL)
 
#define NVMC_ERASEPCR1_ERASEPCR1_Msk   (0xFFFFFFFFUL << NVMC_ERASEPCR1_ERASEPCR1_Pos)
 
#define NVMC_ERASEALL_ERASEALL_Pos   (0UL)
 
#define NVMC_ERASEALL_ERASEALL_Msk   (0x1UL << NVMC_ERASEALL_ERASEALL_Pos)
 
#define NVMC_ERASEALL_ERASEALL_NoOperation   (0UL)
 
#define NVMC_ERASEALL_ERASEALL_Erase   (1UL)
 
#define NVMC_ERASEPCR0_ERASEPCR0_Pos   (0UL)
 
#define NVMC_ERASEPCR0_ERASEPCR0_Msk   (0xFFFFFFFFUL << NVMC_ERASEPCR0_ERASEPCR0_Pos)
 
#define NVMC_ERASEUICR_ERASEUICR_Pos   (0UL)
 
#define NVMC_ERASEUICR_ERASEUICR_Msk   (0x1UL << NVMC_ERASEUICR_ERASEUICR_Pos)
 
#define NVMC_ERASEUICR_ERASEUICR_NoOperation   (0UL)
 
#define NVMC_ERASEUICR_ERASEUICR_Erase   (1UL)
 
#define NVMC_ICACHECNF_CACHEPROFEN_Pos   (8UL)
 
#define NVMC_ICACHECNF_CACHEPROFEN_Msk   (0x1UL << NVMC_ICACHECNF_CACHEPROFEN_Pos)
 
#define NVMC_ICACHECNF_CACHEPROFEN_Disabled   (0UL)
 
#define NVMC_ICACHECNF_CACHEPROFEN_Enabled   (1UL)
 
#define NVMC_ICACHECNF_CACHEEN_Pos   (0UL)
 
#define NVMC_ICACHECNF_CACHEEN_Msk   (0x1UL << NVMC_ICACHECNF_CACHEEN_Pos)
 
#define NVMC_ICACHECNF_CACHEEN_Disabled   (0UL)
 
#define NVMC_ICACHECNF_CACHEEN_Enabled   (1UL)
 
#define NVMC_IHIT_HITS_Pos   (0UL)
 
#define NVMC_IHIT_HITS_Msk   (0xFFFFFFFFUL << NVMC_IHIT_HITS_Pos)
 
#define NVMC_IMISS_MISSES_Pos   (0UL)
 
#define NVMC_IMISS_MISSES_Msk   (0xFFFFFFFFUL << NVMC_IMISS_MISSES_Pos)
 
#define GPIO_OUT_PIN31_Pos   (31UL)
 
#define GPIO_OUT_PIN31_Msk   (0x1UL << GPIO_OUT_PIN31_Pos)
 
#define GPIO_OUT_PIN31_Low   (0UL)
 
#define GPIO_OUT_PIN31_High   (1UL)
 
#define GPIO_OUT_PIN30_Pos   (30UL)
 
#define GPIO_OUT_PIN30_Msk   (0x1UL << GPIO_OUT_PIN30_Pos)
 
#define GPIO_OUT_PIN30_Low   (0UL)
 
#define GPIO_OUT_PIN30_High   (1UL)
 
#define GPIO_OUT_PIN29_Pos   (29UL)
 
#define GPIO_OUT_PIN29_Msk   (0x1UL << GPIO_OUT_PIN29_Pos)
 
#define GPIO_OUT_PIN29_Low   (0UL)
 
#define GPIO_OUT_PIN29_High   (1UL)
 
#define GPIO_OUT_PIN28_Pos   (28UL)
 
#define GPIO_OUT_PIN28_Msk   (0x1UL << GPIO_OUT_PIN28_Pos)
 
#define GPIO_OUT_PIN28_Low   (0UL)
 
#define GPIO_OUT_PIN28_High   (1UL)
 
#define GPIO_OUT_PIN27_Pos   (27UL)
 
#define GPIO_OUT_PIN27_Msk   (0x1UL << GPIO_OUT_PIN27_Pos)
 
#define GPIO_OUT_PIN27_Low   (0UL)
 
#define GPIO_OUT_PIN27_High   (1UL)
 
#define GPIO_OUT_PIN26_Pos   (26UL)
 
#define GPIO_OUT_PIN26_Msk   (0x1UL << GPIO_OUT_PIN26_Pos)
 
#define GPIO_OUT_PIN26_Low   (0UL)
 
#define GPIO_OUT_PIN26_High   (1UL)
 
#define GPIO_OUT_PIN25_Pos   (25UL)
 
#define GPIO_OUT_PIN25_Msk   (0x1UL << GPIO_OUT_PIN25_Pos)
 
#define GPIO_OUT_PIN25_Low   (0UL)
 
#define GPIO_OUT_PIN25_High   (1UL)
 
#define GPIO_OUT_PIN24_Pos   (24UL)
 
#define GPIO_OUT_PIN24_Msk   (0x1UL << GPIO_OUT_PIN24_Pos)
 
#define GPIO_OUT_PIN24_Low   (0UL)
 
#define GPIO_OUT_PIN24_High   (1UL)
 
#define GPIO_OUT_PIN23_Pos   (23UL)
 
#define GPIO_OUT_PIN23_Msk   (0x1UL << GPIO_OUT_PIN23_Pos)
 
#define GPIO_OUT_PIN23_Low   (0UL)
 
#define GPIO_OUT_PIN23_High   (1UL)
 
#define GPIO_OUT_PIN22_Pos   (22UL)
 
#define GPIO_OUT_PIN22_Msk   (0x1UL << GPIO_OUT_PIN22_Pos)
 
#define GPIO_OUT_PIN22_Low   (0UL)
 
#define GPIO_OUT_PIN22_High   (1UL)
 
#define GPIO_OUT_PIN21_Pos   (21UL)
 
#define GPIO_OUT_PIN21_Msk   (0x1UL << GPIO_OUT_PIN21_Pos)
 
#define GPIO_OUT_PIN21_Low   (0UL)
 
#define GPIO_OUT_PIN21_High   (1UL)
 
#define GPIO_OUT_PIN20_Pos   (20UL)
 
#define GPIO_OUT_PIN20_Msk   (0x1UL << GPIO_OUT_PIN20_Pos)
 
#define GPIO_OUT_PIN20_Low   (0UL)
 
#define GPIO_OUT_PIN20_High   (1UL)
 
#define GPIO_OUT_PIN19_Pos   (19UL)
 
#define GPIO_OUT_PIN19_Msk   (0x1UL << GPIO_OUT_PIN19_Pos)
 
#define GPIO_OUT_PIN19_Low   (0UL)
 
#define GPIO_OUT_PIN19_High   (1UL)
 
#define GPIO_OUT_PIN18_Pos   (18UL)
 
#define GPIO_OUT_PIN18_Msk   (0x1UL << GPIO_OUT_PIN18_Pos)
 
#define GPIO_OUT_PIN18_Low   (0UL)
 
#define GPIO_OUT_PIN18_High   (1UL)
 
#define GPIO_OUT_PIN17_Pos   (17UL)
 
#define GPIO_OUT_PIN17_Msk   (0x1UL << GPIO_OUT_PIN17_Pos)
 
#define GPIO_OUT_PIN17_Low   (0UL)
 
#define GPIO_OUT_PIN17_High   (1UL)
 
#define GPIO_OUT_PIN16_Pos   (16UL)
 
#define GPIO_OUT_PIN16_Msk   (0x1UL << GPIO_OUT_PIN16_Pos)
 
#define GPIO_OUT_PIN16_Low   (0UL)
 
#define GPIO_OUT_PIN16_High   (1UL)
 
#define GPIO_OUT_PIN15_Pos   (15UL)
 
#define GPIO_OUT_PIN15_Msk   (0x1UL << GPIO_OUT_PIN15_Pos)
 
#define GPIO_OUT_PIN15_Low   (0UL)
 
#define GPIO_OUT_PIN15_High   (1UL)
 
#define GPIO_OUT_PIN14_Pos   (14UL)
 
#define GPIO_OUT_PIN14_Msk   (0x1UL << GPIO_OUT_PIN14_Pos)
 
#define GPIO_OUT_PIN14_Low   (0UL)
 
#define GPIO_OUT_PIN14_High   (1UL)
 
#define GPIO_OUT_PIN13_Pos   (13UL)
 
#define GPIO_OUT_PIN13_Msk   (0x1UL << GPIO_OUT_PIN13_Pos)
 
#define GPIO_OUT_PIN13_Low   (0UL)
 
#define GPIO_OUT_PIN13_High   (1UL)
 
#define GPIO_OUT_PIN12_Pos   (12UL)
 
#define GPIO_OUT_PIN12_Msk   (0x1UL << GPIO_OUT_PIN12_Pos)
 
#define GPIO_OUT_PIN12_Low   (0UL)
 
#define GPIO_OUT_PIN12_High   (1UL)
 
#define GPIO_OUT_PIN11_Pos   (11UL)
 
#define GPIO_OUT_PIN11_Msk   (0x1UL << GPIO_OUT_PIN11_Pos)
 
#define GPIO_OUT_PIN11_Low   (0UL)
 
#define GPIO_OUT_PIN11_High   (1UL)
 
#define GPIO_OUT_PIN10_Pos   (10UL)
 
#define GPIO_OUT_PIN10_Msk   (0x1UL << GPIO_OUT_PIN10_Pos)
 
#define GPIO_OUT_PIN10_Low   (0UL)
 
#define GPIO_OUT_PIN10_High   (1UL)
 
#define GPIO_OUT_PIN9_Pos   (9UL)
 
#define GPIO_OUT_PIN9_Msk   (0x1UL << GPIO_OUT_PIN9_Pos)
 
#define GPIO_OUT_PIN9_Low   (0UL)
 
#define GPIO_OUT_PIN9_High   (1UL)
 
#define GPIO_OUT_PIN8_Pos   (8UL)
 
#define GPIO_OUT_PIN8_Msk   (0x1UL << GPIO_OUT_PIN8_Pos)
 
#define GPIO_OUT_PIN8_Low   (0UL)
 
#define GPIO_OUT_PIN8_High   (1UL)
 
#define GPIO_OUT_PIN7_Pos   (7UL)
 
#define GPIO_OUT_PIN7_Msk   (0x1UL << GPIO_OUT_PIN7_Pos)
 
#define GPIO_OUT_PIN7_Low   (0UL)
 
#define GPIO_OUT_PIN7_High   (1UL)
 
#define GPIO_OUT_PIN6_Pos   (6UL)
 
#define GPIO_OUT_PIN6_Msk   (0x1UL << GPIO_OUT_PIN6_Pos)
 
#define GPIO_OUT_PIN6_Low   (0UL)
 
#define GPIO_OUT_PIN6_High   (1UL)
 
#define GPIO_OUT_PIN5_Pos   (5UL)
 
#define GPIO_OUT_PIN5_Msk   (0x1UL << GPIO_OUT_PIN5_Pos)
 
#define GPIO_OUT_PIN5_Low   (0UL)
 
#define GPIO_OUT_PIN5_High   (1UL)
 
#define GPIO_OUT_PIN4_Pos   (4UL)
 
#define GPIO_OUT_PIN4_Msk   (0x1UL << GPIO_OUT_PIN4_Pos)
 
#define GPIO_OUT_PIN4_Low   (0UL)
 
#define GPIO_OUT_PIN4_High   (1UL)
 
#define GPIO_OUT_PIN3_Pos   (3UL)
 
#define GPIO_OUT_PIN3_Msk   (0x1UL << GPIO_OUT_PIN3_Pos)
 
#define GPIO_OUT_PIN3_Low   (0UL)
 
#define GPIO_OUT_PIN3_High   (1UL)
 
#define GPIO_OUT_PIN2_Pos   (2UL)
 
#define GPIO_OUT_PIN2_Msk   (0x1UL << GPIO_OUT_PIN2_Pos)
 
#define GPIO_OUT_PIN2_Low   (0UL)
 
#define GPIO_OUT_PIN2_High   (1UL)
 
#define GPIO_OUT_PIN1_Pos   (1UL)
 
#define GPIO_OUT_PIN1_Msk   (0x1UL << GPIO_OUT_PIN1_Pos)
 
#define GPIO_OUT_PIN1_Low   (0UL)
 
#define GPIO_OUT_PIN1_High   (1UL)
 
#define GPIO_OUT_PIN0_Pos   (0UL)
 
#define GPIO_OUT_PIN0_Msk   (0x1UL << GPIO_OUT_PIN0_Pos)
 
#define GPIO_OUT_PIN0_Low   (0UL)
 
#define GPIO_OUT_PIN0_High   (1UL)
 
#define GPIO_OUTSET_PIN31_Pos   (31UL)
 
#define GPIO_OUTSET_PIN31_Msk   (0x1UL << GPIO_OUTSET_PIN31_Pos)
 
#define GPIO_OUTSET_PIN31_Low   (0UL)
 
#define GPIO_OUTSET_PIN31_High   (1UL)
 
#define GPIO_OUTSET_PIN31_Set   (1UL)
 
#define GPIO_OUTSET_PIN30_Pos   (30UL)
 
#define GPIO_OUTSET_PIN30_Msk   (0x1UL << GPIO_OUTSET_PIN30_Pos)
 
#define GPIO_OUTSET_PIN30_Low   (0UL)
 
#define GPIO_OUTSET_PIN30_High   (1UL)
 
#define GPIO_OUTSET_PIN30_Set   (1UL)
 
#define GPIO_OUTSET_PIN29_Pos   (29UL)
 
#define GPIO_OUTSET_PIN29_Msk   (0x1UL << GPIO_OUTSET_PIN29_Pos)
 
#define GPIO_OUTSET_PIN29_Low   (0UL)
 
#define GPIO_OUTSET_PIN29_High   (1UL)
 
#define GPIO_OUTSET_PIN29_Set   (1UL)
 
#define GPIO_OUTSET_PIN28_Pos   (28UL)
 
#define GPIO_OUTSET_PIN28_Msk   (0x1UL << GPIO_OUTSET_PIN28_Pos)
 
#define GPIO_OUTSET_PIN28_Low   (0UL)
 
#define GPIO_OUTSET_PIN28_High   (1UL)
 
#define GPIO_OUTSET_PIN28_Set   (1UL)
 
#define GPIO_OUTSET_PIN27_Pos   (27UL)
 
#define GPIO_OUTSET_PIN27_Msk   (0x1UL << GPIO_OUTSET_PIN27_Pos)
 
#define GPIO_OUTSET_PIN27_Low   (0UL)
 
#define GPIO_OUTSET_PIN27_High   (1UL)
 
#define GPIO_OUTSET_PIN27_Set   (1UL)
 
#define GPIO_OUTSET_PIN26_Pos   (26UL)
 
#define GPIO_OUTSET_PIN26_Msk   (0x1UL << GPIO_OUTSET_PIN26_Pos)
 
#define GPIO_OUTSET_PIN26_Low   (0UL)
 
#define GPIO_OUTSET_PIN26_High   (1UL)
 
#define GPIO_OUTSET_PIN26_Set   (1UL)
 
#define GPIO_OUTSET_PIN25_Pos   (25UL)
 
#define GPIO_OUTSET_PIN25_Msk   (0x1UL << GPIO_OUTSET_PIN25_Pos)
 
#define GPIO_OUTSET_PIN25_Low   (0UL)
 
#define GPIO_OUTSET_PIN25_High   (1UL)
 
#define GPIO_OUTSET_PIN25_Set   (1UL)
 
#define GPIO_OUTSET_PIN24_Pos   (24UL)
 
#define GPIO_OUTSET_PIN24_Msk   (0x1UL << GPIO_OUTSET_PIN24_Pos)
 
#define GPIO_OUTSET_PIN24_Low   (0UL)
 
#define GPIO_OUTSET_PIN24_High   (1UL)
 
#define GPIO_OUTSET_PIN24_Set   (1UL)
 
#define GPIO_OUTSET_PIN23_Pos   (23UL)
 
#define GPIO_OUTSET_PIN23_Msk   (0x1UL << GPIO_OUTSET_PIN23_Pos)
 
#define GPIO_OUTSET_PIN23_Low   (0UL)
 
#define GPIO_OUTSET_PIN23_High   (1UL)
 
#define GPIO_OUTSET_PIN23_Set   (1UL)
 
#define GPIO_OUTSET_PIN22_Pos   (22UL)
 
#define GPIO_OUTSET_PIN22_Msk   (0x1UL << GPIO_OUTSET_PIN22_Pos)
 
#define GPIO_OUTSET_PIN22_Low   (0UL)
 
#define GPIO_OUTSET_PIN22_High   (1UL)
 
#define GPIO_OUTSET_PIN22_Set   (1UL)
 
#define GPIO_OUTSET_PIN21_Pos   (21UL)
 
#define GPIO_OUTSET_PIN21_Msk   (0x1UL << GPIO_OUTSET_PIN21_Pos)
 
#define GPIO_OUTSET_PIN21_Low   (0UL)
 
#define GPIO_OUTSET_PIN21_High   (1UL)
 
#define GPIO_OUTSET_PIN21_Set   (1UL)
 
#define GPIO_OUTSET_PIN20_Pos   (20UL)
 
#define GPIO_OUTSET_PIN20_Msk   (0x1UL << GPIO_OUTSET_PIN20_Pos)
 
#define GPIO_OUTSET_PIN20_Low   (0UL)
 
#define GPIO_OUTSET_PIN20_High   (1UL)
 
#define GPIO_OUTSET_PIN20_Set   (1UL)
 
#define GPIO_OUTSET_PIN19_Pos   (19UL)
 
#define GPIO_OUTSET_PIN19_Msk   (0x1UL << GPIO_OUTSET_PIN19_Pos)
 
#define GPIO_OUTSET_PIN19_Low   (0UL)
 
#define GPIO_OUTSET_PIN19_High   (1UL)
 
#define GPIO_OUTSET_PIN19_Set   (1UL)
 
#define GPIO_OUTSET_PIN18_Pos   (18UL)
 
#define GPIO_OUTSET_PIN18_Msk   (0x1UL << GPIO_OUTSET_PIN18_Pos)
 
#define GPIO_OUTSET_PIN18_Low   (0UL)
 
#define GPIO_OUTSET_PIN18_High   (1UL)
 
#define GPIO_OUTSET_PIN18_Set   (1UL)
 
#define GPIO_OUTSET_PIN17_Pos   (17UL)
 
#define GPIO_OUTSET_PIN17_Msk   (0x1UL << GPIO_OUTSET_PIN17_Pos)
 
#define GPIO_OUTSET_PIN17_Low   (0UL)
 
#define GPIO_OUTSET_PIN17_High   (1UL)
 
#define GPIO_OUTSET_PIN17_Set   (1UL)
 
#define GPIO_OUTSET_PIN16_Pos   (16UL)
 
#define GPIO_OUTSET_PIN16_Msk   (0x1UL << GPIO_OUTSET_PIN16_Pos)
 
#define GPIO_OUTSET_PIN16_Low   (0UL)
 
#define GPIO_OUTSET_PIN16_High   (1UL)
 
#define GPIO_OUTSET_PIN16_Set   (1UL)
 
#define GPIO_OUTSET_PIN15_Pos   (15UL)
 
#define GPIO_OUTSET_PIN15_Msk   (0x1UL << GPIO_OUTSET_PIN15_Pos)
 
#define GPIO_OUTSET_PIN15_Low   (0UL)
 
#define GPIO_OUTSET_PIN15_High   (1UL)
 
#define GPIO_OUTSET_PIN15_Set   (1UL)
 
#define GPIO_OUTSET_PIN14_Pos   (14UL)
 
#define GPIO_OUTSET_PIN14_Msk   (0x1UL << GPIO_OUTSET_PIN14_Pos)
 
#define GPIO_OUTSET_PIN14_Low   (0UL)
 
#define GPIO_OUTSET_PIN14_High   (1UL)
 
#define GPIO_OUTSET_PIN14_Set   (1UL)
 
#define GPIO_OUTSET_PIN13_Pos   (13UL)
 
#define GPIO_OUTSET_PIN13_Msk   (0x1UL << GPIO_OUTSET_PIN13_Pos)
 
#define GPIO_OUTSET_PIN13_Low   (0UL)
 
#define GPIO_OUTSET_PIN13_High   (1UL)
 
#define GPIO_OUTSET_PIN13_Set   (1UL)
 
#define GPIO_OUTSET_PIN12_Pos   (12UL)
 
#define GPIO_OUTSET_PIN12_Msk   (0x1UL << GPIO_OUTSET_PIN12_Pos)
 
#define GPIO_OUTSET_PIN12_Low   (0UL)
 
#define GPIO_OUTSET_PIN12_High   (1UL)
 
#define GPIO_OUTSET_PIN12_Set   (1UL)
 
#define GPIO_OUTSET_PIN11_Pos   (11UL)
 
#define GPIO_OUTSET_PIN11_Msk   (0x1UL << GPIO_OUTSET_PIN11_Pos)
 
#define GPIO_OUTSET_PIN11_Low   (0UL)
 
#define GPIO_OUTSET_PIN11_High   (1UL)
 
#define GPIO_OUTSET_PIN11_Set   (1UL)
 
#define GPIO_OUTSET_PIN10_Pos   (10UL)
 
#define GPIO_OUTSET_PIN10_Msk   (0x1UL << GPIO_OUTSET_PIN10_Pos)
 
#define GPIO_OUTSET_PIN10_Low   (0UL)
 
#define GPIO_OUTSET_PIN10_High   (1UL)
 
#define GPIO_OUTSET_PIN10_Set   (1UL)
 
#define GPIO_OUTSET_PIN9_Pos   (9UL)
 
#define GPIO_OUTSET_PIN9_Msk   (0x1UL << GPIO_OUTSET_PIN9_Pos)
 
#define GPIO_OUTSET_PIN9_Low   (0UL)
 
#define GPIO_OUTSET_PIN9_High   (1UL)
 
#define GPIO_OUTSET_PIN9_Set   (1UL)
 
#define GPIO_OUTSET_PIN8_Pos   (8UL)
 
#define GPIO_OUTSET_PIN8_Msk   (0x1UL << GPIO_OUTSET_PIN8_Pos)
 
#define GPIO_OUTSET_PIN8_Low   (0UL)
 
#define GPIO_OUTSET_PIN8_High   (1UL)
 
#define GPIO_OUTSET_PIN8_Set   (1UL)
 
#define GPIO_OUTSET_PIN7_Pos   (7UL)
 
#define GPIO_OUTSET_PIN7_Msk   (0x1UL << GPIO_OUTSET_PIN7_Pos)
 
#define GPIO_OUTSET_PIN7_Low   (0UL)
 
#define GPIO_OUTSET_PIN7_High   (1UL)
 
#define GPIO_OUTSET_PIN7_Set   (1UL)
 
#define GPIO_OUTSET_PIN6_Pos   (6UL)
 
#define GPIO_OUTSET_PIN6_Msk   (0x1UL << GPIO_OUTSET_PIN6_Pos)
 
#define GPIO_OUTSET_PIN6_Low   (0UL)
 
#define GPIO_OUTSET_PIN6_High   (1UL)
 
#define GPIO_OUTSET_PIN6_Set   (1UL)
 
#define GPIO_OUTSET_PIN5_Pos   (5UL)
 
#define GPIO_OUTSET_PIN5_Msk   (0x1UL << GPIO_OUTSET_PIN5_Pos)
 
#define GPIO_OUTSET_PIN5_Low   (0UL)
 
#define GPIO_OUTSET_PIN5_High   (1UL)
 
#define GPIO_OUTSET_PIN5_Set   (1UL)
 
#define GPIO_OUTSET_PIN4_Pos   (4UL)
 
#define GPIO_OUTSET_PIN4_Msk   (0x1UL << GPIO_OUTSET_PIN4_Pos)
 
#define GPIO_OUTSET_PIN4_Low   (0UL)
 
#define GPIO_OUTSET_PIN4_High   (1UL)
 
#define GPIO_OUTSET_PIN4_Set   (1UL)
 
#define GPIO_OUTSET_PIN3_Pos   (3UL)
 
#define GPIO_OUTSET_PIN3_Msk   (0x1UL << GPIO_OUTSET_PIN3_Pos)
 
#define GPIO_OUTSET_PIN3_Low   (0UL)
 
#define GPIO_OUTSET_PIN3_High   (1UL)
 
#define GPIO_OUTSET_PIN3_Set   (1UL)
 
#define GPIO_OUTSET_PIN2_Pos   (2UL)
 
#define GPIO_OUTSET_PIN2_Msk   (0x1UL << GPIO_OUTSET_PIN2_Pos)
 
#define GPIO_OUTSET_PIN2_Low   (0UL)
 
#define GPIO_OUTSET_PIN2_High   (1UL)
 
#define GPIO_OUTSET_PIN2_Set   (1UL)
 
#define GPIO_OUTSET_PIN1_Pos   (1UL)
 
#define GPIO_OUTSET_PIN1_Msk   (0x1UL << GPIO_OUTSET_PIN1_Pos)
 
#define GPIO_OUTSET_PIN1_Low   (0UL)
 
#define GPIO_OUTSET_PIN1_High   (1UL)
 
#define GPIO_OUTSET_PIN1_Set   (1UL)
 
#define GPIO_OUTSET_PIN0_Pos   (0UL)
 
#define GPIO_OUTSET_PIN0_Msk   (0x1UL << GPIO_OUTSET_PIN0_Pos)
 
#define GPIO_OUTSET_PIN0_Low   (0UL)
 
#define GPIO_OUTSET_PIN0_High   (1UL)
 
#define GPIO_OUTSET_PIN0_Set   (1UL)
 
#define GPIO_OUTCLR_PIN31_Pos   (31UL)
 
#define GPIO_OUTCLR_PIN31_Msk   (0x1UL << GPIO_OUTCLR_PIN31_Pos)
 
#define GPIO_OUTCLR_PIN31_Low   (0UL)
 
#define GPIO_OUTCLR_PIN31_High   (1UL)
 
#define GPIO_OUTCLR_PIN31_Clear   (1UL)
 
#define GPIO_OUTCLR_PIN30_Pos   (30UL)
 
#define GPIO_OUTCLR_PIN30_Msk   (0x1UL << GPIO_OUTCLR_PIN30_Pos)
 
#define GPIO_OUTCLR_PIN30_Low   (0UL)
 
#define GPIO_OUTCLR_PIN30_High   (1UL)
 
#define GPIO_OUTCLR_PIN30_Clear   (1UL)
 
#define GPIO_OUTCLR_PIN29_Pos   (29UL)
 
#define GPIO_OUTCLR_PIN29_Msk   (0x1UL << GPIO_OUTCLR_PIN29_Pos)
 
#define GPIO_OUTCLR_PIN29_Low   (0UL)
 
#define GPIO_OUTCLR_PIN29_High   (1UL)
 
#define GPIO_OUTCLR_PIN29_Clear   (1UL)
 
#define GPIO_OUTCLR_PIN28_Pos   (28UL)
 
#define GPIO_OUTCLR_PIN28_Msk   (0x1UL << GPIO_OUTCLR_PIN28_Pos)
 
#define GPIO_OUTCLR_PIN28_Low   (0UL)
 
#define GPIO_OUTCLR_PIN28_High   (1UL)
 
#define GPIO_OUTCLR_PIN28_Clear   (1UL)
 
#define GPIO_OUTCLR_PIN27_Pos   (27UL)
 
#define GPIO_OUTCLR_PIN27_Msk   (0x1UL << GPIO_OUTCLR_PIN27_Pos)
 
#define GPIO_OUTCLR_PIN27_Low   (0UL)
 
#define GPIO_OUTCLR_PIN27_High   (1UL)
 
#define GPIO_OUTCLR_PIN27_Clear   (1UL)
 
#define GPIO_OUTCLR_PIN26_Pos   (26UL)
 
#define GPIO_OUTCLR_PIN26_Msk   (0x1UL << GPIO_OUTCLR_PIN26_Pos)
 
#define GPIO_OUTCLR_PIN26_Low   (0UL)
 
#define GPIO_OUTCLR_PIN26_High   (1UL)
 
#define GPIO_OUTCLR_PIN26_Clear   (1UL)
 
#define GPIO_OUTCLR_PIN25_Pos   (25UL)
 
#define GPIO_OUTCLR_PIN25_Msk   (0x1UL << GPIO_OUTCLR_PIN25_Pos)
 
#define GPIO_OUTCLR_PIN25_Low   (0UL)
 
#define GPIO_OUTCLR_PIN25_High   (1UL)
 
#define GPIO_OUTCLR_PIN25_Clear   (1UL)
 
#define GPIO_OUTCLR_PIN24_Pos   (24UL)
 
#define GPIO_OUTCLR_PIN24_Msk   (0x1UL << GPIO_OUTCLR_PIN24_Pos)
 
#define GPIO_OUTCLR_PIN24_Low   (0UL)
 
#define GPIO_OUTCLR_PIN24_High   (1UL)
 
#define GPIO_OUTCLR_PIN24_Clear   (1UL)
 
#define GPIO_OUTCLR_PIN23_Pos   (23UL)
 
#define GPIO_OUTCLR_PIN23_Msk   (0x1UL << GPIO_OUTCLR_PIN23_Pos)
 
#define GPIO_OUTCLR_PIN23_Low   (0UL)
 
#define GPIO_OUTCLR_PIN23_High   (1UL)
 
#define GPIO_OUTCLR_PIN23_Clear   (1UL)
 
#define GPIO_OUTCLR_PIN22_Pos   (22UL)
 
#define GPIO_OUTCLR_PIN22_Msk   (0x1UL << GPIO_OUTCLR_PIN22_Pos)
 
#define GPIO_OUTCLR_PIN22_Low   (0UL)
 
#define GPIO_OUTCLR_PIN22_High   (1UL)
 
#define GPIO_OUTCLR_PIN22_Clear   (1UL)
 
#define GPIO_OUTCLR_PIN21_Pos   (21UL)
 
#define GPIO_OUTCLR_PIN21_Msk   (0x1UL << GPIO_OUTCLR_PIN21_Pos)
 
#define GPIO_OUTCLR_PIN21_Low   (0UL)
 
#define GPIO_OUTCLR_PIN21_High   (1UL)
 
#define GPIO_OUTCLR_PIN21_Clear   (1UL)
 
#define GPIO_OUTCLR_PIN20_Pos   (20UL)
 
#define GPIO_OUTCLR_PIN20_Msk   (0x1UL << GPIO_OUTCLR_PIN20_Pos)
 
#define GPIO_OUTCLR_PIN20_Low   (0UL)
 
#define GPIO_OUTCLR_PIN20_High   (1UL)
 
#define GPIO_OUTCLR_PIN20_Clear   (1UL)
 
#define GPIO_OUTCLR_PIN19_Pos   (19UL)
 
#define GPIO_OUTCLR_PIN19_Msk   (0x1UL << GPIO_OUTCLR_PIN19_Pos)
 
#define GPIO_OUTCLR_PIN19_Low   (0UL)
 
#define GPIO_OUTCLR_PIN19_High   (1UL)
 
#define GPIO_OUTCLR_PIN19_Clear   (1UL)
 
#define GPIO_OUTCLR_PIN18_Pos   (18UL)
 
#define GPIO_OUTCLR_PIN18_Msk   (0x1UL << GPIO_OUTCLR_PIN18_Pos)
 
#define GPIO_OUTCLR_PIN18_Low   (0UL)
 
#define GPIO_OUTCLR_PIN18_High   (1UL)
 
#define GPIO_OUTCLR_PIN18_Clear   (1UL)
 
#define GPIO_OUTCLR_PIN17_Pos   (17UL)
 
#define GPIO_OUTCLR_PIN17_Msk   (0x1UL << GPIO_OUTCLR_PIN17_Pos)
 
#define GPIO_OUTCLR_PIN17_Low   (0UL)
 
#define GPIO_OUTCLR_PIN17_High   (1UL)
 
#define GPIO_OUTCLR_PIN17_Clear   (1UL)
 
#define GPIO_OUTCLR_PIN16_Pos   (16UL)
 
#define GPIO_OUTCLR_PIN16_Msk   (0x1UL << GPIO_OUTCLR_PIN16_Pos)
 
#define GPIO_OUTCLR_PIN16_Low   (0UL)
 
#define GPIO_OUTCLR_PIN16_High   (1UL)
 
#define GPIO_OUTCLR_PIN16_Clear   (1UL)
 
#define GPIO_OUTCLR_PIN15_Pos   (15UL)
 
#define GPIO_OUTCLR_PIN15_Msk   (0x1UL << GPIO_OUTCLR_PIN15_Pos)
 
#define GPIO_OUTCLR_PIN15_Low   (0UL)
 
#define GPIO_OUTCLR_PIN15_High   (1UL)
 
#define GPIO_OUTCLR_PIN15_Clear   (1UL)
 
#define GPIO_OUTCLR_PIN14_Pos   (14UL)
 
#define GPIO_OUTCLR_PIN14_Msk   (0x1UL << GPIO_OUTCLR_PIN14_Pos)
 
#define GPIO_OUTCLR_PIN14_Low   (0UL)
 
#define GPIO_OUTCLR_PIN14_High   (1UL)
 
#define GPIO_OUTCLR_PIN14_Clear   (1UL)
 
#define GPIO_OUTCLR_PIN13_Pos   (13UL)
 
#define GPIO_OUTCLR_PIN13_Msk   (0x1UL << GPIO_OUTCLR_PIN13_Pos)
 
#define GPIO_OUTCLR_PIN13_Low   (0UL)
 
#define GPIO_OUTCLR_PIN13_High   (1UL)
 
#define GPIO_OUTCLR_PIN13_Clear   (1UL)
 
#define GPIO_OUTCLR_PIN12_Pos   (12UL)
 
#define GPIO_OUTCLR_PIN12_Msk   (0x1UL << GPIO_OUTCLR_PIN12_Pos)
 
#define GPIO_OUTCLR_PIN12_Low   (0UL)
 
#define GPIO_OUTCLR_PIN12_High   (1UL)
 
#define GPIO_OUTCLR_PIN12_Clear   (1UL)
 
#define GPIO_OUTCLR_PIN11_Pos   (11UL)
 
#define GPIO_OUTCLR_PIN11_Msk   (0x1UL << GPIO_OUTCLR_PIN11_Pos)
 
#define GPIO_OUTCLR_PIN11_Low   (0UL)
 
#define GPIO_OUTCLR_PIN11_High   (1UL)
 
#define GPIO_OUTCLR_PIN11_Clear   (1UL)
 
#define GPIO_OUTCLR_PIN10_Pos   (10UL)
 
#define GPIO_OUTCLR_PIN10_Msk   (0x1UL << GPIO_OUTCLR_PIN10_Pos)
 
#define GPIO_OUTCLR_PIN10_Low   (0UL)
 
#define GPIO_OUTCLR_PIN10_High   (1UL)
 
#define GPIO_OUTCLR_PIN10_Clear   (1UL)
 
#define GPIO_OUTCLR_PIN9_Pos   (9UL)
 
#define GPIO_OUTCLR_PIN9_Msk   (0x1UL << GPIO_OUTCLR_PIN9_Pos)
 
#define GPIO_OUTCLR_PIN9_Low   (0UL)
 
#define GPIO_OUTCLR_PIN9_High   (1UL)
 
#define GPIO_OUTCLR_PIN9_Clear   (1UL)
 
#define GPIO_OUTCLR_PIN8_Pos   (8UL)
 
#define GPIO_OUTCLR_PIN8_Msk   (0x1UL << GPIO_OUTCLR_PIN8_Pos)
 
#define GPIO_OUTCLR_PIN8_Low   (0UL)
 
#define GPIO_OUTCLR_PIN8_High   (1UL)
 
#define GPIO_OUTCLR_PIN8_Clear   (1UL)
 
#define GPIO_OUTCLR_PIN7_Pos   (7UL)
 
#define GPIO_OUTCLR_PIN7_Msk   (0x1UL << GPIO_OUTCLR_PIN7_Pos)
 
#define GPIO_OUTCLR_PIN7_Low   (0UL)
 
#define GPIO_OUTCLR_PIN7_High   (1UL)
 
#define GPIO_OUTCLR_PIN7_Clear   (1UL)
 
#define GPIO_OUTCLR_PIN6_Pos   (6UL)
 
#define GPIO_OUTCLR_PIN6_Msk   (0x1UL << GPIO_OUTCLR_PIN6_Pos)
 
#define GPIO_OUTCLR_PIN6_Low   (0UL)
 
#define GPIO_OUTCLR_PIN6_High   (1UL)
 
#define GPIO_OUTCLR_PIN6_Clear   (1UL)
 
#define GPIO_OUTCLR_PIN5_Pos   (5UL)
 
#define GPIO_OUTCLR_PIN5_Msk   (0x1UL << GPIO_OUTCLR_PIN5_Pos)
 
#define GPIO_OUTCLR_PIN5_Low   (0UL)
 
#define GPIO_OUTCLR_PIN5_High   (1UL)
 
#define GPIO_OUTCLR_PIN5_Clear   (1UL)
 
#define GPIO_OUTCLR_PIN4_Pos   (4UL)
 
#define GPIO_OUTCLR_PIN4_Msk   (0x1UL << GPIO_OUTCLR_PIN4_Pos)
 
#define GPIO_OUTCLR_PIN4_Low   (0UL)
 
#define GPIO_OUTCLR_PIN4_High   (1UL)
 
#define GPIO_OUTCLR_PIN4_Clear   (1UL)
 
#define GPIO_OUTCLR_PIN3_Pos   (3UL)
 
#define GPIO_OUTCLR_PIN3_Msk   (0x1UL << GPIO_OUTCLR_PIN3_Pos)
 
#define GPIO_OUTCLR_PIN3_Low   (0UL)
 
#define GPIO_OUTCLR_PIN3_High   (1UL)
 
#define GPIO_OUTCLR_PIN3_Clear   (1UL)
 
#define GPIO_OUTCLR_PIN2_Pos   (2UL)
 
#define GPIO_OUTCLR_PIN2_Msk   (0x1UL << GPIO_OUTCLR_PIN2_Pos)
 
#define GPIO_OUTCLR_PIN2_Low   (0UL)
 
#define GPIO_OUTCLR_PIN2_High   (1UL)
 
#define GPIO_OUTCLR_PIN2_Clear   (1UL)
 
#define GPIO_OUTCLR_PIN1_Pos   (1UL)
 
#define GPIO_OUTCLR_PIN1_Msk   (0x1UL << GPIO_OUTCLR_PIN1_Pos)
 
#define GPIO_OUTCLR_PIN1_Low   (0UL)
 
#define GPIO_OUTCLR_PIN1_High   (1UL)
 
#define GPIO_OUTCLR_PIN1_Clear   (1UL)
 
#define GPIO_OUTCLR_PIN0_Pos   (0UL)
 
#define GPIO_OUTCLR_PIN0_Msk   (0x1UL << GPIO_OUTCLR_PIN0_Pos)
 
#define GPIO_OUTCLR_PIN0_Low   (0UL)
 
#define GPIO_OUTCLR_PIN0_High   (1UL)
 
#define GPIO_OUTCLR_PIN0_Clear   (1UL)
 
#define GPIO_IN_PIN31_Pos   (31UL)
 
#define GPIO_IN_PIN31_Msk   (0x1UL << GPIO_IN_PIN31_Pos)
 
#define GPIO_IN_PIN31_Low   (0UL)
 
#define GPIO_IN_PIN31_High   (1UL)
 
#define GPIO_IN_PIN30_Pos   (30UL)
 
#define GPIO_IN_PIN30_Msk   (0x1UL << GPIO_IN_PIN30_Pos)
 
#define GPIO_IN_PIN30_Low   (0UL)
 
#define GPIO_IN_PIN30_High   (1UL)
 
#define GPIO_IN_PIN29_Pos   (29UL)
 
#define GPIO_IN_PIN29_Msk   (0x1UL << GPIO_IN_PIN29_Pos)
 
#define GPIO_IN_PIN29_Low   (0UL)
 
#define GPIO_IN_PIN29_High   (1UL)
 
#define GPIO_IN_PIN28_Pos   (28UL)
 
#define GPIO_IN_PIN28_Msk   (0x1UL << GPIO_IN_PIN28_Pos)
 
#define GPIO_IN_PIN28_Low   (0UL)
 
#define GPIO_IN_PIN28_High   (1UL)
 
#define GPIO_IN_PIN27_Pos   (27UL)
 
#define GPIO_IN_PIN27_Msk   (0x1UL << GPIO_IN_PIN27_Pos)
 
#define GPIO_IN_PIN27_Low   (0UL)
 
#define GPIO_IN_PIN27_High   (1UL)
 
#define GPIO_IN_PIN26_Pos   (26UL)
 
#define GPIO_IN_PIN26_Msk   (0x1UL << GPIO_IN_PIN26_Pos)
 
#define GPIO_IN_PIN26_Low   (0UL)
 
#define GPIO_IN_PIN26_High   (1UL)
 
#define GPIO_IN_PIN25_Pos   (25UL)
 
#define GPIO_IN_PIN25_Msk   (0x1UL << GPIO_IN_PIN25_Pos)
 
#define GPIO_IN_PIN25_Low   (0UL)
 
#define GPIO_IN_PIN25_High   (1UL)
 
#define GPIO_IN_PIN24_Pos   (24UL)
 
#define GPIO_IN_PIN24_Msk   (0x1UL << GPIO_IN_PIN24_Pos)
 
#define GPIO_IN_PIN24_Low   (0UL)
 
#define GPIO_IN_PIN24_High   (1UL)
 
#define GPIO_IN_PIN23_Pos   (23UL)
 
#define GPIO_IN_PIN23_Msk   (0x1UL << GPIO_IN_PIN23_Pos)
 
#define GPIO_IN_PIN23_Low   (0UL)
 
#define GPIO_IN_PIN23_High   (1UL)
 
#define GPIO_IN_PIN22_Pos   (22UL)
 
#define GPIO_IN_PIN22_Msk   (0x1UL << GPIO_IN_PIN22_Pos)
 
#define GPIO_IN_PIN22_Low   (0UL)
 
#define GPIO_IN_PIN22_High   (1UL)
 
#define GPIO_IN_PIN21_Pos   (21UL)
 
#define GPIO_IN_PIN21_Msk   (0x1UL << GPIO_IN_PIN21_Pos)
 
#define GPIO_IN_PIN21_Low   (0UL)
 
#define GPIO_IN_PIN21_High   (1UL)
 
#define GPIO_IN_PIN20_Pos   (20UL)
 
#define GPIO_IN_PIN20_Msk   (0x1UL << GPIO_IN_PIN20_Pos)
 
#define GPIO_IN_PIN20_Low   (0UL)
 
#define GPIO_IN_PIN20_High   (1UL)
 
#define GPIO_IN_PIN19_Pos   (19UL)
 
#define GPIO_IN_PIN19_Msk   (0x1UL << GPIO_IN_PIN19_Pos)
 
#define GPIO_IN_PIN19_Low   (0UL)
 
#define GPIO_IN_PIN19_High   (1UL)
 
#define GPIO_IN_PIN18_Pos   (18UL)
 
#define GPIO_IN_PIN18_Msk   (0x1UL << GPIO_IN_PIN18_Pos)
 
#define GPIO_IN_PIN18_Low   (0UL)
 
#define GPIO_IN_PIN18_High   (1UL)
 
#define GPIO_IN_PIN17_Pos   (17UL)
 
#define GPIO_IN_PIN17_Msk   (0x1UL << GPIO_IN_PIN17_Pos)
 
#define GPIO_IN_PIN17_Low   (0UL)
 
#define GPIO_IN_PIN17_High   (1UL)
 
#define GPIO_IN_PIN16_Pos   (16UL)
 
#define GPIO_IN_PIN16_Msk   (0x1UL << GPIO_IN_PIN16_Pos)
 
#define GPIO_IN_PIN16_Low   (0UL)
 
#define GPIO_IN_PIN16_High   (1UL)
 
#define GPIO_IN_PIN15_Pos   (15UL)
 
#define GPIO_IN_PIN15_Msk   (0x1UL << GPIO_IN_PIN15_Pos)
 
#define GPIO_IN_PIN15_Low   (0UL)
 
#define GPIO_IN_PIN15_High   (1UL)
 
#define GPIO_IN_PIN14_Pos   (14UL)
 
#define GPIO_IN_PIN14_Msk   (0x1UL << GPIO_IN_PIN14_Pos)
 
#define GPIO_IN_PIN14_Low   (0UL)
 
#define GPIO_IN_PIN14_High   (1UL)
 
#define GPIO_IN_PIN13_Pos   (13UL)
 
#define GPIO_IN_PIN13_Msk   (0x1UL << GPIO_IN_PIN13_Pos)
 
#define GPIO_IN_PIN13_Low   (0UL)
 
#define GPIO_IN_PIN13_High   (1UL)
 
#define GPIO_IN_PIN12_Pos   (12UL)
 
#define GPIO_IN_PIN12_Msk   (0x1UL << GPIO_IN_PIN12_Pos)
 
#define GPIO_IN_PIN12_Low   (0UL)
 
#define GPIO_IN_PIN12_High   (1UL)
 
#define GPIO_IN_PIN11_Pos   (11UL)
 
#define GPIO_IN_PIN11_Msk   (0x1UL << GPIO_IN_PIN11_Pos)
 
#define GPIO_IN_PIN11_Low   (0UL)
 
#define GPIO_IN_PIN11_High   (1UL)
 
#define GPIO_IN_PIN10_Pos   (10UL)
 
#define GPIO_IN_PIN10_Msk   (0x1UL << GPIO_IN_PIN10_Pos)
 
#define GPIO_IN_PIN10_Low   (0UL)
 
#define GPIO_IN_PIN10_High   (1UL)
 
#define GPIO_IN_PIN9_Pos   (9UL)
 
#define GPIO_IN_PIN9_Msk   (0x1UL << GPIO_IN_PIN9_Pos)
 
#define GPIO_IN_PIN9_Low   (0UL)
 
#define GPIO_IN_PIN9_High   (1UL)
 
#define GPIO_IN_PIN8_Pos   (8UL)
 
#define GPIO_IN_PIN8_Msk   (0x1UL << GPIO_IN_PIN8_Pos)
 
#define GPIO_IN_PIN8_Low   (0UL)
 
#define GPIO_IN_PIN8_High   (1UL)
 
#define GPIO_IN_PIN7_Pos   (7UL)
 
#define GPIO_IN_PIN7_Msk   (0x1UL << GPIO_IN_PIN7_Pos)
 
#define GPIO_IN_PIN7_Low   (0UL)
 
#define GPIO_IN_PIN7_High   (1UL)
 
#define GPIO_IN_PIN6_Pos   (6UL)
 
#define GPIO_IN_PIN6_Msk   (0x1UL << GPIO_IN_PIN6_Pos)
 
#define GPIO_IN_PIN6_Low   (0UL)
 
#define GPIO_IN_PIN6_High   (1UL)
 
#define GPIO_IN_PIN5_Pos   (5UL)
 
#define GPIO_IN_PIN5_Msk   (0x1UL << GPIO_IN_PIN5_Pos)
 
#define GPIO_IN_PIN5_Low   (0UL)
 
#define GPIO_IN_PIN5_High   (1UL)
 
#define GPIO_IN_PIN4_Pos   (4UL)
 
#define GPIO_IN_PIN4_Msk   (0x1UL << GPIO_IN_PIN4_Pos)
 
#define GPIO_IN_PIN4_Low   (0UL)
 
#define GPIO_IN_PIN4_High   (1UL)
 
#define GPIO_IN_PIN3_Pos   (3UL)
 
#define GPIO_IN_PIN3_Msk   (0x1UL << GPIO_IN_PIN3_Pos)
 
#define GPIO_IN_PIN3_Low   (0UL)
 
#define GPIO_IN_PIN3_High   (1UL)
 
#define GPIO_IN_PIN2_Pos   (2UL)
 
#define GPIO_IN_PIN2_Msk   (0x1UL << GPIO_IN_PIN2_Pos)
 
#define GPIO_IN_PIN2_Low   (0UL)
 
#define GPIO_IN_PIN2_High   (1UL)
 
#define GPIO_IN_PIN1_Pos   (1UL)
 
#define GPIO_IN_PIN1_Msk   (0x1UL << GPIO_IN_PIN1_Pos)
 
#define GPIO_IN_PIN1_Low   (0UL)
 
#define GPIO_IN_PIN1_High   (1UL)
 
#define GPIO_IN_PIN0_Pos   (0UL)
 
#define GPIO_IN_PIN0_Msk   (0x1UL << GPIO_IN_PIN0_Pos)
 
#define GPIO_IN_PIN0_Low   (0UL)
 
#define GPIO_IN_PIN0_High   (1UL)
 
#define GPIO_DIR_PIN31_Pos   (31UL)
 
#define GPIO_DIR_PIN31_Msk   (0x1UL << GPIO_DIR_PIN31_Pos)
 
#define GPIO_DIR_PIN31_Input   (0UL)
 
#define GPIO_DIR_PIN31_Output   (1UL)
 
#define GPIO_DIR_PIN30_Pos   (30UL)
 
#define GPIO_DIR_PIN30_Msk   (0x1UL << GPIO_DIR_PIN30_Pos)
 
#define GPIO_DIR_PIN30_Input   (0UL)
 
#define GPIO_DIR_PIN30_Output   (1UL)
 
#define GPIO_DIR_PIN29_Pos   (29UL)
 
#define GPIO_DIR_PIN29_Msk   (0x1UL << GPIO_DIR_PIN29_Pos)
 
#define GPIO_DIR_PIN29_Input   (0UL)
 
#define GPIO_DIR_PIN29_Output   (1UL)
 
#define GPIO_DIR_PIN28_Pos   (28UL)
 
#define GPIO_DIR_PIN28_Msk   (0x1UL << GPIO_DIR_PIN28_Pos)
 
#define GPIO_DIR_PIN28_Input   (0UL)
 
#define GPIO_DIR_PIN28_Output   (1UL)
 
#define GPIO_DIR_PIN27_Pos   (27UL)
 
#define GPIO_DIR_PIN27_Msk   (0x1UL << GPIO_DIR_PIN27_Pos)
 
#define GPIO_DIR_PIN27_Input   (0UL)
 
#define GPIO_DIR_PIN27_Output   (1UL)
 
#define GPIO_DIR_PIN26_Pos   (26UL)
 
#define GPIO_DIR_PIN26_Msk   (0x1UL << GPIO_DIR_PIN26_Pos)
 
#define GPIO_DIR_PIN26_Input   (0UL)
 
#define GPIO_DIR_PIN26_Output   (1UL)
 
#define GPIO_DIR_PIN25_Pos   (25UL)
 
#define GPIO_DIR_PIN25_Msk   (0x1UL << GPIO_DIR_PIN25_Pos)
 
#define GPIO_DIR_PIN25_Input   (0UL)
 
#define GPIO_DIR_PIN25_Output   (1UL)
 
#define GPIO_DIR_PIN24_Pos   (24UL)
 
#define GPIO_DIR_PIN24_Msk   (0x1UL << GPIO_DIR_PIN24_Pos)
 
#define GPIO_DIR_PIN24_Input   (0UL)
 
#define GPIO_DIR_PIN24_Output   (1UL)
 
#define GPIO_DIR_PIN23_Pos   (23UL)
 
#define GPIO_DIR_PIN23_Msk   (0x1UL << GPIO_DIR_PIN23_Pos)
 
#define GPIO_DIR_PIN23_Input   (0UL)
 
#define GPIO_DIR_PIN23_Output   (1UL)
 
#define GPIO_DIR_PIN22_Pos   (22UL)
 
#define GPIO_DIR_PIN22_Msk   (0x1UL << GPIO_DIR_PIN22_Pos)
 
#define GPIO_DIR_PIN22_Input   (0UL)
 
#define GPIO_DIR_PIN22_Output   (1UL)
 
#define GPIO_DIR_PIN21_Pos   (21UL)
 
#define GPIO_DIR_PIN21_Msk   (0x1UL << GPIO_DIR_PIN21_Pos)
 
#define GPIO_DIR_PIN21_Input   (0UL)
 
#define GPIO_DIR_PIN21_Output   (1UL)
 
#define GPIO_DIR_PIN20_Pos   (20UL)
 
#define GPIO_DIR_PIN20_Msk   (0x1UL << GPIO_DIR_PIN20_Pos)
 
#define GPIO_DIR_PIN20_Input   (0UL)
 
#define GPIO_DIR_PIN20_Output   (1UL)
 
#define GPIO_DIR_PIN19_Pos   (19UL)
 
#define GPIO_DIR_PIN19_Msk   (0x1UL << GPIO_DIR_PIN19_Pos)
 
#define GPIO_DIR_PIN19_Input   (0UL)
 
#define GPIO_DIR_PIN19_Output   (1UL)
 
#define GPIO_DIR_PIN18_Pos   (18UL)
 
#define GPIO_DIR_PIN18_Msk   (0x1UL << GPIO_DIR_PIN18_Pos)
 
#define GPIO_DIR_PIN18_Input   (0UL)
 
#define GPIO_DIR_PIN18_Output   (1UL)
 
#define GPIO_DIR_PIN17_Pos   (17UL)
 
#define GPIO_DIR_PIN17_Msk   (0x1UL << GPIO_DIR_PIN17_Pos)
 
#define GPIO_DIR_PIN17_Input   (0UL)
 
#define GPIO_DIR_PIN17_Output   (1UL)
 
#define GPIO_DIR_PIN16_Pos   (16UL)
 
#define GPIO_DIR_PIN16_Msk   (0x1UL << GPIO_DIR_PIN16_Pos)
 
#define GPIO_DIR_PIN16_Input   (0UL)
 
#define GPIO_DIR_PIN16_Output   (1UL)
 
#define GPIO_DIR_PIN15_Pos   (15UL)
 
#define GPIO_DIR_PIN15_Msk   (0x1UL << GPIO_DIR_PIN15_Pos)
 
#define GPIO_DIR_PIN15_Input   (0UL)
 
#define GPIO_DIR_PIN15_Output   (1UL)
 
#define GPIO_DIR_PIN14_Pos   (14UL)
 
#define GPIO_DIR_PIN14_Msk   (0x1UL << GPIO_DIR_PIN14_Pos)
 
#define GPIO_DIR_PIN14_Input   (0UL)
 
#define GPIO_DIR_PIN14_Output   (1UL)
 
#define GPIO_DIR_PIN13_Pos   (13UL)
 
#define GPIO_DIR_PIN13_Msk   (0x1UL << GPIO_DIR_PIN13_Pos)
 
#define GPIO_DIR_PIN13_Input   (0UL)
 
#define GPIO_DIR_PIN13_Output   (1UL)
 
#define GPIO_DIR_PIN12_Pos   (12UL)
 
#define GPIO_DIR_PIN12_Msk   (0x1UL << GPIO_DIR_PIN12_Pos)
 
#define GPIO_DIR_PIN12_Input   (0UL)
 
#define GPIO_DIR_PIN12_Output   (1UL)
 
#define GPIO_DIR_PIN11_Pos   (11UL)
 
#define GPIO_DIR_PIN11_Msk   (0x1UL << GPIO_DIR_PIN11_Pos)
 
#define GPIO_DIR_PIN11_Input   (0UL)
 
#define GPIO_DIR_PIN11_Output   (1UL)
 
#define GPIO_DIR_PIN10_Pos   (10UL)
 
#define GPIO_DIR_PIN10_Msk   (0x1UL << GPIO_DIR_PIN10_Pos)
 
#define GPIO_DIR_PIN10_Input   (0UL)
 
#define GPIO_DIR_PIN10_Output   (1UL)
 
#define GPIO_DIR_PIN9_Pos   (9UL)
 
#define GPIO_DIR_PIN9_Msk   (0x1UL << GPIO_DIR_PIN9_Pos)
 
#define GPIO_DIR_PIN9_Input   (0UL)
 
#define GPIO_DIR_PIN9_Output   (1UL)
 
#define GPIO_DIR_PIN8_Pos   (8UL)
 
#define GPIO_DIR_PIN8_Msk   (0x1UL << GPIO_DIR_PIN8_Pos)
 
#define GPIO_DIR_PIN8_Input   (0UL)
 
#define GPIO_DIR_PIN8_Output   (1UL)
 
#define GPIO_DIR_PIN7_Pos   (7UL)
 
#define GPIO_DIR_PIN7_Msk   (0x1UL << GPIO_DIR_PIN7_Pos)
 
#define GPIO_DIR_PIN7_Input   (0UL)
 
#define GPIO_DIR_PIN7_Output   (1UL)
 
#define GPIO_DIR_PIN6_Pos   (6UL)
 
#define GPIO_DIR_PIN6_Msk   (0x1UL << GPIO_DIR_PIN6_Pos)
 
#define GPIO_DIR_PIN6_Input   (0UL)
 
#define GPIO_DIR_PIN6_Output   (1UL)
 
#define GPIO_DIR_PIN5_Pos   (5UL)
 
#define GPIO_DIR_PIN5_Msk   (0x1UL << GPIO_DIR_PIN5_Pos)
 
#define GPIO_DIR_PIN5_Input   (0UL)
 
#define GPIO_DIR_PIN5_Output   (1UL)
 
#define GPIO_DIR_PIN4_Pos   (4UL)
 
#define GPIO_DIR_PIN4_Msk   (0x1UL << GPIO_DIR_PIN4_Pos)
 
#define GPIO_DIR_PIN4_Input   (0UL)
 
#define GPIO_DIR_PIN4_Output   (1UL)
 
#define GPIO_DIR_PIN3_Pos   (3UL)
 
#define GPIO_DIR_PIN3_Msk   (0x1UL << GPIO_DIR_PIN3_Pos)
 
#define GPIO_DIR_PIN3_Input   (0UL)
 
#define GPIO_DIR_PIN3_Output   (1UL)
 
#define GPIO_DIR_PIN2_Pos   (2UL)
 
#define GPIO_DIR_PIN2_Msk   (0x1UL << GPIO_DIR_PIN2_Pos)
 
#define GPIO_DIR_PIN2_Input   (0UL)
 
#define GPIO_DIR_PIN2_Output   (1UL)
 
#define GPIO_DIR_PIN1_Pos   (1UL)
 
#define GPIO_DIR_PIN1_Msk   (0x1UL << GPIO_DIR_PIN1_Pos)
 
#define GPIO_DIR_PIN1_Input   (0UL)
 
#define GPIO_DIR_PIN1_Output   (1UL)
 
#define GPIO_DIR_PIN0_Pos   (0UL)
 
#define GPIO_DIR_PIN0_Msk   (0x1UL << GPIO_DIR_PIN0_Pos)
 
#define GPIO_DIR_PIN0_Input   (0UL)
 
#define GPIO_DIR_PIN0_Output   (1UL)
 
#define GPIO_DIRSET_PIN31_Pos   (31UL)
 
#define GPIO_DIRSET_PIN31_Msk   (0x1UL << GPIO_DIRSET_PIN31_Pos)
 
#define GPIO_DIRSET_PIN31_Input   (0UL)
 
#define GPIO_DIRSET_PIN31_Output   (1UL)
 
#define GPIO_DIRSET_PIN31_Set   (1UL)
 
#define GPIO_DIRSET_PIN30_Pos   (30UL)
 
#define GPIO_DIRSET_PIN30_Msk   (0x1UL << GPIO_DIRSET_PIN30_Pos)
 
#define GPIO_DIRSET_PIN30_Input   (0UL)
 
#define GPIO_DIRSET_PIN30_Output   (1UL)
 
#define GPIO_DIRSET_PIN30_Set   (1UL)
 
#define GPIO_DIRSET_PIN29_Pos   (29UL)
 
#define GPIO_DIRSET_PIN29_Msk   (0x1UL << GPIO_DIRSET_PIN29_Pos)
 
#define GPIO_DIRSET_PIN29_Input   (0UL)
 
#define GPIO_DIRSET_PIN29_Output   (1UL)
 
#define GPIO_DIRSET_PIN29_Set   (1UL)
 
#define GPIO_DIRSET_PIN28_Pos   (28UL)
 
#define GPIO_DIRSET_PIN28_Msk   (0x1UL << GPIO_DIRSET_PIN28_Pos)
 
#define GPIO_DIRSET_PIN28_Input   (0UL)
 
#define GPIO_DIRSET_PIN28_Output   (1UL)
 
#define GPIO_DIRSET_PIN28_Set   (1UL)
 
#define GPIO_DIRSET_PIN27_Pos   (27UL)
 
#define GPIO_DIRSET_PIN27_Msk   (0x1UL << GPIO_DIRSET_PIN27_Pos)
 
#define GPIO_DIRSET_PIN27_Input   (0UL)
 
#define GPIO_DIRSET_PIN27_Output   (1UL)
 
#define GPIO_DIRSET_PIN27_Set   (1UL)
 
#define GPIO_DIRSET_PIN26_Pos   (26UL)
 
#define GPIO_DIRSET_PIN26_Msk   (0x1UL << GPIO_DIRSET_PIN26_Pos)
 
#define GPIO_DIRSET_PIN26_Input   (0UL)
 
#define GPIO_DIRSET_PIN26_Output   (1UL)
 
#define GPIO_DIRSET_PIN26_Set   (1UL)
 
#define GPIO_DIRSET_PIN25_Pos   (25UL)
 
#define GPIO_DIRSET_PIN25_Msk   (0x1UL << GPIO_DIRSET_PIN25_Pos)
 
#define GPIO_DIRSET_PIN25_Input   (0UL)
 
#define GPIO_DIRSET_PIN25_Output   (1UL)
 
#define GPIO_DIRSET_PIN25_Set   (1UL)
 
#define GPIO_DIRSET_PIN24_Pos   (24UL)
 
#define GPIO_DIRSET_PIN24_Msk   (0x1UL << GPIO_DIRSET_PIN24_Pos)
 
#define GPIO_DIRSET_PIN24_Input   (0UL)
 
#define GPIO_DIRSET_PIN24_Output   (1UL)
 
#define GPIO_DIRSET_PIN24_Set   (1UL)
 
#define GPIO_DIRSET_PIN23_Pos   (23UL)
 
#define GPIO_DIRSET_PIN23_Msk   (0x1UL << GPIO_DIRSET_PIN23_Pos)
 
#define GPIO_DIRSET_PIN23_Input   (0UL)
 
#define GPIO_DIRSET_PIN23_Output   (1UL)
 
#define GPIO_DIRSET_PIN23_Set   (1UL)
 
#define GPIO_DIRSET_PIN22_Pos   (22UL)
 
#define GPIO_DIRSET_PIN22_Msk   (0x1UL << GPIO_DIRSET_PIN22_Pos)
 
#define GPIO_DIRSET_PIN22_Input   (0UL)
 
#define GPIO_DIRSET_PIN22_Output   (1UL)
 
#define GPIO_DIRSET_PIN22_Set   (1UL)
 
#define GPIO_DIRSET_PIN21_Pos   (21UL)
 
#define GPIO_DIRSET_PIN21_Msk   (0x1UL << GPIO_DIRSET_PIN21_Pos)
 
#define GPIO_DIRSET_PIN21_Input   (0UL)
 
#define GPIO_DIRSET_PIN21_Output   (1UL)
 
#define GPIO_DIRSET_PIN21_Set   (1UL)
 
#define GPIO_DIRSET_PIN20_Pos   (20UL)
 
#define GPIO_DIRSET_PIN20_Msk   (0x1UL << GPIO_DIRSET_PIN20_Pos)
 
#define GPIO_DIRSET_PIN20_Input   (0UL)
 
#define GPIO_DIRSET_PIN20_Output   (1UL)
 
#define GPIO_DIRSET_PIN20_Set   (1UL)
 
#define GPIO_DIRSET_PIN19_Pos   (19UL)
 
#define GPIO_DIRSET_PIN19_Msk   (0x1UL << GPIO_DIRSET_PIN19_Pos)
 
#define GPIO_DIRSET_PIN19_Input   (0UL)
 
#define GPIO_DIRSET_PIN19_Output   (1UL)
 
#define GPIO_DIRSET_PIN19_Set   (1UL)
 
#define GPIO_DIRSET_PIN18_Pos   (18UL)
 
#define GPIO_DIRSET_PIN18_Msk   (0x1UL << GPIO_DIRSET_PIN18_Pos)
 
#define GPIO_DIRSET_PIN18_Input   (0UL)
 
#define GPIO_DIRSET_PIN18_Output   (1UL)
 
#define GPIO_DIRSET_PIN18_Set   (1UL)
 
#define GPIO_DIRSET_PIN17_Pos   (17UL)
 
#define GPIO_DIRSET_PIN17_Msk   (0x1UL << GPIO_DIRSET_PIN17_Pos)
 
#define GPIO_DIRSET_PIN17_Input   (0UL)
 
#define GPIO_DIRSET_PIN17_Output   (1UL)
 
#define GPIO_DIRSET_PIN17_Set   (1UL)
 
#define GPIO_DIRSET_PIN16_Pos   (16UL)
 
#define GPIO_DIRSET_PIN16_Msk   (0x1UL << GPIO_DIRSET_PIN16_Pos)
 
#define GPIO_DIRSET_PIN16_Input   (0UL)
 
#define GPIO_DIRSET_PIN16_Output   (1UL)
 
#define GPIO_DIRSET_PIN16_Set   (1UL)
 
#define GPIO_DIRSET_PIN15_Pos   (15UL)
 
#define GPIO_DIRSET_PIN15_Msk   (0x1UL << GPIO_DIRSET_PIN15_Pos)
 
#define GPIO_DIRSET_PIN15_Input   (0UL)
 
#define GPIO_DIRSET_PIN15_Output   (1UL)
 
#define GPIO_DIRSET_PIN15_Set   (1UL)
 
#define GPIO_DIRSET_PIN14_Pos   (14UL)
 
#define GPIO_DIRSET_PIN14_Msk   (0x1UL << GPIO_DIRSET_PIN14_Pos)
 
#define GPIO_DIRSET_PIN14_Input   (0UL)
 
#define GPIO_DIRSET_PIN14_Output   (1UL)
 
#define GPIO_DIRSET_PIN14_Set   (1UL)
 
#define GPIO_DIRSET_PIN13_Pos   (13UL)
 
#define GPIO_DIRSET_PIN13_Msk   (0x1UL << GPIO_DIRSET_PIN13_Pos)
 
#define GPIO_DIRSET_PIN13_Input   (0UL)
 
#define GPIO_DIRSET_PIN13_Output   (1UL)
 
#define GPIO_DIRSET_PIN13_Set   (1UL)
 
#define GPIO_DIRSET_PIN12_Pos   (12UL)
 
#define GPIO_DIRSET_PIN12_Msk   (0x1UL << GPIO_DIRSET_PIN12_Pos)
 
#define GPIO_DIRSET_PIN12_Input   (0UL)
 
#define GPIO_DIRSET_PIN12_Output   (1UL)
 
#define GPIO_DIRSET_PIN12_Set   (1UL)
 
#define GPIO_DIRSET_PIN11_Pos   (11UL)
 
#define GPIO_DIRSET_PIN11_Msk   (0x1UL << GPIO_DIRSET_PIN11_Pos)
 
#define GPIO_DIRSET_PIN11_Input   (0UL)
 
#define GPIO_DIRSET_PIN11_Output   (1UL)
 
#define GPIO_DIRSET_PIN11_Set   (1UL)
 
#define GPIO_DIRSET_PIN10_Pos   (10UL)
 
#define GPIO_DIRSET_PIN10_Msk   (0x1UL << GPIO_DIRSET_PIN10_Pos)
 
#define GPIO_DIRSET_PIN10_Input   (0UL)
 
#define GPIO_DIRSET_PIN10_Output   (1UL)
 
#define GPIO_DIRSET_PIN10_Set   (1UL)
 
#define GPIO_DIRSET_PIN9_Pos   (9UL)
 
#define GPIO_DIRSET_PIN9_Msk   (0x1UL << GPIO_DIRSET_PIN9_Pos)
 
#define GPIO_DIRSET_PIN9_Input   (0UL)
 
#define GPIO_DIRSET_PIN9_Output   (1UL)
 
#define GPIO_DIRSET_PIN9_Set   (1UL)
 
#define GPIO_DIRSET_PIN8_Pos   (8UL)
 
#define GPIO_DIRSET_PIN8_Msk   (0x1UL << GPIO_DIRSET_PIN8_Pos)
 
#define GPIO_DIRSET_PIN8_Input   (0UL)
 
#define GPIO_DIRSET_PIN8_Output   (1UL)
 
#define GPIO_DIRSET_PIN8_Set   (1UL)
 
#define GPIO_DIRSET_PIN7_Pos   (7UL)
 
#define GPIO_DIRSET_PIN7_Msk   (0x1UL << GPIO_DIRSET_PIN7_Pos)
 
#define GPIO_DIRSET_PIN7_Input   (0UL)
 
#define GPIO_DIRSET_PIN7_Output   (1UL)
 
#define GPIO_DIRSET_PIN7_Set   (1UL)
 
#define GPIO_DIRSET_PIN6_Pos   (6UL)
 
#define GPIO_DIRSET_PIN6_Msk   (0x1UL << GPIO_DIRSET_PIN6_Pos)
 
#define GPIO_DIRSET_PIN6_Input   (0UL)
 
#define GPIO_DIRSET_PIN6_Output   (1UL)
 
#define GPIO_DIRSET_PIN6_Set   (1UL)
 
#define GPIO_DIRSET_PIN5_Pos   (5UL)
 
#define GPIO_DIRSET_PIN5_Msk   (0x1UL << GPIO_DIRSET_PIN5_Pos)
 
#define GPIO_DIRSET_PIN5_Input   (0UL)
 
#define GPIO_DIRSET_PIN5_Output   (1UL)
 
#define GPIO_DIRSET_PIN5_Set   (1UL)
 
#define GPIO_DIRSET_PIN4_Pos   (4UL)
 
#define GPIO_DIRSET_PIN4_Msk   (0x1UL << GPIO_DIRSET_PIN4_Pos)
 
#define GPIO_DIRSET_PIN4_Input   (0UL)
 
#define GPIO_DIRSET_PIN4_Output   (1UL)
 
#define GPIO_DIRSET_PIN4_Set   (1UL)
 
#define GPIO_DIRSET_PIN3_Pos   (3UL)
 
#define GPIO_DIRSET_PIN3_Msk   (0x1UL << GPIO_DIRSET_PIN3_Pos)
 
#define GPIO_DIRSET_PIN3_Input   (0UL)
 
#define GPIO_DIRSET_PIN3_Output   (1UL)
 
#define GPIO_DIRSET_PIN3_Set   (1UL)
 
#define GPIO_DIRSET_PIN2_Pos   (2UL)
 
#define GPIO_DIRSET_PIN2_Msk   (0x1UL << GPIO_DIRSET_PIN2_Pos)
 
#define GPIO_DIRSET_PIN2_Input   (0UL)
 
#define GPIO_DIRSET_PIN2_Output   (1UL)
 
#define GPIO_DIRSET_PIN2_Set   (1UL)
 
#define GPIO_DIRSET_PIN1_Pos   (1UL)
 
#define GPIO_DIRSET_PIN1_Msk   (0x1UL << GPIO_DIRSET_PIN1_Pos)
 
#define GPIO_DIRSET_PIN1_Input   (0UL)
 
#define GPIO_DIRSET_PIN1_Output   (1UL)
 
#define GPIO_DIRSET_PIN1_Set   (1UL)
 
#define GPIO_DIRSET_PIN0_Pos   (0UL)
 
#define GPIO_DIRSET_PIN0_Msk   (0x1UL << GPIO_DIRSET_PIN0_Pos)
 
#define GPIO_DIRSET_PIN0_Input   (0UL)
 
#define GPIO_DIRSET_PIN0_Output   (1UL)
 
#define GPIO_DIRSET_PIN0_Set   (1UL)
 
#define GPIO_DIRCLR_PIN31_Pos   (31UL)
 
#define GPIO_DIRCLR_PIN31_Msk   (0x1UL << GPIO_DIRCLR_PIN31_Pos)
 
#define GPIO_DIRCLR_PIN31_Input   (0UL)
 
#define GPIO_DIRCLR_PIN31_Output   (1UL)
 
#define GPIO_DIRCLR_PIN31_Clear   (1UL)
 
#define GPIO_DIRCLR_PIN30_Pos   (30UL)
 
#define GPIO_DIRCLR_PIN30_Msk   (0x1UL << GPIO_DIRCLR_PIN30_Pos)
 
#define GPIO_DIRCLR_PIN30_Input   (0UL)
 
#define GPIO_DIRCLR_PIN30_Output   (1UL)
 
#define GPIO_DIRCLR_PIN30_Clear   (1UL)
 
#define GPIO_DIRCLR_PIN29_Pos   (29UL)
 
#define GPIO_DIRCLR_PIN29_Msk   (0x1UL << GPIO_DIRCLR_PIN29_Pos)
 
#define GPIO_DIRCLR_PIN29_Input   (0UL)
 
#define GPIO_DIRCLR_PIN29_Output   (1UL)
 
#define GPIO_DIRCLR_PIN29_Clear   (1UL)
 
#define GPIO_DIRCLR_PIN28_Pos   (28UL)
 
#define GPIO_DIRCLR_PIN28_Msk   (0x1UL << GPIO_DIRCLR_PIN28_Pos)
 
#define GPIO_DIRCLR_PIN28_Input   (0UL)
 
#define GPIO_DIRCLR_PIN28_Output   (1UL)
 
#define GPIO_DIRCLR_PIN28_Clear   (1UL)
 
#define GPIO_DIRCLR_PIN27_Pos   (27UL)
 
#define GPIO_DIRCLR_PIN27_Msk   (0x1UL << GPIO_DIRCLR_PIN27_Pos)
 
#define GPIO_DIRCLR_PIN27_Input   (0UL)
 
#define GPIO_DIRCLR_PIN27_Output   (1UL)
 
#define GPIO_DIRCLR_PIN27_Clear   (1UL)
 
#define GPIO_DIRCLR_PIN26_Pos   (26UL)
 
#define GPIO_DIRCLR_PIN26_Msk   (0x1UL << GPIO_DIRCLR_PIN26_Pos)
 
#define GPIO_DIRCLR_PIN26_Input   (0UL)
 
#define GPIO_DIRCLR_PIN26_Output   (1UL)
 
#define GPIO_DIRCLR_PIN26_Clear   (1UL)
 
#define GPIO_DIRCLR_PIN25_Pos   (25UL)
 
#define GPIO_DIRCLR_PIN25_Msk   (0x1UL << GPIO_DIRCLR_PIN25_Pos)
 
#define GPIO_DIRCLR_PIN25_Input   (0UL)
 
#define GPIO_DIRCLR_PIN25_Output   (1UL)
 
#define GPIO_DIRCLR_PIN25_Clear   (1UL)
 
#define GPIO_DIRCLR_PIN24_Pos   (24UL)
 
#define GPIO_DIRCLR_PIN24_Msk   (0x1UL << GPIO_DIRCLR_PIN24_Pos)
 
#define GPIO_DIRCLR_PIN24_Input   (0UL)
 
#define GPIO_DIRCLR_PIN24_Output   (1UL)
 
#define GPIO_DIRCLR_PIN24_Clear   (1UL)
 
#define GPIO_DIRCLR_PIN23_Pos   (23UL)
 
#define GPIO_DIRCLR_PIN23_Msk   (0x1UL << GPIO_DIRCLR_PIN23_Pos)
 
#define GPIO_DIRCLR_PIN23_Input   (0UL)
 
#define GPIO_DIRCLR_PIN23_Output   (1UL)
 
#define GPIO_DIRCLR_PIN23_Clear   (1UL)
 
#define GPIO_DIRCLR_PIN22_Pos   (22UL)
 
#define GPIO_DIRCLR_PIN22_Msk   (0x1UL << GPIO_DIRCLR_PIN22_Pos)
 
#define GPIO_DIRCLR_PIN22_Input   (0UL)
 
#define GPIO_DIRCLR_PIN22_Output   (1UL)
 
#define GPIO_DIRCLR_PIN22_Clear   (1UL)
 
#define GPIO_DIRCLR_PIN21_Pos   (21UL)
 
#define GPIO_DIRCLR_PIN21_Msk   (0x1UL << GPIO_DIRCLR_PIN21_Pos)
 
#define GPIO_DIRCLR_PIN21_Input   (0UL)
 
#define GPIO_DIRCLR_PIN21_Output   (1UL)
 
#define GPIO_DIRCLR_PIN21_Clear   (1UL)
 
#define GPIO_DIRCLR_PIN20_Pos   (20UL)
 
#define GPIO_DIRCLR_PIN20_Msk   (0x1UL << GPIO_DIRCLR_PIN20_Pos)
 
#define GPIO_DIRCLR_PIN20_Input   (0UL)
 
#define GPIO_DIRCLR_PIN20_Output   (1UL)
 
#define GPIO_DIRCLR_PIN20_Clear   (1UL)
 
#define GPIO_DIRCLR_PIN19_Pos   (19UL)
 
#define GPIO_DIRCLR_PIN19_Msk   (0x1UL << GPIO_DIRCLR_PIN19_Pos)
 
#define GPIO_DIRCLR_PIN19_Input   (0UL)
 
#define GPIO_DIRCLR_PIN19_Output   (1UL)
 
#define GPIO_DIRCLR_PIN19_Clear   (1UL)
 
#define GPIO_DIRCLR_PIN18_Pos   (18UL)
 
#define GPIO_DIRCLR_PIN18_Msk   (0x1UL << GPIO_DIRCLR_PIN18_Pos)
 
#define GPIO_DIRCLR_PIN18_Input   (0UL)
 
#define GPIO_DIRCLR_PIN18_Output   (1UL)
 
#define GPIO_DIRCLR_PIN18_Clear   (1UL)
 
#define GPIO_DIRCLR_PIN17_Pos   (17UL)
 
#define GPIO_DIRCLR_PIN17_Msk   (0x1UL << GPIO_DIRCLR_PIN17_Pos)
 
#define GPIO_DIRCLR_PIN17_Input   (0UL)
 
#define GPIO_DIRCLR_PIN17_Output   (1UL)
 
#define GPIO_DIRCLR_PIN17_Clear   (1UL)
 
#define GPIO_DIRCLR_PIN16_Pos   (16UL)
 
#define GPIO_DIRCLR_PIN16_Msk   (0x1UL << GPIO_DIRCLR_PIN16_Pos)
 
#define GPIO_DIRCLR_PIN16_Input   (0UL)
 
#define GPIO_DIRCLR_PIN16_Output   (1UL)
 
#define GPIO_DIRCLR_PIN16_Clear   (1UL)
 
#define GPIO_DIRCLR_PIN15_Pos   (15UL)
 
#define GPIO_DIRCLR_PIN15_Msk   (0x1UL << GPIO_DIRCLR_PIN15_Pos)
 
#define GPIO_DIRCLR_PIN15_Input   (0UL)
 
#define GPIO_DIRCLR_PIN15_Output   (1UL)
 
#define GPIO_DIRCLR_PIN15_Clear   (1UL)
 
#define GPIO_DIRCLR_PIN14_Pos   (14UL)
 
#define GPIO_DIRCLR_PIN14_Msk   (0x1UL << GPIO_DIRCLR_PIN14_Pos)
 
#define GPIO_DIRCLR_PIN14_Input   (0UL)
 
#define GPIO_DIRCLR_PIN14_Output   (1UL)
 
#define GPIO_DIRCLR_PIN14_Clear   (1UL)
 
#define GPIO_DIRCLR_PIN13_Pos   (13UL)
 
#define GPIO_DIRCLR_PIN13_Msk   (0x1UL << GPIO_DIRCLR_PIN13_Pos)
 
#define GPIO_DIRCLR_PIN13_Input   (0UL)
 
#define GPIO_DIRCLR_PIN13_Output   (1UL)
 
#define GPIO_DIRCLR_PIN13_Clear   (1UL)
 
#define GPIO_DIRCLR_PIN12_Pos   (12UL)
 
#define GPIO_DIRCLR_PIN12_Msk   (0x1UL << GPIO_DIRCLR_PIN12_Pos)
 
#define GPIO_DIRCLR_PIN12_Input   (0UL)
 
#define GPIO_DIRCLR_PIN12_Output   (1UL)
 
#define GPIO_DIRCLR_PIN12_Clear   (1UL)
 
#define GPIO_DIRCLR_PIN11_Pos   (11UL)
 
#define GPIO_DIRCLR_PIN11_Msk   (0x1UL << GPIO_DIRCLR_PIN11_Pos)
 
#define GPIO_DIRCLR_PIN11_Input   (0UL)
 
#define GPIO_DIRCLR_PIN11_Output   (1UL)
 
#define GPIO_DIRCLR_PIN11_Clear   (1UL)
 
#define GPIO_DIRCLR_PIN10_Pos   (10UL)
 
#define GPIO_DIRCLR_PIN10_Msk   (0x1UL << GPIO_DIRCLR_PIN10_Pos)
 
#define GPIO_DIRCLR_PIN10_Input   (0UL)
 
#define GPIO_DIRCLR_PIN10_Output   (1UL)
 
#define GPIO_DIRCLR_PIN10_Clear   (1UL)
 
#define GPIO_DIRCLR_PIN9_Pos   (9UL)
 
#define GPIO_DIRCLR_PIN9_Msk   (0x1UL << GPIO_DIRCLR_PIN9_Pos)
 
#define GPIO_DIRCLR_PIN9_Input   (0UL)
 
#define GPIO_DIRCLR_PIN9_Output   (1UL)
 
#define GPIO_DIRCLR_PIN9_Clear   (1UL)
 
#define GPIO_DIRCLR_PIN8_Pos   (8UL)
 
#define GPIO_DIRCLR_PIN8_Msk   (0x1UL << GPIO_DIRCLR_PIN8_Pos)
 
#define GPIO_DIRCLR_PIN8_Input   (0UL)
 
#define GPIO_DIRCLR_PIN8_Output   (1UL)
 
#define GPIO_DIRCLR_PIN8_Clear   (1UL)
 
#define GPIO_DIRCLR_PIN7_Pos   (7UL)
 
#define GPIO_DIRCLR_PIN7_Msk   (0x1UL << GPIO_DIRCLR_PIN7_Pos)
 
#define GPIO_DIRCLR_PIN7_Input   (0UL)
 
#define GPIO_DIRCLR_PIN7_Output   (1UL)
 
#define GPIO_DIRCLR_PIN7_Clear   (1UL)
 
#define GPIO_DIRCLR_PIN6_Pos   (6UL)
 
#define GPIO_DIRCLR_PIN6_Msk   (0x1UL << GPIO_DIRCLR_PIN6_Pos)
 
#define GPIO_DIRCLR_PIN6_Input   (0UL)
 
#define GPIO_DIRCLR_PIN6_Output   (1UL)
 
#define GPIO_DIRCLR_PIN6_Clear   (1UL)
 
#define GPIO_DIRCLR_PIN5_Pos   (5UL)
 
#define GPIO_DIRCLR_PIN5_Msk   (0x1UL << GPIO_DIRCLR_PIN5_Pos)
 
#define GPIO_DIRCLR_PIN5_Input   (0UL)
 
#define GPIO_DIRCLR_PIN5_Output   (1UL)
 
#define GPIO_DIRCLR_PIN5_Clear   (1UL)
 
#define GPIO_DIRCLR_PIN4_Pos   (4UL)
 
#define GPIO_DIRCLR_PIN4_Msk   (0x1UL << GPIO_DIRCLR_PIN4_Pos)
 
#define GPIO_DIRCLR_PIN4_Input   (0UL)
 
#define GPIO_DIRCLR_PIN4_Output   (1UL)
 
#define GPIO_DIRCLR_PIN4_Clear   (1UL)
 
#define GPIO_DIRCLR_PIN3_Pos   (3UL)
 
#define GPIO_DIRCLR_PIN3_Msk   (0x1UL << GPIO_DIRCLR_PIN3_Pos)
 
#define GPIO_DIRCLR_PIN3_Input   (0UL)
 
#define GPIO_DIRCLR_PIN3_Output   (1UL)
 
#define GPIO_DIRCLR_PIN3_Clear   (1UL)
 
#define GPIO_DIRCLR_PIN2_Pos   (2UL)
 
#define GPIO_DIRCLR_PIN2_Msk   (0x1UL << GPIO_DIRCLR_PIN2_Pos)
 
#define GPIO_DIRCLR_PIN2_Input   (0UL)
 
#define GPIO_DIRCLR_PIN2_Output   (1UL)
 
#define GPIO_DIRCLR_PIN2_Clear   (1UL)
 
#define GPIO_DIRCLR_PIN1_Pos   (1UL)
 
#define GPIO_DIRCLR_PIN1_Msk   (0x1UL << GPIO_DIRCLR_PIN1_Pos)
 
#define GPIO_DIRCLR_PIN1_Input   (0UL)
 
#define GPIO_DIRCLR_PIN1_Output   (1UL)
 
#define GPIO_DIRCLR_PIN1_Clear   (1UL)
 
#define GPIO_DIRCLR_PIN0_Pos   (0UL)
 
#define GPIO_DIRCLR_PIN0_Msk   (0x1UL << GPIO_DIRCLR_PIN0_Pos)
 
#define GPIO_DIRCLR_PIN0_Input   (0UL)
 
#define GPIO_DIRCLR_PIN0_Output   (1UL)
 
#define GPIO_DIRCLR_PIN0_Clear   (1UL)
 
#define GPIO_LATCH_LATCH_Pos   (0UL)
 
#define GPIO_LATCH_LATCH_Msk   (0xFFFFFFFFUL << GPIO_LATCH_LATCH_Pos)
 
#define GPIO_DETECTMODE_DETECTMODE_Pos   (0UL)
 
#define GPIO_DETECTMODE_DETECTMODE_Msk   (0x1UL << GPIO_DETECTMODE_DETECTMODE_Pos)
 
#define GPIO_DETECTMODE_DETECTMODE_Default   (0UL)
 
#define GPIO_DETECTMODE_DETECTMODE_LDETECT   (1UL)
 
#define GPIO_PIN_CNF_SENSE_Pos   (16UL)
 
#define GPIO_PIN_CNF_SENSE_Msk   (0x3UL << GPIO_PIN_CNF_SENSE_Pos)
 
#define GPIO_PIN_CNF_SENSE_Disabled   (0UL)
 
#define GPIO_PIN_CNF_SENSE_High   (2UL)
 
#define GPIO_PIN_CNF_SENSE_Low   (3UL)
 
#define GPIO_PIN_CNF_DRIVE_Pos   (8UL)
 
#define GPIO_PIN_CNF_DRIVE_Msk   (0x7UL << GPIO_PIN_CNF_DRIVE_Pos)
 
#define GPIO_PIN_CNF_DRIVE_S0S1   (0UL)
 
#define GPIO_PIN_CNF_DRIVE_H0S1   (1UL)
 
#define GPIO_PIN_CNF_DRIVE_S0H1   (2UL)
 
#define GPIO_PIN_CNF_DRIVE_H0H1   (3UL)
 
#define GPIO_PIN_CNF_DRIVE_D0S1   (4UL)
 
#define GPIO_PIN_CNF_DRIVE_D0H1   (5UL)
 
#define GPIO_PIN_CNF_DRIVE_S0D1   (6UL)
 
#define GPIO_PIN_CNF_DRIVE_H0D1   (7UL)
 
#define GPIO_PIN_CNF_PULL_Pos   (2UL)
 
#define GPIO_PIN_CNF_PULL_Msk   (0x3UL << GPIO_PIN_CNF_PULL_Pos)
 
#define GPIO_PIN_CNF_PULL_Disabled   (0UL)
 
#define GPIO_PIN_CNF_PULL_Pulldown   (1UL)
 
#define GPIO_PIN_CNF_PULL_Pullup   (3UL)
 
#define GPIO_PIN_CNF_INPUT_Pos   (1UL)
 
#define GPIO_PIN_CNF_INPUT_Msk   (0x1UL << GPIO_PIN_CNF_INPUT_Pos)
 
#define GPIO_PIN_CNF_INPUT_Connect   (0UL)
 
#define GPIO_PIN_CNF_INPUT_Disconnect   (1UL)
 
#define GPIO_PIN_CNF_DIR_Pos   (0UL)
 
#define GPIO_PIN_CNF_DIR_Msk   (0x1UL << GPIO_PIN_CNF_DIR_Pos)
 
#define GPIO_PIN_CNF_DIR_Input   (0UL)
 
#define GPIO_PIN_CNF_DIR_Output   (1UL)
 
#define PDM_INTEN_END_Pos   (2UL)
 
#define PDM_INTEN_END_Msk   (0x1UL << PDM_INTEN_END_Pos)
 
#define PDM_INTEN_END_Disabled   (0UL)
 
#define PDM_INTEN_END_Enabled   (1UL)
 
#define PDM_INTEN_STOPPED_Pos   (1UL)
 
#define PDM_INTEN_STOPPED_Msk   (0x1UL << PDM_INTEN_STOPPED_Pos)
 
#define PDM_INTEN_STOPPED_Disabled   (0UL)
 
#define PDM_INTEN_STOPPED_Enabled   (1UL)
 
#define PDM_INTEN_STARTED_Pos   (0UL)
 
#define PDM_INTEN_STARTED_Msk   (0x1UL << PDM_INTEN_STARTED_Pos)
 
#define PDM_INTEN_STARTED_Disabled   (0UL)
 
#define PDM_INTEN_STARTED_Enabled   (1UL)
 
#define PDM_INTENSET_END_Pos   (2UL)
 
#define PDM_INTENSET_END_Msk   (0x1UL << PDM_INTENSET_END_Pos)
 
#define PDM_INTENSET_END_Disabled   (0UL)
 
#define PDM_INTENSET_END_Enabled   (1UL)
 
#define PDM_INTENSET_END_Set   (1UL)
 
#define PDM_INTENSET_STOPPED_Pos   (1UL)
 
#define PDM_INTENSET_STOPPED_Msk   (0x1UL << PDM_INTENSET_STOPPED_Pos)
 
#define PDM_INTENSET_STOPPED_Disabled   (0UL)
 
#define PDM_INTENSET_STOPPED_Enabled   (1UL)
 
#define PDM_INTENSET_STOPPED_Set   (1UL)
 
#define PDM_INTENSET_STARTED_Pos   (0UL)
 
#define PDM_INTENSET_STARTED_Msk   (0x1UL << PDM_INTENSET_STARTED_Pos)
 
#define PDM_INTENSET_STARTED_Disabled   (0UL)
 
#define PDM_INTENSET_STARTED_Enabled   (1UL)
 
#define PDM_INTENSET_STARTED_Set   (1UL)
 
#define PDM_INTENCLR_END_Pos   (2UL)
 
#define PDM_INTENCLR_END_Msk   (0x1UL << PDM_INTENCLR_END_Pos)
 
#define PDM_INTENCLR_END_Disabled   (0UL)
 
#define PDM_INTENCLR_END_Enabled   (1UL)
 
#define PDM_INTENCLR_END_Clear   (1UL)
 
#define PDM_INTENCLR_STOPPED_Pos   (1UL)
 
#define PDM_INTENCLR_STOPPED_Msk   (0x1UL << PDM_INTENCLR_STOPPED_Pos)
 
#define PDM_INTENCLR_STOPPED_Disabled   (0UL)
 
#define PDM_INTENCLR_STOPPED_Enabled   (1UL)
 
#define PDM_INTENCLR_STOPPED_Clear   (1UL)
 
#define PDM_INTENCLR_STARTED_Pos   (0UL)
 
#define PDM_INTENCLR_STARTED_Msk   (0x1UL << PDM_INTENCLR_STARTED_Pos)
 
#define PDM_INTENCLR_STARTED_Disabled   (0UL)
 
#define PDM_INTENCLR_STARTED_Enabled   (1UL)
 
#define PDM_INTENCLR_STARTED_Clear   (1UL)
 
#define PDM_ENABLE_ENABLE_Pos   (0UL)
 
#define PDM_ENABLE_ENABLE_Msk   (0x1UL << PDM_ENABLE_ENABLE_Pos)
 
#define PDM_ENABLE_ENABLE_Disabled   (0UL)
 
#define PDM_ENABLE_ENABLE_Enabled   (1UL)
 
#define PDM_PDMCLKCTRL_FREQ_Pos   (0UL)
 
#define PDM_PDMCLKCTRL_FREQ_Msk   (0xFFFFFFFFUL << PDM_PDMCLKCTRL_FREQ_Pos)
 
#define PDM_PDMCLKCTRL_FREQ_1000K   (0x08000000UL)
 
#define PDM_PDMCLKCTRL_FREQ_1024K   (0x08400000UL)
 
#define PDM_PDMCLKCTRL_FREQ_1067K   (0x08800000UL)
 
#define PDM_MODE_EDGE_Pos   (1UL)
 
#define PDM_MODE_EDGE_Msk   (0x1UL << PDM_MODE_EDGE_Pos)
 
#define PDM_MODE_EDGE_LeftFalling   (0UL)
 
#define PDM_MODE_EDGE_LeftRising   (1UL)
 
#define PDM_MODE_MONO_Pos   (0UL)
 
#define PDM_MODE_MONO_Msk   (0x1UL << PDM_MODE_MONO_Pos)
 
#define PDM_MODE_MONO_Stereo   (0UL)
 
#define PDM_MODE_MONO_Mono   (1UL)
 
#define PDM_GAINL_GAINL_Pos   (0UL)
 
#define PDM_GAINL_GAINL_Msk   (0x7FUL << PDM_GAINL_GAINL_Pos)
 
#define PDM_GAINL_GAINL_MinGain   (0x00UL)
 
#define PDM_GAINL_GAINL_DefaultGain   (0x28UL)
 
#define PDM_GAINL_GAINL_MaxGain   (0x50UL)
 
#define PDM_GAINR_GAINR_Pos   (0UL)
 
#define PDM_GAINR_GAINR_Msk   (0xFFUL << PDM_GAINR_GAINR_Pos)
 
#define PDM_GAINR_GAINR_MinGain   (0x00UL)
 
#define PDM_GAINR_GAINR_DefaultGain   (0x28UL)
 
#define PDM_GAINR_GAINR_MaxGain   (0x50UL)
 
#define PDM_PSEL_CLK_CONNECT_Pos   (31UL)
 
#define PDM_PSEL_CLK_CONNECT_Msk   (0x1UL << PDM_PSEL_CLK_CONNECT_Pos)
 
#define PDM_PSEL_CLK_CONNECT_Connected   (0UL)
 
#define PDM_PSEL_CLK_CONNECT_Disconnected   (1UL)
 
#define PDM_PSEL_CLK_PIN_Pos   (0UL)
 
#define PDM_PSEL_CLK_PIN_Msk   (0x1FUL << PDM_PSEL_CLK_PIN_Pos)
 
#define PDM_PSEL_DIN_CONNECT_Pos   (31UL)
 
#define PDM_PSEL_DIN_CONNECT_Msk   (0x1UL << PDM_PSEL_DIN_CONNECT_Pos)
 
#define PDM_PSEL_DIN_CONNECT_Connected   (0UL)
 
#define PDM_PSEL_DIN_CONNECT_Disconnected   (1UL)
 
#define PDM_PSEL_DIN_PIN_Pos   (0UL)
 
#define PDM_PSEL_DIN_PIN_Msk   (0x1FUL << PDM_PSEL_DIN_PIN_Pos)
 
#define PDM_SAMPLE_PTR_SAMPLEPTR_Pos   (0UL)
 
#define PDM_SAMPLE_PTR_SAMPLEPTR_Msk   (0xFFFFFFFFUL << PDM_SAMPLE_PTR_SAMPLEPTR_Pos)
 
#define PDM_SAMPLE_MAXCNT_BUFFSIZE_Pos   (0UL)
 
#define PDM_SAMPLE_MAXCNT_BUFFSIZE_Msk   (0x7FFFUL << PDM_SAMPLE_MAXCNT_BUFFSIZE_Pos)
 
#define POWER_INTENSET_SLEEPEXIT_Pos   (6UL)
 
#define POWER_INTENSET_SLEEPEXIT_Msk   (0x1UL << POWER_INTENSET_SLEEPEXIT_Pos)
 
#define POWER_INTENSET_SLEEPEXIT_Disabled   (0UL)
 
#define POWER_INTENSET_SLEEPEXIT_Enabled   (1UL)
 
#define POWER_INTENSET_SLEEPEXIT_Set   (1UL)
 
#define POWER_INTENSET_SLEEPENTER_Pos   (5UL)
 
#define POWER_INTENSET_SLEEPENTER_Msk   (0x1UL << POWER_INTENSET_SLEEPENTER_Pos)
 
#define POWER_INTENSET_SLEEPENTER_Disabled   (0UL)
 
#define POWER_INTENSET_SLEEPENTER_Enabled   (1UL)
 
#define POWER_INTENSET_SLEEPENTER_Set   (1UL)
 
#define POWER_INTENSET_POFWARN_Pos   (2UL)
 
#define POWER_INTENSET_POFWARN_Msk   (0x1UL << POWER_INTENSET_POFWARN_Pos)
 
#define POWER_INTENSET_POFWARN_Disabled   (0UL)
 
#define POWER_INTENSET_POFWARN_Enabled   (1UL)
 
#define POWER_INTENSET_POFWARN_Set   (1UL)
 
#define POWER_INTENCLR_SLEEPEXIT_Pos   (6UL)
 
#define POWER_INTENCLR_SLEEPEXIT_Msk   (0x1UL << POWER_INTENCLR_SLEEPEXIT_Pos)
 
#define POWER_INTENCLR_SLEEPEXIT_Disabled   (0UL)
 
#define POWER_INTENCLR_SLEEPEXIT_Enabled   (1UL)
 
#define POWER_INTENCLR_SLEEPEXIT_Clear   (1UL)
 
#define POWER_INTENCLR_SLEEPENTER_Pos   (5UL)
 
#define POWER_INTENCLR_SLEEPENTER_Msk   (0x1UL << POWER_INTENCLR_SLEEPENTER_Pos)
 
#define POWER_INTENCLR_SLEEPENTER_Disabled   (0UL)
 
#define POWER_INTENCLR_SLEEPENTER_Enabled   (1UL)
 
#define POWER_INTENCLR_SLEEPENTER_Clear   (1UL)
 
#define POWER_INTENCLR_POFWARN_Pos   (2UL)
 
#define POWER_INTENCLR_POFWARN_Msk   (0x1UL << POWER_INTENCLR_POFWARN_Pos)
 
#define POWER_INTENCLR_POFWARN_Disabled   (0UL)
 
#define POWER_INTENCLR_POFWARN_Enabled   (1UL)
 
#define POWER_INTENCLR_POFWARN_Clear   (1UL)
 
#define POWER_RESETREAS_NFC_Pos   (19UL)
 
#define POWER_RESETREAS_NFC_Msk   (0x1UL << POWER_RESETREAS_NFC_Pos)
 
#define POWER_RESETREAS_NFC_NotDetected   (0UL)
 
#define POWER_RESETREAS_NFC_Detected   (1UL)
 
#define POWER_RESETREAS_DIF_Pos   (18UL)
 
#define POWER_RESETREAS_DIF_Msk   (0x1UL << POWER_RESETREAS_DIF_Pos)
 
#define POWER_RESETREAS_DIF_NotDetected   (0UL)
 
#define POWER_RESETREAS_DIF_Detected   (1UL)
 
#define POWER_RESETREAS_LPCOMP_Pos   (17UL)
 
#define POWER_RESETREAS_LPCOMP_Msk   (0x1UL << POWER_RESETREAS_LPCOMP_Pos)
 
#define POWER_RESETREAS_LPCOMP_NotDetected   (0UL)
 
#define POWER_RESETREAS_LPCOMP_Detected   (1UL)
 
#define POWER_RESETREAS_OFF_Pos   (16UL)
 
#define POWER_RESETREAS_OFF_Msk   (0x1UL << POWER_RESETREAS_OFF_Pos)
 
#define POWER_RESETREAS_OFF_NotDetected   (0UL)
 
#define POWER_RESETREAS_OFF_Detected   (1UL)
 
#define POWER_RESETREAS_LOCKUP_Pos   (3UL)
 
#define POWER_RESETREAS_LOCKUP_Msk   (0x1UL << POWER_RESETREAS_LOCKUP_Pos)
 
#define POWER_RESETREAS_LOCKUP_NotDetected   (0UL)
 
#define POWER_RESETREAS_LOCKUP_Detected   (1UL)
 
#define POWER_RESETREAS_SREQ_Pos   (2UL)
 
#define POWER_RESETREAS_SREQ_Msk   (0x1UL << POWER_RESETREAS_SREQ_Pos)
 
#define POWER_RESETREAS_SREQ_NotDetected   (0UL)
 
#define POWER_RESETREAS_SREQ_Detected   (1UL)
 
#define POWER_RESETREAS_DOG_Pos   (1UL)
 
#define POWER_RESETREAS_DOG_Msk   (0x1UL << POWER_RESETREAS_DOG_Pos)
 
#define POWER_RESETREAS_DOG_NotDetected   (0UL)
 
#define POWER_RESETREAS_DOG_Detected   (1UL)
 
#define POWER_RESETREAS_RESETPIN_Pos   (0UL)
 
#define POWER_RESETREAS_RESETPIN_Msk   (0x1UL << POWER_RESETREAS_RESETPIN_Pos)
 
#define POWER_RESETREAS_RESETPIN_NotDetected   (0UL)
 
#define POWER_RESETREAS_RESETPIN_Detected   (1UL)
 
#define POWER_RAMSTATUS_RAMBLOCK3_Pos   (3UL)
 
#define POWER_RAMSTATUS_RAMBLOCK3_Msk   (0x1UL << POWER_RAMSTATUS_RAMBLOCK3_Pos)
 
#define POWER_RAMSTATUS_RAMBLOCK3_Off   (0UL)
 
#define POWER_RAMSTATUS_RAMBLOCK3_On   (1UL)
 
#define POWER_RAMSTATUS_RAMBLOCK2_Pos   (2UL)
 
#define POWER_RAMSTATUS_RAMBLOCK2_Msk   (0x1UL << POWER_RAMSTATUS_RAMBLOCK2_Pos)
 
#define POWER_RAMSTATUS_RAMBLOCK2_Off   (0UL)
 
#define POWER_RAMSTATUS_RAMBLOCK2_On   (1UL)
 
#define POWER_RAMSTATUS_RAMBLOCK1_Pos   (1UL)
 
#define POWER_RAMSTATUS_RAMBLOCK1_Msk   (0x1UL << POWER_RAMSTATUS_RAMBLOCK1_Pos)
 
#define POWER_RAMSTATUS_RAMBLOCK1_Off   (0UL)
 
#define POWER_RAMSTATUS_RAMBLOCK1_On   (1UL)
 
#define POWER_RAMSTATUS_RAMBLOCK0_Pos   (0UL)
 
#define POWER_RAMSTATUS_RAMBLOCK0_Msk   (0x1UL << POWER_RAMSTATUS_RAMBLOCK0_Pos)
 
#define POWER_RAMSTATUS_RAMBLOCK0_Off   (0UL)
 
#define POWER_RAMSTATUS_RAMBLOCK0_On   (1UL)
 
#define POWER_SYSTEMOFF_SYSTEMOFF_Pos   (0UL)
 
#define POWER_SYSTEMOFF_SYSTEMOFF_Msk   (0x1UL << POWER_SYSTEMOFF_SYSTEMOFF_Pos)
 
#define POWER_SYSTEMOFF_SYSTEMOFF_Enter   (1UL)
 
#define POWER_POFCON_THRESHOLD_Pos   (1UL)
 
#define POWER_POFCON_THRESHOLD_Msk   (0xFUL << POWER_POFCON_THRESHOLD_Pos)
 
#define POWER_POFCON_THRESHOLD_V19   (6UL)
 
#define POWER_POFCON_THRESHOLD_V20   (7UL)
 
#define POWER_POFCON_THRESHOLD_V21   (8UL)
 
#define POWER_POFCON_THRESHOLD_V22   (9UL)
 
#define POWER_POFCON_THRESHOLD_V23   (10UL)
 
#define POWER_POFCON_THRESHOLD_V24   (11UL)
 
#define POWER_POFCON_THRESHOLD_V27   (14UL)
 
#define POWER_POFCON_THRESHOLD_V28   (15UL)
 
#define POWER_POFCON_POF_Pos   (0UL)
 
#define POWER_POFCON_POF_Msk   (0x1UL << POWER_POFCON_POF_Pos)
 
#define POWER_POFCON_POF_Disabled   (0UL)
 
#define POWER_POFCON_POF_Enabled   (1UL)
 
#define POWER_GPREGRET_GPREGRET_Pos   (0UL)
 
#define POWER_GPREGRET_GPREGRET_Msk   (0xFFUL << POWER_GPREGRET_GPREGRET_Pos)
 
#define POWER_GPREGRET2_GPREGRET_Pos   (0UL)
 
#define POWER_GPREGRET2_GPREGRET_Msk   (0xFFUL << POWER_GPREGRET2_GPREGRET_Pos)
 
#define POWER_RAMON_OFFRAM1_Pos   (17UL)
 
#define POWER_RAMON_OFFRAM1_Msk   (0x1UL << POWER_RAMON_OFFRAM1_Pos)
 
#define POWER_RAMON_OFFRAM1_RAM1Off   (0UL)
 
#define POWER_RAMON_OFFRAM1_RAM1On   (1UL)
 
#define POWER_RAMON_OFFRAM0_Pos   (16UL)
 
#define POWER_RAMON_OFFRAM0_Msk   (0x1UL << POWER_RAMON_OFFRAM0_Pos)
 
#define POWER_RAMON_OFFRAM0_RAM0Off   (0UL)
 
#define POWER_RAMON_OFFRAM0_RAM0On   (1UL)
 
#define POWER_RAMON_ONRAM1_Pos   (1UL)
 
#define POWER_RAMON_ONRAM1_Msk   (0x1UL << POWER_RAMON_ONRAM1_Pos)
 
#define POWER_RAMON_ONRAM1_RAM1Off   (0UL)
 
#define POWER_RAMON_ONRAM1_RAM1On   (1UL)
 
#define POWER_RAMON_ONRAM0_Pos   (0UL)
 
#define POWER_RAMON_ONRAM0_Msk   (0x1UL << POWER_RAMON_ONRAM0_Pos)
 
#define POWER_RAMON_ONRAM0_RAM0Off   (0UL)
 
#define POWER_RAMON_ONRAM0_RAM0On   (1UL)
 
#define POWER_RAMONB_OFFRAM3_Pos   (17UL)
 
#define POWER_RAMONB_OFFRAM3_Msk   (0x1UL << POWER_RAMONB_OFFRAM3_Pos)
 
#define POWER_RAMONB_OFFRAM3_RAM3Off   (0UL)
 
#define POWER_RAMONB_OFFRAM3_RAM3On   (1UL)
 
#define POWER_RAMONB_OFFRAM2_Pos   (16UL)
 
#define POWER_RAMONB_OFFRAM2_Msk   (0x1UL << POWER_RAMONB_OFFRAM2_Pos)
 
#define POWER_RAMONB_OFFRAM2_RAM2Off   (0UL)
 
#define POWER_RAMONB_OFFRAM2_RAM2On   (1UL)
 
#define POWER_RAMONB_ONRAM3_Pos   (1UL)
 
#define POWER_RAMONB_ONRAM3_Msk   (0x1UL << POWER_RAMONB_ONRAM3_Pos)
 
#define POWER_RAMONB_ONRAM3_RAM3Off   (0UL)
 
#define POWER_RAMONB_ONRAM3_RAM3On   (1UL)
 
#define POWER_RAMONB_ONRAM2_Pos   (0UL)
 
#define POWER_RAMONB_ONRAM2_Msk   (0x1UL << POWER_RAMONB_ONRAM2_Pos)
 
#define POWER_RAMONB_ONRAM2_RAM2Off   (0UL)
 
#define POWER_RAMONB_ONRAM2_RAM2On   (1UL)
 
#define POWER_DCDCEN_DCDCEN_Pos   (0UL)
 
#define POWER_DCDCEN_DCDCEN_Msk   (0x1UL << POWER_DCDCEN_DCDCEN_Pos)
 
#define POWER_DCDCEN_DCDCEN_Disabled   (0UL)
 
#define POWER_DCDCEN_DCDCEN_Enabled   (1UL)
 
#define POWER_RAM_POWER_S1RETENTION_Pos   (17UL)
 
#define POWER_RAM_POWER_S1RETENTION_Msk   (0x1UL << POWER_RAM_POWER_S1RETENTION_Pos)
 
#define POWER_RAM_POWER_S1RETENTION_Off   (0UL)
 
#define POWER_RAM_POWER_S1RETENTION_On   (1UL)
 
#define POWER_RAM_POWER_S0RETENTION_Pos   (16UL)
 
#define POWER_RAM_POWER_S0RETENTION_Msk   (0x1UL << POWER_RAM_POWER_S0RETENTION_Pos)
 
#define POWER_RAM_POWER_S0RETENTION_Off   (0UL)
 
#define POWER_RAM_POWER_S0RETENTION_On   (1UL)
 
#define POWER_RAM_POWER_S1POWER_Pos   (1UL)
 
#define POWER_RAM_POWER_S1POWER_Msk   (0x1UL << POWER_RAM_POWER_S1POWER_Pos)
 
#define POWER_RAM_POWER_S1POWER_Off   (0UL)
 
#define POWER_RAM_POWER_S1POWER_On   (1UL)
 
#define POWER_RAM_POWER_S0POWER_Pos   (0UL)
 
#define POWER_RAM_POWER_S0POWER_Msk   (0x1UL << POWER_RAM_POWER_S0POWER_Pos)
 
#define POWER_RAM_POWER_S0POWER_Off   (0UL)
 
#define POWER_RAM_POWER_S0POWER_On   (1UL)
 
#define POWER_RAM_POWERSET_S1RETENTION_Pos   (17UL)
 
#define POWER_RAM_POWERSET_S1RETENTION_Msk   (0x1UL << POWER_RAM_POWERSET_S1RETENTION_Pos)
 
#define POWER_RAM_POWERSET_S1RETENTION_On   (1UL)
 
#define POWER_RAM_POWERSET_S0RETENTION_Pos   (16UL)
 
#define POWER_RAM_POWERSET_S0RETENTION_Msk   (0x1UL << POWER_RAM_POWERSET_S0RETENTION_Pos)
 
#define POWER_RAM_POWERSET_S0RETENTION_On   (1UL)
 
#define POWER_RAM_POWERSET_S1POWER_Pos   (1UL)
 
#define POWER_RAM_POWERSET_S1POWER_Msk   (0x1UL << POWER_RAM_POWERSET_S1POWER_Pos)
 
#define POWER_RAM_POWERSET_S1POWER_On   (1UL)
 
#define POWER_RAM_POWERSET_S0POWER_Pos   (0UL)
 
#define POWER_RAM_POWERSET_S0POWER_Msk   (0x1UL << POWER_RAM_POWERSET_S0POWER_Pos)
 
#define POWER_RAM_POWERSET_S0POWER_On   (1UL)
 
#define POWER_RAM_POWERCLR_S1RETENTION_Pos   (17UL)
 
#define POWER_RAM_POWERCLR_S1RETENTION_Msk   (0x1UL << POWER_RAM_POWERCLR_S1RETENTION_Pos)
 
#define POWER_RAM_POWERCLR_S1RETENTION_Off   (1UL)
 
#define POWER_RAM_POWERCLR_S0RETENTION_Pos   (16UL)
 
#define POWER_RAM_POWERCLR_S0RETENTION_Msk   (0x1UL << POWER_RAM_POWERCLR_S0RETENTION_Pos)
 
#define POWER_RAM_POWERCLR_S0RETENTION_Off   (1UL)
 
#define POWER_RAM_POWERCLR_S1POWER_Pos   (1UL)
 
#define POWER_RAM_POWERCLR_S1POWER_Msk   (0x1UL << POWER_RAM_POWERCLR_S1POWER_Pos)
 
#define POWER_RAM_POWERCLR_S1POWER_Off   (1UL)
 
#define POWER_RAM_POWERCLR_S0POWER_Pos   (0UL)
 
#define POWER_RAM_POWERCLR_S0POWER_Msk   (0x1UL << POWER_RAM_POWERCLR_S0POWER_Pos)
 
#define POWER_RAM_POWERCLR_S0POWER_Off   (1UL)
 
#define PPI_CHEN_CH31_Pos   (31UL)
 
#define PPI_CHEN_CH31_Msk   (0x1UL << PPI_CHEN_CH31_Pos)
 
#define PPI_CHEN_CH31_Disabled   (0UL)
 
#define PPI_CHEN_CH31_Enabled   (1UL)
 
#define PPI_CHEN_CH30_Pos   (30UL)
 
#define PPI_CHEN_CH30_Msk   (0x1UL << PPI_CHEN_CH30_Pos)
 
#define PPI_CHEN_CH30_Disabled   (0UL)
 
#define PPI_CHEN_CH30_Enabled   (1UL)
 
#define PPI_CHEN_CH29_Pos   (29UL)
 
#define PPI_CHEN_CH29_Msk   (0x1UL << PPI_CHEN_CH29_Pos)
 
#define PPI_CHEN_CH29_Disabled   (0UL)
 
#define PPI_CHEN_CH29_Enabled   (1UL)
 
#define PPI_CHEN_CH28_Pos   (28UL)
 
#define PPI_CHEN_CH28_Msk   (0x1UL << PPI_CHEN_CH28_Pos)
 
#define PPI_CHEN_CH28_Disabled   (0UL)
 
#define PPI_CHEN_CH28_Enabled   (1UL)
 
#define PPI_CHEN_CH27_Pos   (27UL)
 
#define PPI_CHEN_CH27_Msk   (0x1UL << PPI_CHEN_CH27_Pos)
 
#define PPI_CHEN_CH27_Disabled   (0UL)
 
#define PPI_CHEN_CH27_Enabled   (1UL)
 
#define PPI_CHEN_CH26_Pos   (26UL)
 
#define PPI_CHEN_CH26_Msk   (0x1UL << PPI_CHEN_CH26_Pos)
 
#define PPI_CHEN_CH26_Disabled   (0UL)
 
#define PPI_CHEN_CH26_Enabled   (1UL)
 
#define PPI_CHEN_CH25_Pos   (25UL)
 
#define PPI_CHEN_CH25_Msk   (0x1UL << PPI_CHEN_CH25_Pos)
 
#define PPI_CHEN_CH25_Disabled   (0UL)
 
#define PPI_CHEN_CH25_Enabled   (1UL)
 
#define PPI_CHEN_CH24_Pos   (24UL)
 
#define PPI_CHEN_CH24_Msk   (0x1UL << PPI_CHEN_CH24_Pos)
 
#define PPI_CHEN_CH24_Disabled   (0UL)
 
#define PPI_CHEN_CH24_Enabled   (1UL)
 
#define PPI_CHEN_CH23_Pos   (23UL)
 
#define PPI_CHEN_CH23_Msk   (0x1UL << PPI_CHEN_CH23_Pos)
 
#define PPI_CHEN_CH23_Disabled   (0UL)
 
#define PPI_CHEN_CH23_Enabled   (1UL)
 
#define PPI_CHEN_CH22_Pos   (22UL)
 
#define PPI_CHEN_CH22_Msk   (0x1UL << PPI_CHEN_CH22_Pos)
 
#define PPI_CHEN_CH22_Disabled   (0UL)
 
#define PPI_CHEN_CH22_Enabled   (1UL)
 
#define PPI_CHEN_CH21_Pos   (21UL)
 
#define PPI_CHEN_CH21_Msk   (0x1UL << PPI_CHEN_CH21_Pos)
 
#define PPI_CHEN_CH21_Disabled   (0UL)
 
#define PPI_CHEN_CH21_Enabled   (1UL)
 
#define PPI_CHEN_CH20_Pos   (20UL)
 
#define PPI_CHEN_CH20_Msk   (0x1UL << PPI_CHEN_CH20_Pos)
 
#define PPI_CHEN_CH20_Disabled   (0UL)
 
#define PPI_CHEN_CH20_Enabled   (1UL)
 
#define PPI_CHEN_CH19_Pos   (19UL)
 
#define PPI_CHEN_CH19_Msk   (0x1UL << PPI_CHEN_CH19_Pos)
 
#define PPI_CHEN_CH19_Disabled   (0UL)
 
#define PPI_CHEN_CH19_Enabled   (1UL)
 
#define PPI_CHEN_CH18_Pos   (18UL)
 
#define PPI_CHEN_CH18_Msk   (0x1UL << PPI_CHEN_CH18_Pos)
 
#define PPI_CHEN_CH18_Disabled   (0UL)
 
#define PPI_CHEN_CH18_Enabled   (1UL)
 
#define PPI_CHEN_CH17_Pos   (17UL)
 
#define PPI_CHEN_CH17_Msk   (0x1UL << PPI_CHEN_CH17_Pos)
 
#define PPI_CHEN_CH17_Disabled   (0UL)
 
#define PPI_CHEN_CH17_Enabled   (1UL)
 
#define PPI_CHEN_CH16_Pos   (16UL)
 
#define PPI_CHEN_CH16_Msk   (0x1UL << PPI_CHEN_CH16_Pos)
 
#define PPI_CHEN_CH16_Disabled   (0UL)
 
#define PPI_CHEN_CH16_Enabled   (1UL)
 
#define PPI_CHEN_CH15_Pos   (15UL)
 
#define PPI_CHEN_CH15_Msk   (0x1UL << PPI_CHEN_CH15_Pos)
 
#define PPI_CHEN_CH15_Disabled   (0UL)
 
#define PPI_CHEN_CH15_Enabled   (1UL)
 
#define PPI_CHEN_CH14_Pos   (14UL)
 
#define PPI_CHEN_CH14_Msk   (0x1UL << PPI_CHEN_CH14_Pos)
 
#define PPI_CHEN_CH14_Disabled   (0UL)
 
#define PPI_CHEN_CH14_Enabled   (1UL)
 
#define PPI_CHEN_CH13_Pos   (13UL)
 
#define PPI_CHEN_CH13_Msk   (0x1UL << PPI_CHEN_CH13_Pos)
 
#define PPI_CHEN_CH13_Disabled   (0UL)
 
#define PPI_CHEN_CH13_Enabled   (1UL)
 
#define PPI_CHEN_CH12_Pos   (12UL)
 
#define PPI_CHEN_CH12_Msk   (0x1UL << PPI_CHEN_CH12_Pos)
 
#define PPI_CHEN_CH12_Disabled   (0UL)
 
#define PPI_CHEN_CH12_Enabled   (1UL)
 
#define PPI_CHEN_CH11_Pos   (11UL)
 
#define PPI_CHEN_CH11_Msk   (0x1UL << PPI_CHEN_CH11_Pos)
 
#define PPI_CHEN_CH11_Disabled   (0UL)
 
#define PPI_CHEN_CH11_Enabled   (1UL)
 
#define PPI_CHEN_CH10_Pos   (10UL)
 
#define PPI_CHEN_CH10_Msk   (0x1UL << PPI_CHEN_CH10_Pos)
 
#define PPI_CHEN_CH10_Disabled   (0UL)
 
#define PPI_CHEN_CH10_Enabled   (1UL)
 
#define PPI_CHEN_CH9_Pos   (9UL)
 
#define PPI_CHEN_CH9_Msk   (0x1UL << PPI_CHEN_CH9_Pos)
 
#define PPI_CHEN_CH9_Disabled   (0UL)
 
#define PPI_CHEN_CH9_Enabled   (1UL)
 
#define PPI_CHEN_CH8_Pos   (8UL)
 
#define PPI_CHEN_CH8_Msk   (0x1UL << PPI_CHEN_CH8_Pos)
 
#define PPI_CHEN_CH8_Disabled   (0UL)
 
#define PPI_CHEN_CH8_Enabled   (1UL)
 
#define PPI_CHEN_CH7_Pos   (7UL)
 
#define PPI_CHEN_CH7_Msk   (0x1UL << PPI_CHEN_CH7_Pos)
 
#define PPI_CHEN_CH7_Disabled   (0UL)
 
#define PPI_CHEN_CH7_Enabled   (1UL)
 
#define PPI_CHEN_CH6_Pos   (6UL)
 
#define PPI_CHEN_CH6_Msk   (0x1UL << PPI_CHEN_CH6_Pos)
 
#define PPI_CHEN_CH6_Disabled   (0UL)
 
#define PPI_CHEN_CH6_Enabled   (1UL)
 
#define PPI_CHEN_CH5_Pos   (5UL)
 
#define PPI_CHEN_CH5_Msk   (0x1UL << PPI_CHEN_CH5_Pos)
 
#define PPI_CHEN_CH5_Disabled   (0UL)
 
#define PPI_CHEN_CH5_Enabled   (1UL)
 
#define PPI_CHEN_CH4_Pos   (4UL)
 
#define PPI_CHEN_CH4_Msk   (0x1UL << PPI_CHEN_CH4_Pos)
 
#define PPI_CHEN_CH4_Disabled   (0UL)
 
#define PPI_CHEN_CH4_Enabled   (1UL)
 
#define PPI_CHEN_CH3_Pos   (3UL)
 
#define PPI_CHEN_CH3_Msk   (0x1UL << PPI_CHEN_CH3_Pos)
 
#define PPI_CHEN_CH3_Disabled   (0UL)
 
#define PPI_CHEN_CH3_Enabled   (1UL)
 
#define PPI_CHEN_CH2_Pos   (2UL)
 
#define PPI_CHEN_CH2_Msk   (0x1UL << PPI_CHEN_CH2_Pos)
 
#define PPI_CHEN_CH2_Disabled   (0UL)
 
#define PPI_CHEN_CH2_Enabled   (1UL)
 
#define PPI_CHEN_CH1_Pos   (1UL)
 
#define PPI_CHEN_CH1_Msk   (0x1UL << PPI_CHEN_CH1_Pos)
 
#define PPI_CHEN_CH1_Disabled   (0UL)
 
#define PPI_CHEN_CH1_Enabled   (1UL)
 
#define PPI_CHEN_CH0_Pos   (0UL)
 
#define PPI_CHEN_CH0_Msk   (0x1UL << PPI_CHEN_CH0_Pos)
 
#define PPI_CHEN_CH0_Disabled   (0UL)
 
#define PPI_CHEN_CH0_Enabled   (1UL)
 
#define PPI_CHENSET_CH31_Pos   (31UL)
 
#define PPI_CHENSET_CH31_Msk   (0x1UL << PPI_CHENSET_CH31_Pos)
 
#define PPI_CHENSET_CH31_Disabled   (0UL)
 
#define PPI_CHENSET_CH31_Enabled   (1UL)
 
#define PPI_CHENSET_CH31_Set   (1UL)
 
#define PPI_CHENSET_CH30_Pos   (30UL)
 
#define PPI_CHENSET_CH30_Msk   (0x1UL << PPI_CHENSET_CH30_Pos)
 
#define PPI_CHENSET_CH30_Disabled   (0UL)
 
#define PPI_CHENSET_CH30_Enabled   (1UL)
 
#define PPI_CHENSET_CH30_Set   (1UL)
 
#define PPI_CHENSET_CH29_Pos   (29UL)
 
#define PPI_CHENSET_CH29_Msk   (0x1UL << PPI_CHENSET_CH29_Pos)
 
#define PPI_CHENSET_CH29_Disabled   (0UL)
 
#define PPI_CHENSET_CH29_Enabled   (1UL)
 
#define PPI_CHENSET_CH29_Set   (1UL)
 
#define PPI_CHENSET_CH28_Pos   (28UL)
 
#define PPI_CHENSET_CH28_Msk   (0x1UL << PPI_CHENSET_CH28_Pos)
 
#define PPI_CHENSET_CH28_Disabled   (0UL)
 
#define PPI_CHENSET_CH28_Enabled   (1UL)
 
#define PPI_CHENSET_CH28_Set   (1UL)
 
#define PPI_CHENSET_CH27_Pos   (27UL)
 
#define PPI_CHENSET_CH27_Msk   (0x1UL << PPI_CHENSET_CH27_Pos)
 
#define PPI_CHENSET_CH27_Disabled   (0UL)
 
#define PPI_CHENSET_CH27_Enabled   (1UL)
 
#define PPI_CHENSET_CH27_Set   (1UL)
 
#define PPI_CHENSET_CH26_Pos   (26UL)
 
#define PPI_CHENSET_CH26_Msk   (0x1UL << PPI_CHENSET_CH26_Pos)
 
#define PPI_CHENSET_CH26_Disabled   (0UL)
 
#define PPI_CHENSET_CH26_Enabled   (1UL)
 
#define PPI_CHENSET_CH26_Set   (1UL)
 
#define PPI_CHENSET_CH25_Pos   (25UL)
 
#define PPI_CHENSET_CH25_Msk   (0x1UL << PPI_CHENSET_CH25_Pos)
 
#define PPI_CHENSET_CH25_Disabled   (0UL)
 
#define PPI_CHENSET_CH25_Enabled   (1UL)
 
#define PPI_CHENSET_CH25_Set   (1UL)
 
#define PPI_CHENSET_CH24_Pos   (24UL)
 
#define PPI_CHENSET_CH24_Msk   (0x1UL << PPI_CHENSET_CH24_Pos)
 
#define PPI_CHENSET_CH24_Disabled   (0UL)
 
#define PPI_CHENSET_CH24_Enabled   (1UL)
 
#define PPI_CHENSET_CH24_Set   (1UL)
 
#define PPI_CHENSET_CH23_Pos   (23UL)
 
#define PPI_CHENSET_CH23_Msk   (0x1UL << PPI_CHENSET_CH23_Pos)
 
#define PPI_CHENSET_CH23_Disabled   (0UL)
 
#define PPI_CHENSET_CH23_Enabled   (1UL)
 
#define PPI_CHENSET_CH23_Set   (1UL)
 
#define PPI_CHENSET_CH22_Pos   (22UL)
 
#define PPI_CHENSET_CH22_Msk   (0x1UL << PPI_CHENSET_CH22_Pos)
 
#define PPI_CHENSET_CH22_Disabled   (0UL)
 
#define PPI_CHENSET_CH22_Enabled   (1UL)
 
#define PPI_CHENSET_CH22_Set   (1UL)
 
#define PPI_CHENSET_CH21_Pos   (21UL)
 
#define PPI_CHENSET_CH21_Msk   (0x1UL << PPI_CHENSET_CH21_Pos)
 
#define PPI_CHENSET_CH21_Disabled   (0UL)
 
#define PPI_CHENSET_CH21_Enabled   (1UL)
 
#define PPI_CHENSET_CH21_Set   (1UL)
 
#define PPI_CHENSET_CH20_Pos   (20UL)
 
#define PPI_CHENSET_CH20_Msk   (0x1UL << PPI_CHENSET_CH20_Pos)
 
#define PPI_CHENSET_CH20_Disabled   (0UL)
 
#define PPI_CHENSET_CH20_Enabled   (1UL)
 
#define PPI_CHENSET_CH20_Set   (1UL)
 
#define PPI_CHENSET_CH19_Pos   (19UL)
 
#define PPI_CHENSET_CH19_Msk   (0x1UL << PPI_CHENSET_CH19_Pos)
 
#define PPI_CHENSET_CH19_Disabled   (0UL)
 
#define PPI_CHENSET_CH19_Enabled   (1UL)
 
#define PPI_CHENSET_CH19_Set   (1UL)
 
#define PPI_CHENSET_CH18_Pos   (18UL)
 
#define PPI_CHENSET_CH18_Msk   (0x1UL << PPI_CHENSET_CH18_Pos)
 
#define PPI_CHENSET_CH18_Disabled   (0UL)
 
#define PPI_CHENSET_CH18_Enabled   (1UL)
 
#define PPI_CHENSET_CH18_Set   (1UL)
 
#define PPI_CHENSET_CH17_Pos   (17UL)
 
#define PPI_CHENSET_CH17_Msk   (0x1UL << PPI_CHENSET_CH17_Pos)
 
#define PPI_CHENSET_CH17_Disabled   (0UL)
 
#define PPI_CHENSET_CH17_Enabled   (1UL)
 
#define PPI_CHENSET_CH17_Set   (1UL)
 
#define PPI_CHENSET_CH16_Pos   (16UL)
 
#define PPI_CHENSET_CH16_Msk   (0x1UL << PPI_CHENSET_CH16_Pos)
 
#define PPI_CHENSET_CH16_Disabled   (0UL)
 
#define PPI_CHENSET_CH16_Enabled   (1UL)
 
#define PPI_CHENSET_CH16_Set   (1UL)
 
#define PPI_CHENSET_CH15_Pos   (15UL)
 
#define PPI_CHENSET_CH15_Msk   (0x1UL << PPI_CHENSET_CH15_Pos)
 
#define PPI_CHENSET_CH15_Disabled   (0UL)
 
#define PPI_CHENSET_CH15_Enabled   (1UL)
 
#define PPI_CHENSET_CH15_Set   (1UL)
 
#define PPI_CHENSET_CH14_Pos   (14UL)
 
#define PPI_CHENSET_CH14_Msk   (0x1UL << PPI_CHENSET_CH14_Pos)
 
#define PPI_CHENSET_CH14_Disabled   (0UL)
 
#define PPI_CHENSET_CH14_Enabled   (1UL)
 
#define PPI_CHENSET_CH14_Set   (1UL)
 
#define PPI_CHENSET_CH13_Pos   (13UL)
 
#define PPI_CHENSET_CH13_Msk   (0x1UL << PPI_CHENSET_CH13_Pos)
 
#define PPI_CHENSET_CH13_Disabled   (0UL)
 
#define PPI_CHENSET_CH13_Enabled   (1UL)
 
#define PPI_CHENSET_CH13_Set   (1UL)
 
#define PPI_CHENSET_CH12_Pos   (12UL)
 
#define PPI_CHENSET_CH12_Msk   (0x1UL << PPI_CHENSET_CH12_Pos)
 
#define PPI_CHENSET_CH12_Disabled   (0UL)
 
#define PPI_CHENSET_CH12_Enabled   (1UL)
 
#define PPI_CHENSET_CH12_Set   (1UL)
 
#define PPI_CHENSET_CH11_Pos   (11UL)
 
#define PPI_CHENSET_CH11_Msk   (0x1UL << PPI_CHENSET_CH11_Pos)
 
#define PPI_CHENSET_CH11_Disabled   (0UL)
 
#define PPI_CHENSET_CH11_Enabled   (1UL)
 
#define PPI_CHENSET_CH11_Set   (1UL)
 
#define PPI_CHENSET_CH10_Pos   (10UL)
 
#define PPI_CHENSET_CH10_Msk   (0x1UL << PPI_CHENSET_CH10_Pos)
 
#define PPI_CHENSET_CH10_Disabled   (0UL)
 
#define PPI_CHENSET_CH10_Enabled   (1UL)
 
#define PPI_CHENSET_CH10_Set   (1UL)
 
#define PPI_CHENSET_CH9_Pos   (9UL)
 
#define PPI_CHENSET_CH9_Msk   (0x1UL << PPI_CHENSET_CH9_Pos)
 
#define PPI_CHENSET_CH9_Disabled   (0UL)
 
#define PPI_CHENSET_CH9_Enabled   (1UL)
 
#define PPI_CHENSET_CH9_Set   (1UL)
 
#define PPI_CHENSET_CH8_Pos   (8UL)
 
#define PPI_CHENSET_CH8_Msk   (0x1UL << PPI_CHENSET_CH8_Pos)
 
#define PPI_CHENSET_CH8_Disabled   (0UL)
 
#define PPI_CHENSET_CH8_Enabled   (1UL)
 
#define PPI_CHENSET_CH8_Set   (1UL)
 
#define PPI_CHENSET_CH7_Pos   (7UL)
 
#define PPI_CHENSET_CH7_Msk   (0x1UL << PPI_CHENSET_CH7_Pos)
 
#define PPI_CHENSET_CH7_Disabled   (0UL)
 
#define PPI_CHENSET_CH7_Enabled   (1UL)
 
#define PPI_CHENSET_CH7_Set   (1UL)
 
#define PPI_CHENSET_CH6_Pos   (6UL)
 
#define PPI_CHENSET_CH6_Msk   (0x1UL << PPI_CHENSET_CH6_Pos)
 
#define PPI_CHENSET_CH6_Disabled   (0UL)
 
#define PPI_CHENSET_CH6_Enabled   (1UL)
 
#define PPI_CHENSET_CH6_Set   (1UL)
 
#define PPI_CHENSET_CH5_Pos   (5UL)
 
#define PPI_CHENSET_CH5_Msk   (0x1UL << PPI_CHENSET_CH5_Pos)
 
#define PPI_CHENSET_CH5_Disabled   (0UL)
 
#define PPI_CHENSET_CH5_Enabled   (1UL)
 
#define PPI_CHENSET_CH5_Set   (1UL)
 
#define PPI_CHENSET_CH4_Pos   (4UL)
 
#define PPI_CHENSET_CH4_Msk   (0x1UL << PPI_CHENSET_CH4_Pos)
 
#define PPI_CHENSET_CH4_Disabled   (0UL)
 
#define PPI_CHENSET_CH4_Enabled   (1UL)
 
#define PPI_CHENSET_CH4_Set   (1UL)
 
#define PPI_CHENSET_CH3_Pos   (3UL)
 
#define PPI_CHENSET_CH3_Msk   (0x1UL << PPI_CHENSET_CH3_Pos)
 
#define PPI_CHENSET_CH3_Disabled   (0UL)
 
#define PPI_CHENSET_CH3_Enabled   (1UL)
 
#define PPI_CHENSET_CH3_Set   (1UL)
 
#define PPI_CHENSET_CH2_Pos   (2UL)
 
#define PPI_CHENSET_CH2_Msk   (0x1UL << PPI_CHENSET_CH2_Pos)
 
#define PPI_CHENSET_CH2_Disabled   (0UL)
 
#define PPI_CHENSET_CH2_Enabled   (1UL)
 
#define PPI_CHENSET_CH2_Set   (1UL)
 
#define PPI_CHENSET_CH1_Pos   (1UL)
 
#define PPI_CHENSET_CH1_Msk   (0x1UL << PPI_CHENSET_CH1_Pos)
 
#define PPI_CHENSET_CH1_Disabled   (0UL)
 
#define PPI_CHENSET_CH1_Enabled   (1UL)
 
#define PPI_CHENSET_CH1_Set   (1UL)
 
#define PPI_CHENSET_CH0_Pos   (0UL)
 
#define PPI_CHENSET_CH0_Msk   (0x1UL << PPI_CHENSET_CH0_Pos)
 
#define PPI_CHENSET_CH0_Disabled   (0UL)
 
#define PPI_CHENSET_CH0_Enabled   (1UL)
 
#define PPI_CHENSET_CH0_Set   (1UL)
 
#define PPI_CHENCLR_CH31_Pos   (31UL)
 
#define PPI_CHENCLR_CH31_Msk   (0x1UL << PPI_CHENCLR_CH31_Pos)
 
#define PPI_CHENCLR_CH31_Disabled   (0UL)
 
#define PPI_CHENCLR_CH31_Enabled   (1UL)
 
#define PPI_CHENCLR_CH31_Clear   (1UL)
 
#define PPI_CHENCLR_CH30_Pos   (30UL)
 
#define PPI_CHENCLR_CH30_Msk   (0x1UL << PPI_CHENCLR_CH30_Pos)
 
#define PPI_CHENCLR_CH30_Disabled   (0UL)
 
#define PPI_CHENCLR_CH30_Enabled   (1UL)
 
#define PPI_CHENCLR_CH30_Clear   (1UL)
 
#define PPI_CHENCLR_CH29_Pos   (29UL)
 
#define PPI_CHENCLR_CH29_Msk   (0x1UL << PPI_CHENCLR_CH29_Pos)
 
#define PPI_CHENCLR_CH29_Disabled   (0UL)
 
#define PPI_CHENCLR_CH29_Enabled   (1UL)
 
#define PPI_CHENCLR_CH29_Clear   (1UL)
 
#define PPI_CHENCLR_CH28_Pos   (28UL)
 
#define PPI_CHENCLR_CH28_Msk   (0x1UL << PPI_CHENCLR_CH28_Pos)
 
#define PPI_CHENCLR_CH28_Disabled   (0UL)
 
#define PPI_CHENCLR_CH28_Enabled   (1UL)
 
#define PPI_CHENCLR_CH28_Clear   (1UL)
 
#define PPI_CHENCLR_CH27_Pos   (27UL)
 
#define PPI_CHENCLR_CH27_Msk   (0x1UL << PPI_CHENCLR_CH27_Pos)
 
#define PPI_CHENCLR_CH27_Disabled   (0UL)
 
#define PPI_CHENCLR_CH27_Enabled   (1UL)
 
#define PPI_CHENCLR_CH27_Clear   (1UL)
 
#define PPI_CHENCLR_CH26_Pos   (26UL)
 
#define PPI_CHENCLR_CH26_Msk   (0x1UL << PPI_CHENCLR_CH26_Pos)
 
#define PPI_CHENCLR_CH26_Disabled   (0UL)
 
#define PPI_CHENCLR_CH26_Enabled   (1UL)
 
#define PPI_CHENCLR_CH26_Clear   (1UL)
 
#define PPI_CHENCLR_CH25_Pos   (25UL)
 
#define PPI_CHENCLR_CH25_Msk   (0x1UL << PPI_CHENCLR_CH25_Pos)
 
#define PPI_CHENCLR_CH25_Disabled   (0UL)
 
#define PPI_CHENCLR_CH25_Enabled   (1UL)
 
#define PPI_CHENCLR_CH25_Clear   (1UL)
 
#define PPI_CHENCLR_CH24_Pos   (24UL)
 
#define PPI_CHENCLR_CH24_Msk   (0x1UL << PPI_CHENCLR_CH24_Pos)
 
#define PPI_CHENCLR_CH24_Disabled   (0UL)
 
#define PPI_CHENCLR_CH24_Enabled   (1UL)
 
#define PPI_CHENCLR_CH24_Clear   (1UL)
 
#define PPI_CHENCLR_CH23_Pos   (23UL)
 
#define PPI_CHENCLR_CH23_Msk   (0x1UL << PPI_CHENCLR_CH23_Pos)
 
#define PPI_CHENCLR_CH23_Disabled   (0UL)
 
#define PPI_CHENCLR_CH23_Enabled   (1UL)
 
#define PPI_CHENCLR_CH23_Clear   (1UL)
 
#define PPI_CHENCLR_CH22_Pos   (22UL)
 
#define PPI_CHENCLR_CH22_Msk   (0x1UL << PPI_CHENCLR_CH22_Pos)
 
#define PPI_CHENCLR_CH22_Disabled   (0UL)
 
#define PPI_CHENCLR_CH22_Enabled   (1UL)
 
#define PPI_CHENCLR_CH22_Clear   (1UL)
 
#define PPI_CHENCLR_CH21_Pos   (21UL)
 
#define PPI_CHENCLR_CH21_Msk   (0x1UL << PPI_CHENCLR_CH21_Pos)
 
#define PPI_CHENCLR_CH21_Disabled   (0UL)
 
#define PPI_CHENCLR_CH21_Enabled   (1UL)
 
#define PPI_CHENCLR_CH21_Clear   (1UL)
 
#define PPI_CHENCLR_CH20_Pos   (20UL)
 
#define PPI_CHENCLR_CH20_Msk   (0x1UL << PPI_CHENCLR_CH20_Pos)
 
#define PPI_CHENCLR_CH20_Disabled   (0UL)
 
#define PPI_CHENCLR_CH20_Enabled   (1UL)
 
#define PPI_CHENCLR_CH20_Clear   (1UL)
 
#define PPI_CHENCLR_CH19_Pos   (19UL)
 
#define PPI_CHENCLR_CH19_Msk   (0x1UL << PPI_CHENCLR_CH19_Pos)
 
#define PPI_CHENCLR_CH19_Disabled   (0UL)
 
#define PPI_CHENCLR_CH19_Enabled   (1UL)
 
#define PPI_CHENCLR_CH19_Clear   (1UL)
 
#define PPI_CHENCLR_CH18_Pos   (18UL)
 
#define PPI_CHENCLR_CH18_Msk   (0x1UL << PPI_CHENCLR_CH18_Pos)
 
#define PPI_CHENCLR_CH18_Disabled   (0UL)
 
#define PPI_CHENCLR_CH18_Enabled   (1UL)
 
#define PPI_CHENCLR_CH18_Clear   (1UL)
 
#define PPI_CHENCLR_CH17_Pos   (17UL)
 
#define PPI_CHENCLR_CH17_Msk   (0x1UL << PPI_CHENCLR_CH17_Pos)
 
#define PPI_CHENCLR_CH17_Disabled   (0UL)
 
#define PPI_CHENCLR_CH17_Enabled   (1UL)
 
#define PPI_CHENCLR_CH17_Clear   (1UL)
 
#define PPI_CHENCLR_CH16_Pos   (16UL)
 
#define PPI_CHENCLR_CH16_Msk   (0x1UL << PPI_CHENCLR_CH16_Pos)
 
#define PPI_CHENCLR_CH16_Disabled   (0UL)
 
#define PPI_CHENCLR_CH16_Enabled   (1UL)
 
#define PPI_CHENCLR_CH16_Clear   (1UL)
 
#define PPI_CHENCLR_CH15_Pos   (15UL)
 
#define PPI_CHENCLR_CH15_Msk   (0x1UL << PPI_CHENCLR_CH15_Pos)
 
#define PPI_CHENCLR_CH15_Disabled   (0UL)
 
#define PPI_CHENCLR_CH15_Enabled   (1UL)
 
#define PPI_CHENCLR_CH15_Clear   (1UL)
 
#define PPI_CHENCLR_CH14_Pos   (14UL)
 
#define PPI_CHENCLR_CH14_Msk   (0x1UL << PPI_CHENCLR_CH14_Pos)
 
#define PPI_CHENCLR_CH14_Disabled   (0UL)
 
#define PPI_CHENCLR_CH14_Enabled   (1UL)
 
#define PPI_CHENCLR_CH14_Clear   (1UL)
 
#define PPI_CHENCLR_CH13_Pos   (13UL)
 
#define PPI_CHENCLR_CH13_Msk   (0x1UL << PPI_CHENCLR_CH13_Pos)
 
#define PPI_CHENCLR_CH13_Disabled   (0UL)
 
#define PPI_CHENCLR_CH13_Enabled   (1UL)
 
#define PPI_CHENCLR_CH13_Clear   (1UL)
 
#define PPI_CHENCLR_CH12_Pos   (12UL)
 
#define PPI_CHENCLR_CH12_Msk   (0x1UL << PPI_CHENCLR_CH12_Pos)
 
#define PPI_CHENCLR_CH12_Disabled   (0UL)
 
#define PPI_CHENCLR_CH12_Enabled   (1UL)
 
#define PPI_CHENCLR_CH12_Clear   (1UL)
 
#define PPI_CHENCLR_CH11_Pos   (11UL)
 
#define PPI_CHENCLR_CH11_Msk   (0x1UL << PPI_CHENCLR_CH11_Pos)
 
#define PPI_CHENCLR_CH11_Disabled   (0UL)
 
#define PPI_CHENCLR_CH11_Enabled   (1UL)
 
#define PPI_CHENCLR_CH11_Clear   (1UL)
 
#define PPI_CHENCLR_CH10_Pos   (10UL)
 
#define PPI_CHENCLR_CH10_Msk   (0x1UL << PPI_CHENCLR_CH10_Pos)
 
#define PPI_CHENCLR_CH10_Disabled   (0UL)
 
#define PPI_CHENCLR_CH10_Enabled   (1UL)
 
#define PPI_CHENCLR_CH10_Clear   (1UL)
 
#define PPI_CHENCLR_CH9_Pos   (9UL)
 
#define PPI_CHENCLR_CH9_Msk   (0x1UL << PPI_CHENCLR_CH9_Pos)
 
#define PPI_CHENCLR_CH9_Disabled   (0UL)
 
#define PPI_CHENCLR_CH9_Enabled   (1UL)
 
#define PPI_CHENCLR_CH9_Clear   (1UL)
 
#define PPI_CHENCLR_CH8_Pos   (8UL)
 
#define PPI_CHENCLR_CH8_Msk   (0x1UL << PPI_CHENCLR_CH8_Pos)
 
#define PPI_CHENCLR_CH8_Disabled   (0UL)
 
#define PPI_CHENCLR_CH8_Enabled   (1UL)
 
#define PPI_CHENCLR_CH8_Clear   (1UL)
 
#define PPI_CHENCLR_CH7_Pos   (7UL)
 
#define PPI_CHENCLR_CH7_Msk   (0x1UL << PPI_CHENCLR_CH7_Pos)
 
#define PPI_CHENCLR_CH7_Disabled   (0UL)
 
#define PPI_CHENCLR_CH7_Enabled   (1UL)
 
#define PPI_CHENCLR_CH7_Clear   (1UL)
 
#define PPI_CHENCLR_CH6_Pos   (6UL)
 
#define PPI_CHENCLR_CH6_Msk   (0x1UL << PPI_CHENCLR_CH6_Pos)
 
#define PPI_CHENCLR_CH6_Disabled   (0UL)
 
#define PPI_CHENCLR_CH6_Enabled   (1UL)
 
#define PPI_CHENCLR_CH6_Clear   (1UL)
 
#define PPI_CHENCLR_CH5_Pos   (5UL)
 
#define PPI_CHENCLR_CH5_Msk   (0x1UL << PPI_CHENCLR_CH5_Pos)
 
#define PPI_CHENCLR_CH5_Disabled   (0UL)
 
#define PPI_CHENCLR_CH5_Enabled   (1UL)
 
#define PPI_CHENCLR_CH5_Clear   (1UL)
 
#define PPI_CHENCLR_CH4_Pos   (4UL)
 
#define PPI_CHENCLR_CH4_Msk   (0x1UL << PPI_CHENCLR_CH4_Pos)
 
#define PPI_CHENCLR_CH4_Disabled   (0UL)
 
#define PPI_CHENCLR_CH4_Enabled   (1UL)
 
#define PPI_CHENCLR_CH4_Clear   (1UL)
 
#define PPI_CHENCLR_CH3_Pos   (3UL)
 
#define PPI_CHENCLR_CH3_Msk   (0x1UL << PPI_CHENCLR_CH3_Pos)
 
#define PPI_CHENCLR_CH3_Disabled   (0UL)
 
#define PPI_CHENCLR_CH3_Enabled   (1UL)
 
#define PPI_CHENCLR_CH3_Clear   (1UL)
 
#define PPI_CHENCLR_CH2_Pos   (2UL)
 
#define PPI_CHENCLR_CH2_Msk   (0x1UL << PPI_CHENCLR_CH2_Pos)
 
#define PPI_CHENCLR_CH2_Disabled   (0UL)
 
#define PPI_CHENCLR_CH2_Enabled   (1UL)
 
#define PPI_CHENCLR_CH2_Clear   (1UL)
 
#define PPI_CHENCLR_CH1_Pos   (1UL)
 
#define PPI_CHENCLR_CH1_Msk   (0x1UL << PPI_CHENCLR_CH1_Pos)
 
#define PPI_CHENCLR_CH1_Disabled   (0UL)
 
#define PPI_CHENCLR_CH1_Enabled   (1UL)
 
#define PPI_CHENCLR_CH1_Clear   (1UL)
 
#define PPI_CHENCLR_CH0_Pos   (0UL)
 
#define PPI_CHENCLR_CH0_Msk   (0x1UL << PPI_CHENCLR_CH0_Pos)
 
#define PPI_CHENCLR_CH0_Disabled   (0UL)
 
#define PPI_CHENCLR_CH0_Enabled   (1UL)
 
#define PPI_CHENCLR_CH0_Clear   (1UL)
 
#define PPI_CH_EEP_EEP_Pos   (0UL)
 
#define PPI_CH_EEP_EEP_Msk   (0xFFFFFFFFUL << PPI_CH_EEP_EEP_Pos)
 
#define PPI_CH_TEP_TEP_Pos   (0UL)
 
#define PPI_CH_TEP_TEP_Msk   (0xFFFFFFFFUL << PPI_CH_TEP_TEP_Pos)
 
#define PPI_CHG_CH31_Pos   (31UL)
 
#define PPI_CHG_CH31_Msk   (0x1UL << PPI_CHG_CH31_Pos)
 
#define PPI_CHG_CH31_Excluded   (0UL)
 
#define PPI_CHG_CH31_Included   (1UL)
 
#define PPI_CHG_CH30_Pos   (30UL)
 
#define PPI_CHG_CH30_Msk   (0x1UL << PPI_CHG_CH30_Pos)
 
#define PPI_CHG_CH30_Excluded   (0UL)
 
#define PPI_CHG_CH30_Included   (1UL)
 
#define PPI_CHG_CH29_Pos   (29UL)
 
#define PPI_CHG_CH29_Msk   (0x1UL << PPI_CHG_CH29_Pos)
 
#define PPI_CHG_CH29_Excluded   (0UL)
 
#define PPI_CHG_CH29_Included   (1UL)
 
#define PPI_CHG_CH28_Pos   (28UL)
 
#define PPI_CHG_CH28_Msk   (0x1UL << PPI_CHG_CH28_Pos)
 
#define PPI_CHG_CH28_Excluded   (0UL)
 
#define PPI_CHG_CH28_Included   (1UL)
 
#define PPI_CHG_CH27_Pos   (27UL)
 
#define PPI_CHG_CH27_Msk   (0x1UL << PPI_CHG_CH27_Pos)
 
#define PPI_CHG_CH27_Excluded   (0UL)
 
#define PPI_CHG_CH27_Included   (1UL)
 
#define PPI_CHG_CH26_Pos   (26UL)
 
#define PPI_CHG_CH26_Msk   (0x1UL << PPI_CHG_CH26_Pos)
 
#define PPI_CHG_CH26_Excluded   (0UL)
 
#define PPI_CHG_CH26_Included   (1UL)
 
#define PPI_CHG_CH25_Pos   (25UL)
 
#define PPI_CHG_CH25_Msk   (0x1UL << PPI_CHG_CH25_Pos)
 
#define PPI_CHG_CH25_Excluded   (0UL)
 
#define PPI_CHG_CH25_Included   (1UL)
 
#define PPI_CHG_CH24_Pos   (24UL)
 
#define PPI_CHG_CH24_Msk   (0x1UL << PPI_CHG_CH24_Pos)
 
#define PPI_CHG_CH24_Excluded   (0UL)
 
#define PPI_CHG_CH24_Included   (1UL)
 
#define PPI_CHG_CH23_Pos   (23UL)
 
#define PPI_CHG_CH23_Msk   (0x1UL << PPI_CHG_CH23_Pos)
 
#define PPI_CHG_CH23_Excluded   (0UL)
 
#define PPI_CHG_CH23_Included   (1UL)
 
#define PPI_CHG_CH22_Pos   (22UL)
 
#define PPI_CHG_CH22_Msk   (0x1UL << PPI_CHG_CH22_Pos)
 
#define PPI_CHG_CH22_Excluded   (0UL)
 
#define PPI_CHG_CH22_Included   (1UL)
 
#define PPI_CHG_CH21_Pos   (21UL)
 
#define PPI_CHG_CH21_Msk   (0x1UL << PPI_CHG_CH21_Pos)
 
#define PPI_CHG_CH21_Excluded   (0UL)
 
#define PPI_CHG_CH21_Included   (1UL)
 
#define PPI_CHG_CH20_Pos   (20UL)
 
#define PPI_CHG_CH20_Msk   (0x1UL << PPI_CHG_CH20_Pos)
 
#define PPI_CHG_CH20_Excluded   (0UL)
 
#define PPI_CHG_CH20_Included   (1UL)
 
#define PPI_CHG_CH19_Pos   (19UL)
 
#define PPI_CHG_CH19_Msk   (0x1UL << PPI_CHG_CH19_Pos)
 
#define PPI_CHG_CH19_Excluded   (0UL)
 
#define PPI_CHG_CH19_Included   (1UL)
 
#define PPI_CHG_CH18_Pos   (18UL)
 
#define PPI_CHG_CH18_Msk   (0x1UL << PPI_CHG_CH18_Pos)
 
#define PPI_CHG_CH18_Excluded   (0UL)
 
#define PPI_CHG_CH18_Included   (1UL)
 
#define PPI_CHG_CH17_Pos   (17UL)
 
#define PPI_CHG_CH17_Msk   (0x1UL << PPI_CHG_CH17_Pos)
 
#define PPI_CHG_CH17_Excluded   (0UL)
 
#define PPI_CHG_CH17_Included   (1UL)
 
#define PPI_CHG_CH16_Pos   (16UL)
 
#define PPI_CHG_CH16_Msk   (0x1UL << PPI_CHG_CH16_Pos)
 
#define PPI_CHG_CH16_Excluded   (0UL)
 
#define PPI_CHG_CH16_Included   (1UL)
 
#define PPI_CHG_CH15_Pos   (15UL)
 
#define PPI_CHG_CH15_Msk   (0x1UL << PPI_CHG_CH15_Pos)
 
#define PPI_CHG_CH15_Excluded   (0UL)
 
#define PPI_CHG_CH15_Included   (1UL)
 
#define PPI_CHG_CH14_Pos   (14UL)
 
#define PPI_CHG_CH14_Msk   (0x1UL << PPI_CHG_CH14_Pos)
 
#define PPI_CHG_CH14_Excluded   (0UL)
 
#define PPI_CHG_CH14_Included   (1UL)
 
#define PPI_CHG_CH13_Pos   (13UL)
 
#define PPI_CHG_CH13_Msk   (0x1UL << PPI_CHG_CH13_Pos)
 
#define PPI_CHG_CH13_Excluded   (0UL)
 
#define PPI_CHG_CH13_Included   (1UL)
 
#define PPI_CHG_CH12_Pos   (12UL)
 
#define PPI_CHG_CH12_Msk   (0x1UL << PPI_CHG_CH12_Pos)
 
#define PPI_CHG_CH12_Excluded   (0UL)
 
#define PPI_CHG_CH12_Included   (1UL)
 
#define PPI_CHG_CH11_Pos   (11UL)
 
#define PPI_CHG_CH11_Msk   (0x1UL << PPI_CHG_CH11_Pos)
 
#define PPI_CHG_CH11_Excluded   (0UL)
 
#define PPI_CHG_CH11_Included   (1UL)
 
#define PPI_CHG_CH10_Pos   (10UL)
 
#define PPI_CHG_CH10_Msk   (0x1UL << PPI_CHG_CH10_Pos)
 
#define PPI_CHG_CH10_Excluded   (0UL)
 
#define PPI_CHG_CH10_Included   (1UL)
 
#define PPI_CHG_CH9_Pos   (9UL)
 
#define PPI_CHG_CH9_Msk   (0x1UL << PPI_CHG_CH9_Pos)
 
#define PPI_CHG_CH9_Excluded   (0UL)
 
#define PPI_CHG_CH9_Included   (1UL)
 
#define PPI_CHG_CH8_Pos   (8UL)
 
#define PPI_CHG_CH8_Msk   (0x1UL << PPI_CHG_CH8_Pos)
 
#define PPI_CHG_CH8_Excluded   (0UL)
 
#define PPI_CHG_CH8_Included   (1UL)
 
#define PPI_CHG_CH7_Pos   (7UL)
 
#define PPI_CHG_CH7_Msk   (0x1UL << PPI_CHG_CH7_Pos)
 
#define PPI_CHG_CH7_Excluded   (0UL)
 
#define PPI_CHG_CH7_Included   (1UL)
 
#define PPI_CHG_CH6_Pos   (6UL)
 
#define PPI_CHG_CH6_Msk   (0x1UL << PPI_CHG_CH6_Pos)
 
#define PPI_CHG_CH6_Excluded   (0UL)
 
#define PPI_CHG_CH6_Included   (1UL)
 
#define PPI_CHG_CH5_Pos   (5UL)
 
#define PPI_CHG_CH5_Msk   (0x1UL << PPI_CHG_CH5_Pos)
 
#define PPI_CHG_CH5_Excluded   (0UL)
 
#define PPI_CHG_CH5_Included   (1UL)
 
#define PPI_CHG_CH4_Pos   (4UL)
 
#define PPI_CHG_CH4_Msk   (0x1UL << PPI_CHG_CH4_Pos)
 
#define PPI_CHG_CH4_Excluded   (0UL)
 
#define PPI_CHG_CH4_Included   (1UL)
 
#define PPI_CHG_CH3_Pos   (3UL)
 
#define PPI_CHG_CH3_Msk   (0x1UL << PPI_CHG_CH3_Pos)
 
#define PPI_CHG_CH3_Excluded   (0UL)
 
#define PPI_CHG_CH3_Included   (1UL)
 
#define PPI_CHG_CH2_Pos   (2UL)
 
#define PPI_CHG_CH2_Msk   (0x1UL << PPI_CHG_CH2_Pos)
 
#define PPI_CHG_CH2_Excluded   (0UL)
 
#define PPI_CHG_CH2_Included   (1UL)
 
#define PPI_CHG_CH1_Pos   (1UL)
 
#define PPI_CHG_CH1_Msk   (0x1UL << PPI_CHG_CH1_Pos)
 
#define PPI_CHG_CH1_Excluded   (0UL)
 
#define PPI_CHG_CH1_Included   (1UL)
 
#define PPI_CHG_CH0_Pos   (0UL)
 
#define PPI_CHG_CH0_Msk   (0x1UL << PPI_CHG_CH0_Pos)
 
#define PPI_CHG_CH0_Excluded   (0UL)
 
#define PPI_CHG_CH0_Included   (1UL)
 
#define PPI_FORK_TEP_TEP_Pos   (0UL)
 
#define PPI_FORK_TEP_TEP_Msk   (0xFFFFFFFFUL << PPI_FORK_TEP_TEP_Pos)
 
#define PWM_SHORTS_LOOPSDONE_STOP_Pos   (4UL)
 
#define PWM_SHORTS_LOOPSDONE_STOP_Msk   (0x1UL << PWM_SHORTS_LOOPSDONE_STOP_Pos)
 
#define PWM_SHORTS_LOOPSDONE_STOP_Disabled   (0UL)
 
#define PWM_SHORTS_LOOPSDONE_STOP_Enabled   (1UL)
 
#define PWM_SHORTS_LOOPSDONE_SEQSTART1_Pos   (3UL)
 
#define PWM_SHORTS_LOOPSDONE_SEQSTART1_Msk   (0x1UL << PWM_SHORTS_LOOPSDONE_SEQSTART1_Pos)
 
#define PWM_SHORTS_LOOPSDONE_SEQSTART1_Disabled   (0UL)
 
#define PWM_SHORTS_LOOPSDONE_SEQSTART1_Enabled   (1UL)
 
#define PWM_SHORTS_LOOPSDONE_SEQSTART0_Pos   (2UL)
 
#define PWM_SHORTS_LOOPSDONE_SEQSTART0_Msk   (0x1UL << PWM_SHORTS_LOOPSDONE_SEQSTART0_Pos)
 
#define PWM_SHORTS_LOOPSDONE_SEQSTART0_Disabled   (0UL)
 
#define PWM_SHORTS_LOOPSDONE_SEQSTART0_Enabled   (1UL)
 
#define PWM_SHORTS_SEQEND1_STOP_Pos   (1UL)
 
#define PWM_SHORTS_SEQEND1_STOP_Msk   (0x1UL << PWM_SHORTS_SEQEND1_STOP_Pos)
 
#define PWM_SHORTS_SEQEND1_STOP_Disabled   (0UL)
 
#define PWM_SHORTS_SEQEND1_STOP_Enabled   (1UL)
 
#define PWM_SHORTS_SEQEND0_STOP_Pos   (0UL)
 
#define PWM_SHORTS_SEQEND0_STOP_Msk   (0x1UL << PWM_SHORTS_SEQEND0_STOP_Pos)
 
#define PWM_SHORTS_SEQEND0_STOP_Disabled   (0UL)
 
#define PWM_SHORTS_SEQEND0_STOP_Enabled   (1UL)
 
#define PWM_INTEN_LOOPSDONE_Pos   (7UL)
 
#define PWM_INTEN_LOOPSDONE_Msk   (0x1UL << PWM_INTEN_LOOPSDONE_Pos)
 
#define PWM_INTEN_LOOPSDONE_Disabled   (0UL)
 
#define PWM_INTEN_LOOPSDONE_Enabled   (1UL)
 
#define PWM_INTEN_PWMPERIODEND_Pos   (6UL)
 
#define PWM_INTEN_PWMPERIODEND_Msk   (0x1UL << PWM_INTEN_PWMPERIODEND_Pos)
 
#define PWM_INTEN_PWMPERIODEND_Disabled   (0UL)
 
#define PWM_INTEN_PWMPERIODEND_Enabled   (1UL)
 
#define PWM_INTEN_SEQEND1_Pos   (5UL)
 
#define PWM_INTEN_SEQEND1_Msk   (0x1UL << PWM_INTEN_SEQEND1_Pos)
 
#define PWM_INTEN_SEQEND1_Disabled   (0UL)
 
#define PWM_INTEN_SEQEND1_Enabled   (1UL)
 
#define PWM_INTEN_SEQEND0_Pos   (4UL)
 
#define PWM_INTEN_SEQEND0_Msk   (0x1UL << PWM_INTEN_SEQEND0_Pos)
 
#define PWM_INTEN_SEQEND0_Disabled   (0UL)
 
#define PWM_INTEN_SEQEND0_Enabled   (1UL)
 
#define PWM_INTEN_SEQSTARTED1_Pos   (3UL)
 
#define PWM_INTEN_SEQSTARTED1_Msk   (0x1UL << PWM_INTEN_SEQSTARTED1_Pos)
 
#define PWM_INTEN_SEQSTARTED1_Disabled   (0UL)
 
#define PWM_INTEN_SEQSTARTED1_Enabled   (1UL)
 
#define PWM_INTEN_SEQSTARTED0_Pos   (2UL)
 
#define PWM_INTEN_SEQSTARTED0_Msk   (0x1UL << PWM_INTEN_SEQSTARTED0_Pos)
 
#define PWM_INTEN_SEQSTARTED0_Disabled   (0UL)
 
#define PWM_INTEN_SEQSTARTED0_Enabled   (1UL)
 
#define PWM_INTEN_STOPPED_Pos   (1UL)
 
#define PWM_INTEN_STOPPED_Msk   (0x1UL << PWM_INTEN_STOPPED_Pos)
 
#define PWM_INTEN_STOPPED_Disabled   (0UL)
 
#define PWM_INTEN_STOPPED_Enabled   (1UL)
 
#define PWM_INTENSET_LOOPSDONE_Pos   (7UL)
 
#define PWM_INTENSET_LOOPSDONE_Msk   (0x1UL << PWM_INTENSET_LOOPSDONE_Pos)
 
#define PWM_INTENSET_LOOPSDONE_Disabled   (0UL)
 
#define PWM_INTENSET_LOOPSDONE_Enabled   (1UL)
 
#define PWM_INTENSET_LOOPSDONE_Set   (1UL)
 
#define PWM_INTENSET_PWMPERIODEND_Pos   (6UL)
 
#define PWM_INTENSET_PWMPERIODEND_Msk   (0x1UL << PWM_INTENSET_PWMPERIODEND_Pos)
 
#define PWM_INTENSET_PWMPERIODEND_Disabled   (0UL)
 
#define PWM_INTENSET_PWMPERIODEND_Enabled   (1UL)
 
#define PWM_INTENSET_PWMPERIODEND_Set   (1UL)
 
#define PWM_INTENSET_SEQEND1_Pos   (5UL)
 
#define PWM_INTENSET_SEQEND1_Msk   (0x1UL << PWM_INTENSET_SEQEND1_Pos)
 
#define PWM_INTENSET_SEQEND1_Disabled   (0UL)
 
#define PWM_INTENSET_SEQEND1_Enabled   (1UL)
 
#define PWM_INTENSET_SEQEND1_Set   (1UL)
 
#define PWM_INTENSET_SEQEND0_Pos   (4UL)
 
#define PWM_INTENSET_SEQEND0_Msk   (0x1UL << PWM_INTENSET_SEQEND0_Pos)
 
#define PWM_INTENSET_SEQEND0_Disabled   (0UL)
 
#define PWM_INTENSET_SEQEND0_Enabled   (1UL)
 
#define PWM_INTENSET_SEQEND0_Set   (1UL)
 
#define PWM_INTENSET_SEQSTARTED1_Pos   (3UL)
 
#define PWM_INTENSET_SEQSTARTED1_Msk   (0x1UL << PWM_INTENSET_SEQSTARTED1_Pos)
 
#define PWM_INTENSET_SEQSTARTED1_Disabled   (0UL)
 
#define PWM_INTENSET_SEQSTARTED1_Enabled   (1UL)
 
#define PWM_INTENSET_SEQSTARTED1_Set   (1UL)
 
#define PWM_INTENSET_SEQSTARTED0_Pos   (2UL)
 
#define PWM_INTENSET_SEQSTARTED0_Msk   (0x1UL << PWM_INTENSET_SEQSTARTED0_Pos)
 
#define PWM_INTENSET_SEQSTARTED0_Disabled   (0UL)
 
#define PWM_INTENSET_SEQSTARTED0_Enabled   (1UL)
 
#define PWM_INTENSET_SEQSTARTED0_Set   (1UL)
 
#define PWM_INTENSET_STOPPED_Pos   (1UL)
 
#define PWM_INTENSET_STOPPED_Msk   (0x1UL << PWM_INTENSET_STOPPED_Pos)
 
#define PWM_INTENSET_STOPPED_Disabled   (0UL)
 
#define PWM_INTENSET_STOPPED_Enabled   (1UL)
 
#define PWM_INTENSET_STOPPED_Set   (1UL)
 
#define PWM_INTENCLR_LOOPSDONE_Pos   (7UL)
 
#define PWM_INTENCLR_LOOPSDONE_Msk   (0x1UL << PWM_INTENCLR_LOOPSDONE_Pos)
 
#define PWM_INTENCLR_LOOPSDONE_Disabled   (0UL)
 
#define PWM_INTENCLR_LOOPSDONE_Enabled   (1UL)
 
#define PWM_INTENCLR_LOOPSDONE_Clear   (1UL)
 
#define PWM_INTENCLR_PWMPERIODEND_Pos   (6UL)
 
#define PWM_INTENCLR_PWMPERIODEND_Msk   (0x1UL << PWM_INTENCLR_PWMPERIODEND_Pos)
 
#define PWM_INTENCLR_PWMPERIODEND_Disabled   (0UL)
 
#define PWM_INTENCLR_PWMPERIODEND_Enabled   (1UL)
 
#define PWM_INTENCLR_PWMPERIODEND_Clear   (1UL)
 
#define PWM_INTENCLR_SEQEND1_Pos   (5UL)
 
#define PWM_INTENCLR_SEQEND1_Msk   (0x1UL << PWM_INTENCLR_SEQEND1_Pos)
 
#define PWM_INTENCLR_SEQEND1_Disabled   (0UL)
 
#define PWM_INTENCLR_SEQEND1_Enabled   (1UL)
 
#define PWM_INTENCLR_SEQEND1_Clear   (1UL)
 
#define PWM_INTENCLR_SEQEND0_Pos   (4UL)
 
#define PWM_INTENCLR_SEQEND0_Msk   (0x1UL << PWM_INTENCLR_SEQEND0_Pos)
 
#define PWM_INTENCLR_SEQEND0_Disabled   (0UL)
 
#define PWM_INTENCLR_SEQEND0_Enabled   (1UL)
 
#define PWM_INTENCLR_SEQEND0_Clear   (1UL)
 
#define PWM_INTENCLR_SEQSTARTED1_Pos   (3UL)
 
#define PWM_INTENCLR_SEQSTARTED1_Msk   (0x1UL << PWM_INTENCLR_SEQSTARTED1_Pos)
 
#define PWM_INTENCLR_SEQSTARTED1_Disabled   (0UL)
 
#define PWM_INTENCLR_SEQSTARTED1_Enabled   (1UL)
 
#define PWM_INTENCLR_SEQSTARTED1_Clear   (1UL)
 
#define PWM_INTENCLR_SEQSTARTED0_Pos   (2UL)
 
#define PWM_INTENCLR_SEQSTARTED0_Msk   (0x1UL << PWM_INTENCLR_SEQSTARTED0_Pos)
 
#define PWM_INTENCLR_SEQSTARTED0_Disabled   (0UL)
 
#define PWM_INTENCLR_SEQSTARTED0_Enabled   (1UL)
 
#define PWM_INTENCLR_SEQSTARTED0_Clear   (1UL)
 
#define PWM_INTENCLR_STOPPED_Pos   (1UL)
 
#define PWM_INTENCLR_STOPPED_Msk   (0x1UL << PWM_INTENCLR_STOPPED_Pos)
 
#define PWM_INTENCLR_STOPPED_Disabled   (0UL)
 
#define PWM_INTENCLR_STOPPED_Enabled   (1UL)
 
#define PWM_INTENCLR_STOPPED_Clear   (1UL)
 
#define PWM_ENABLE_ENABLE_Pos   (0UL)
 
#define PWM_ENABLE_ENABLE_Msk   (0x1UL << PWM_ENABLE_ENABLE_Pos)
 
#define PWM_ENABLE_ENABLE_Disabled   (0UL)
 
#define PWM_ENABLE_ENABLE_Enabled   (1UL)
 
#define PWM_MODE_UPDOWN_Pos   (0UL)
 
#define PWM_MODE_UPDOWN_Msk   (0x1UL << PWM_MODE_UPDOWN_Pos)
 
#define PWM_MODE_UPDOWN_Up   (0UL)
 
#define PWM_MODE_UPDOWN_UpAndDown   (1UL)
 
#define PWM_COUNTERTOP_COUNTERTOP_Pos   (0UL)
 
#define PWM_COUNTERTOP_COUNTERTOP_Msk   (0x7FFFUL << PWM_COUNTERTOP_COUNTERTOP_Pos)
 
#define PWM_PRESCALER_PRESCALER_Pos   (0UL)
 
#define PWM_PRESCALER_PRESCALER_Msk   (0x7UL << PWM_PRESCALER_PRESCALER_Pos)
 
#define PWM_PRESCALER_PRESCALER_DIV_1   (0UL)
 
#define PWM_PRESCALER_PRESCALER_DIV_2   (1UL)
 
#define PWM_PRESCALER_PRESCALER_DIV_4   (2UL)
 
#define PWM_PRESCALER_PRESCALER_DIV_8   (3UL)
 
#define PWM_PRESCALER_PRESCALER_DIV_16   (4UL)
 
#define PWM_PRESCALER_PRESCALER_DIV_32   (5UL)
 
#define PWM_PRESCALER_PRESCALER_DIV_64   (6UL)
 
#define PWM_PRESCALER_PRESCALER_DIV_128   (7UL)
 
#define PWM_DECODER_MODE_Pos   (8UL)
 
#define PWM_DECODER_MODE_Msk   (0x1UL << PWM_DECODER_MODE_Pos)
 
#define PWM_DECODER_MODE_RefreshCount   (0UL)
 
#define PWM_DECODER_MODE_NextStep   (1UL)
 
#define PWM_DECODER_LOAD_Pos   (0UL)
 
#define PWM_DECODER_LOAD_Msk   (0x7UL << PWM_DECODER_LOAD_Pos)
 
#define PWM_DECODER_LOAD_Common   (0UL)
 
#define PWM_DECODER_LOAD_Grouped   (1UL)
 
#define PWM_DECODER_LOAD_Individual   (2UL)
 
#define PWM_DECODER_LOAD_WaveForm   (3UL)
 
#define PWM_LOOP_CNT_Pos   (0UL)
 
#define PWM_LOOP_CNT_Msk   (0xFFFFUL << PWM_LOOP_CNT_Pos)
 
#define PWM_LOOP_CNT_Disabled   (0UL)
 
#define PWM_SEQ_PTR_PTR_Pos   (0UL)
 
#define PWM_SEQ_PTR_PTR_Msk   (0xFFFFFFFFUL << PWM_SEQ_PTR_PTR_Pos)
 
#define PWM_SEQ_CNT_CNT_Pos   (0UL)
 
#define PWM_SEQ_CNT_CNT_Msk   (0x7FFFUL << PWM_SEQ_CNT_CNT_Pos)
 
#define PWM_SEQ_CNT_CNT_Disabled   (0UL)
 
#define PWM_SEQ_REFRESH_CNT_Pos   (0UL)
 
#define PWM_SEQ_REFRESH_CNT_Msk   (0xFFFFFFUL << PWM_SEQ_REFRESH_CNT_Pos)
 
#define PWM_SEQ_REFRESH_CNT_Continuous   (0UL)
 
#define PWM_SEQ_ENDDELAY_CNT_Pos   (0UL)
 
#define PWM_SEQ_ENDDELAY_CNT_Msk   (0xFFFFFFUL << PWM_SEQ_ENDDELAY_CNT_Pos)
 
#define PWM_PSEL_OUT_CONNECT_Pos   (31UL)
 
#define PWM_PSEL_OUT_CONNECT_Msk   (0x1UL << PWM_PSEL_OUT_CONNECT_Pos)
 
#define PWM_PSEL_OUT_CONNECT_Connected   (0UL)
 
#define PWM_PSEL_OUT_CONNECT_Disconnected   (1UL)
 
#define PWM_PSEL_OUT_PIN_Pos   (0UL)
 
#define PWM_PSEL_OUT_PIN_Msk   (0x1FUL << PWM_PSEL_OUT_PIN_Pos)
 
#define QDEC_SHORTS_SAMPLERDY_READCLRACC_Pos   (6UL)
 
#define QDEC_SHORTS_SAMPLERDY_READCLRACC_Msk   (0x1UL << QDEC_SHORTS_SAMPLERDY_READCLRACC_Pos)
 
#define QDEC_SHORTS_SAMPLERDY_READCLRACC_Disabled   (0UL)
 
#define QDEC_SHORTS_SAMPLERDY_READCLRACC_Enabled   (1UL)
 
#define QDEC_SHORTS_DBLRDY_STOP_Pos   (5UL)
 
#define QDEC_SHORTS_DBLRDY_STOP_Msk   (0x1UL << QDEC_SHORTS_DBLRDY_STOP_Pos)
 
#define QDEC_SHORTS_DBLRDY_STOP_Disabled   (0UL)
 
#define QDEC_SHORTS_DBLRDY_STOP_Enabled   (1UL)
 
#define QDEC_SHORTS_DBLRDY_RDCLRDBL_Pos   (4UL)
 
#define QDEC_SHORTS_DBLRDY_RDCLRDBL_Msk   (0x1UL << QDEC_SHORTS_DBLRDY_RDCLRDBL_Pos)
 
#define QDEC_SHORTS_DBLRDY_RDCLRDBL_Disabled   (0UL)
 
#define QDEC_SHORTS_DBLRDY_RDCLRDBL_Enabled   (1UL)
 
#define QDEC_SHORTS_REPORTRDY_STOP_Pos   (3UL)
 
#define QDEC_SHORTS_REPORTRDY_STOP_Msk   (0x1UL << QDEC_SHORTS_REPORTRDY_STOP_Pos)
 
#define QDEC_SHORTS_REPORTRDY_STOP_Disabled   (0UL)
 
#define QDEC_SHORTS_REPORTRDY_STOP_Enabled   (1UL)
 
#define QDEC_SHORTS_REPORTRDY_RDCLRACC_Pos   (2UL)
 
#define QDEC_SHORTS_REPORTRDY_RDCLRACC_Msk   (0x1UL << QDEC_SHORTS_REPORTRDY_RDCLRACC_Pos)
 
#define QDEC_SHORTS_REPORTRDY_RDCLRACC_Disabled   (0UL)
 
#define QDEC_SHORTS_REPORTRDY_RDCLRACC_Enabled   (1UL)
 
#define QDEC_SHORTS_SAMPLERDY_STOP_Pos   (1UL)
 
#define QDEC_SHORTS_SAMPLERDY_STOP_Msk   (0x1UL << QDEC_SHORTS_SAMPLERDY_STOP_Pos)
 
#define QDEC_SHORTS_SAMPLERDY_STOP_Disabled   (0UL)
 
#define QDEC_SHORTS_SAMPLERDY_STOP_Enabled   (1UL)
 
#define QDEC_SHORTS_REPORTRDY_READCLRACC_Pos   (0UL)
 
#define QDEC_SHORTS_REPORTRDY_READCLRACC_Msk   (0x1UL << QDEC_SHORTS_REPORTRDY_READCLRACC_Pos)
 
#define QDEC_SHORTS_REPORTRDY_READCLRACC_Disabled   (0UL)
 
#define QDEC_SHORTS_REPORTRDY_READCLRACC_Enabled   (1UL)
 
#define QDEC_INTENSET_STOPPED_Pos   (4UL)
 
#define QDEC_INTENSET_STOPPED_Msk   (0x1UL << QDEC_INTENSET_STOPPED_Pos)
 
#define QDEC_INTENSET_STOPPED_Disabled   (0UL)
 
#define QDEC_INTENSET_STOPPED_Enabled   (1UL)
 
#define QDEC_INTENSET_STOPPED_Set   (1UL)
 
#define QDEC_INTENSET_DBLRDY_Pos   (3UL)
 
#define QDEC_INTENSET_DBLRDY_Msk   (0x1UL << QDEC_INTENSET_DBLRDY_Pos)
 
#define QDEC_INTENSET_DBLRDY_Disabled   (0UL)
 
#define QDEC_INTENSET_DBLRDY_Enabled   (1UL)
 
#define QDEC_INTENSET_DBLRDY_Set   (1UL)
 
#define QDEC_INTENSET_ACCOF_Pos   (2UL)
 
#define QDEC_INTENSET_ACCOF_Msk   (0x1UL << QDEC_INTENSET_ACCOF_Pos)
 
#define QDEC_INTENSET_ACCOF_Disabled   (0UL)
 
#define QDEC_INTENSET_ACCOF_Enabled   (1UL)
 
#define QDEC_INTENSET_ACCOF_Set   (1UL)
 
#define QDEC_INTENSET_REPORTRDY_Pos   (1UL)
 
#define QDEC_INTENSET_REPORTRDY_Msk   (0x1UL << QDEC_INTENSET_REPORTRDY_Pos)
 
#define QDEC_INTENSET_REPORTRDY_Disabled   (0UL)
 
#define QDEC_INTENSET_REPORTRDY_Enabled   (1UL)
 
#define QDEC_INTENSET_REPORTRDY_Set   (1UL)
 
#define QDEC_INTENSET_SAMPLERDY_Pos   (0UL)
 
#define QDEC_INTENSET_SAMPLERDY_Msk   (0x1UL << QDEC_INTENSET_SAMPLERDY_Pos)
 
#define QDEC_INTENSET_SAMPLERDY_Disabled   (0UL)
 
#define QDEC_INTENSET_SAMPLERDY_Enabled   (1UL)
 
#define QDEC_INTENSET_SAMPLERDY_Set   (1UL)
 
#define QDEC_INTENCLR_STOPPED_Pos   (4UL)
 
#define QDEC_INTENCLR_STOPPED_Msk   (0x1UL << QDEC_INTENCLR_STOPPED_Pos)
 
#define QDEC_INTENCLR_STOPPED_Disabled   (0UL)
 
#define QDEC_INTENCLR_STOPPED_Enabled   (1UL)
 
#define QDEC_INTENCLR_STOPPED_Clear   (1UL)
 
#define QDEC_INTENCLR_DBLRDY_Pos   (3UL)
 
#define QDEC_INTENCLR_DBLRDY_Msk   (0x1UL << QDEC_INTENCLR_DBLRDY_Pos)
 
#define QDEC_INTENCLR_DBLRDY_Disabled   (0UL)
 
#define QDEC_INTENCLR_DBLRDY_Enabled   (1UL)
 
#define QDEC_INTENCLR_DBLRDY_Clear   (1UL)
 
#define QDEC_INTENCLR_ACCOF_Pos   (2UL)
 
#define QDEC_INTENCLR_ACCOF_Msk   (0x1UL << QDEC_INTENCLR_ACCOF_Pos)
 
#define QDEC_INTENCLR_ACCOF_Disabled   (0UL)
 
#define QDEC_INTENCLR_ACCOF_Enabled   (1UL)
 
#define QDEC_INTENCLR_ACCOF_Clear   (1UL)
 
#define QDEC_INTENCLR_REPORTRDY_Pos   (1UL)
 
#define QDEC_INTENCLR_REPORTRDY_Msk   (0x1UL << QDEC_INTENCLR_REPORTRDY_Pos)
 
#define QDEC_INTENCLR_REPORTRDY_Disabled   (0UL)
 
#define QDEC_INTENCLR_REPORTRDY_Enabled   (1UL)
 
#define QDEC_INTENCLR_REPORTRDY_Clear   (1UL)
 
#define QDEC_INTENCLR_SAMPLERDY_Pos   (0UL)
 
#define QDEC_INTENCLR_SAMPLERDY_Msk   (0x1UL << QDEC_INTENCLR_SAMPLERDY_Pos)
 
#define QDEC_INTENCLR_SAMPLERDY_Disabled   (0UL)
 
#define QDEC_INTENCLR_SAMPLERDY_Enabled   (1UL)
 
#define QDEC_INTENCLR_SAMPLERDY_Clear   (1UL)
 
#define QDEC_ENABLE_ENABLE_Pos   (0UL)
 
#define QDEC_ENABLE_ENABLE_Msk   (0x1UL << QDEC_ENABLE_ENABLE_Pos)
 
#define QDEC_ENABLE_ENABLE_Disabled   (0UL)
 
#define QDEC_ENABLE_ENABLE_Enabled   (1UL)
 
#define QDEC_LEDPOL_LEDPOL_Pos   (0UL)
 
#define QDEC_LEDPOL_LEDPOL_Msk   (0x1UL << QDEC_LEDPOL_LEDPOL_Pos)
 
#define QDEC_LEDPOL_LEDPOL_ActiveLow   (0UL)
 
#define QDEC_LEDPOL_LEDPOL_ActiveHigh   (1UL)
 
#define QDEC_SAMPLEPER_SAMPLEPER_Pos   (0UL)
 
#define QDEC_SAMPLEPER_SAMPLEPER_Msk   (0xFUL << QDEC_SAMPLEPER_SAMPLEPER_Pos)
 
#define QDEC_SAMPLEPER_SAMPLEPER_128us   (0UL)
 
#define QDEC_SAMPLEPER_SAMPLEPER_256us   (1UL)
 
#define QDEC_SAMPLEPER_SAMPLEPER_512us   (2UL)
 
#define QDEC_SAMPLEPER_SAMPLEPER_1024us   (3UL)
 
#define QDEC_SAMPLEPER_SAMPLEPER_2048us   (4UL)
 
#define QDEC_SAMPLEPER_SAMPLEPER_4096us   (5UL)
 
#define QDEC_SAMPLEPER_SAMPLEPER_8192us   (6UL)
 
#define QDEC_SAMPLEPER_SAMPLEPER_16384us   (7UL)
 
#define QDEC_SAMPLEPER_SAMPLEPER_32ms   (8UL)
 
#define QDEC_SAMPLEPER_SAMPLEPER_65ms   (9UL)
 
#define QDEC_SAMPLEPER_SAMPLEPER_131ms   (10UL)
 
#define QDEC_SAMPLE_SAMPLE_Pos   (0UL)
 
#define QDEC_SAMPLE_SAMPLE_Msk   (0xFFFFFFFFUL << QDEC_SAMPLE_SAMPLE_Pos)
 
#define QDEC_REPORTPER_REPORTPER_Pos   (0UL)
 
#define QDEC_REPORTPER_REPORTPER_Msk   (0xFUL << QDEC_REPORTPER_REPORTPER_Pos)
 
#define QDEC_REPORTPER_REPORTPER_10Smpl   (0UL)
 
#define QDEC_REPORTPER_REPORTPER_40Smpl   (1UL)
 
#define QDEC_REPORTPER_REPORTPER_80Smpl   (2UL)
 
#define QDEC_REPORTPER_REPORTPER_120Smpl   (3UL)
 
#define QDEC_REPORTPER_REPORTPER_160Smpl   (4UL)
 
#define QDEC_REPORTPER_REPORTPER_200Smpl   (5UL)
 
#define QDEC_REPORTPER_REPORTPER_240Smpl   (6UL)
 
#define QDEC_REPORTPER_REPORTPER_280Smpl   (7UL)
 
#define QDEC_REPORTPER_REPORTPER_1Smpl   (8UL)
 
#define QDEC_ACC_ACC_Pos   (0UL)
 
#define QDEC_ACC_ACC_Msk   (0xFFFFFFFFUL << QDEC_ACC_ACC_Pos)
 
#define QDEC_ACCREAD_ACCREAD_Pos   (0UL)
 
#define QDEC_ACCREAD_ACCREAD_Msk   (0xFFFFFFFFUL << QDEC_ACCREAD_ACCREAD_Pos)
 
#define QDEC_PSEL_LED_CONNECT_Pos   (31UL)
 
#define QDEC_PSEL_LED_CONNECT_Msk   (0x1UL << QDEC_PSEL_LED_CONNECT_Pos)
 
#define QDEC_PSEL_LED_CONNECT_Connected   (0UL)
 
#define QDEC_PSEL_LED_CONNECT_Disconnected   (1UL)
 
#define QDEC_PSEL_LED_PIN_Pos   (0UL)
 
#define QDEC_PSEL_LED_PIN_Msk   (0x1FUL << QDEC_PSEL_LED_PIN_Pos)
 
#define QDEC_PSEL_A_CONNECT_Pos   (31UL)
 
#define QDEC_PSEL_A_CONNECT_Msk   (0x1UL << QDEC_PSEL_A_CONNECT_Pos)
 
#define QDEC_PSEL_A_CONNECT_Connected   (0UL)
 
#define QDEC_PSEL_A_CONNECT_Disconnected   (1UL)
 
#define QDEC_PSEL_A_PIN_Pos   (0UL)
 
#define QDEC_PSEL_A_PIN_Msk   (0x1FUL << QDEC_PSEL_A_PIN_Pos)
 
#define QDEC_PSEL_B_CONNECT_Pos   (31UL)
 
#define QDEC_PSEL_B_CONNECT_Msk   (0x1UL << QDEC_PSEL_B_CONNECT_Pos)
 
#define QDEC_PSEL_B_CONNECT_Connected   (0UL)
 
#define QDEC_PSEL_B_CONNECT_Disconnected   (1UL)
 
#define QDEC_PSEL_B_PIN_Pos   (0UL)
 
#define QDEC_PSEL_B_PIN_Msk   (0x1FUL << QDEC_PSEL_B_PIN_Pos)
 
#define QDEC_DBFEN_DBFEN_Pos   (0UL)
 
#define QDEC_DBFEN_DBFEN_Msk   (0x1UL << QDEC_DBFEN_DBFEN_Pos)
 
#define QDEC_DBFEN_DBFEN_Disabled   (0UL)
 
#define QDEC_DBFEN_DBFEN_Enabled   (1UL)
 
#define QDEC_LEDPRE_LEDPRE_Pos   (0UL)
 
#define QDEC_LEDPRE_LEDPRE_Msk   (0x1FFUL << QDEC_LEDPRE_LEDPRE_Pos)
 
#define QDEC_ACCDBL_ACCDBL_Pos   (0UL)
 
#define QDEC_ACCDBL_ACCDBL_Msk   (0xFUL << QDEC_ACCDBL_ACCDBL_Pos)
 
#define QDEC_ACCDBLREAD_ACCDBLREAD_Pos   (0UL)
 
#define QDEC_ACCDBLREAD_ACCDBLREAD_Msk   (0xFUL << QDEC_ACCDBLREAD_ACCDBLREAD_Pos)
 
#define RADIO_SHORTS_DISABLED_RSSISTOP_Pos   (8UL)
 
#define RADIO_SHORTS_DISABLED_RSSISTOP_Msk   (0x1UL << RADIO_SHORTS_DISABLED_RSSISTOP_Pos)
 
#define RADIO_SHORTS_DISABLED_RSSISTOP_Disabled   (0UL)
 
#define RADIO_SHORTS_DISABLED_RSSISTOP_Enabled   (1UL)
 
#define RADIO_SHORTS_ADDRESS_BCSTART_Pos   (6UL)
 
#define RADIO_SHORTS_ADDRESS_BCSTART_Msk   (0x1UL << RADIO_SHORTS_ADDRESS_BCSTART_Pos)
 
#define RADIO_SHORTS_ADDRESS_BCSTART_Disabled   (0UL)
 
#define RADIO_SHORTS_ADDRESS_BCSTART_Enabled   (1UL)
 
#define RADIO_SHORTS_END_START_Pos   (5UL)
 
#define RADIO_SHORTS_END_START_Msk   (0x1UL << RADIO_SHORTS_END_START_Pos)
 
#define RADIO_SHORTS_END_START_Disabled   (0UL)
 
#define RADIO_SHORTS_END_START_Enabled   (1UL)
 
#define RADIO_SHORTS_ADDRESS_RSSISTART_Pos   (4UL)
 
#define RADIO_SHORTS_ADDRESS_RSSISTART_Msk   (0x1UL << RADIO_SHORTS_ADDRESS_RSSISTART_Pos)
 
#define RADIO_SHORTS_ADDRESS_RSSISTART_Disabled   (0UL)
 
#define RADIO_SHORTS_ADDRESS_RSSISTART_Enabled   (1UL)
 
#define RADIO_SHORTS_DISABLED_RXEN_Pos   (3UL)
 
#define RADIO_SHORTS_DISABLED_RXEN_Msk   (0x1UL << RADIO_SHORTS_DISABLED_RXEN_Pos)
 
#define RADIO_SHORTS_DISABLED_RXEN_Disabled   (0UL)
 
#define RADIO_SHORTS_DISABLED_RXEN_Enabled   (1UL)
 
#define RADIO_SHORTS_DISABLED_TXEN_Pos   (2UL)
 
#define RADIO_SHORTS_DISABLED_TXEN_Msk   (0x1UL << RADIO_SHORTS_DISABLED_TXEN_Pos)
 
#define RADIO_SHORTS_DISABLED_TXEN_Disabled   (0UL)
 
#define RADIO_SHORTS_DISABLED_TXEN_Enabled   (1UL)
 
#define RADIO_SHORTS_END_DISABLE_Pos   (1UL)
 
#define RADIO_SHORTS_END_DISABLE_Msk   (0x1UL << RADIO_SHORTS_END_DISABLE_Pos)
 
#define RADIO_SHORTS_END_DISABLE_Disabled   (0UL)
 
#define RADIO_SHORTS_END_DISABLE_Enabled   (1UL)
 
#define RADIO_SHORTS_READY_START_Pos   (0UL)
 
#define RADIO_SHORTS_READY_START_Msk   (0x1UL << RADIO_SHORTS_READY_START_Pos)
 
#define RADIO_SHORTS_READY_START_Disabled   (0UL)
 
#define RADIO_SHORTS_READY_START_Enabled   (1UL)
 
#define RADIO_INTENSET_CRCERROR_Pos   (13UL)
 
#define RADIO_INTENSET_CRCERROR_Msk   (0x1UL << RADIO_INTENSET_CRCERROR_Pos)
 
#define RADIO_INTENSET_CRCERROR_Disabled   (0UL)
 
#define RADIO_INTENSET_CRCERROR_Enabled   (1UL)
 
#define RADIO_INTENSET_CRCERROR_Set   (1UL)
 
#define RADIO_INTENSET_CRCOK_Pos   (12UL)
 
#define RADIO_INTENSET_CRCOK_Msk   (0x1UL << RADIO_INTENSET_CRCOK_Pos)
 
#define RADIO_INTENSET_CRCOK_Disabled   (0UL)
 
#define RADIO_INTENSET_CRCOK_Enabled   (1UL)
 
#define RADIO_INTENSET_CRCOK_Set   (1UL)
 
#define RADIO_INTENSET_BCMATCH_Pos   (10UL)
 
#define RADIO_INTENSET_BCMATCH_Msk   (0x1UL << RADIO_INTENSET_BCMATCH_Pos)
 
#define RADIO_INTENSET_BCMATCH_Disabled   (0UL)
 
#define RADIO_INTENSET_BCMATCH_Enabled   (1UL)
 
#define RADIO_INTENSET_BCMATCH_Set   (1UL)
 
#define RADIO_INTENSET_RSSIEND_Pos   (7UL)
 
#define RADIO_INTENSET_RSSIEND_Msk   (0x1UL << RADIO_INTENSET_RSSIEND_Pos)
 
#define RADIO_INTENSET_RSSIEND_Disabled   (0UL)
 
#define RADIO_INTENSET_RSSIEND_Enabled   (1UL)
 
#define RADIO_INTENSET_RSSIEND_Set   (1UL)
 
#define RADIO_INTENSET_DEVMISS_Pos   (6UL)
 
#define RADIO_INTENSET_DEVMISS_Msk   (0x1UL << RADIO_INTENSET_DEVMISS_Pos)
 
#define RADIO_INTENSET_DEVMISS_Disabled   (0UL)
 
#define RADIO_INTENSET_DEVMISS_Enabled   (1UL)
 
#define RADIO_INTENSET_DEVMISS_Set   (1UL)
 
#define RADIO_INTENSET_DEVMATCH_Pos   (5UL)
 
#define RADIO_INTENSET_DEVMATCH_Msk   (0x1UL << RADIO_INTENSET_DEVMATCH_Pos)
 
#define RADIO_INTENSET_DEVMATCH_Disabled   (0UL)
 
#define RADIO_INTENSET_DEVMATCH_Enabled   (1UL)
 
#define RADIO_INTENSET_DEVMATCH_Set   (1UL)
 
#define RADIO_INTENSET_DISABLED_Pos   (4UL)
 
#define RADIO_INTENSET_DISABLED_Msk   (0x1UL << RADIO_INTENSET_DISABLED_Pos)
 
#define RADIO_INTENSET_DISABLED_Disabled   (0UL)
 
#define RADIO_INTENSET_DISABLED_Enabled   (1UL)
 
#define RADIO_INTENSET_DISABLED_Set   (1UL)
 
#define RADIO_INTENSET_END_Pos   (3UL)
 
#define RADIO_INTENSET_END_Msk   (0x1UL << RADIO_INTENSET_END_Pos)
 
#define RADIO_INTENSET_END_Disabled   (0UL)
 
#define RADIO_INTENSET_END_Enabled   (1UL)
 
#define RADIO_INTENSET_END_Set   (1UL)
 
#define RADIO_INTENSET_PAYLOAD_Pos   (2UL)
 
#define RADIO_INTENSET_PAYLOAD_Msk   (0x1UL << RADIO_INTENSET_PAYLOAD_Pos)
 
#define RADIO_INTENSET_PAYLOAD_Disabled   (0UL)
 
#define RADIO_INTENSET_PAYLOAD_Enabled   (1UL)
 
#define RADIO_INTENSET_PAYLOAD_Set   (1UL)
 
#define RADIO_INTENSET_ADDRESS_Pos   (1UL)
 
#define RADIO_INTENSET_ADDRESS_Msk   (0x1UL << RADIO_INTENSET_ADDRESS_Pos)
 
#define RADIO_INTENSET_ADDRESS_Disabled   (0UL)
 
#define RADIO_INTENSET_ADDRESS_Enabled   (1UL)
 
#define RADIO_INTENSET_ADDRESS_Set   (1UL)
 
#define RADIO_INTENSET_READY_Pos   (0UL)
 
#define RADIO_INTENSET_READY_Msk   (0x1UL << RADIO_INTENSET_READY_Pos)
 
#define RADIO_INTENSET_READY_Disabled   (0UL)
 
#define RADIO_INTENSET_READY_Enabled   (1UL)
 
#define RADIO_INTENSET_READY_Set   (1UL)
 
#define RADIO_INTENCLR_CRCERROR_Pos   (13UL)
 
#define RADIO_INTENCLR_CRCERROR_Msk   (0x1UL << RADIO_INTENCLR_CRCERROR_Pos)
 
#define RADIO_INTENCLR_CRCERROR_Disabled   (0UL)
 
#define RADIO_INTENCLR_CRCERROR_Enabled   (1UL)
 
#define RADIO_INTENCLR_CRCERROR_Clear   (1UL)
 
#define RADIO_INTENCLR_CRCOK_Pos   (12UL)
 
#define RADIO_INTENCLR_CRCOK_Msk   (0x1UL << RADIO_INTENCLR_CRCOK_Pos)
 
#define RADIO_INTENCLR_CRCOK_Disabled   (0UL)
 
#define RADIO_INTENCLR_CRCOK_Enabled   (1UL)
 
#define RADIO_INTENCLR_CRCOK_Clear   (1UL)
 
#define RADIO_INTENCLR_BCMATCH_Pos   (10UL)
 
#define RADIO_INTENCLR_BCMATCH_Msk   (0x1UL << RADIO_INTENCLR_BCMATCH_Pos)
 
#define RADIO_INTENCLR_BCMATCH_Disabled   (0UL)
 
#define RADIO_INTENCLR_BCMATCH_Enabled   (1UL)
 
#define RADIO_INTENCLR_BCMATCH_Clear   (1UL)
 
#define RADIO_INTENCLR_RSSIEND_Pos   (7UL)
 
#define RADIO_INTENCLR_RSSIEND_Msk   (0x1UL << RADIO_INTENCLR_RSSIEND_Pos)
 
#define RADIO_INTENCLR_RSSIEND_Disabled   (0UL)
 
#define RADIO_INTENCLR_RSSIEND_Enabled   (1UL)
 
#define RADIO_INTENCLR_RSSIEND_Clear   (1UL)
 
#define RADIO_INTENCLR_DEVMISS_Pos   (6UL)
 
#define RADIO_INTENCLR_DEVMISS_Msk   (0x1UL << RADIO_INTENCLR_DEVMISS_Pos)
 
#define RADIO_INTENCLR_DEVMISS_Disabled   (0UL)
 
#define RADIO_INTENCLR_DEVMISS_Enabled   (1UL)
 
#define RADIO_INTENCLR_DEVMISS_Clear   (1UL)
 
#define RADIO_INTENCLR_DEVMATCH_Pos   (5UL)
 
#define RADIO_INTENCLR_DEVMATCH_Msk   (0x1UL << RADIO_INTENCLR_DEVMATCH_Pos)
 
#define RADIO_INTENCLR_DEVMATCH_Disabled   (0UL)
 
#define RADIO_INTENCLR_DEVMATCH_Enabled   (1UL)
 
#define RADIO_INTENCLR_DEVMATCH_Clear   (1UL)
 
#define RADIO_INTENCLR_DISABLED_Pos   (4UL)
 
#define RADIO_INTENCLR_DISABLED_Msk   (0x1UL << RADIO_INTENCLR_DISABLED_Pos)
 
#define RADIO_INTENCLR_DISABLED_Disabled   (0UL)
 
#define RADIO_INTENCLR_DISABLED_Enabled   (1UL)
 
#define RADIO_INTENCLR_DISABLED_Clear   (1UL)
 
#define RADIO_INTENCLR_END_Pos   (3UL)
 
#define RADIO_INTENCLR_END_Msk   (0x1UL << RADIO_INTENCLR_END_Pos)
 
#define RADIO_INTENCLR_END_Disabled   (0UL)
 
#define RADIO_INTENCLR_END_Enabled   (1UL)
 
#define RADIO_INTENCLR_END_Clear   (1UL)
 
#define RADIO_INTENCLR_PAYLOAD_Pos   (2UL)
 
#define RADIO_INTENCLR_PAYLOAD_Msk   (0x1UL << RADIO_INTENCLR_PAYLOAD_Pos)
 
#define RADIO_INTENCLR_PAYLOAD_Disabled   (0UL)
 
#define RADIO_INTENCLR_PAYLOAD_Enabled   (1UL)
 
#define RADIO_INTENCLR_PAYLOAD_Clear   (1UL)
 
#define RADIO_INTENCLR_ADDRESS_Pos   (1UL)
 
#define RADIO_INTENCLR_ADDRESS_Msk   (0x1UL << RADIO_INTENCLR_ADDRESS_Pos)
 
#define RADIO_INTENCLR_ADDRESS_Disabled   (0UL)
 
#define RADIO_INTENCLR_ADDRESS_Enabled   (1UL)
 
#define RADIO_INTENCLR_ADDRESS_Clear   (1UL)
 
#define RADIO_INTENCLR_READY_Pos   (0UL)
 
#define RADIO_INTENCLR_READY_Msk   (0x1UL << RADIO_INTENCLR_READY_Pos)
 
#define RADIO_INTENCLR_READY_Disabled   (0UL)
 
#define RADIO_INTENCLR_READY_Enabled   (1UL)
 
#define RADIO_INTENCLR_READY_Clear   (1UL)
 
#define RADIO_CRCSTATUS_CRCSTATUS_Pos   (0UL)
 
#define RADIO_CRCSTATUS_CRCSTATUS_Msk   (0x1UL << RADIO_CRCSTATUS_CRCSTATUS_Pos)
 
#define RADIO_CRCSTATUS_CRCSTATUS_CRCError   (0UL)
 
#define RADIO_CRCSTATUS_CRCSTATUS_CRCOk   (1UL)
 
#define RADIO_RXMATCH_RXMATCH_Pos   (0UL)
 
#define RADIO_RXMATCH_RXMATCH_Msk   (0x7UL << RADIO_RXMATCH_RXMATCH_Pos)
 
#define RADIO_RXCRC_RXCRC_Pos   (0UL)
 
#define RADIO_RXCRC_RXCRC_Msk   (0xFFFFFFUL << RADIO_RXCRC_RXCRC_Pos)
 
#define RADIO_DAI_DAI_Pos   (0UL)
 
#define RADIO_DAI_DAI_Msk   (0x7UL << RADIO_DAI_DAI_Pos)
 
#define RADIO_PACKETPTR_PACKETPTR_Pos   (0UL)
 
#define RADIO_PACKETPTR_PACKETPTR_Msk   (0xFFFFFFFFUL << RADIO_PACKETPTR_PACKETPTR_Pos)
 
#define RADIO_FREQUENCY_FREQUENCY_Pos   (0UL)
 
#define RADIO_FREQUENCY_FREQUENCY_Msk   (0x7FUL << RADIO_FREQUENCY_FREQUENCY_Pos)
 
#define RADIO_TXPOWER_TXPOWER_Pos   (0UL)
 
#define RADIO_TXPOWER_TXPOWER_Msk   (0xFFUL << RADIO_TXPOWER_TXPOWER_Pos)
 
#define RADIO_TXPOWER_TXPOWER_0dBm   (0x00UL)
 
#define RADIO_TXPOWER_TXPOWER_Pos3dBm   (0x03UL)
 
#define RADIO_TXPOWER_TXPOWER_Pos4dBm   (0x04UL)
 
#define RADIO_TXPOWER_TXPOWER_Neg30dBm   (0xD8UL)
 
#define RADIO_TXPOWER_TXPOWER_Neg40dBm   (0xD8UL)
 
#define RADIO_TXPOWER_TXPOWER_Neg20dBm   (0xECUL)
 
#define RADIO_TXPOWER_TXPOWER_Neg16dBm   (0xF0UL)
 
#define RADIO_TXPOWER_TXPOWER_Neg12dBm   (0xF4UL)
 
#define RADIO_TXPOWER_TXPOWER_Neg8dBm   (0xF8UL)
 
#define RADIO_TXPOWER_TXPOWER_Neg4dBm   (0xFCUL)
 
#define RADIO_MODE_MODE_Pos   (0UL)
 
#define RADIO_MODE_MODE_Msk   (0xFUL << RADIO_MODE_MODE_Pos)
 
#define RADIO_MODE_MODE_Nrf_1Mbit   (0UL)
 
#define RADIO_MODE_MODE_Nrf_2Mbit   (1UL)
 
#define RADIO_MODE_MODE_Nrf_250Kbit   (2UL)
 
#define RADIO_MODE_MODE_Ble_1Mbit   (3UL)
 
#define RADIO_PCNF0_PLEN_Pos   (24UL)
 
#define RADIO_PCNF0_PLEN_Msk   (0x1UL << RADIO_PCNF0_PLEN_Pos)
 
#define RADIO_PCNF0_PLEN_8bit   (0UL)
 
#define RADIO_PCNF0_PLEN_16bit   (1UL)
 
#define RADIO_PCNF0_S1INCL_Pos   (20UL)
 
#define RADIO_PCNF0_S1INCL_Msk   (0x1UL << RADIO_PCNF0_S1INCL_Pos)
 
#define RADIO_PCNF0_S1INCL_Automatic   (0UL)
 
#define RADIO_PCNF0_S1INCL_Include   (1UL)
 
#define RADIO_PCNF0_S1LEN_Pos   (16UL)
 
#define RADIO_PCNF0_S1LEN_Msk   (0xFUL << RADIO_PCNF0_S1LEN_Pos)
 
#define RADIO_PCNF0_S0LEN_Pos   (8UL)
 
#define RADIO_PCNF0_S0LEN_Msk   (0x1UL << RADIO_PCNF0_S0LEN_Pos)
 
#define RADIO_PCNF0_LFLEN_Pos   (0UL)
 
#define RADIO_PCNF0_LFLEN_Msk   (0xFUL << RADIO_PCNF0_LFLEN_Pos)
 
#define RADIO_PCNF1_WHITEEN_Pos   (25UL)
 
#define RADIO_PCNF1_WHITEEN_Msk   (0x1UL << RADIO_PCNF1_WHITEEN_Pos)
 
#define RADIO_PCNF1_WHITEEN_Disabled   (0UL)
 
#define RADIO_PCNF1_WHITEEN_Enabled   (1UL)
 
#define RADIO_PCNF1_ENDIAN_Pos   (24UL)
 
#define RADIO_PCNF1_ENDIAN_Msk   (0x1UL << RADIO_PCNF1_ENDIAN_Pos)
 
#define RADIO_PCNF1_ENDIAN_Little   (0UL)
 
#define RADIO_PCNF1_ENDIAN_Big   (1UL)
 
#define RADIO_PCNF1_BALEN_Pos   (16UL)
 
#define RADIO_PCNF1_BALEN_Msk   (0x7UL << RADIO_PCNF1_BALEN_Pos)
 
#define RADIO_PCNF1_STATLEN_Pos   (8UL)
 
#define RADIO_PCNF1_STATLEN_Msk   (0xFFUL << RADIO_PCNF1_STATLEN_Pos)
 
#define RADIO_PCNF1_MAXLEN_Pos   (0UL)
 
#define RADIO_PCNF1_MAXLEN_Msk   (0xFFUL << RADIO_PCNF1_MAXLEN_Pos)
 
#define RADIO_BASE0_BASE0_Pos   (0UL)
 
#define RADIO_BASE0_BASE0_Msk   (0xFFFFFFFFUL << RADIO_BASE0_BASE0_Pos)
 
#define RADIO_BASE1_BASE1_Pos   (0UL)
 
#define RADIO_BASE1_BASE1_Msk   (0xFFFFFFFFUL << RADIO_BASE1_BASE1_Pos)
 
#define RADIO_PREFIX0_AP3_Pos   (24UL)
 
#define RADIO_PREFIX0_AP3_Msk   (0xFFUL << RADIO_PREFIX0_AP3_Pos)
 
#define RADIO_PREFIX0_AP2_Pos   (16UL)
 
#define RADIO_PREFIX0_AP2_Msk   (0xFFUL << RADIO_PREFIX0_AP2_Pos)
 
#define RADIO_PREFIX0_AP1_Pos   (8UL)
 
#define RADIO_PREFIX0_AP1_Msk   (0xFFUL << RADIO_PREFIX0_AP1_Pos)
 
#define RADIO_PREFIX0_AP0_Pos   (0UL)
 
#define RADIO_PREFIX0_AP0_Msk   (0xFFUL << RADIO_PREFIX0_AP0_Pos)
 
#define RADIO_PREFIX1_AP7_Pos   (24UL)
 
#define RADIO_PREFIX1_AP7_Msk   (0xFFUL << RADIO_PREFIX1_AP7_Pos)
 
#define RADIO_PREFIX1_AP6_Pos   (16UL)
 
#define RADIO_PREFIX1_AP6_Msk   (0xFFUL << RADIO_PREFIX1_AP6_Pos)
 
#define RADIO_PREFIX1_AP5_Pos   (8UL)
 
#define RADIO_PREFIX1_AP5_Msk   (0xFFUL << RADIO_PREFIX1_AP5_Pos)
 
#define RADIO_PREFIX1_AP4_Pos   (0UL)
 
#define RADIO_PREFIX1_AP4_Msk   (0xFFUL << RADIO_PREFIX1_AP4_Pos)
 
#define RADIO_TXADDRESS_TXADDRESS_Pos   (0UL)
 
#define RADIO_TXADDRESS_TXADDRESS_Msk   (0x7UL << RADIO_TXADDRESS_TXADDRESS_Pos)
 
#define RADIO_RXADDRESSES_ADDR7_Pos   (7UL)
 
#define RADIO_RXADDRESSES_ADDR7_Msk   (0x1UL << RADIO_RXADDRESSES_ADDR7_Pos)
 
#define RADIO_RXADDRESSES_ADDR7_Disabled   (0UL)
 
#define RADIO_RXADDRESSES_ADDR7_Enabled   (1UL)
 
#define RADIO_RXADDRESSES_ADDR6_Pos   (6UL)
 
#define RADIO_RXADDRESSES_ADDR6_Msk   (0x1UL << RADIO_RXADDRESSES_ADDR6_Pos)
 
#define RADIO_RXADDRESSES_ADDR6_Disabled   (0UL)
 
#define RADIO_RXADDRESSES_ADDR6_Enabled   (1UL)
 
#define RADIO_RXADDRESSES_ADDR5_Pos   (5UL)
 
#define RADIO_RXADDRESSES_ADDR5_Msk   (0x1UL << RADIO_RXADDRESSES_ADDR5_Pos)
 
#define RADIO_RXADDRESSES_ADDR5_Disabled   (0UL)
 
#define RADIO_RXADDRESSES_ADDR5_Enabled   (1UL)
 
#define RADIO_RXADDRESSES_ADDR4_Pos   (4UL)
 
#define RADIO_RXADDRESSES_ADDR4_Msk   (0x1UL << RADIO_RXADDRESSES_ADDR4_Pos)
 
#define RADIO_RXADDRESSES_ADDR4_Disabled   (0UL)
 
#define RADIO_RXADDRESSES_ADDR4_Enabled   (1UL)
 
#define RADIO_RXADDRESSES_ADDR3_Pos   (3UL)
 
#define RADIO_RXADDRESSES_ADDR3_Msk   (0x1UL << RADIO_RXADDRESSES_ADDR3_Pos)
 
#define RADIO_RXADDRESSES_ADDR3_Disabled   (0UL)
 
#define RADIO_RXADDRESSES_ADDR3_Enabled   (1UL)
 
#define RADIO_RXADDRESSES_ADDR2_Pos   (2UL)
 
#define RADIO_RXADDRESSES_ADDR2_Msk   (0x1UL << RADIO_RXADDRESSES_ADDR2_Pos)
 
#define RADIO_RXADDRESSES_ADDR2_Disabled   (0UL)
 
#define RADIO_RXADDRESSES_ADDR2_Enabled   (1UL)
 
#define RADIO_RXADDRESSES_ADDR1_Pos   (1UL)
 
#define RADIO_RXADDRESSES_ADDR1_Msk   (0x1UL << RADIO_RXADDRESSES_ADDR1_Pos)
 
#define RADIO_RXADDRESSES_ADDR1_Disabled   (0UL)
 
#define RADIO_RXADDRESSES_ADDR1_Enabled   (1UL)
 
#define RADIO_RXADDRESSES_ADDR0_Pos   (0UL)
 
#define RADIO_RXADDRESSES_ADDR0_Msk   (0x1UL << RADIO_RXADDRESSES_ADDR0_Pos)
 
#define RADIO_RXADDRESSES_ADDR0_Disabled   (0UL)
 
#define RADIO_RXADDRESSES_ADDR0_Enabled   (1UL)
 
#define RADIO_CRCCNF_SKIPADDR_Pos   (8UL)
 
#define RADIO_CRCCNF_SKIPADDR_Msk   (0x1UL << RADIO_CRCCNF_SKIPADDR_Pos)
 
#define RADIO_CRCCNF_SKIPADDR_Include   (0UL)
 
#define RADIO_CRCCNF_SKIPADDR_Skip   (1UL)
 
#define RADIO_CRCCNF_LEN_Pos   (0UL)
 
#define RADIO_CRCCNF_LEN_Msk   (0x3UL << RADIO_CRCCNF_LEN_Pos)
 
#define RADIO_CRCCNF_LEN_Disabled   (0UL)
 
#define RADIO_CRCCNF_LEN_One   (1UL)
 
#define RADIO_CRCCNF_LEN_Two   (2UL)
 
#define RADIO_CRCCNF_LEN_Three   (3UL)
 
#define RADIO_CRCPOLY_CRCPOLY_Pos   (0UL)
 
#define RADIO_CRCPOLY_CRCPOLY_Msk   (0xFFFFFFUL << RADIO_CRCPOLY_CRCPOLY_Pos)
 
#define RADIO_CRCINIT_CRCINIT_Pos   (0UL)
 
#define RADIO_CRCINIT_CRCINIT_Msk   (0xFFFFFFUL << RADIO_CRCINIT_CRCINIT_Pos)
 
#define RADIO_TIFS_TIFS_Pos   (0UL)
 
#define RADIO_TIFS_TIFS_Msk   (0xFFUL << RADIO_TIFS_TIFS_Pos)
 
#define RADIO_RSSISAMPLE_RSSISAMPLE_Pos   (0UL)
 
#define RADIO_RSSISAMPLE_RSSISAMPLE_Msk   (0x7FUL << RADIO_RSSISAMPLE_RSSISAMPLE_Pos)
 
#define RADIO_STATE_STATE_Pos   (0UL)
 
#define RADIO_STATE_STATE_Msk   (0xFUL << RADIO_STATE_STATE_Pos)
 
#define RADIO_STATE_STATE_Disabled   (0UL)
 
#define RADIO_STATE_STATE_RxRu   (1UL)
 
#define RADIO_STATE_STATE_RxIdle   (2UL)
 
#define RADIO_STATE_STATE_Rx   (3UL)
 
#define RADIO_STATE_STATE_RxDisable   (4UL)
 
#define RADIO_STATE_STATE_TxRu   (9UL)
 
#define RADIO_STATE_STATE_TxIdle   (10UL)
 
#define RADIO_STATE_STATE_Tx   (11UL)
 
#define RADIO_STATE_STATE_TxDisable   (12UL)
 
#define RADIO_DATAWHITEIV_DATAWHITEIV_Pos   (0UL)
 
#define RADIO_DATAWHITEIV_DATAWHITEIV_Msk   (0x7FUL << RADIO_DATAWHITEIV_DATAWHITEIV_Pos)
 
#define RADIO_BCC_BCC_Pos   (0UL)
 
#define RADIO_BCC_BCC_Msk   (0xFFFFFFFFUL << RADIO_BCC_BCC_Pos)
 
#define RADIO_DAB_DAB_Pos   (0UL)
 
#define RADIO_DAB_DAB_Msk   (0xFFFFFFFFUL << RADIO_DAB_DAB_Pos)
 
#define RADIO_DAP_DAP_Pos   (0UL)
 
#define RADIO_DAP_DAP_Msk   (0xFFFFUL << RADIO_DAP_DAP_Pos)
 
#define RADIO_DACNF_TXADD7_Pos   (15UL)
 
#define RADIO_DACNF_TXADD7_Msk   (0x1UL << RADIO_DACNF_TXADD7_Pos)
 
#define RADIO_DACNF_TXADD6_Pos   (14UL)
 
#define RADIO_DACNF_TXADD6_Msk   (0x1UL << RADIO_DACNF_TXADD6_Pos)
 
#define RADIO_DACNF_TXADD5_Pos   (13UL)
 
#define RADIO_DACNF_TXADD5_Msk   (0x1UL << RADIO_DACNF_TXADD5_Pos)
 
#define RADIO_DACNF_TXADD4_Pos   (12UL)
 
#define RADIO_DACNF_TXADD4_Msk   (0x1UL << RADIO_DACNF_TXADD4_Pos)
 
#define RADIO_DACNF_TXADD3_Pos   (11UL)
 
#define RADIO_DACNF_TXADD3_Msk   (0x1UL << RADIO_DACNF_TXADD3_Pos)
 
#define RADIO_DACNF_TXADD2_Pos   (10UL)
 
#define RADIO_DACNF_TXADD2_Msk   (0x1UL << RADIO_DACNF_TXADD2_Pos)
 
#define RADIO_DACNF_TXADD1_Pos   (9UL)
 
#define RADIO_DACNF_TXADD1_Msk   (0x1UL << RADIO_DACNF_TXADD1_Pos)
 
#define RADIO_DACNF_TXADD0_Pos   (8UL)
 
#define RADIO_DACNF_TXADD0_Msk   (0x1UL << RADIO_DACNF_TXADD0_Pos)
 
#define RADIO_DACNF_ENA7_Pos   (7UL)
 
#define RADIO_DACNF_ENA7_Msk   (0x1UL << RADIO_DACNF_ENA7_Pos)
 
#define RADIO_DACNF_ENA7_Disabled   (0UL)
 
#define RADIO_DACNF_ENA7_Enabled   (1UL)
 
#define RADIO_DACNF_ENA6_Pos   (6UL)
 
#define RADIO_DACNF_ENA6_Msk   (0x1UL << RADIO_DACNF_ENA6_Pos)
 
#define RADIO_DACNF_ENA6_Disabled   (0UL)
 
#define RADIO_DACNF_ENA6_Enabled   (1UL)
 
#define RADIO_DACNF_ENA5_Pos   (5UL)
 
#define RADIO_DACNF_ENA5_Msk   (0x1UL << RADIO_DACNF_ENA5_Pos)
 
#define RADIO_DACNF_ENA5_Disabled   (0UL)
 
#define RADIO_DACNF_ENA5_Enabled   (1UL)
 
#define RADIO_DACNF_ENA4_Pos   (4UL)
 
#define RADIO_DACNF_ENA4_Msk   (0x1UL << RADIO_DACNF_ENA4_Pos)
 
#define RADIO_DACNF_ENA4_Disabled   (0UL)
 
#define RADIO_DACNF_ENA4_Enabled   (1UL)
 
#define RADIO_DACNF_ENA3_Pos   (3UL)
 
#define RADIO_DACNF_ENA3_Msk   (0x1UL << RADIO_DACNF_ENA3_Pos)
 
#define RADIO_DACNF_ENA3_Disabled   (0UL)
 
#define RADIO_DACNF_ENA3_Enabled   (1UL)
 
#define RADIO_DACNF_ENA2_Pos   (2UL)
 
#define RADIO_DACNF_ENA2_Msk   (0x1UL << RADIO_DACNF_ENA2_Pos)
 
#define RADIO_DACNF_ENA2_Disabled   (0UL)
 
#define RADIO_DACNF_ENA2_Enabled   (1UL)
 
#define RADIO_DACNF_ENA1_Pos   (1UL)
 
#define RADIO_DACNF_ENA1_Msk   (0x1UL << RADIO_DACNF_ENA1_Pos)
 
#define RADIO_DACNF_ENA1_Disabled   (0UL)
 
#define RADIO_DACNF_ENA1_Enabled   (1UL)
 
#define RADIO_DACNF_ENA0_Pos   (0UL)
 
#define RADIO_DACNF_ENA0_Msk   (0x1UL << RADIO_DACNF_ENA0_Pos)
 
#define RADIO_DACNF_ENA0_Disabled   (0UL)
 
#define RADIO_DACNF_ENA0_Enabled   (1UL)
 
#define RADIO_MODECNF0_DTX_Pos   (8UL)
 
#define RADIO_MODECNF0_DTX_Msk   (0x3UL << RADIO_MODECNF0_DTX_Pos)
 
#define RADIO_MODECNF0_DTX_B1   (0UL)
 
#define RADIO_MODECNF0_DTX_B0   (1UL)
 
#define RADIO_MODECNF0_DTX_Center   (2UL)
 
#define RADIO_MODECNF0_RU_Pos   (0UL)
 
#define RADIO_MODECNF0_RU_Msk   (0x1UL << RADIO_MODECNF0_RU_Pos)
 
#define RADIO_MODECNF0_RU_Default   (0UL)
 
#define RADIO_MODECNF0_RU_Fast   (1UL)
 
#define RADIO_POWER_POWER_Pos   (0UL)
 
#define RADIO_POWER_POWER_Msk   (0x1UL << RADIO_POWER_POWER_Pos)
 
#define RADIO_POWER_POWER_Disabled   (0UL)
 
#define RADIO_POWER_POWER_Enabled   (1UL)
 
#define RNG_SHORTS_VALRDY_STOP_Pos   (0UL)
 
#define RNG_SHORTS_VALRDY_STOP_Msk   (0x1UL << RNG_SHORTS_VALRDY_STOP_Pos)
 
#define RNG_SHORTS_VALRDY_STOP_Disabled   (0UL)
 
#define RNG_SHORTS_VALRDY_STOP_Enabled   (1UL)
 
#define RNG_INTENSET_VALRDY_Pos   (0UL)
 
#define RNG_INTENSET_VALRDY_Msk   (0x1UL << RNG_INTENSET_VALRDY_Pos)
 
#define RNG_INTENSET_VALRDY_Disabled   (0UL)
 
#define RNG_INTENSET_VALRDY_Enabled   (1UL)
 
#define RNG_INTENSET_VALRDY_Set   (1UL)
 
#define RNG_INTENCLR_VALRDY_Pos   (0UL)
 
#define RNG_INTENCLR_VALRDY_Msk   (0x1UL << RNG_INTENCLR_VALRDY_Pos)
 
#define RNG_INTENCLR_VALRDY_Disabled   (0UL)
 
#define RNG_INTENCLR_VALRDY_Enabled   (1UL)
 
#define RNG_INTENCLR_VALRDY_Clear   (1UL)
 
#define RNG_CONFIG_DERCEN_Pos   (0UL)
 
#define RNG_CONFIG_DERCEN_Msk   (0x1UL << RNG_CONFIG_DERCEN_Pos)
 
#define RNG_CONFIG_DERCEN_Disabled   (0UL)
 
#define RNG_CONFIG_DERCEN_Enabled   (1UL)
 
#define RNG_VALUE_VALUE_Pos   (0UL)
 
#define RNG_VALUE_VALUE_Msk   (0xFFUL << RNG_VALUE_VALUE_Pos)
 
#define RTC_INTENSET_COMPARE3_Pos   (19UL)
 
#define RTC_INTENSET_COMPARE3_Msk   (0x1UL << RTC_INTENSET_COMPARE3_Pos)
 
#define RTC_INTENSET_COMPARE3_Disabled   (0UL)
 
#define RTC_INTENSET_COMPARE3_Enabled   (1UL)
 
#define RTC_INTENSET_COMPARE3_Set   (1UL)
 
#define RTC_INTENSET_COMPARE2_Pos   (18UL)
 
#define RTC_INTENSET_COMPARE2_Msk   (0x1UL << RTC_INTENSET_COMPARE2_Pos)
 
#define RTC_INTENSET_COMPARE2_Disabled   (0UL)
 
#define RTC_INTENSET_COMPARE2_Enabled   (1UL)
 
#define RTC_INTENSET_COMPARE2_Set   (1UL)
 
#define RTC_INTENSET_COMPARE1_Pos   (17UL)
 
#define RTC_INTENSET_COMPARE1_Msk   (0x1UL << RTC_INTENSET_COMPARE1_Pos)
 
#define RTC_INTENSET_COMPARE1_Disabled   (0UL)
 
#define RTC_INTENSET_COMPARE1_Enabled   (1UL)
 
#define RTC_INTENSET_COMPARE1_Set   (1UL)
 
#define RTC_INTENSET_COMPARE0_Pos   (16UL)
 
#define RTC_INTENSET_COMPARE0_Msk   (0x1UL << RTC_INTENSET_COMPARE0_Pos)
 
#define RTC_INTENSET_COMPARE0_Disabled   (0UL)
 
#define RTC_INTENSET_COMPARE0_Enabled   (1UL)
 
#define RTC_INTENSET_COMPARE0_Set   (1UL)
 
#define RTC_INTENSET_OVRFLW_Pos   (1UL)
 
#define RTC_INTENSET_OVRFLW_Msk   (0x1UL << RTC_INTENSET_OVRFLW_Pos)
 
#define RTC_INTENSET_OVRFLW_Disabled   (0UL)
 
#define RTC_INTENSET_OVRFLW_Enabled   (1UL)
 
#define RTC_INTENSET_OVRFLW_Set   (1UL)
 
#define RTC_INTENSET_TICK_Pos   (0UL)
 
#define RTC_INTENSET_TICK_Msk   (0x1UL << RTC_INTENSET_TICK_Pos)
 
#define RTC_INTENSET_TICK_Disabled   (0UL)
 
#define RTC_INTENSET_TICK_Enabled   (1UL)
 
#define RTC_INTENSET_TICK_Set   (1UL)
 
#define RTC_INTENCLR_COMPARE3_Pos   (19UL)
 
#define RTC_INTENCLR_COMPARE3_Msk   (0x1UL << RTC_INTENCLR_COMPARE3_Pos)
 
#define RTC_INTENCLR_COMPARE3_Disabled   (0UL)
 
#define RTC_INTENCLR_COMPARE3_Enabled   (1UL)
 
#define RTC_INTENCLR_COMPARE3_Clear   (1UL)
 
#define RTC_INTENCLR_COMPARE2_Pos   (18UL)
 
#define RTC_INTENCLR_COMPARE2_Msk   (0x1UL << RTC_INTENCLR_COMPARE2_Pos)
 
#define RTC_INTENCLR_COMPARE2_Disabled   (0UL)
 
#define RTC_INTENCLR_COMPARE2_Enabled   (1UL)
 
#define RTC_INTENCLR_COMPARE2_Clear   (1UL)
 
#define RTC_INTENCLR_COMPARE1_Pos   (17UL)
 
#define RTC_INTENCLR_COMPARE1_Msk   (0x1UL << RTC_INTENCLR_COMPARE1_Pos)
 
#define RTC_INTENCLR_COMPARE1_Disabled   (0UL)
 
#define RTC_INTENCLR_COMPARE1_Enabled   (1UL)
 
#define RTC_INTENCLR_COMPARE1_Clear   (1UL)
 
#define RTC_INTENCLR_COMPARE0_Pos   (16UL)
 
#define RTC_INTENCLR_COMPARE0_Msk   (0x1UL << RTC_INTENCLR_COMPARE0_Pos)
 
#define RTC_INTENCLR_COMPARE0_Disabled   (0UL)
 
#define RTC_INTENCLR_COMPARE0_Enabled   (1UL)
 
#define RTC_INTENCLR_COMPARE0_Clear   (1UL)
 
#define RTC_INTENCLR_OVRFLW_Pos   (1UL)
 
#define RTC_INTENCLR_OVRFLW_Msk   (0x1UL << RTC_INTENCLR_OVRFLW_Pos)
 
#define RTC_INTENCLR_OVRFLW_Disabled   (0UL)
 
#define RTC_INTENCLR_OVRFLW_Enabled   (1UL)
 
#define RTC_INTENCLR_OVRFLW_Clear   (1UL)
 
#define RTC_INTENCLR_TICK_Pos   (0UL)
 
#define RTC_INTENCLR_TICK_Msk   (0x1UL << RTC_INTENCLR_TICK_Pos)
 
#define RTC_INTENCLR_TICK_Disabled   (0UL)
 
#define RTC_INTENCLR_TICK_Enabled   (1UL)
 
#define RTC_INTENCLR_TICK_Clear   (1UL)
 
#define RTC_EVTEN_COMPARE3_Pos   (19UL)
 
#define RTC_EVTEN_COMPARE3_Msk   (0x1UL << RTC_EVTEN_COMPARE3_Pos)
 
#define RTC_EVTEN_COMPARE3_Disabled   (0UL)
 
#define RTC_EVTEN_COMPARE3_Enabled   (1UL)
 
#define RTC_EVTEN_COMPARE2_Pos   (18UL)
 
#define RTC_EVTEN_COMPARE2_Msk   (0x1UL << RTC_EVTEN_COMPARE2_Pos)
 
#define RTC_EVTEN_COMPARE2_Disabled   (0UL)
 
#define RTC_EVTEN_COMPARE2_Enabled   (1UL)
 
#define RTC_EVTEN_COMPARE1_Pos   (17UL)
 
#define RTC_EVTEN_COMPARE1_Msk   (0x1UL << RTC_EVTEN_COMPARE1_Pos)
 
#define RTC_EVTEN_COMPARE1_Disabled   (0UL)
 
#define RTC_EVTEN_COMPARE1_Enabled   (1UL)
 
#define RTC_EVTEN_COMPARE0_Pos   (16UL)
 
#define RTC_EVTEN_COMPARE0_Msk   (0x1UL << RTC_EVTEN_COMPARE0_Pos)
 
#define RTC_EVTEN_COMPARE0_Disabled   (0UL)
 
#define RTC_EVTEN_COMPARE0_Enabled   (1UL)
 
#define RTC_EVTEN_OVRFLW_Pos   (1UL)
 
#define RTC_EVTEN_OVRFLW_Msk   (0x1UL << RTC_EVTEN_OVRFLW_Pos)
 
#define RTC_EVTEN_OVRFLW_Disabled   (0UL)
 
#define RTC_EVTEN_OVRFLW_Enabled   (1UL)
 
#define RTC_EVTEN_TICK_Pos   (0UL)
 
#define RTC_EVTEN_TICK_Msk   (0x1UL << RTC_EVTEN_TICK_Pos)
 
#define RTC_EVTEN_TICK_Disabled   (0UL)
 
#define RTC_EVTEN_TICK_Enabled   (1UL)
 
#define RTC_EVTENSET_COMPARE3_Pos   (19UL)
 
#define RTC_EVTENSET_COMPARE3_Msk   (0x1UL << RTC_EVTENSET_COMPARE3_Pos)
 
#define RTC_EVTENSET_COMPARE3_Disabled   (0UL)
 
#define RTC_EVTENSET_COMPARE3_Enabled   (1UL)
 
#define RTC_EVTENSET_COMPARE3_Set   (1UL)
 
#define RTC_EVTENSET_COMPARE2_Pos   (18UL)
 
#define RTC_EVTENSET_COMPARE2_Msk   (0x1UL << RTC_EVTENSET_COMPARE2_Pos)
 
#define RTC_EVTENSET_COMPARE2_Disabled   (0UL)
 
#define RTC_EVTENSET_COMPARE2_Enabled   (1UL)
 
#define RTC_EVTENSET_COMPARE2_Set   (1UL)
 
#define RTC_EVTENSET_COMPARE1_Pos   (17UL)
 
#define RTC_EVTENSET_COMPARE1_Msk   (0x1UL << RTC_EVTENSET_COMPARE1_Pos)
 
#define RTC_EVTENSET_COMPARE1_Disabled   (0UL)
 
#define RTC_EVTENSET_COMPARE1_Enabled   (1UL)
 
#define RTC_EVTENSET_COMPARE1_Set   (1UL)
 
#define RTC_EVTENSET_COMPARE0_Pos   (16UL)
 
#define RTC_EVTENSET_COMPARE0_Msk   (0x1UL << RTC_EVTENSET_COMPARE0_Pos)
 
#define RTC_EVTENSET_COMPARE0_Disabled   (0UL)
 
#define RTC_EVTENSET_COMPARE0_Enabled   (1UL)
 
#define RTC_EVTENSET_COMPARE0_Set   (1UL)
 
#define RTC_EVTENSET_OVRFLW_Pos   (1UL)
 
#define RTC_EVTENSET_OVRFLW_Msk   (0x1UL << RTC_EVTENSET_OVRFLW_Pos)
 
#define RTC_EVTENSET_OVRFLW_Disabled   (0UL)
 
#define RTC_EVTENSET_OVRFLW_Enabled   (1UL)
 
#define RTC_EVTENSET_OVRFLW_Set   (1UL)
 
#define RTC_EVTENSET_TICK_Pos   (0UL)
 
#define RTC_EVTENSET_TICK_Msk   (0x1UL << RTC_EVTENSET_TICK_Pos)
 
#define RTC_EVTENSET_TICK_Disabled   (0UL)
 
#define RTC_EVTENSET_TICK_Enabled   (1UL)
 
#define RTC_EVTENSET_TICK_Set   (1UL)
 
#define RTC_EVTENCLR_COMPARE3_Pos   (19UL)
 
#define RTC_EVTENCLR_COMPARE3_Msk   (0x1UL << RTC_EVTENCLR_COMPARE3_Pos)
 
#define RTC_EVTENCLR_COMPARE3_Disabled   (0UL)
 
#define RTC_EVTENCLR_COMPARE3_Enabled   (1UL)
 
#define RTC_EVTENCLR_COMPARE3_Clear   (1UL)
 
#define RTC_EVTENCLR_COMPARE2_Pos   (18UL)
 
#define RTC_EVTENCLR_COMPARE2_Msk   (0x1UL << RTC_EVTENCLR_COMPARE2_Pos)
 
#define RTC_EVTENCLR_COMPARE2_Disabled   (0UL)
 
#define RTC_EVTENCLR_COMPARE2_Enabled   (1UL)
 
#define RTC_EVTENCLR_COMPARE2_Clear   (1UL)
 
#define RTC_EVTENCLR_COMPARE1_Pos   (17UL)
 
#define RTC_EVTENCLR_COMPARE1_Msk   (0x1UL << RTC_EVTENCLR_COMPARE1_Pos)
 
#define RTC_EVTENCLR_COMPARE1_Disabled   (0UL)
 
#define RTC_EVTENCLR_COMPARE1_Enabled   (1UL)
 
#define RTC_EVTENCLR_COMPARE1_Clear   (1UL)
 
#define RTC_EVTENCLR_COMPARE0_Pos   (16UL)
 
#define RTC_EVTENCLR_COMPARE0_Msk   (0x1UL << RTC_EVTENCLR_COMPARE0_Pos)
 
#define RTC_EVTENCLR_COMPARE0_Disabled   (0UL)
 
#define RTC_EVTENCLR_COMPARE0_Enabled   (1UL)
 
#define RTC_EVTENCLR_COMPARE0_Clear   (1UL)
 
#define RTC_EVTENCLR_OVRFLW_Pos   (1UL)
 
#define RTC_EVTENCLR_OVRFLW_Msk   (0x1UL << RTC_EVTENCLR_OVRFLW_Pos)
 
#define RTC_EVTENCLR_OVRFLW_Disabled   (0UL)
 
#define RTC_EVTENCLR_OVRFLW_Enabled   (1UL)
 
#define RTC_EVTENCLR_OVRFLW_Clear   (1UL)
 
#define RTC_EVTENCLR_TICK_Pos   (0UL)
 
#define RTC_EVTENCLR_TICK_Msk   (0x1UL << RTC_EVTENCLR_TICK_Pos)
 
#define RTC_EVTENCLR_TICK_Disabled   (0UL)
 
#define RTC_EVTENCLR_TICK_Enabled   (1UL)
 
#define RTC_EVTENCLR_TICK_Clear   (1UL)
 
#define RTC_COUNTER_COUNTER_Pos   (0UL)
 
#define RTC_COUNTER_COUNTER_Msk   (0xFFFFFFUL << RTC_COUNTER_COUNTER_Pos)
 
#define RTC_PRESCALER_PRESCALER_Pos   (0UL)
 
#define RTC_PRESCALER_PRESCALER_Msk   (0xFFFUL << RTC_PRESCALER_PRESCALER_Pos)
 
#define RTC_CC_COMPARE_Pos   (0UL)
 
#define RTC_CC_COMPARE_Msk   (0xFFFFFFUL << RTC_CC_COMPARE_Pos)
 
#define SAADC_INTEN_CH7LIMITL_Pos   (21UL)
 
#define SAADC_INTEN_CH7LIMITL_Msk   (0x1UL << SAADC_INTEN_CH7LIMITL_Pos)
 
#define SAADC_INTEN_CH7LIMITL_Disabled   (0UL)
 
#define SAADC_INTEN_CH7LIMITL_Enabled   (1UL)
 
#define SAADC_INTEN_CH7LIMITH_Pos   (20UL)
 
#define SAADC_INTEN_CH7LIMITH_Msk   (0x1UL << SAADC_INTEN_CH7LIMITH_Pos)
 
#define SAADC_INTEN_CH7LIMITH_Disabled   (0UL)
 
#define SAADC_INTEN_CH7LIMITH_Enabled   (1UL)
 
#define SAADC_INTEN_CH6LIMITL_Pos   (19UL)
 
#define SAADC_INTEN_CH6LIMITL_Msk   (0x1UL << SAADC_INTEN_CH6LIMITL_Pos)
 
#define SAADC_INTEN_CH6LIMITL_Disabled   (0UL)
 
#define SAADC_INTEN_CH6LIMITL_Enabled   (1UL)
 
#define SAADC_INTEN_CH6LIMITH_Pos   (18UL)
 
#define SAADC_INTEN_CH6LIMITH_Msk   (0x1UL << SAADC_INTEN_CH6LIMITH_Pos)
 
#define SAADC_INTEN_CH6LIMITH_Disabled   (0UL)
 
#define SAADC_INTEN_CH6LIMITH_Enabled   (1UL)
 
#define SAADC_INTEN_CH5LIMITL_Pos   (17UL)
 
#define SAADC_INTEN_CH5LIMITL_Msk   (0x1UL << SAADC_INTEN_CH5LIMITL_Pos)
 
#define SAADC_INTEN_CH5LIMITL_Disabled   (0UL)
 
#define SAADC_INTEN_CH5LIMITL_Enabled   (1UL)
 
#define SAADC_INTEN_CH5LIMITH_Pos   (16UL)
 
#define SAADC_INTEN_CH5LIMITH_Msk   (0x1UL << SAADC_INTEN_CH5LIMITH_Pos)
 
#define SAADC_INTEN_CH5LIMITH_Disabled   (0UL)
 
#define SAADC_INTEN_CH5LIMITH_Enabled   (1UL)
 
#define SAADC_INTEN_CH4LIMITL_Pos   (15UL)
 
#define SAADC_INTEN_CH4LIMITL_Msk   (0x1UL << SAADC_INTEN_CH4LIMITL_Pos)
 
#define SAADC_INTEN_CH4LIMITL_Disabled   (0UL)
 
#define SAADC_INTEN_CH4LIMITL_Enabled   (1UL)
 
#define SAADC_INTEN_CH4LIMITH_Pos   (14UL)
 
#define SAADC_INTEN_CH4LIMITH_Msk   (0x1UL << SAADC_INTEN_CH4LIMITH_Pos)
 
#define SAADC_INTEN_CH4LIMITH_Disabled   (0UL)
 
#define SAADC_INTEN_CH4LIMITH_Enabled   (1UL)
 
#define SAADC_INTEN_CH3LIMITL_Pos   (13UL)
 
#define SAADC_INTEN_CH3LIMITL_Msk   (0x1UL << SAADC_INTEN_CH3LIMITL_Pos)
 
#define SAADC_INTEN_CH3LIMITL_Disabled   (0UL)
 
#define SAADC_INTEN_CH3LIMITL_Enabled   (1UL)
 
#define SAADC_INTEN_CH3LIMITH_Pos   (12UL)
 
#define SAADC_INTEN_CH3LIMITH_Msk   (0x1UL << SAADC_INTEN_CH3LIMITH_Pos)
 
#define SAADC_INTEN_CH3LIMITH_Disabled   (0UL)
 
#define SAADC_INTEN_CH3LIMITH_Enabled   (1UL)
 
#define SAADC_INTEN_CH2LIMITL_Pos   (11UL)
 
#define SAADC_INTEN_CH2LIMITL_Msk   (0x1UL << SAADC_INTEN_CH2LIMITL_Pos)
 
#define SAADC_INTEN_CH2LIMITL_Disabled   (0UL)
 
#define SAADC_INTEN_CH2LIMITL_Enabled   (1UL)
 
#define SAADC_INTEN_CH2LIMITH_Pos   (10UL)
 
#define SAADC_INTEN_CH2LIMITH_Msk   (0x1UL << SAADC_INTEN_CH2LIMITH_Pos)
 
#define SAADC_INTEN_CH2LIMITH_Disabled   (0UL)
 
#define SAADC_INTEN_CH2LIMITH_Enabled   (1UL)
 
#define SAADC_INTEN_CH1LIMITL_Pos   (9UL)
 
#define SAADC_INTEN_CH1LIMITL_Msk   (0x1UL << SAADC_INTEN_CH1LIMITL_Pos)
 
#define SAADC_INTEN_CH1LIMITL_Disabled   (0UL)
 
#define SAADC_INTEN_CH1LIMITL_Enabled   (1UL)
 
#define SAADC_INTEN_CH1LIMITH_Pos   (8UL)
 
#define SAADC_INTEN_CH1LIMITH_Msk   (0x1UL << SAADC_INTEN_CH1LIMITH_Pos)
 
#define SAADC_INTEN_CH1LIMITH_Disabled   (0UL)
 
#define SAADC_INTEN_CH1LIMITH_Enabled   (1UL)
 
#define SAADC_INTEN_CH0LIMITL_Pos   (7UL)
 
#define SAADC_INTEN_CH0LIMITL_Msk   (0x1UL << SAADC_INTEN_CH0LIMITL_Pos)
 
#define SAADC_INTEN_CH0LIMITL_Disabled   (0UL)
 
#define SAADC_INTEN_CH0LIMITL_Enabled   (1UL)
 
#define SAADC_INTEN_CH0LIMITH_Pos   (6UL)
 
#define SAADC_INTEN_CH0LIMITH_Msk   (0x1UL << SAADC_INTEN_CH0LIMITH_Pos)
 
#define SAADC_INTEN_CH0LIMITH_Disabled   (0UL)
 
#define SAADC_INTEN_CH0LIMITH_Enabled   (1UL)
 
#define SAADC_INTEN_STOPPED_Pos   (5UL)
 
#define SAADC_INTEN_STOPPED_Msk   (0x1UL << SAADC_INTEN_STOPPED_Pos)
 
#define SAADC_INTEN_STOPPED_Disabled   (0UL)
 
#define SAADC_INTEN_STOPPED_Enabled   (1UL)
 
#define SAADC_INTEN_CALIBRATEDONE_Pos   (4UL)
 
#define SAADC_INTEN_CALIBRATEDONE_Msk   (0x1UL << SAADC_INTEN_CALIBRATEDONE_Pos)
 
#define SAADC_INTEN_CALIBRATEDONE_Disabled   (0UL)
 
#define SAADC_INTEN_CALIBRATEDONE_Enabled   (1UL)
 
#define SAADC_INTEN_RESULTDONE_Pos   (3UL)
 
#define SAADC_INTEN_RESULTDONE_Msk   (0x1UL << SAADC_INTEN_RESULTDONE_Pos)
 
#define SAADC_INTEN_RESULTDONE_Disabled   (0UL)
 
#define SAADC_INTEN_RESULTDONE_Enabled   (1UL)
 
#define SAADC_INTEN_DONE_Pos   (2UL)
 
#define SAADC_INTEN_DONE_Msk   (0x1UL << SAADC_INTEN_DONE_Pos)
 
#define SAADC_INTEN_DONE_Disabled   (0UL)
 
#define SAADC_INTEN_DONE_Enabled   (1UL)
 
#define SAADC_INTEN_END_Pos   (1UL)
 
#define SAADC_INTEN_END_Msk   (0x1UL << SAADC_INTEN_END_Pos)
 
#define SAADC_INTEN_END_Disabled   (0UL)
 
#define SAADC_INTEN_END_Enabled   (1UL)
 
#define SAADC_INTEN_STARTED_Pos   (0UL)
 
#define SAADC_INTEN_STARTED_Msk   (0x1UL << SAADC_INTEN_STARTED_Pos)
 
#define SAADC_INTEN_STARTED_Disabled   (0UL)
 
#define SAADC_INTEN_STARTED_Enabled   (1UL)
 
#define SAADC_INTENSET_CH7LIMITL_Pos   (21UL)
 
#define SAADC_INTENSET_CH7LIMITL_Msk   (0x1UL << SAADC_INTENSET_CH7LIMITL_Pos)
 
#define SAADC_INTENSET_CH7LIMITL_Disabled   (0UL)
 
#define SAADC_INTENSET_CH7LIMITL_Enabled   (1UL)
 
#define SAADC_INTENSET_CH7LIMITL_Set   (1UL)
 
#define SAADC_INTENSET_CH7LIMITH_Pos   (20UL)
 
#define SAADC_INTENSET_CH7LIMITH_Msk   (0x1UL << SAADC_INTENSET_CH7LIMITH_Pos)
 
#define SAADC_INTENSET_CH7LIMITH_Disabled   (0UL)
 
#define SAADC_INTENSET_CH7LIMITH_Enabled   (1UL)
 
#define SAADC_INTENSET_CH7LIMITH_Set   (1UL)
 
#define SAADC_INTENSET_CH6LIMITL_Pos   (19UL)
 
#define SAADC_INTENSET_CH6LIMITL_Msk   (0x1UL << SAADC_INTENSET_CH6LIMITL_Pos)
 
#define SAADC_INTENSET_CH6LIMITL_Disabled   (0UL)
 
#define SAADC_INTENSET_CH6LIMITL_Enabled   (1UL)
 
#define SAADC_INTENSET_CH6LIMITL_Set   (1UL)
 
#define SAADC_INTENSET_CH6LIMITH_Pos   (18UL)
 
#define SAADC_INTENSET_CH6LIMITH_Msk   (0x1UL << SAADC_INTENSET_CH6LIMITH_Pos)
 
#define SAADC_INTENSET_CH6LIMITH_Disabled   (0UL)
 
#define SAADC_INTENSET_CH6LIMITH_Enabled   (1UL)
 
#define SAADC_INTENSET_CH6LIMITH_Set   (1UL)
 
#define SAADC_INTENSET_CH5LIMITL_Pos   (17UL)
 
#define SAADC_INTENSET_CH5LIMITL_Msk   (0x1UL << SAADC_INTENSET_CH5LIMITL_Pos)
 
#define SAADC_INTENSET_CH5LIMITL_Disabled   (0UL)
 
#define SAADC_INTENSET_CH5LIMITL_Enabled   (1UL)
 
#define SAADC_INTENSET_CH5LIMITL_Set   (1UL)
 
#define SAADC_INTENSET_CH5LIMITH_Pos   (16UL)
 
#define SAADC_INTENSET_CH5LIMITH_Msk   (0x1UL << SAADC_INTENSET_CH5LIMITH_Pos)
 
#define SAADC_INTENSET_CH5LIMITH_Disabled   (0UL)
 
#define SAADC_INTENSET_CH5LIMITH_Enabled   (1UL)
 
#define SAADC_INTENSET_CH5LIMITH_Set   (1UL)
 
#define SAADC_INTENSET_CH4LIMITL_Pos   (15UL)
 
#define SAADC_INTENSET_CH4LIMITL_Msk   (0x1UL << SAADC_INTENSET_CH4LIMITL_Pos)
 
#define SAADC_INTENSET_CH4LIMITL_Disabled   (0UL)
 
#define SAADC_INTENSET_CH4LIMITL_Enabled   (1UL)
 
#define SAADC_INTENSET_CH4LIMITL_Set   (1UL)
 
#define SAADC_INTENSET_CH4LIMITH_Pos   (14UL)
 
#define SAADC_INTENSET_CH4LIMITH_Msk   (0x1UL << SAADC_INTENSET_CH4LIMITH_Pos)
 
#define SAADC_INTENSET_CH4LIMITH_Disabled   (0UL)
 
#define SAADC_INTENSET_CH4LIMITH_Enabled   (1UL)
 
#define SAADC_INTENSET_CH4LIMITH_Set   (1UL)
 
#define SAADC_INTENSET_CH3LIMITL_Pos   (13UL)
 
#define SAADC_INTENSET_CH3LIMITL_Msk   (0x1UL << SAADC_INTENSET_CH3LIMITL_Pos)
 
#define SAADC_INTENSET_CH3LIMITL_Disabled   (0UL)
 
#define SAADC_INTENSET_CH3LIMITL_Enabled   (1UL)
 
#define SAADC_INTENSET_CH3LIMITL_Set   (1UL)
 
#define SAADC_INTENSET_CH3LIMITH_Pos   (12UL)
 
#define SAADC_INTENSET_CH3LIMITH_Msk   (0x1UL << SAADC_INTENSET_CH3LIMITH_Pos)
 
#define SAADC_INTENSET_CH3LIMITH_Disabled   (0UL)
 
#define SAADC_INTENSET_CH3LIMITH_Enabled   (1UL)
 
#define SAADC_INTENSET_CH3LIMITH_Set   (1UL)
 
#define SAADC_INTENSET_CH2LIMITL_Pos   (11UL)
 
#define SAADC_INTENSET_CH2LIMITL_Msk   (0x1UL << SAADC_INTENSET_CH2LIMITL_Pos)
 
#define SAADC_INTENSET_CH2LIMITL_Disabled   (0UL)
 
#define SAADC_INTENSET_CH2LIMITL_Enabled   (1UL)
 
#define SAADC_INTENSET_CH2LIMITL_Set   (1UL)
 
#define SAADC_INTENSET_CH2LIMITH_Pos   (10UL)
 
#define SAADC_INTENSET_CH2LIMITH_Msk   (0x1UL << SAADC_INTENSET_CH2LIMITH_Pos)
 
#define SAADC_INTENSET_CH2LIMITH_Disabled   (0UL)
 
#define SAADC_INTENSET_CH2LIMITH_Enabled   (1UL)
 
#define SAADC_INTENSET_CH2LIMITH_Set   (1UL)
 
#define SAADC_INTENSET_CH1LIMITL_Pos   (9UL)
 
#define SAADC_INTENSET_CH1LIMITL_Msk   (0x1UL << SAADC_INTENSET_CH1LIMITL_Pos)
 
#define SAADC_INTENSET_CH1LIMITL_Disabled   (0UL)
 
#define SAADC_INTENSET_CH1LIMITL_Enabled   (1UL)
 
#define SAADC_INTENSET_CH1LIMITL_Set   (1UL)
 
#define SAADC_INTENSET_CH1LIMITH_Pos   (8UL)
 
#define SAADC_INTENSET_CH1LIMITH_Msk   (0x1UL << SAADC_INTENSET_CH1LIMITH_Pos)
 
#define SAADC_INTENSET_CH1LIMITH_Disabled   (0UL)
 
#define SAADC_INTENSET_CH1LIMITH_Enabled   (1UL)
 
#define SAADC_INTENSET_CH1LIMITH_Set   (1UL)
 
#define SAADC_INTENSET_CH0LIMITL_Pos   (7UL)
 
#define SAADC_INTENSET_CH0LIMITL_Msk   (0x1UL << SAADC_INTENSET_CH0LIMITL_Pos)
 
#define SAADC_INTENSET_CH0LIMITL_Disabled   (0UL)
 
#define SAADC_INTENSET_CH0LIMITL_Enabled   (1UL)
 
#define SAADC_INTENSET_CH0LIMITL_Set   (1UL)
 
#define SAADC_INTENSET_CH0LIMITH_Pos   (6UL)
 
#define SAADC_INTENSET_CH0LIMITH_Msk   (0x1UL << SAADC_INTENSET_CH0LIMITH_Pos)
 
#define SAADC_INTENSET_CH0LIMITH_Disabled   (0UL)
 
#define SAADC_INTENSET_CH0LIMITH_Enabled   (1UL)
 
#define SAADC_INTENSET_CH0LIMITH_Set   (1UL)
 
#define SAADC_INTENSET_STOPPED_Pos   (5UL)
 
#define SAADC_INTENSET_STOPPED_Msk   (0x1UL << SAADC_INTENSET_STOPPED_Pos)
 
#define SAADC_INTENSET_STOPPED_Disabled   (0UL)
 
#define SAADC_INTENSET_STOPPED_Enabled   (1UL)
 
#define SAADC_INTENSET_STOPPED_Set   (1UL)
 
#define SAADC_INTENSET_CALIBRATEDONE_Pos   (4UL)
 
#define SAADC_INTENSET_CALIBRATEDONE_Msk   (0x1UL << SAADC_INTENSET_CALIBRATEDONE_Pos)
 
#define SAADC_INTENSET_CALIBRATEDONE_Disabled   (0UL)
 
#define SAADC_INTENSET_CALIBRATEDONE_Enabled   (1UL)
 
#define SAADC_INTENSET_CALIBRATEDONE_Set   (1UL)
 
#define SAADC_INTENSET_RESULTDONE_Pos   (3UL)
 
#define SAADC_INTENSET_RESULTDONE_Msk   (0x1UL << SAADC_INTENSET_RESULTDONE_Pos)
 
#define SAADC_INTENSET_RESULTDONE_Disabled   (0UL)
 
#define SAADC_INTENSET_RESULTDONE_Enabled   (1UL)
 
#define SAADC_INTENSET_RESULTDONE_Set   (1UL)
 
#define SAADC_INTENSET_DONE_Pos   (2UL)
 
#define SAADC_INTENSET_DONE_Msk   (0x1UL << SAADC_INTENSET_DONE_Pos)
 
#define SAADC_INTENSET_DONE_Disabled   (0UL)
 
#define SAADC_INTENSET_DONE_Enabled   (1UL)
 
#define SAADC_INTENSET_DONE_Set   (1UL)
 
#define SAADC_INTENSET_END_Pos   (1UL)
 
#define SAADC_INTENSET_END_Msk   (0x1UL << SAADC_INTENSET_END_Pos)
 
#define SAADC_INTENSET_END_Disabled   (0UL)
 
#define SAADC_INTENSET_END_Enabled   (1UL)
 
#define SAADC_INTENSET_END_Set   (1UL)
 
#define SAADC_INTENSET_STARTED_Pos   (0UL)
 
#define SAADC_INTENSET_STARTED_Msk   (0x1UL << SAADC_INTENSET_STARTED_Pos)
 
#define SAADC_INTENSET_STARTED_Disabled   (0UL)
 
#define SAADC_INTENSET_STARTED_Enabled   (1UL)
 
#define SAADC_INTENSET_STARTED_Set   (1UL)
 
#define SAADC_INTENCLR_CH7LIMITL_Pos   (21UL)
 
#define SAADC_INTENCLR_CH7LIMITL_Msk   (0x1UL << SAADC_INTENCLR_CH7LIMITL_Pos)
 
#define SAADC_INTENCLR_CH7LIMITL_Disabled   (0UL)
 
#define SAADC_INTENCLR_CH7LIMITL_Enabled   (1UL)
 
#define SAADC_INTENCLR_CH7LIMITL_Clear   (1UL)
 
#define SAADC_INTENCLR_CH7LIMITH_Pos   (20UL)
 
#define SAADC_INTENCLR_CH7LIMITH_Msk   (0x1UL << SAADC_INTENCLR_CH7LIMITH_Pos)
 
#define SAADC_INTENCLR_CH7LIMITH_Disabled   (0UL)
 
#define SAADC_INTENCLR_CH7LIMITH_Enabled   (1UL)
 
#define SAADC_INTENCLR_CH7LIMITH_Clear   (1UL)
 
#define SAADC_INTENCLR_CH6LIMITL_Pos   (19UL)
 
#define SAADC_INTENCLR_CH6LIMITL_Msk   (0x1UL << SAADC_INTENCLR_CH6LIMITL_Pos)
 
#define SAADC_INTENCLR_CH6LIMITL_Disabled   (0UL)
 
#define SAADC_INTENCLR_CH6LIMITL_Enabled   (1UL)
 
#define SAADC_INTENCLR_CH6LIMITL_Clear   (1UL)
 
#define SAADC_INTENCLR_CH6LIMITH_Pos   (18UL)
 
#define SAADC_INTENCLR_CH6LIMITH_Msk   (0x1UL << SAADC_INTENCLR_CH6LIMITH_Pos)
 
#define SAADC_INTENCLR_CH6LIMITH_Disabled   (0UL)
 
#define SAADC_INTENCLR_CH6LIMITH_Enabled   (1UL)
 
#define SAADC_INTENCLR_CH6LIMITH_Clear   (1UL)
 
#define SAADC_INTENCLR_CH5LIMITL_Pos   (17UL)
 
#define SAADC_INTENCLR_CH5LIMITL_Msk   (0x1UL << SAADC_INTENCLR_CH5LIMITL_Pos)
 
#define SAADC_INTENCLR_CH5LIMITL_Disabled   (0UL)
 
#define SAADC_INTENCLR_CH5LIMITL_Enabled   (1UL)
 
#define SAADC_INTENCLR_CH5LIMITL_Clear   (1UL)
 
#define SAADC_INTENCLR_CH5LIMITH_Pos   (16UL)
 
#define SAADC_INTENCLR_CH5LIMITH_Msk   (0x1UL << SAADC_INTENCLR_CH5LIMITH_Pos)
 
#define SAADC_INTENCLR_CH5LIMITH_Disabled   (0UL)
 
#define SAADC_INTENCLR_CH5LIMITH_Enabled   (1UL)
 
#define SAADC_INTENCLR_CH5LIMITH_Clear   (1UL)
 
#define SAADC_INTENCLR_CH4LIMITL_Pos   (15UL)
 
#define SAADC_INTENCLR_CH4LIMITL_Msk   (0x1UL << SAADC_INTENCLR_CH4LIMITL_Pos)
 
#define SAADC_INTENCLR_CH4LIMITL_Disabled   (0UL)
 
#define SAADC_INTENCLR_CH4LIMITL_Enabled   (1UL)
 
#define SAADC_INTENCLR_CH4LIMITL_Clear   (1UL)
 
#define SAADC_INTENCLR_CH4LIMITH_Pos   (14UL)
 
#define SAADC_INTENCLR_CH4LIMITH_Msk   (0x1UL << SAADC_INTENCLR_CH4LIMITH_Pos)
 
#define SAADC_INTENCLR_CH4LIMITH_Disabled   (0UL)
 
#define SAADC_INTENCLR_CH4LIMITH_Enabled   (1UL)
 
#define SAADC_INTENCLR_CH4LIMITH_Clear   (1UL)
 
#define SAADC_INTENCLR_CH3LIMITL_Pos   (13UL)
 
#define SAADC_INTENCLR_CH3LIMITL_Msk   (0x1UL << SAADC_INTENCLR_CH3LIMITL_Pos)
 
#define SAADC_INTENCLR_CH3LIMITL_Disabled   (0UL)
 
#define SAADC_INTENCLR_CH3LIMITL_Enabled   (1UL)
 
#define SAADC_INTENCLR_CH3LIMITL_Clear   (1UL)
 
#define SAADC_INTENCLR_CH3LIMITH_Pos   (12UL)
 
#define SAADC_INTENCLR_CH3LIMITH_Msk   (0x1UL << SAADC_INTENCLR_CH3LIMITH_Pos)
 
#define SAADC_INTENCLR_CH3LIMITH_Disabled   (0UL)
 
#define SAADC_INTENCLR_CH3LIMITH_Enabled   (1UL)
 
#define SAADC_INTENCLR_CH3LIMITH_Clear   (1UL)
 
#define SAADC_INTENCLR_CH2LIMITL_Pos   (11UL)
 
#define SAADC_INTENCLR_CH2LIMITL_Msk   (0x1UL << SAADC_INTENCLR_CH2LIMITL_Pos)
 
#define SAADC_INTENCLR_CH2LIMITL_Disabled   (0UL)
 
#define SAADC_INTENCLR_CH2LIMITL_Enabled   (1UL)
 
#define SAADC_INTENCLR_CH2LIMITL_Clear   (1UL)
 
#define SAADC_INTENCLR_CH2LIMITH_Pos   (10UL)
 
#define SAADC_INTENCLR_CH2LIMITH_Msk   (0x1UL << SAADC_INTENCLR_CH2LIMITH_Pos)
 
#define SAADC_INTENCLR_CH2LIMITH_Disabled   (0UL)
 
#define SAADC_INTENCLR_CH2LIMITH_Enabled   (1UL)
 
#define SAADC_INTENCLR_CH2LIMITH_Clear   (1UL)
 
#define SAADC_INTENCLR_CH1LIMITL_Pos   (9UL)
 
#define SAADC_INTENCLR_CH1LIMITL_Msk   (0x1UL << SAADC_INTENCLR_CH1LIMITL_Pos)
 
#define SAADC_INTENCLR_CH1LIMITL_Disabled   (0UL)
 
#define SAADC_INTENCLR_CH1LIMITL_Enabled   (1UL)
 
#define SAADC_INTENCLR_CH1LIMITL_Clear   (1UL)
 
#define SAADC_INTENCLR_CH1LIMITH_Pos   (8UL)
 
#define SAADC_INTENCLR_CH1LIMITH_Msk   (0x1UL << SAADC_INTENCLR_CH1LIMITH_Pos)
 
#define SAADC_INTENCLR_CH1LIMITH_Disabled   (0UL)
 
#define SAADC_INTENCLR_CH1LIMITH_Enabled   (1UL)
 
#define SAADC_INTENCLR_CH1LIMITH_Clear   (1UL)
 
#define SAADC_INTENCLR_CH0LIMITL_Pos   (7UL)
 
#define SAADC_INTENCLR_CH0LIMITL_Msk   (0x1UL << SAADC_INTENCLR_CH0LIMITL_Pos)
 
#define SAADC_INTENCLR_CH0LIMITL_Disabled   (0UL)
 
#define SAADC_INTENCLR_CH0LIMITL_Enabled   (1UL)
 
#define SAADC_INTENCLR_CH0LIMITL_Clear   (1UL)
 
#define SAADC_INTENCLR_CH0LIMITH_Pos   (6UL)
 
#define SAADC_INTENCLR_CH0LIMITH_Msk   (0x1UL << SAADC_INTENCLR_CH0LIMITH_Pos)
 
#define SAADC_INTENCLR_CH0LIMITH_Disabled   (0UL)
 
#define SAADC_INTENCLR_CH0LIMITH_Enabled   (1UL)
 
#define SAADC_INTENCLR_CH0LIMITH_Clear   (1UL)
 
#define SAADC_INTENCLR_STOPPED_Pos   (5UL)
 
#define SAADC_INTENCLR_STOPPED_Msk   (0x1UL << SAADC_INTENCLR_STOPPED_Pos)
 
#define SAADC_INTENCLR_STOPPED_Disabled   (0UL)
 
#define SAADC_INTENCLR_STOPPED_Enabled   (1UL)
 
#define SAADC_INTENCLR_STOPPED_Clear   (1UL)
 
#define SAADC_INTENCLR_CALIBRATEDONE_Pos   (4UL)
 
#define SAADC_INTENCLR_CALIBRATEDONE_Msk   (0x1UL << SAADC_INTENCLR_CALIBRATEDONE_Pos)
 
#define SAADC_INTENCLR_CALIBRATEDONE_Disabled   (0UL)
 
#define SAADC_INTENCLR_CALIBRATEDONE_Enabled   (1UL)
 
#define SAADC_INTENCLR_CALIBRATEDONE_Clear   (1UL)
 
#define SAADC_INTENCLR_RESULTDONE_Pos   (3UL)
 
#define SAADC_INTENCLR_RESULTDONE_Msk   (0x1UL << SAADC_INTENCLR_RESULTDONE_Pos)
 
#define SAADC_INTENCLR_RESULTDONE_Disabled   (0UL)
 
#define SAADC_INTENCLR_RESULTDONE_Enabled   (1UL)
 
#define SAADC_INTENCLR_RESULTDONE_Clear   (1UL)
 
#define SAADC_INTENCLR_DONE_Pos   (2UL)
 
#define SAADC_INTENCLR_DONE_Msk   (0x1UL << SAADC_INTENCLR_DONE_Pos)
 
#define SAADC_INTENCLR_DONE_Disabled   (0UL)
 
#define SAADC_INTENCLR_DONE_Enabled   (1UL)
 
#define SAADC_INTENCLR_DONE_Clear   (1UL)
 
#define SAADC_INTENCLR_END_Pos   (1UL)
 
#define SAADC_INTENCLR_END_Msk   (0x1UL << SAADC_INTENCLR_END_Pos)
 
#define SAADC_INTENCLR_END_Disabled   (0UL)
 
#define SAADC_INTENCLR_END_Enabled   (1UL)
 
#define SAADC_INTENCLR_END_Clear   (1UL)
 
#define SAADC_INTENCLR_STARTED_Pos   (0UL)
 
#define SAADC_INTENCLR_STARTED_Msk   (0x1UL << SAADC_INTENCLR_STARTED_Pos)
 
#define SAADC_INTENCLR_STARTED_Disabled   (0UL)
 
#define SAADC_INTENCLR_STARTED_Enabled   (1UL)
 
#define SAADC_INTENCLR_STARTED_Clear   (1UL)
 
#define SAADC_STATUS_STATUS_Pos   (0UL)
 
#define SAADC_STATUS_STATUS_Msk   (0x1UL << SAADC_STATUS_STATUS_Pos)
 
#define SAADC_STATUS_STATUS_Ready   (0UL)
 
#define SAADC_STATUS_STATUS_Busy   (1UL)
 
#define SAADC_ENABLE_ENABLE_Pos   (0UL)
 
#define SAADC_ENABLE_ENABLE_Msk   (0x1UL << SAADC_ENABLE_ENABLE_Pos)
 
#define SAADC_ENABLE_ENABLE_Disabled   (0UL)
 
#define SAADC_ENABLE_ENABLE_Enabled   (1UL)
 
#define SAADC_CH_PSELP_PSELP_Pos   (0UL)
 
#define SAADC_CH_PSELP_PSELP_Msk   (0x1FUL << SAADC_CH_PSELP_PSELP_Pos)
 
#define SAADC_CH_PSELP_PSELP_NC   (0UL)
 
#define SAADC_CH_PSELP_PSELP_AnalogInput0   (1UL)
 
#define SAADC_CH_PSELP_PSELP_AnalogInput1   (2UL)
 
#define SAADC_CH_PSELP_PSELP_AnalogInput2   (3UL)
 
#define SAADC_CH_PSELP_PSELP_AnalogInput3   (4UL)
 
#define SAADC_CH_PSELP_PSELP_AnalogInput4   (5UL)
 
#define SAADC_CH_PSELP_PSELP_AnalogInput5   (6UL)
 
#define SAADC_CH_PSELP_PSELP_AnalogInput6   (7UL)
 
#define SAADC_CH_PSELP_PSELP_AnalogInput7   (8UL)
 
#define SAADC_CH_PSELP_PSELP_VDD   (9UL)
 
#define SAADC_CH_PSELN_PSELN_Pos   (0UL)
 
#define SAADC_CH_PSELN_PSELN_Msk   (0x1FUL << SAADC_CH_PSELN_PSELN_Pos)
 
#define SAADC_CH_PSELN_PSELN_NC   (0UL)
 
#define SAADC_CH_PSELN_PSELN_AnalogInput0   (1UL)
 
#define SAADC_CH_PSELN_PSELN_AnalogInput1   (2UL)
 
#define SAADC_CH_PSELN_PSELN_AnalogInput2   (3UL)
 
#define SAADC_CH_PSELN_PSELN_AnalogInput3   (4UL)
 
#define SAADC_CH_PSELN_PSELN_AnalogInput4   (5UL)
 
#define SAADC_CH_PSELN_PSELN_AnalogInput5   (6UL)
 
#define SAADC_CH_PSELN_PSELN_AnalogInput6   (7UL)
 
#define SAADC_CH_PSELN_PSELN_AnalogInput7   (8UL)
 
#define SAADC_CH_PSELN_PSELN_VDD   (9UL)
 
#define SAADC_CH_CONFIG_MODE_Pos   (20UL)
 
#define SAADC_CH_CONFIG_MODE_Msk   (0x1UL << SAADC_CH_CONFIG_MODE_Pos)
 
#define SAADC_CH_CONFIG_MODE_SE   (0UL)
 
#define SAADC_CH_CONFIG_MODE_Diff   (1UL)
 
#define SAADC_CH_CONFIG_TACQ_Pos   (16UL)
 
#define SAADC_CH_CONFIG_TACQ_Msk   (0x7UL << SAADC_CH_CONFIG_TACQ_Pos)
 
#define SAADC_CH_CONFIG_TACQ_3us   (0UL)
 
#define SAADC_CH_CONFIG_TACQ_5us   (1UL)
 
#define SAADC_CH_CONFIG_TACQ_10us   (2UL)
 
#define SAADC_CH_CONFIG_TACQ_15us   (3UL)
 
#define SAADC_CH_CONFIG_TACQ_20us   (4UL)
 
#define SAADC_CH_CONFIG_TACQ_40us   (5UL)
 
#define SAADC_CH_CONFIG_REFSEL_Pos   (12UL)
 
#define SAADC_CH_CONFIG_REFSEL_Msk   (0x1UL << SAADC_CH_CONFIG_REFSEL_Pos)
 
#define SAADC_CH_CONFIG_REFSEL_Internal   (0UL)
 
#define SAADC_CH_CONFIG_REFSEL_VDD1_4   (1UL)
 
#define SAADC_CH_CONFIG_GAIN_Pos   (8UL)
 
#define SAADC_CH_CONFIG_GAIN_Msk   (0x7UL << SAADC_CH_CONFIG_GAIN_Pos)
 
#define SAADC_CH_CONFIG_GAIN_Gain1_6   (0UL)
 
#define SAADC_CH_CONFIG_GAIN_Gain1_5   (1UL)
 
#define SAADC_CH_CONFIG_GAIN_Gain1_4   (2UL)
 
#define SAADC_CH_CONFIG_GAIN_Gain1_3   (3UL)
 
#define SAADC_CH_CONFIG_GAIN_Gain1_2   (4UL)
 
#define SAADC_CH_CONFIG_GAIN_Gain1   (5UL)
 
#define SAADC_CH_CONFIG_GAIN_Gain2   (6UL)
 
#define SAADC_CH_CONFIG_GAIN_Gain4   (7UL)
 
#define SAADC_CH_CONFIG_RESN_Pos   (4UL)
 
#define SAADC_CH_CONFIG_RESN_Msk   (0x3UL << SAADC_CH_CONFIG_RESN_Pos)
 
#define SAADC_CH_CONFIG_RESN_Bypass   (0UL)
 
#define SAADC_CH_CONFIG_RESN_Pulldown   (1UL)
 
#define SAADC_CH_CONFIG_RESN_Pullup   (2UL)
 
#define SAADC_CH_CONFIG_RESN_VDD1_2   (3UL)
 
#define SAADC_CH_CONFIG_RESP_Pos   (0UL)
 
#define SAADC_CH_CONFIG_RESP_Msk   (0x3UL << SAADC_CH_CONFIG_RESP_Pos)
 
#define SAADC_CH_CONFIG_RESP_Bypass   (0UL)
 
#define SAADC_CH_CONFIG_RESP_Pulldown   (1UL)
 
#define SAADC_CH_CONFIG_RESP_Pullup   (2UL)
 
#define SAADC_CH_CONFIG_RESP_VDD1_2   (3UL)
 
#define SAADC_CH_LIMIT_HIGH_Pos   (16UL)
 
#define SAADC_CH_LIMIT_HIGH_Msk   (0xFFFFUL << SAADC_CH_LIMIT_HIGH_Pos)
 
#define SAADC_CH_LIMIT_LOW_Pos   (0UL)
 
#define SAADC_CH_LIMIT_LOW_Msk   (0xFFFFUL << SAADC_CH_LIMIT_LOW_Pos)
 
#define SAADC_RESOLUTION_VAL_Pos   (0UL)
 
#define SAADC_RESOLUTION_VAL_Msk   (0x7UL << SAADC_RESOLUTION_VAL_Pos)
 
#define SAADC_RESOLUTION_VAL_8bit   (0UL)
 
#define SAADC_RESOLUTION_VAL_10bit   (1UL)
 
#define SAADC_RESOLUTION_VAL_12bit   (2UL)
 
#define SAADC_RESOLUTION_VAL_14bit   (3UL)
 
#define SAADC_OVERSAMPLE_OVERSAMPLE_Pos   (0UL)
 
#define SAADC_OVERSAMPLE_OVERSAMPLE_Msk   (0xFUL << SAADC_OVERSAMPLE_OVERSAMPLE_Pos)
 
#define SAADC_OVERSAMPLE_OVERSAMPLE_Bypass   (0UL)
 
#define SAADC_OVERSAMPLE_OVERSAMPLE_Over2x   (1UL)
 
#define SAADC_OVERSAMPLE_OVERSAMPLE_Over4x   (2UL)
 
#define SAADC_OVERSAMPLE_OVERSAMPLE_Over8x   (3UL)
 
#define SAADC_OVERSAMPLE_OVERSAMPLE_Over16x   (4UL)
 
#define SAADC_OVERSAMPLE_OVERSAMPLE_Over32x   (5UL)
 
#define SAADC_OVERSAMPLE_OVERSAMPLE_Over64x   (6UL)
 
#define SAADC_OVERSAMPLE_OVERSAMPLE_Over128x   (7UL)
 
#define SAADC_OVERSAMPLE_OVERSAMPLE_Over256x   (8UL)
 
#define SAADC_SAMPLERATE_MODE_Pos   (12UL)
 
#define SAADC_SAMPLERATE_MODE_Msk   (0x1UL << SAADC_SAMPLERATE_MODE_Pos)
 
#define SAADC_SAMPLERATE_MODE_Task   (0UL)
 
#define SAADC_SAMPLERATE_MODE_Timers   (1UL)
 
#define SAADC_SAMPLERATE_CC_Pos   (0UL)
 
#define SAADC_SAMPLERATE_CC_Msk   (0x7FFUL << SAADC_SAMPLERATE_CC_Pos)
 
#define SAADC_RESULT_PTR_PTR_Pos   (0UL)
 
#define SAADC_RESULT_PTR_PTR_Msk   (0xFFFFFFFFUL << SAADC_RESULT_PTR_PTR_Pos)
 
#define SAADC_RESULT_MAXCNT_MAXCNT_Pos   (0UL)
 
#define SAADC_RESULT_MAXCNT_MAXCNT_Msk   (0xFFFFUL << SAADC_RESULT_MAXCNT_MAXCNT_Pos)
 
#define SAADC_RESULT_AMOUNT_AMOUNT_Pos   (0UL)
 
#define SAADC_RESULT_AMOUNT_AMOUNT_Msk   (0xFFFFUL << SAADC_RESULT_AMOUNT_AMOUNT_Pos)
 
#define SPI_INTENSET_READY_Pos   (2UL)
 
#define SPI_INTENSET_READY_Msk   (0x1UL << SPI_INTENSET_READY_Pos)
 
#define SPI_INTENSET_READY_Disabled   (0UL)
 
#define SPI_INTENSET_READY_Enabled   (1UL)
 
#define SPI_INTENSET_READY_Set   (1UL)
 
#define SPI_INTENCLR_READY_Pos   (2UL)
 
#define SPI_INTENCLR_READY_Msk   (0x1UL << SPI_INTENCLR_READY_Pos)
 
#define SPI_INTENCLR_READY_Disabled   (0UL)
 
#define SPI_INTENCLR_READY_Enabled   (1UL)
 
#define SPI_INTENCLR_READY_Clear   (1UL)
 
#define SPI_ENABLE_ENABLE_Pos   (0UL)
 
#define SPI_ENABLE_ENABLE_Msk   (0xFUL << SPI_ENABLE_ENABLE_Pos)
 
#define SPI_ENABLE_ENABLE_Disabled   (0UL)
 
#define SPI_ENABLE_ENABLE_Enabled   (1UL)
 
#define SPI_PSEL_SCK_PSELSCK_Pos   (0UL)
 
#define SPI_PSEL_SCK_PSELSCK_Msk   (0xFFFFFFFFUL << SPI_PSEL_SCK_PSELSCK_Pos)
 
#define SPI_PSEL_SCK_PSELSCK_Disconnected   (0xFFFFFFFFUL)
 
#define SPI_PSEL_MOSI_PSELMOSI_Pos   (0UL)
 
#define SPI_PSEL_MOSI_PSELMOSI_Msk   (0xFFFFFFFFUL << SPI_PSEL_MOSI_PSELMOSI_Pos)
 
#define SPI_PSEL_MOSI_PSELMOSI_Disconnected   (0xFFFFFFFFUL)
 
#define SPI_PSEL_MISO_PSELMISO_Pos   (0UL)
 
#define SPI_PSEL_MISO_PSELMISO_Msk   (0xFFFFFFFFUL << SPI_PSEL_MISO_PSELMISO_Pos)
 
#define SPI_PSEL_MISO_PSELMISO_Disconnected   (0xFFFFFFFFUL)
 
#define SPI_RXD_RXD_Pos   (0UL)
 
#define SPI_RXD_RXD_Msk   (0xFFUL << SPI_RXD_RXD_Pos)
 
#define SPI_TXD_TXD_Pos   (0UL)
 
#define SPI_TXD_TXD_Msk   (0xFFUL << SPI_TXD_TXD_Pos)
 
#define SPI_FREQUENCY_FREQUENCY_Pos   (0UL)
 
#define SPI_FREQUENCY_FREQUENCY_Msk   (0xFFFFFFFFUL << SPI_FREQUENCY_FREQUENCY_Pos)
 
#define SPI_FREQUENCY_FREQUENCY_K125   (0x02000000UL)
 
#define SPI_FREQUENCY_FREQUENCY_K250   (0x04000000UL)
 
#define SPI_FREQUENCY_FREQUENCY_K500   (0x08000000UL)
 
#define SPI_FREQUENCY_FREQUENCY_M1   (0x10000000UL)
 
#define SPI_FREQUENCY_FREQUENCY_M2   (0x20000000UL)
 
#define SPI_FREQUENCY_FREQUENCY_M4   (0x40000000UL)
 
#define SPI_FREQUENCY_FREQUENCY_M8   (0x80000000UL)
 
#define SPI_CONFIG_CPOL_Pos   (2UL)
 
#define SPI_CONFIG_CPOL_Msk   (0x1UL << SPI_CONFIG_CPOL_Pos)
 
#define SPI_CONFIG_CPOL_ActiveHigh   (0UL)
 
#define SPI_CONFIG_CPOL_ActiveLow   (1UL)
 
#define SPI_CONFIG_CPHA_Pos   (1UL)
 
#define SPI_CONFIG_CPHA_Msk   (0x1UL << SPI_CONFIG_CPHA_Pos)
 
#define SPI_CONFIG_CPHA_Leading   (0UL)
 
#define SPI_CONFIG_CPHA_Trailing   (1UL)
 
#define SPI_CONFIG_ORDER_Pos   (0UL)
 
#define SPI_CONFIG_ORDER_Msk   (0x1UL << SPI_CONFIG_ORDER_Pos)
 
#define SPI_CONFIG_ORDER_MsbFirst   (0UL)
 
#define SPI_CONFIG_ORDER_LsbFirst   (1UL)
 
#define SPIM_SHORTS_END_START_Pos   (17UL)
 
#define SPIM_SHORTS_END_START_Msk   (0x1UL << SPIM_SHORTS_END_START_Pos)
 
#define SPIM_SHORTS_END_START_Disabled   (0UL)
 
#define SPIM_SHORTS_END_START_Enabled   (1UL)
 
#define SPIM_INTENSET_STARTED_Pos   (19UL)
 
#define SPIM_INTENSET_STARTED_Msk   (0x1UL << SPIM_INTENSET_STARTED_Pos)
 
#define SPIM_INTENSET_STARTED_Disabled   (0UL)
 
#define SPIM_INTENSET_STARTED_Enabled   (1UL)
 
#define SPIM_INTENSET_STARTED_Set   (1UL)
 
#define SPIM_INTENSET_ENDTX_Pos   (8UL)
 
#define SPIM_INTENSET_ENDTX_Msk   (0x1UL << SPIM_INTENSET_ENDTX_Pos)
 
#define SPIM_INTENSET_ENDTX_Disabled   (0UL)
 
#define SPIM_INTENSET_ENDTX_Enabled   (1UL)
 
#define SPIM_INTENSET_ENDTX_Set   (1UL)
 
#define SPIM_INTENSET_END_Pos   (6UL)
 
#define SPIM_INTENSET_END_Msk   (0x1UL << SPIM_INTENSET_END_Pos)
 
#define SPIM_INTENSET_END_Disabled   (0UL)
 
#define SPIM_INTENSET_END_Enabled   (1UL)
 
#define SPIM_INTENSET_END_Set   (1UL)
 
#define SPIM_INTENSET_ENDRX_Pos   (4UL)
 
#define SPIM_INTENSET_ENDRX_Msk   (0x1UL << SPIM_INTENSET_ENDRX_Pos)
 
#define SPIM_INTENSET_ENDRX_Disabled   (0UL)
 
#define SPIM_INTENSET_ENDRX_Enabled   (1UL)
 
#define SPIM_INTENSET_ENDRX_Set   (1UL)
 
#define SPIM_INTENSET_STOPPED_Pos   (1UL)
 
#define SPIM_INTENSET_STOPPED_Msk   (0x1UL << SPIM_INTENSET_STOPPED_Pos)
 
#define SPIM_INTENSET_STOPPED_Disabled   (0UL)
 
#define SPIM_INTENSET_STOPPED_Enabled   (1UL)
 
#define SPIM_INTENSET_STOPPED_Set   (1UL)
 
#define SPIM_INTENCLR_STARTED_Pos   (19UL)
 
#define SPIM_INTENCLR_STARTED_Msk   (0x1UL << SPIM_INTENCLR_STARTED_Pos)
 
#define SPIM_INTENCLR_STARTED_Disabled   (0UL)
 
#define SPIM_INTENCLR_STARTED_Enabled   (1UL)
 
#define SPIM_INTENCLR_STARTED_Clear   (1UL)
 
#define SPIM_INTENCLR_ENDTX_Pos   (8UL)
 
#define SPIM_INTENCLR_ENDTX_Msk   (0x1UL << SPIM_INTENCLR_ENDTX_Pos)
 
#define SPIM_INTENCLR_ENDTX_Disabled   (0UL)
 
#define SPIM_INTENCLR_ENDTX_Enabled   (1UL)
 
#define SPIM_INTENCLR_ENDTX_Clear   (1UL)
 
#define SPIM_INTENCLR_END_Pos   (6UL)
 
#define SPIM_INTENCLR_END_Msk   (0x1UL << SPIM_INTENCLR_END_Pos)
 
#define SPIM_INTENCLR_END_Disabled   (0UL)
 
#define SPIM_INTENCLR_END_Enabled   (1UL)
 
#define SPIM_INTENCLR_END_Clear   (1UL)
 
#define SPIM_INTENCLR_ENDRX_Pos   (4UL)
 
#define SPIM_INTENCLR_ENDRX_Msk   (0x1UL << SPIM_INTENCLR_ENDRX_Pos)
 
#define SPIM_INTENCLR_ENDRX_Disabled   (0UL)
 
#define SPIM_INTENCLR_ENDRX_Enabled   (1UL)
 
#define SPIM_INTENCLR_ENDRX_Clear   (1UL)
 
#define SPIM_INTENCLR_STOPPED_Pos   (1UL)
 
#define SPIM_INTENCLR_STOPPED_Msk   (0x1UL << SPIM_INTENCLR_STOPPED_Pos)
 
#define SPIM_INTENCLR_STOPPED_Disabled   (0UL)
 
#define SPIM_INTENCLR_STOPPED_Enabled   (1UL)
 
#define SPIM_INTENCLR_STOPPED_Clear   (1UL)
 
#define SPIM_ENABLE_ENABLE_Pos   (0UL)
 
#define SPIM_ENABLE_ENABLE_Msk   (0xFUL << SPIM_ENABLE_ENABLE_Pos)
 
#define SPIM_ENABLE_ENABLE_Disabled   (0UL)
 
#define SPIM_ENABLE_ENABLE_Enabled   (7UL)
 
#define SPIM_PSEL_SCK_CONNECT_Pos   (31UL)
 
#define SPIM_PSEL_SCK_CONNECT_Msk   (0x1UL << SPIM_PSEL_SCK_CONNECT_Pos)
 
#define SPIM_PSEL_SCK_CONNECT_Connected   (0UL)
 
#define SPIM_PSEL_SCK_CONNECT_Disconnected   (1UL)
 
#define SPIM_PSEL_SCK_PIN_Pos   (0UL)
 
#define SPIM_PSEL_SCK_PIN_Msk   (0x1FUL << SPIM_PSEL_SCK_PIN_Pos)
 
#define SPIM_PSEL_MOSI_CONNECT_Pos   (31UL)
 
#define SPIM_PSEL_MOSI_CONNECT_Msk   (0x1UL << SPIM_PSEL_MOSI_CONNECT_Pos)
 
#define SPIM_PSEL_MOSI_CONNECT_Connected   (0UL)
 
#define SPIM_PSEL_MOSI_CONNECT_Disconnected   (1UL)
 
#define SPIM_PSEL_MOSI_PIN_Pos   (0UL)
 
#define SPIM_PSEL_MOSI_PIN_Msk   (0x1FUL << SPIM_PSEL_MOSI_PIN_Pos)
 
#define SPIM_PSEL_MISO_CONNECT_Pos   (31UL)
 
#define SPIM_PSEL_MISO_CONNECT_Msk   (0x1UL << SPIM_PSEL_MISO_CONNECT_Pos)
 
#define SPIM_PSEL_MISO_CONNECT_Connected   (0UL)
 
#define SPIM_PSEL_MISO_CONNECT_Disconnected   (1UL)
 
#define SPIM_PSEL_MISO_PIN_Pos   (0UL)
 
#define SPIM_PSEL_MISO_PIN_Msk   (0x1FUL << SPIM_PSEL_MISO_PIN_Pos)
 
#define SPIM_FREQUENCY_FREQUENCY_Pos   (0UL)
 
#define SPIM_FREQUENCY_FREQUENCY_Msk   (0xFFFFFFFFUL << SPIM_FREQUENCY_FREQUENCY_Pos)
 
#define SPIM_FREQUENCY_FREQUENCY_K125   (0x02000000UL)
 
#define SPIM_FREQUENCY_FREQUENCY_K250   (0x04000000UL)
 
#define SPIM_FREQUENCY_FREQUENCY_K500   (0x08000000UL)
 
#define SPIM_FREQUENCY_FREQUENCY_M1   (0x10000000UL)
 
#define SPIM_FREQUENCY_FREQUENCY_M2   (0x20000000UL)
 
#define SPIM_FREQUENCY_FREQUENCY_M4   (0x40000000UL)
 
#define SPIM_FREQUENCY_FREQUENCY_M8   (0x80000000UL)
 
#define SPIM_RXD_PTR_PTR_Pos   (0UL)
 
#define SPIM_RXD_PTR_PTR_Msk   (0xFFFFFFFFUL << SPIM_RXD_PTR_PTR_Pos)
 
#define SPIM_RXD_MAXCNT_MAXCNT_Pos   (0UL)
 
#define SPIM_RXD_MAXCNT_MAXCNT_Msk   (0xFFUL << SPIM_RXD_MAXCNT_MAXCNT_Pos)
 
#define SPIM_RXD_AMOUNT_AMOUNT_Pos   (0UL)
 
#define SPIM_RXD_AMOUNT_AMOUNT_Msk   (0xFFUL << SPIM_RXD_AMOUNT_AMOUNT_Pos)
 
#define SPIM_RXD_LIST_LIST_Pos   (0UL)
 
#define SPIM_RXD_LIST_LIST_Msk   (0x7UL << SPIM_RXD_LIST_LIST_Pos)
 
#define SPIM_RXD_LIST_LIST_Disabled   (0UL)
 
#define SPIM_RXD_LIST_LIST_ArrayList   (1UL)
 
#define SPIM_TXD_PTR_PTR_Pos   (0UL)
 
#define SPIM_TXD_PTR_PTR_Msk   (0xFFFFFFFFUL << SPIM_TXD_PTR_PTR_Pos)
 
#define SPIM_TXD_MAXCNT_MAXCNT_Pos   (0UL)
 
#define SPIM_TXD_MAXCNT_MAXCNT_Msk   (0xFFUL << SPIM_TXD_MAXCNT_MAXCNT_Pos)
 
#define SPIM_TXD_AMOUNT_AMOUNT_Pos   (0UL)
 
#define SPIM_TXD_AMOUNT_AMOUNT_Msk   (0xFFUL << SPIM_TXD_AMOUNT_AMOUNT_Pos)
 
#define SPIM_TXD_LIST_LIST_Pos   (0UL)
 
#define SPIM_TXD_LIST_LIST_Msk   (0x7UL << SPIM_TXD_LIST_LIST_Pos)
 
#define SPIM_TXD_LIST_LIST_Disabled   (0UL)
 
#define SPIM_TXD_LIST_LIST_ArrayList   (1UL)
 
#define SPIM_CONFIG_CPOL_Pos   (2UL)
 
#define SPIM_CONFIG_CPOL_Msk   (0x1UL << SPIM_CONFIG_CPOL_Pos)
 
#define SPIM_CONFIG_CPOL_ActiveHigh   (0UL)
 
#define SPIM_CONFIG_CPOL_ActiveLow   (1UL)
 
#define SPIM_CONFIG_CPHA_Pos   (1UL)
 
#define SPIM_CONFIG_CPHA_Msk   (0x1UL << SPIM_CONFIG_CPHA_Pos)
 
#define SPIM_CONFIG_CPHA_Leading   (0UL)
 
#define SPIM_CONFIG_CPHA_Trailing   (1UL)
 
#define SPIM_CONFIG_ORDER_Pos   (0UL)
 
#define SPIM_CONFIG_ORDER_Msk   (0x1UL << SPIM_CONFIG_ORDER_Pos)
 
#define SPIM_CONFIG_ORDER_MsbFirst   (0UL)
 
#define SPIM_CONFIG_ORDER_LsbFirst   (1UL)
 
#define SPIM_ORC_ORC_Pos   (0UL)
 
#define SPIM_ORC_ORC_Msk   (0xFFUL << SPIM_ORC_ORC_Pos)
 
#define SPIS_SHORTS_END_ACQUIRE_Pos   (2UL)
 
#define SPIS_SHORTS_END_ACQUIRE_Msk   (0x1UL << SPIS_SHORTS_END_ACQUIRE_Pos)
 
#define SPIS_SHORTS_END_ACQUIRE_Disabled   (0UL)
 
#define SPIS_SHORTS_END_ACQUIRE_Enabled   (1UL)
 
#define SPIS_INTENSET_ACQUIRED_Pos   (10UL)
 
#define SPIS_INTENSET_ACQUIRED_Msk   (0x1UL << SPIS_INTENSET_ACQUIRED_Pos)
 
#define SPIS_INTENSET_ACQUIRED_Disabled   (0UL)
 
#define SPIS_INTENSET_ACQUIRED_Enabled   (1UL)
 
#define SPIS_INTENSET_ACQUIRED_Set   (1UL)
 
#define SPIS_INTENSET_END_Pos   (1UL)
 
#define SPIS_INTENSET_END_Msk   (0x1UL << SPIS_INTENSET_END_Pos)
 
#define SPIS_INTENSET_END_Disabled   (0UL)
 
#define SPIS_INTENSET_END_Enabled   (1UL)
 
#define SPIS_INTENSET_END_Set   (1UL)
 
#define SPIS_INTENCLR_ACQUIRED_Pos   (10UL)
 
#define SPIS_INTENCLR_ACQUIRED_Msk   (0x1UL << SPIS_INTENCLR_ACQUIRED_Pos)
 
#define SPIS_INTENCLR_ACQUIRED_Disabled   (0UL)
 
#define SPIS_INTENCLR_ACQUIRED_Enabled   (1UL)
 
#define SPIS_INTENCLR_ACQUIRED_Clear   (1UL)
 
#define SPIS_INTENCLR_END_Pos   (1UL)
 
#define SPIS_INTENCLR_END_Msk   (0x1UL << SPIS_INTENCLR_END_Pos)
 
#define SPIS_INTENCLR_END_Disabled   (0UL)
 
#define SPIS_INTENCLR_END_Enabled   (1UL)
 
#define SPIS_INTENCLR_END_Clear   (1UL)
 
#define SPIS_SEMSTAT_SEMSTAT_Pos   (0UL)
 
#define SPIS_SEMSTAT_SEMSTAT_Msk   (0x3UL << SPIS_SEMSTAT_SEMSTAT_Pos)
 
#define SPIS_SEMSTAT_SEMSTAT_Free   (0UL)
 
#define SPIS_SEMSTAT_SEMSTAT_CPU   (1UL)
 
#define SPIS_SEMSTAT_SEMSTAT_SPIS   (2UL)
 
#define SPIS_SEMSTAT_SEMSTAT_CPUPending   (3UL)
 
#define SPIS_STATUS_OVERFLOW_Pos   (1UL)
 
#define SPIS_STATUS_OVERFLOW_Msk   (0x1UL << SPIS_STATUS_OVERFLOW_Pos)
 
#define SPIS_STATUS_OVERFLOW_NotPresent   (0UL)
 
#define SPIS_STATUS_OVERFLOW_Present   (1UL)
 
#define SPIS_STATUS_OVERFLOW_Clear   (1UL)
 
#define SPIS_STATUS_OVERREAD_Pos   (0UL)
 
#define SPIS_STATUS_OVERREAD_Msk   (0x1UL << SPIS_STATUS_OVERREAD_Pos)
 
#define SPIS_STATUS_OVERREAD_NotPresent   (0UL)
 
#define SPIS_STATUS_OVERREAD_Present   (1UL)
 
#define SPIS_STATUS_OVERREAD_Clear   (1UL)
 
#define SPIS_ENABLE_ENABLE_Pos   (0UL)
 
#define SPIS_ENABLE_ENABLE_Msk   (0xFUL << SPIS_ENABLE_ENABLE_Pos)
 
#define SPIS_ENABLE_ENABLE_Disabled   (0UL)
 
#define SPIS_ENABLE_ENABLE_Enabled   (2UL)
 
#define SPIS_PSEL_SCK_CONNECT_Pos   (31UL)
 
#define SPIS_PSEL_SCK_CONNECT_Msk   (0x1UL << SPIS_PSEL_SCK_CONNECT_Pos)
 
#define SPIS_PSEL_SCK_CONNECT_Connected   (0UL)
 
#define SPIS_PSEL_SCK_CONNECT_Disconnected   (1UL)
 
#define SPIS_PSEL_SCK_PIN_Pos   (0UL)
 
#define SPIS_PSEL_SCK_PIN_Msk   (0x1FUL << SPIS_PSEL_SCK_PIN_Pos)
 
#define SPIS_PSEL_MISO_CONNECT_Pos   (31UL)
 
#define SPIS_PSEL_MISO_CONNECT_Msk   (0x1UL << SPIS_PSEL_MISO_CONNECT_Pos)
 
#define SPIS_PSEL_MISO_CONNECT_Connected   (0UL)
 
#define SPIS_PSEL_MISO_CONNECT_Disconnected   (1UL)
 
#define SPIS_PSEL_MISO_PIN_Pos   (0UL)
 
#define SPIS_PSEL_MISO_PIN_Msk   (0x1FUL << SPIS_PSEL_MISO_PIN_Pos)
 
#define SPIS_PSEL_MOSI_CONNECT_Pos   (31UL)
 
#define SPIS_PSEL_MOSI_CONNECT_Msk   (0x1UL << SPIS_PSEL_MOSI_CONNECT_Pos)
 
#define SPIS_PSEL_MOSI_CONNECT_Connected   (0UL)
 
#define SPIS_PSEL_MOSI_CONNECT_Disconnected   (1UL)
 
#define SPIS_PSEL_MOSI_PIN_Pos   (0UL)
 
#define SPIS_PSEL_MOSI_PIN_Msk   (0x1FUL << SPIS_PSEL_MOSI_PIN_Pos)
 
#define SPIS_PSEL_CSN_CONNECT_Pos   (31UL)
 
#define SPIS_PSEL_CSN_CONNECT_Msk   (0x1UL << SPIS_PSEL_CSN_CONNECT_Pos)
 
#define SPIS_PSEL_CSN_CONNECT_Connected   (0UL)
 
#define SPIS_PSEL_CSN_CONNECT_Disconnected   (1UL)
 
#define SPIS_PSEL_CSN_PIN_Pos   (0UL)
 
#define SPIS_PSEL_CSN_PIN_Msk   (0x1FUL << SPIS_PSEL_CSN_PIN_Pos)
 
#define SPIS_RXD_PTR_PTR_Pos   (0UL)
 
#define SPIS_RXD_PTR_PTR_Msk   (0xFFFFFFFFUL << SPIS_RXD_PTR_PTR_Pos)
 
#define SPIS_RXD_MAXCNT_MAXCNT_Pos   (0UL)
 
#define SPIS_RXD_MAXCNT_MAXCNT_Msk   (0xFFUL << SPIS_RXD_MAXCNT_MAXCNT_Pos)
 
#define SPIS_RXD_AMOUNT_AMOUNT_Pos   (0UL)
 
#define SPIS_RXD_AMOUNT_AMOUNT_Msk   (0xFFUL << SPIS_RXD_AMOUNT_AMOUNT_Pos)
 
#define SPIS_TXD_PTR_PTR_Pos   (0UL)
 
#define SPIS_TXD_PTR_PTR_Msk   (0xFFFFFFFFUL << SPIS_TXD_PTR_PTR_Pos)
 
#define SPIS_TXD_MAXCNT_MAXCNT_Pos   (0UL)
 
#define SPIS_TXD_MAXCNT_MAXCNT_Msk   (0xFFUL << SPIS_TXD_MAXCNT_MAXCNT_Pos)
 
#define SPIS_TXD_AMOUNT_AMOUNT_Pos   (0UL)
 
#define SPIS_TXD_AMOUNT_AMOUNT_Msk   (0xFFUL << SPIS_TXD_AMOUNT_AMOUNT_Pos)
 
#define SPIS_CONFIG_CPOL_Pos   (2UL)
 
#define SPIS_CONFIG_CPOL_Msk   (0x1UL << SPIS_CONFIG_CPOL_Pos)
 
#define SPIS_CONFIG_CPOL_ActiveHigh   (0UL)
 
#define SPIS_CONFIG_CPOL_ActiveLow   (1UL)
 
#define SPIS_CONFIG_CPHA_Pos   (1UL)
 
#define SPIS_CONFIG_CPHA_Msk   (0x1UL << SPIS_CONFIG_CPHA_Pos)
 
#define SPIS_CONFIG_CPHA_Leading   (0UL)
 
#define SPIS_CONFIG_CPHA_Trailing   (1UL)
 
#define SPIS_CONFIG_ORDER_Pos   (0UL)
 
#define SPIS_CONFIG_ORDER_Msk   (0x1UL << SPIS_CONFIG_ORDER_Pos)
 
#define SPIS_CONFIG_ORDER_MsbFirst   (0UL)
 
#define SPIS_CONFIG_ORDER_LsbFirst   (1UL)
 
#define SPIS_DEF_DEF_Pos   (0UL)
 
#define SPIS_DEF_DEF_Msk   (0xFFUL << SPIS_DEF_DEF_Pos)
 
#define SPIS_ORC_ORC_Pos   (0UL)
 
#define SPIS_ORC_ORC_Msk   (0xFFUL << SPIS_ORC_ORC_Pos)
 
#define TEMP_INTENSET_DATARDY_Pos   (0UL)
 
#define TEMP_INTENSET_DATARDY_Msk   (0x1UL << TEMP_INTENSET_DATARDY_Pos)
 
#define TEMP_INTENSET_DATARDY_Disabled   (0UL)
 
#define TEMP_INTENSET_DATARDY_Enabled   (1UL)
 
#define TEMP_INTENSET_DATARDY_Set   (1UL)
 
#define TEMP_INTENCLR_DATARDY_Pos   (0UL)
 
#define TEMP_INTENCLR_DATARDY_Msk   (0x1UL << TEMP_INTENCLR_DATARDY_Pos)
 
#define TEMP_INTENCLR_DATARDY_Disabled   (0UL)
 
#define TEMP_INTENCLR_DATARDY_Enabled   (1UL)
 
#define TEMP_INTENCLR_DATARDY_Clear   (1UL)
 
#define TEMP_TEMP_TEMP_Pos   (0UL)
 
#define TEMP_TEMP_TEMP_Msk   (0xFFFFFFFFUL << TEMP_TEMP_TEMP_Pos)
 
#define TIMER_SHORTS_COMPARE5_STOP_Pos   (13UL)
 
#define TIMER_SHORTS_COMPARE5_STOP_Msk   (0x1UL << TIMER_SHORTS_COMPARE5_STOP_Pos)
 
#define TIMER_SHORTS_COMPARE5_STOP_Disabled   (0UL)
 
#define TIMER_SHORTS_COMPARE5_STOP_Enabled   (1UL)
 
#define TIMER_SHORTS_COMPARE4_STOP_Pos   (12UL)
 
#define TIMER_SHORTS_COMPARE4_STOP_Msk   (0x1UL << TIMER_SHORTS_COMPARE4_STOP_Pos)
 
#define TIMER_SHORTS_COMPARE4_STOP_Disabled   (0UL)
 
#define TIMER_SHORTS_COMPARE4_STOP_Enabled   (1UL)
 
#define TIMER_SHORTS_COMPARE3_STOP_Pos   (11UL)
 
#define TIMER_SHORTS_COMPARE3_STOP_Msk   (0x1UL << TIMER_SHORTS_COMPARE3_STOP_Pos)
 
#define TIMER_SHORTS_COMPARE3_STOP_Disabled   (0UL)
 
#define TIMER_SHORTS_COMPARE3_STOP_Enabled   (1UL)
 
#define TIMER_SHORTS_COMPARE2_STOP_Pos   (10UL)
 
#define TIMER_SHORTS_COMPARE2_STOP_Msk   (0x1UL << TIMER_SHORTS_COMPARE2_STOP_Pos)
 
#define TIMER_SHORTS_COMPARE2_STOP_Disabled   (0UL)
 
#define TIMER_SHORTS_COMPARE2_STOP_Enabled   (1UL)
 
#define TIMER_SHORTS_COMPARE1_STOP_Pos   (9UL)
 
#define TIMER_SHORTS_COMPARE1_STOP_Msk   (0x1UL << TIMER_SHORTS_COMPARE1_STOP_Pos)
 
#define TIMER_SHORTS_COMPARE1_STOP_Disabled   (0UL)
 
#define TIMER_SHORTS_COMPARE1_STOP_Enabled   (1UL)
 
#define TIMER_SHORTS_COMPARE0_STOP_Pos   (8UL)
 
#define TIMER_SHORTS_COMPARE0_STOP_Msk   (0x1UL << TIMER_SHORTS_COMPARE0_STOP_Pos)
 
#define TIMER_SHORTS_COMPARE0_STOP_Disabled   (0UL)
 
#define TIMER_SHORTS_COMPARE0_STOP_Enabled   (1UL)
 
#define TIMER_SHORTS_COMPARE5_CLEAR_Pos   (5UL)
 
#define TIMER_SHORTS_COMPARE5_CLEAR_Msk   (0x1UL << TIMER_SHORTS_COMPARE5_CLEAR_Pos)
 
#define TIMER_SHORTS_COMPARE5_CLEAR_Disabled   (0UL)
 
#define TIMER_SHORTS_COMPARE5_CLEAR_Enabled   (1UL)
 
#define TIMER_SHORTS_COMPARE4_CLEAR_Pos   (4UL)
 
#define TIMER_SHORTS_COMPARE4_CLEAR_Msk   (0x1UL << TIMER_SHORTS_COMPARE4_CLEAR_Pos)
 
#define TIMER_SHORTS_COMPARE4_CLEAR_Disabled   (0UL)
 
#define TIMER_SHORTS_COMPARE4_CLEAR_Enabled   (1UL)
 
#define TIMER_SHORTS_COMPARE3_CLEAR_Pos   (3UL)
 
#define TIMER_SHORTS_COMPARE3_CLEAR_Msk   (0x1UL << TIMER_SHORTS_COMPARE3_CLEAR_Pos)
 
#define TIMER_SHORTS_COMPARE3_CLEAR_Disabled   (0UL)
 
#define TIMER_SHORTS_COMPARE3_CLEAR_Enabled   (1UL)
 
#define TIMER_SHORTS_COMPARE2_CLEAR_Pos   (2UL)
 
#define TIMER_SHORTS_COMPARE2_CLEAR_Msk   (0x1UL << TIMER_SHORTS_COMPARE2_CLEAR_Pos)
 
#define TIMER_SHORTS_COMPARE2_CLEAR_Disabled   (0UL)
 
#define TIMER_SHORTS_COMPARE2_CLEAR_Enabled   (1UL)
 
#define TIMER_SHORTS_COMPARE1_CLEAR_Pos   (1UL)
 
#define TIMER_SHORTS_COMPARE1_CLEAR_Msk   (0x1UL << TIMER_SHORTS_COMPARE1_CLEAR_Pos)
 
#define TIMER_SHORTS_COMPARE1_CLEAR_Disabled   (0UL)
 
#define TIMER_SHORTS_COMPARE1_CLEAR_Enabled   (1UL)
 
#define TIMER_SHORTS_COMPARE0_CLEAR_Pos   (0UL)
 
#define TIMER_SHORTS_COMPARE0_CLEAR_Msk   (0x1UL << TIMER_SHORTS_COMPARE0_CLEAR_Pos)
 
#define TIMER_SHORTS_COMPARE0_CLEAR_Disabled   (0UL)
 
#define TIMER_SHORTS_COMPARE0_CLEAR_Enabled   (1UL)
 
#define TIMER_INTENSET_COMPARE5_Pos   (21UL)
 
#define TIMER_INTENSET_COMPARE5_Msk   (0x1UL << TIMER_INTENSET_COMPARE5_Pos)
 
#define TIMER_INTENSET_COMPARE5_Disabled   (0UL)
 
#define TIMER_INTENSET_COMPARE5_Enabled   (1UL)
 
#define TIMER_INTENSET_COMPARE5_Set   (1UL)
 
#define TIMER_INTENSET_COMPARE4_Pos   (20UL)
 
#define TIMER_INTENSET_COMPARE4_Msk   (0x1UL << TIMER_INTENSET_COMPARE4_Pos)
 
#define TIMER_INTENSET_COMPARE4_Disabled   (0UL)
 
#define TIMER_INTENSET_COMPARE4_Enabled   (1UL)
 
#define TIMER_INTENSET_COMPARE4_Set   (1UL)
 
#define TIMER_INTENSET_COMPARE3_Pos   (19UL)
 
#define TIMER_INTENSET_COMPARE3_Msk   (0x1UL << TIMER_INTENSET_COMPARE3_Pos)
 
#define TIMER_INTENSET_COMPARE3_Disabled   (0UL)
 
#define TIMER_INTENSET_COMPARE3_Enabled   (1UL)
 
#define TIMER_INTENSET_COMPARE3_Set   (1UL)
 
#define TIMER_INTENSET_COMPARE2_Pos   (18UL)
 
#define TIMER_INTENSET_COMPARE2_Msk   (0x1UL << TIMER_INTENSET_COMPARE2_Pos)
 
#define TIMER_INTENSET_COMPARE2_Disabled   (0UL)
 
#define TIMER_INTENSET_COMPARE2_Enabled   (1UL)
 
#define TIMER_INTENSET_COMPARE2_Set   (1UL)
 
#define TIMER_INTENSET_COMPARE1_Pos   (17UL)
 
#define TIMER_INTENSET_COMPARE1_Msk   (0x1UL << TIMER_INTENSET_COMPARE1_Pos)
 
#define TIMER_INTENSET_COMPARE1_Disabled   (0UL)
 
#define TIMER_INTENSET_COMPARE1_Enabled   (1UL)
 
#define TIMER_INTENSET_COMPARE1_Set   (1UL)
 
#define TIMER_INTENSET_COMPARE0_Pos   (16UL)
 
#define TIMER_INTENSET_COMPARE0_Msk   (0x1UL << TIMER_INTENSET_COMPARE0_Pos)
 
#define TIMER_INTENSET_COMPARE0_Disabled   (0UL)
 
#define TIMER_INTENSET_COMPARE0_Enabled   (1UL)
 
#define TIMER_INTENSET_COMPARE0_Set   (1UL)
 
#define TIMER_INTENCLR_COMPARE5_Pos   (21UL)
 
#define TIMER_INTENCLR_COMPARE5_Msk   (0x1UL << TIMER_INTENCLR_COMPARE5_Pos)
 
#define TIMER_INTENCLR_COMPARE5_Disabled   (0UL)
 
#define TIMER_INTENCLR_COMPARE5_Enabled   (1UL)
 
#define TIMER_INTENCLR_COMPARE5_Clear   (1UL)
 
#define TIMER_INTENCLR_COMPARE4_Pos   (20UL)
 
#define TIMER_INTENCLR_COMPARE4_Msk   (0x1UL << TIMER_INTENCLR_COMPARE4_Pos)
 
#define TIMER_INTENCLR_COMPARE4_Disabled   (0UL)
 
#define TIMER_INTENCLR_COMPARE4_Enabled   (1UL)
 
#define TIMER_INTENCLR_COMPARE4_Clear   (1UL)
 
#define TIMER_INTENCLR_COMPARE3_Pos   (19UL)
 
#define TIMER_INTENCLR_COMPARE3_Msk   (0x1UL << TIMER_INTENCLR_COMPARE3_Pos)
 
#define TIMER_INTENCLR_COMPARE3_Disabled   (0UL)
 
#define TIMER_INTENCLR_COMPARE3_Enabled   (1UL)
 
#define TIMER_INTENCLR_COMPARE3_Clear   (1UL)
 
#define TIMER_INTENCLR_COMPARE2_Pos   (18UL)
 
#define TIMER_INTENCLR_COMPARE2_Msk   (0x1UL << TIMER_INTENCLR_COMPARE2_Pos)
 
#define TIMER_INTENCLR_COMPARE2_Disabled   (0UL)
 
#define TIMER_INTENCLR_COMPARE2_Enabled   (1UL)
 
#define TIMER_INTENCLR_COMPARE2_Clear   (1UL)
 
#define TIMER_INTENCLR_COMPARE1_Pos   (17UL)
 
#define TIMER_INTENCLR_COMPARE1_Msk   (0x1UL << TIMER_INTENCLR_COMPARE1_Pos)
 
#define TIMER_INTENCLR_COMPARE1_Disabled   (0UL)
 
#define TIMER_INTENCLR_COMPARE1_Enabled   (1UL)
 
#define TIMER_INTENCLR_COMPARE1_Clear   (1UL)
 
#define TIMER_INTENCLR_COMPARE0_Pos   (16UL)
 
#define TIMER_INTENCLR_COMPARE0_Msk   (0x1UL << TIMER_INTENCLR_COMPARE0_Pos)
 
#define TIMER_INTENCLR_COMPARE0_Disabled   (0UL)
 
#define TIMER_INTENCLR_COMPARE0_Enabled   (1UL)
 
#define TIMER_INTENCLR_COMPARE0_Clear   (1UL)
 
#define TIMER_MODE_MODE_Pos   (0UL)
 
#define TIMER_MODE_MODE_Msk   (0x3UL << TIMER_MODE_MODE_Pos)
 
#define TIMER_MODE_MODE_Timer   (0UL)
 
#define TIMER_MODE_MODE_Counter   (1UL)
 
#define TIMER_MODE_MODE_LowPowerCounter   (2UL)
 
#define TIMER_BITMODE_BITMODE_Pos   (0UL)
 
#define TIMER_BITMODE_BITMODE_Msk   (0x3UL << TIMER_BITMODE_BITMODE_Pos)
 
#define TIMER_BITMODE_BITMODE_16Bit   (0UL)
 
#define TIMER_BITMODE_BITMODE_08Bit   (1UL)
 
#define TIMER_BITMODE_BITMODE_24Bit   (2UL)
 
#define TIMER_BITMODE_BITMODE_32Bit   (3UL)
 
#define TIMER_PRESCALER_PRESCALER_Pos   (0UL)
 
#define TIMER_PRESCALER_PRESCALER_Msk   (0xFUL << TIMER_PRESCALER_PRESCALER_Pos)
 
#define TIMER_CC_CC_Pos   (0UL)
 
#define TIMER_CC_CC_Msk   (0xFFFFFFFFUL << TIMER_CC_CC_Pos)
 
#define TWI_SHORTS_BB_STOP_Pos   (1UL)
 
#define TWI_SHORTS_BB_STOP_Msk   (0x1UL << TWI_SHORTS_BB_STOP_Pos)
 
#define TWI_SHORTS_BB_STOP_Disabled   (0UL)
 
#define TWI_SHORTS_BB_STOP_Enabled   (1UL)
 
#define TWI_SHORTS_BB_SUSPEND_Pos   (0UL)
 
#define TWI_SHORTS_BB_SUSPEND_Msk   (0x1UL << TWI_SHORTS_BB_SUSPEND_Pos)
 
#define TWI_SHORTS_BB_SUSPEND_Disabled   (0UL)
 
#define TWI_SHORTS_BB_SUSPEND_Enabled   (1UL)
 
#define TWI_INTENSET_SUSPENDED_Pos   (18UL)
 
#define TWI_INTENSET_SUSPENDED_Msk   (0x1UL << TWI_INTENSET_SUSPENDED_Pos)
 
#define TWI_INTENSET_SUSPENDED_Disabled   (0UL)
 
#define TWI_INTENSET_SUSPENDED_Enabled   (1UL)
 
#define TWI_INTENSET_SUSPENDED_Set   (1UL)
 
#define TWI_INTENSET_BB_Pos   (14UL)
 
#define TWI_INTENSET_BB_Msk   (0x1UL << TWI_INTENSET_BB_Pos)
 
#define TWI_INTENSET_BB_Disabled   (0UL)
 
#define TWI_INTENSET_BB_Enabled   (1UL)
 
#define TWI_INTENSET_BB_Set   (1UL)
 
#define TWI_INTENSET_ERROR_Pos   (9UL)
 
#define TWI_INTENSET_ERROR_Msk   (0x1UL << TWI_INTENSET_ERROR_Pos)
 
#define TWI_INTENSET_ERROR_Disabled   (0UL)
 
#define TWI_INTENSET_ERROR_Enabled   (1UL)
 
#define TWI_INTENSET_ERROR_Set   (1UL)
 
#define TWI_INTENSET_TXDSENT_Pos   (7UL)
 
#define TWI_INTENSET_TXDSENT_Msk   (0x1UL << TWI_INTENSET_TXDSENT_Pos)
 
#define TWI_INTENSET_TXDSENT_Disabled   (0UL)
 
#define TWI_INTENSET_TXDSENT_Enabled   (1UL)
 
#define TWI_INTENSET_TXDSENT_Set   (1UL)
 
#define TWI_INTENSET_RXDREADY_Pos   (2UL)
 
#define TWI_INTENSET_RXDREADY_Msk   (0x1UL << TWI_INTENSET_RXDREADY_Pos)
 
#define TWI_INTENSET_RXDREADY_Disabled   (0UL)
 
#define TWI_INTENSET_RXDREADY_Enabled   (1UL)
 
#define TWI_INTENSET_RXDREADY_Set   (1UL)
 
#define TWI_INTENSET_STOPPED_Pos   (1UL)
 
#define TWI_INTENSET_STOPPED_Msk   (0x1UL << TWI_INTENSET_STOPPED_Pos)
 
#define TWI_INTENSET_STOPPED_Disabled   (0UL)
 
#define TWI_INTENSET_STOPPED_Enabled   (1UL)
 
#define TWI_INTENSET_STOPPED_Set   (1UL)
 
#define TWI_INTENCLR_SUSPENDED_Pos   (18UL)
 
#define TWI_INTENCLR_SUSPENDED_Msk   (0x1UL << TWI_INTENCLR_SUSPENDED_Pos)
 
#define TWI_INTENCLR_SUSPENDED_Disabled   (0UL)
 
#define TWI_INTENCLR_SUSPENDED_Enabled   (1UL)
 
#define TWI_INTENCLR_SUSPENDED_Clear   (1UL)
 
#define TWI_INTENCLR_BB_Pos   (14UL)
 
#define TWI_INTENCLR_BB_Msk   (0x1UL << TWI_INTENCLR_BB_Pos)
 
#define TWI_INTENCLR_BB_Disabled   (0UL)
 
#define TWI_INTENCLR_BB_Enabled   (1UL)
 
#define TWI_INTENCLR_BB_Clear   (1UL)
 
#define TWI_INTENCLR_ERROR_Pos   (9UL)
 
#define TWI_INTENCLR_ERROR_Msk   (0x1UL << TWI_INTENCLR_ERROR_Pos)
 
#define TWI_INTENCLR_ERROR_Disabled   (0UL)
 
#define TWI_INTENCLR_ERROR_Enabled   (1UL)
 
#define TWI_INTENCLR_ERROR_Clear   (1UL)
 
#define TWI_INTENCLR_TXDSENT_Pos   (7UL)
 
#define TWI_INTENCLR_TXDSENT_Msk   (0x1UL << TWI_INTENCLR_TXDSENT_Pos)
 
#define TWI_INTENCLR_TXDSENT_Disabled   (0UL)
 
#define TWI_INTENCLR_TXDSENT_Enabled   (1UL)
 
#define TWI_INTENCLR_TXDSENT_Clear   (1UL)
 
#define TWI_INTENCLR_RXDREADY_Pos   (2UL)
 
#define TWI_INTENCLR_RXDREADY_Msk   (0x1UL << TWI_INTENCLR_RXDREADY_Pos)
 
#define TWI_INTENCLR_RXDREADY_Disabled   (0UL)
 
#define TWI_INTENCLR_RXDREADY_Enabled   (1UL)
 
#define TWI_INTENCLR_RXDREADY_Clear   (1UL)
 
#define TWI_INTENCLR_STOPPED_Pos   (1UL)
 
#define TWI_INTENCLR_STOPPED_Msk   (0x1UL << TWI_INTENCLR_STOPPED_Pos)
 
#define TWI_INTENCLR_STOPPED_Disabled   (0UL)
 
#define TWI_INTENCLR_STOPPED_Enabled   (1UL)
 
#define TWI_INTENCLR_STOPPED_Clear   (1UL)
 
#define TWI_ERRORSRC_DNACK_Pos   (2UL)
 
#define TWI_ERRORSRC_DNACK_Msk   (0x1UL << TWI_ERRORSRC_DNACK_Pos)
 
#define TWI_ERRORSRC_DNACK_NotPresent   (0UL)
 
#define TWI_ERRORSRC_DNACK_Present   (1UL)
 
#define TWI_ERRORSRC_ANACK_Pos   (1UL)
 
#define TWI_ERRORSRC_ANACK_Msk   (0x1UL << TWI_ERRORSRC_ANACK_Pos)
 
#define TWI_ERRORSRC_ANACK_NotPresent   (0UL)
 
#define TWI_ERRORSRC_ANACK_Present   (1UL)
 
#define TWI_ERRORSRC_OVERRUN_Pos   (0UL)
 
#define TWI_ERRORSRC_OVERRUN_Msk   (0x1UL << TWI_ERRORSRC_OVERRUN_Pos)
 
#define TWI_ERRORSRC_OVERRUN_NotPresent   (0UL)
 
#define TWI_ERRORSRC_OVERRUN_Present   (1UL)
 
#define TWI_ENABLE_ENABLE_Pos   (0UL)
 
#define TWI_ENABLE_ENABLE_Msk   (0xFUL << TWI_ENABLE_ENABLE_Pos)
 
#define TWI_ENABLE_ENABLE_Disabled   (0UL)
 
#define TWI_ENABLE_ENABLE_Enabled   (5UL)
 
#define TWI_PSELSCL_PSELSCL_Pos   (0UL)
 
#define TWI_PSELSCL_PSELSCL_Msk   (0xFFFFFFFFUL << TWI_PSELSCL_PSELSCL_Pos)
 
#define TWI_PSELSCL_PSELSCL_Disconnected   (0xFFFFFFFFUL)
 
#define TWI_PSELSDA_PSELSDA_Pos   (0UL)
 
#define TWI_PSELSDA_PSELSDA_Msk   (0xFFFFFFFFUL << TWI_PSELSDA_PSELSDA_Pos)
 
#define TWI_PSELSDA_PSELSDA_Disconnected   (0xFFFFFFFFUL)
 
#define TWI_RXD_RXD_Pos   (0UL)
 
#define TWI_RXD_RXD_Msk   (0xFFUL << TWI_RXD_RXD_Pos)
 
#define TWI_TXD_TXD_Pos   (0UL)
 
#define TWI_TXD_TXD_Msk   (0xFFUL << TWI_TXD_TXD_Pos)
 
#define TWI_FREQUENCY_FREQUENCY_Pos   (0UL)
 
#define TWI_FREQUENCY_FREQUENCY_Msk   (0xFFFFFFFFUL << TWI_FREQUENCY_FREQUENCY_Pos)
 
#define TWI_FREQUENCY_FREQUENCY_K100   (0x01980000UL)
 
#define TWI_FREQUENCY_FREQUENCY_K250   (0x04000000UL)
 
#define TWI_FREQUENCY_FREQUENCY_K400   (0x06680000UL)
 
#define TWI_ADDRESS_ADDRESS_Pos   (0UL)
 
#define TWI_ADDRESS_ADDRESS_Msk   (0x7FUL << TWI_ADDRESS_ADDRESS_Pos)
 
#define TWIM_SHORTS_LASTRX_STOP_Pos   (12UL)
 
#define TWIM_SHORTS_LASTRX_STOP_Msk   (0x1UL << TWIM_SHORTS_LASTRX_STOP_Pos)
 
#define TWIM_SHORTS_LASTRX_STOP_Disabled   (0UL)
 
#define TWIM_SHORTS_LASTRX_STOP_Enabled   (1UL)
 
#define TWIM_SHORTS_LASTRX_STARTTX_Pos   (10UL)
 
#define TWIM_SHORTS_LASTRX_STARTTX_Msk   (0x1UL << TWIM_SHORTS_LASTRX_STARTTX_Pos)
 
#define TWIM_SHORTS_LASTRX_STARTTX_Disabled   (0UL)
 
#define TWIM_SHORTS_LASTRX_STARTTX_Enabled   (1UL)
 
#define TWIM_SHORTS_LASTTX_STOP_Pos   (9UL)
 
#define TWIM_SHORTS_LASTTX_STOP_Msk   (0x1UL << TWIM_SHORTS_LASTTX_STOP_Pos)
 
#define TWIM_SHORTS_LASTTX_STOP_Disabled   (0UL)
 
#define TWIM_SHORTS_LASTTX_STOP_Enabled   (1UL)
 
#define TWIM_SHORTS_LASTTX_SUSPEND_Pos   (8UL)
 
#define TWIM_SHORTS_LASTTX_SUSPEND_Msk   (0x1UL << TWIM_SHORTS_LASTTX_SUSPEND_Pos)
 
#define TWIM_SHORTS_LASTTX_SUSPEND_Disabled   (0UL)
 
#define TWIM_SHORTS_LASTTX_SUSPEND_Enabled   (1UL)
 
#define TWIM_SHORTS_LASTTX_STARTRX_Pos   (7UL)
 
#define TWIM_SHORTS_LASTTX_STARTRX_Msk   (0x1UL << TWIM_SHORTS_LASTTX_STARTRX_Pos)
 
#define TWIM_SHORTS_LASTTX_STARTRX_Disabled   (0UL)
 
#define TWIM_SHORTS_LASTTX_STARTRX_Enabled   (1UL)
 
#define TWIM_INTEN_LASTTX_Pos   (24UL)
 
#define TWIM_INTEN_LASTTX_Msk   (0x1UL << TWIM_INTEN_LASTTX_Pos)
 
#define TWIM_INTEN_LASTTX_Disabled   (0UL)
 
#define TWIM_INTEN_LASTTX_Enabled   (1UL)
 
#define TWIM_INTEN_LASTRX_Pos   (23UL)
 
#define TWIM_INTEN_LASTRX_Msk   (0x1UL << TWIM_INTEN_LASTRX_Pos)
 
#define TWIM_INTEN_LASTRX_Disabled   (0UL)
 
#define TWIM_INTEN_LASTRX_Enabled   (1UL)
 
#define TWIM_INTEN_TXSTARTED_Pos   (20UL)
 
#define TWIM_INTEN_TXSTARTED_Msk   (0x1UL << TWIM_INTEN_TXSTARTED_Pos)
 
#define TWIM_INTEN_TXSTARTED_Disabled   (0UL)
 
#define TWIM_INTEN_TXSTARTED_Enabled   (1UL)
 
#define TWIM_INTEN_RXSTARTED_Pos   (19UL)
 
#define TWIM_INTEN_RXSTARTED_Msk   (0x1UL << TWIM_INTEN_RXSTARTED_Pos)
 
#define TWIM_INTEN_RXSTARTED_Disabled   (0UL)
 
#define TWIM_INTEN_RXSTARTED_Enabled   (1UL)
 
#define TWIM_INTEN_ERROR_Pos   (9UL)
 
#define TWIM_INTEN_ERROR_Msk   (0x1UL << TWIM_INTEN_ERROR_Pos)
 
#define TWIM_INTEN_ERROR_Disabled   (0UL)
 
#define TWIM_INTEN_ERROR_Enabled   (1UL)
 
#define TWIM_INTEN_STOPPED_Pos   (1UL)
 
#define TWIM_INTEN_STOPPED_Msk   (0x1UL << TWIM_INTEN_STOPPED_Pos)
 
#define TWIM_INTEN_STOPPED_Disabled   (0UL)
 
#define TWIM_INTEN_STOPPED_Enabled   (1UL)
 
#define TWIM_INTENSET_LASTTX_Pos   (24UL)
 
#define TWIM_INTENSET_LASTTX_Msk   (0x1UL << TWIM_INTENSET_LASTTX_Pos)
 
#define TWIM_INTENSET_LASTTX_Disabled   (0UL)
 
#define TWIM_INTENSET_LASTTX_Enabled   (1UL)
 
#define TWIM_INTENSET_LASTTX_Set   (1UL)
 
#define TWIM_INTENSET_LASTRX_Pos   (23UL)
 
#define TWIM_INTENSET_LASTRX_Msk   (0x1UL << TWIM_INTENSET_LASTRX_Pos)
 
#define TWIM_INTENSET_LASTRX_Disabled   (0UL)
 
#define TWIM_INTENSET_LASTRX_Enabled   (1UL)
 
#define TWIM_INTENSET_LASTRX_Set   (1UL)
 
#define TWIM_INTENSET_TXSTARTED_Pos   (20UL)
 
#define TWIM_INTENSET_TXSTARTED_Msk   (0x1UL << TWIM_INTENSET_TXSTARTED_Pos)
 
#define TWIM_INTENSET_TXSTARTED_Disabled   (0UL)
 
#define TWIM_INTENSET_TXSTARTED_Enabled   (1UL)
 
#define TWIM_INTENSET_TXSTARTED_Set   (1UL)
 
#define TWIM_INTENSET_RXSTARTED_Pos   (19UL)
 
#define TWIM_INTENSET_RXSTARTED_Msk   (0x1UL << TWIM_INTENSET_RXSTARTED_Pos)
 
#define TWIM_INTENSET_RXSTARTED_Disabled   (0UL)
 
#define TWIM_INTENSET_RXSTARTED_Enabled   (1UL)
 
#define TWIM_INTENSET_RXSTARTED_Set   (1UL)
 
#define TWIM_INTENSET_ERROR_Pos   (9UL)
 
#define TWIM_INTENSET_ERROR_Msk   (0x1UL << TWIM_INTENSET_ERROR_Pos)
 
#define TWIM_INTENSET_ERROR_Disabled   (0UL)
 
#define TWIM_INTENSET_ERROR_Enabled   (1UL)
 
#define TWIM_INTENSET_ERROR_Set   (1UL)
 
#define TWIM_INTENSET_STOPPED_Pos   (1UL)
 
#define TWIM_INTENSET_STOPPED_Msk   (0x1UL << TWIM_INTENSET_STOPPED_Pos)
 
#define TWIM_INTENSET_STOPPED_Disabled   (0UL)
 
#define TWIM_INTENSET_STOPPED_Enabled   (1UL)
 
#define TWIM_INTENSET_STOPPED_Set   (1UL)
 
#define TWIM_INTENCLR_LASTTX_Pos   (24UL)
 
#define TWIM_INTENCLR_LASTTX_Msk   (0x1UL << TWIM_INTENCLR_LASTTX_Pos)
 
#define TWIM_INTENCLR_LASTTX_Disabled   (0UL)
 
#define TWIM_INTENCLR_LASTTX_Enabled   (1UL)
 
#define TWIM_INTENCLR_LASTTX_Clear   (1UL)
 
#define TWIM_INTENCLR_LASTRX_Pos   (23UL)
 
#define TWIM_INTENCLR_LASTRX_Msk   (0x1UL << TWIM_INTENCLR_LASTRX_Pos)
 
#define TWIM_INTENCLR_LASTRX_Disabled   (0UL)
 
#define TWIM_INTENCLR_LASTRX_Enabled   (1UL)
 
#define TWIM_INTENCLR_LASTRX_Clear   (1UL)
 
#define TWIM_INTENCLR_TXSTARTED_Pos   (20UL)
 
#define TWIM_INTENCLR_TXSTARTED_Msk   (0x1UL << TWIM_INTENCLR_TXSTARTED_Pos)
 
#define TWIM_INTENCLR_TXSTARTED_Disabled   (0UL)
 
#define TWIM_INTENCLR_TXSTARTED_Enabled   (1UL)
 
#define TWIM_INTENCLR_TXSTARTED_Clear   (1UL)
 
#define TWIM_INTENCLR_RXSTARTED_Pos   (19UL)
 
#define TWIM_INTENCLR_RXSTARTED_Msk   (0x1UL << TWIM_INTENCLR_RXSTARTED_Pos)
 
#define TWIM_INTENCLR_RXSTARTED_Disabled   (0UL)
 
#define TWIM_INTENCLR_RXSTARTED_Enabled   (1UL)
 
#define TWIM_INTENCLR_RXSTARTED_Clear   (1UL)
 
#define TWIM_INTENCLR_ERROR_Pos   (9UL)
 
#define TWIM_INTENCLR_ERROR_Msk   (0x1UL << TWIM_INTENCLR_ERROR_Pos)
 
#define TWIM_INTENCLR_ERROR_Disabled   (0UL)
 
#define TWIM_INTENCLR_ERROR_Enabled   (1UL)
 
#define TWIM_INTENCLR_ERROR_Clear   (1UL)
 
#define TWIM_INTENCLR_STOPPED_Pos   (1UL)
 
#define TWIM_INTENCLR_STOPPED_Msk   (0x1UL << TWIM_INTENCLR_STOPPED_Pos)
 
#define TWIM_INTENCLR_STOPPED_Disabled   (0UL)
 
#define TWIM_INTENCLR_STOPPED_Enabled   (1UL)
 
#define TWIM_INTENCLR_STOPPED_Clear   (1UL)
 
#define TWIM_ERRORSRC_DNACK_Pos   (2UL)
 
#define TWIM_ERRORSRC_DNACK_Msk   (0x1UL << TWIM_ERRORSRC_DNACK_Pos)
 
#define TWIM_ERRORSRC_DNACK_NotReceived   (0UL)
 
#define TWIM_ERRORSRC_DNACK_Received   (1UL)
 
#define TWIM_ERRORSRC_ANACK_Pos   (1UL)
 
#define TWIM_ERRORSRC_ANACK_Msk   (0x1UL << TWIM_ERRORSRC_ANACK_Pos)
 
#define TWIM_ERRORSRC_ANACK_NotReceived   (0UL)
 
#define TWIM_ERRORSRC_ANACK_Received   (1UL)
 
#define TWIM_ENABLE_ENABLE_Pos   (0UL)
 
#define TWIM_ENABLE_ENABLE_Msk   (0xFUL << TWIM_ENABLE_ENABLE_Pos)
 
#define TWIM_ENABLE_ENABLE_Disabled   (0UL)
 
#define TWIM_ENABLE_ENABLE_Enabled   (6UL)
 
#define TWIM_PSEL_SCL_CONNECT_Pos   (31UL)
 
#define TWIM_PSEL_SCL_CONNECT_Msk   (0x1UL << TWIM_PSEL_SCL_CONNECT_Pos)
 
#define TWIM_PSEL_SCL_CONNECT_Connected   (0UL)
 
#define TWIM_PSEL_SCL_CONNECT_Disconnected   (1UL)
 
#define TWIM_PSEL_SCL_PIN_Pos   (0UL)
 
#define TWIM_PSEL_SCL_PIN_Msk   (0x1FUL << TWIM_PSEL_SCL_PIN_Pos)
 
#define TWIM_PSEL_SDA_CONNECT_Pos   (31UL)
 
#define TWIM_PSEL_SDA_CONNECT_Msk   (0x1UL << TWIM_PSEL_SDA_CONNECT_Pos)
 
#define TWIM_PSEL_SDA_CONNECT_Connected   (0UL)
 
#define TWIM_PSEL_SDA_CONNECT_Disconnected   (1UL)
 
#define TWIM_PSEL_SDA_PIN_Pos   (0UL)
 
#define TWIM_PSEL_SDA_PIN_Msk   (0x1FUL << TWIM_PSEL_SDA_PIN_Pos)
 
#define TWIM_FREQUENCY_FREQUENCY_Pos   (0UL)
 
#define TWIM_FREQUENCY_FREQUENCY_Msk   (0xFFFFFFFFUL << TWIM_FREQUENCY_FREQUENCY_Pos)
 
#define TWIM_FREQUENCY_FREQUENCY_K100   (0x01980000UL)
 
#define TWIM_FREQUENCY_FREQUENCY_K250   (0x04000000UL)
 
#define TWIM_FREQUENCY_FREQUENCY_K400   (0x06400000UL)
 
#define TWIM_RXD_PTR_PTR_Pos   (0UL)
 
#define TWIM_RXD_PTR_PTR_Msk   (0xFFFFFFFFUL << TWIM_RXD_PTR_PTR_Pos)
 
#define TWIM_RXD_MAXCNT_MAXCNT_Pos   (0UL)
 
#define TWIM_RXD_MAXCNT_MAXCNT_Msk   (0xFFUL << TWIM_RXD_MAXCNT_MAXCNT_Pos)
 
#define TWIM_RXD_AMOUNT_AMOUNT_Pos   (0UL)
 
#define TWIM_RXD_AMOUNT_AMOUNT_Msk   (0xFFUL << TWIM_RXD_AMOUNT_AMOUNT_Pos)
 
#define TWIM_RXD_LIST_LIST_Pos   (0UL)
 
#define TWIM_RXD_LIST_LIST_Msk   (0x7UL << TWIM_RXD_LIST_LIST_Pos)
 
#define TWIM_RXD_LIST_LIST_Disabled   (0UL)
 
#define TWIM_RXD_LIST_LIST_ArrayList   (1UL)
 
#define TWIM_TXD_PTR_PTR_Pos   (0UL)
 
#define TWIM_TXD_PTR_PTR_Msk   (0xFFFFFFFFUL << TWIM_TXD_PTR_PTR_Pos)
 
#define TWIM_TXD_MAXCNT_MAXCNT_Pos   (0UL)
 
#define TWIM_TXD_MAXCNT_MAXCNT_Msk   (0xFFUL << TWIM_TXD_MAXCNT_MAXCNT_Pos)
 
#define TWIM_TXD_AMOUNT_AMOUNT_Pos   (0UL)
 
#define TWIM_TXD_AMOUNT_AMOUNT_Msk   (0xFFUL << TWIM_TXD_AMOUNT_AMOUNT_Pos)
 
#define TWIM_TXD_LIST_LIST_Pos   (0UL)
 
#define TWIM_TXD_LIST_LIST_Msk   (0x7UL << TWIM_TXD_LIST_LIST_Pos)
 
#define TWIM_TXD_LIST_LIST_Disabled   (0UL)
 
#define TWIM_TXD_LIST_LIST_ArrayList   (1UL)
 
#define TWIM_ADDRESS_ADDRESS_Pos   (0UL)
 
#define TWIM_ADDRESS_ADDRESS_Msk   (0x7FUL << TWIM_ADDRESS_ADDRESS_Pos)
 
#define TWIS_SHORTS_READ_SUSPEND_Pos   (14UL)
 
#define TWIS_SHORTS_READ_SUSPEND_Msk   (0x1UL << TWIS_SHORTS_READ_SUSPEND_Pos)
 
#define TWIS_SHORTS_READ_SUSPEND_Disabled   (0UL)
 
#define TWIS_SHORTS_READ_SUSPEND_Enabled   (1UL)
 
#define TWIS_SHORTS_WRITE_SUSPEND_Pos   (13UL)
 
#define TWIS_SHORTS_WRITE_SUSPEND_Msk   (0x1UL << TWIS_SHORTS_WRITE_SUSPEND_Pos)
 
#define TWIS_SHORTS_WRITE_SUSPEND_Disabled   (0UL)
 
#define TWIS_SHORTS_WRITE_SUSPEND_Enabled   (1UL)
 
#define TWIS_INTEN_READ_Pos   (26UL)
 
#define TWIS_INTEN_READ_Msk   (0x1UL << TWIS_INTEN_READ_Pos)
 
#define TWIS_INTEN_READ_Disabled   (0UL)
 
#define TWIS_INTEN_READ_Enabled   (1UL)
 
#define TWIS_INTEN_WRITE_Pos   (25UL)
 
#define TWIS_INTEN_WRITE_Msk   (0x1UL << TWIS_INTEN_WRITE_Pos)
 
#define TWIS_INTEN_WRITE_Disabled   (0UL)
 
#define TWIS_INTEN_WRITE_Enabled   (1UL)
 
#define TWIS_INTEN_TXSTARTED_Pos   (20UL)
 
#define TWIS_INTEN_TXSTARTED_Msk   (0x1UL << TWIS_INTEN_TXSTARTED_Pos)
 
#define TWIS_INTEN_TXSTARTED_Disabled   (0UL)
 
#define TWIS_INTEN_TXSTARTED_Enabled   (1UL)
 
#define TWIS_INTEN_RXSTARTED_Pos   (19UL)
 
#define TWIS_INTEN_RXSTARTED_Msk   (0x1UL << TWIS_INTEN_RXSTARTED_Pos)
 
#define TWIS_INTEN_RXSTARTED_Disabled   (0UL)
 
#define TWIS_INTEN_RXSTARTED_Enabled   (1UL)
 
#define TWIS_INTEN_ERROR_Pos   (9UL)
 
#define TWIS_INTEN_ERROR_Msk   (0x1UL << TWIS_INTEN_ERROR_Pos)
 
#define TWIS_INTEN_ERROR_Disabled   (0UL)
 
#define TWIS_INTEN_ERROR_Enabled   (1UL)
 
#define TWIS_INTEN_STOPPED_Pos   (1UL)
 
#define TWIS_INTEN_STOPPED_Msk   (0x1UL << TWIS_INTEN_STOPPED_Pos)
 
#define TWIS_INTEN_STOPPED_Disabled   (0UL)
 
#define TWIS_INTEN_STOPPED_Enabled   (1UL)
 
#define TWIS_INTENSET_READ_Pos   (26UL)
 
#define TWIS_INTENSET_READ_Msk   (0x1UL << TWIS_INTENSET_READ_Pos)
 
#define TWIS_INTENSET_READ_Disabled   (0UL)
 
#define TWIS_INTENSET_READ_Enabled   (1UL)
 
#define TWIS_INTENSET_READ_Set   (1UL)
 
#define TWIS_INTENSET_WRITE_Pos   (25UL)
 
#define TWIS_INTENSET_WRITE_Msk   (0x1UL << TWIS_INTENSET_WRITE_Pos)
 
#define TWIS_INTENSET_WRITE_Disabled   (0UL)
 
#define TWIS_INTENSET_WRITE_Enabled   (1UL)
 
#define TWIS_INTENSET_WRITE_Set   (1UL)
 
#define TWIS_INTENSET_TXSTARTED_Pos   (20UL)
 
#define TWIS_INTENSET_TXSTARTED_Msk   (0x1UL << TWIS_INTENSET_TXSTARTED_Pos)
 
#define TWIS_INTENSET_TXSTARTED_Disabled   (0UL)
 
#define TWIS_INTENSET_TXSTARTED_Enabled   (1UL)
 
#define TWIS_INTENSET_TXSTARTED_Set   (1UL)
 
#define TWIS_INTENSET_RXSTARTED_Pos   (19UL)
 
#define TWIS_INTENSET_RXSTARTED_Msk   (0x1UL << TWIS_INTENSET_RXSTARTED_Pos)
 
#define TWIS_INTENSET_RXSTARTED_Disabled   (0UL)
 
#define TWIS_INTENSET_RXSTARTED_Enabled   (1UL)
 
#define TWIS_INTENSET_RXSTARTED_Set   (1UL)
 
#define TWIS_INTENSET_ERROR_Pos   (9UL)
 
#define TWIS_INTENSET_ERROR_Msk   (0x1UL << TWIS_INTENSET_ERROR_Pos)
 
#define TWIS_INTENSET_ERROR_Disabled   (0UL)
 
#define TWIS_INTENSET_ERROR_Enabled   (1UL)
 
#define TWIS_INTENSET_ERROR_Set   (1UL)
 
#define TWIS_INTENSET_STOPPED_Pos   (1UL)
 
#define TWIS_INTENSET_STOPPED_Msk   (0x1UL << TWIS_INTENSET_STOPPED_Pos)
 
#define TWIS_INTENSET_STOPPED_Disabled   (0UL)
 
#define TWIS_INTENSET_STOPPED_Enabled   (1UL)
 
#define TWIS_INTENSET_STOPPED_Set   (1UL)
 
#define TWIS_INTENCLR_READ_Pos   (26UL)
 
#define TWIS_INTENCLR_READ_Msk   (0x1UL << TWIS_INTENCLR_READ_Pos)
 
#define TWIS_INTENCLR_READ_Disabled   (0UL)
 
#define TWIS_INTENCLR_READ_Enabled   (1UL)
 
#define TWIS_INTENCLR_READ_Clear   (1UL)
 
#define TWIS_INTENCLR_WRITE_Pos   (25UL)
 
#define TWIS_INTENCLR_WRITE_Msk   (0x1UL << TWIS_INTENCLR_WRITE_Pos)
 
#define TWIS_INTENCLR_WRITE_Disabled   (0UL)
 
#define TWIS_INTENCLR_WRITE_Enabled   (1UL)
 
#define TWIS_INTENCLR_WRITE_Clear   (1UL)
 
#define TWIS_INTENCLR_TXSTARTED_Pos   (20UL)
 
#define TWIS_INTENCLR_TXSTARTED_Msk   (0x1UL << TWIS_INTENCLR_TXSTARTED_Pos)
 
#define TWIS_INTENCLR_TXSTARTED_Disabled   (0UL)
 
#define TWIS_INTENCLR_TXSTARTED_Enabled   (1UL)
 
#define TWIS_INTENCLR_TXSTARTED_Clear   (1UL)
 
#define TWIS_INTENCLR_RXSTARTED_Pos   (19UL)
 
#define TWIS_INTENCLR_RXSTARTED_Msk   (0x1UL << TWIS_INTENCLR_RXSTARTED_Pos)
 
#define TWIS_INTENCLR_RXSTARTED_Disabled   (0UL)
 
#define TWIS_INTENCLR_RXSTARTED_Enabled   (1UL)
 
#define TWIS_INTENCLR_RXSTARTED_Clear   (1UL)
 
#define TWIS_INTENCLR_ERROR_Pos   (9UL)
 
#define TWIS_INTENCLR_ERROR_Msk   (0x1UL << TWIS_INTENCLR_ERROR_Pos)
 
#define TWIS_INTENCLR_ERROR_Disabled   (0UL)
 
#define TWIS_INTENCLR_ERROR_Enabled   (1UL)
 
#define TWIS_INTENCLR_ERROR_Clear   (1UL)
 
#define TWIS_INTENCLR_STOPPED_Pos   (1UL)
 
#define TWIS_INTENCLR_STOPPED_Msk   (0x1UL << TWIS_INTENCLR_STOPPED_Pos)
 
#define TWIS_INTENCLR_STOPPED_Disabled   (0UL)
 
#define TWIS_INTENCLR_STOPPED_Enabled   (1UL)
 
#define TWIS_INTENCLR_STOPPED_Clear   (1UL)
 
#define TWIS_ERRORSRC_OVERREAD_Pos   (3UL)
 
#define TWIS_ERRORSRC_OVERREAD_Msk   (0x1UL << TWIS_ERRORSRC_OVERREAD_Pos)
 
#define TWIS_ERRORSRC_OVERREAD_NotDetected   (0UL)
 
#define TWIS_ERRORSRC_OVERREAD_Detected   (1UL)
 
#define TWIS_ERRORSRC_DNACK_Pos   (2UL)
 
#define TWIS_ERRORSRC_DNACK_Msk   (0x1UL << TWIS_ERRORSRC_DNACK_Pos)
 
#define TWIS_ERRORSRC_DNACK_NotReceived   (0UL)
 
#define TWIS_ERRORSRC_DNACK_Received   (1UL)
 
#define TWIS_ERRORSRC_OVERFLOW_Pos   (0UL)
 
#define TWIS_ERRORSRC_OVERFLOW_Msk   (0x1UL << TWIS_ERRORSRC_OVERFLOW_Pos)
 
#define TWIS_ERRORSRC_OVERFLOW_NotDetected   (0UL)
 
#define TWIS_ERRORSRC_OVERFLOW_Detected   (1UL)
 
#define TWIS_MATCH_MATCH_Pos   (0UL)
 
#define TWIS_MATCH_MATCH_Msk   (0x1UL << TWIS_MATCH_MATCH_Pos)
 
#define TWIS_ENABLE_ENABLE_Pos   (0UL)
 
#define TWIS_ENABLE_ENABLE_Msk   (0xFUL << TWIS_ENABLE_ENABLE_Pos)
 
#define TWIS_ENABLE_ENABLE_Disabled   (0UL)
 
#define TWIS_ENABLE_ENABLE_Enabled   (9UL)
 
#define TWIS_PSEL_SCL_CONNECT_Pos   (31UL)
 
#define TWIS_PSEL_SCL_CONNECT_Msk   (0x1UL << TWIS_PSEL_SCL_CONNECT_Pos)
 
#define TWIS_PSEL_SCL_CONNECT_Connected   (0UL)
 
#define TWIS_PSEL_SCL_CONNECT_Disconnected   (1UL)
 
#define TWIS_PSEL_SCL_PIN_Pos   (0UL)
 
#define TWIS_PSEL_SCL_PIN_Msk   (0x1FUL << TWIS_PSEL_SCL_PIN_Pos)
 
#define TWIS_PSEL_SDA_CONNECT_Pos   (31UL)
 
#define TWIS_PSEL_SDA_CONNECT_Msk   (0x1UL << TWIS_PSEL_SDA_CONNECT_Pos)
 
#define TWIS_PSEL_SDA_CONNECT_Connected   (0UL)
 
#define TWIS_PSEL_SDA_CONNECT_Disconnected   (1UL)
 
#define TWIS_PSEL_SDA_PIN_Pos   (0UL)
 
#define TWIS_PSEL_SDA_PIN_Msk   (0x1FUL << TWIS_PSEL_SDA_PIN_Pos)
 
#define TWIS_RXD_PTR_PTR_Pos   (0UL)
 
#define TWIS_RXD_PTR_PTR_Msk   (0xFFFFFFFFUL << TWIS_RXD_PTR_PTR_Pos)
 
#define TWIS_RXD_MAXCNT_MAXCNT_Pos   (0UL)
 
#define TWIS_RXD_MAXCNT_MAXCNT_Msk   (0xFFUL << TWIS_RXD_MAXCNT_MAXCNT_Pos)
 
#define TWIS_RXD_AMOUNT_AMOUNT_Pos   (0UL)
 
#define TWIS_RXD_AMOUNT_AMOUNT_Msk   (0xFFUL << TWIS_RXD_AMOUNT_AMOUNT_Pos)
 
#define TWIS_TXD_PTR_PTR_Pos   (0UL)
 
#define TWIS_TXD_PTR_PTR_Msk   (0xFFFFFFFFUL << TWIS_TXD_PTR_PTR_Pos)
 
#define TWIS_TXD_MAXCNT_MAXCNT_Pos   (0UL)
 
#define TWIS_TXD_MAXCNT_MAXCNT_Msk   (0xFFUL << TWIS_TXD_MAXCNT_MAXCNT_Pos)
 
#define TWIS_TXD_AMOUNT_AMOUNT_Pos   (0UL)
 
#define TWIS_TXD_AMOUNT_AMOUNT_Msk   (0xFFUL << TWIS_TXD_AMOUNT_AMOUNT_Pos)
 
#define TWIS_ADDRESS_ADDRESS_Pos   (0UL)
 
#define TWIS_ADDRESS_ADDRESS_Msk   (0x7FUL << TWIS_ADDRESS_ADDRESS_Pos)
 
#define TWIS_CONFIG_ADDRESS1_Pos   (1UL)
 
#define TWIS_CONFIG_ADDRESS1_Msk   (0x1UL << TWIS_CONFIG_ADDRESS1_Pos)
 
#define TWIS_CONFIG_ADDRESS1_Disabled   (0UL)
 
#define TWIS_CONFIG_ADDRESS1_Enabled   (1UL)
 
#define TWIS_CONFIG_ADDRESS0_Pos   (0UL)
 
#define TWIS_CONFIG_ADDRESS0_Msk   (0x1UL << TWIS_CONFIG_ADDRESS0_Pos)
 
#define TWIS_CONFIG_ADDRESS0_Disabled   (0UL)
 
#define TWIS_CONFIG_ADDRESS0_Enabled   (1UL)
 
#define TWIS_ORC_ORC_Pos   (0UL)
 
#define TWIS_ORC_ORC_Msk   (0xFFUL << TWIS_ORC_ORC_Pos)
 
#define UART_SHORTS_NCTS_STOPRX_Pos   (4UL)
 
#define UART_SHORTS_NCTS_STOPRX_Msk   (0x1UL << UART_SHORTS_NCTS_STOPRX_Pos)
 
#define UART_SHORTS_NCTS_STOPRX_Disabled   (0UL)
 
#define UART_SHORTS_NCTS_STOPRX_Enabled   (1UL)
 
#define UART_SHORTS_CTS_STARTRX_Pos   (3UL)
 
#define UART_SHORTS_CTS_STARTRX_Msk   (0x1UL << UART_SHORTS_CTS_STARTRX_Pos)
 
#define UART_SHORTS_CTS_STARTRX_Disabled   (0UL)
 
#define UART_SHORTS_CTS_STARTRX_Enabled   (1UL)
 
#define UART_INTENSET_RXTO_Pos   (17UL)
 
#define UART_INTENSET_RXTO_Msk   (0x1UL << UART_INTENSET_RXTO_Pos)
 
#define UART_INTENSET_RXTO_Disabled   (0UL)
 
#define UART_INTENSET_RXTO_Enabled   (1UL)
 
#define UART_INTENSET_RXTO_Set   (1UL)
 
#define UART_INTENSET_ERROR_Pos   (9UL)
 
#define UART_INTENSET_ERROR_Msk   (0x1UL << UART_INTENSET_ERROR_Pos)
 
#define UART_INTENSET_ERROR_Disabled   (0UL)
 
#define UART_INTENSET_ERROR_Enabled   (1UL)
 
#define UART_INTENSET_ERROR_Set   (1UL)
 
#define UART_INTENSET_TXDRDY_Pos   (7UL)
 
#define UART_INTENSET_TXDRDY_Msk   (0x1UL << UART_INTENSET_TXDRDY_Pos)
 
#define UART_INTENSET_TXDRDY_Disabled   (0UL)
 
#define UART_INTENSET_TXDRDY_Enabled   (1UL)
 
#define UART_INTENSET_TXDRDY_Set   (1UL)
 
#define UART_INTENSET_RXDRDY_Pos   (2UL)
 
#define UART_INTENSET_RXDRDY_Msk   (0x1UL << UART_INTENSET_RXDRDY_Pos)
 
#define UART_INTENSET_RXDRDY_Disabled   (0UL)
 
#define UART_INTENSET_RXDRDY_Enabled   (1UL)
 
#define UART_INTENSET_RXDRDY_Set   (1UL)
 
#define UART_INTENSET_NCTS_Pos   (1UL)
 
#define UART_INTENSET_NCTS_Msk   (0x1UL << UART_INTENSET_NCTS_Pos)
 
#define UART_INTENSET_NCTS_Disabled   (0UL)
 
#define UART_INTENSET_NCTS_Enabled   (1UL)
 
#define UART_INTENSET_NCTS_Set   (1UL)
 
#define UART_INTENSET_CTS_Pos   (0UL)
 
#define UART_INTENSET_CTS_Msk   (0x1UL << UART_INTENSET_CTS_Pos)
 
#define UART_INTENSET_CTS_Disabled   (0UL)
 
#define UART_INTENSET_CTS_Enabled   (1UL)
 
#define UART_INTENSET_CTS_Set   (1UL)
 
#define UART_INTENCLR_RXTO_Pos   (17UL)
 
#define UART_INTENCLR_RXTO_Msk   (0x1UL << UART_INTENCLR_RXTO_Pos)
 
#define UART_INTENCLR_RXTO_Disabled   (0UL)
 
#define UART_INTENCLR_RXTO_Enabled   (1UL)
 
#define UART_INTENCLR_RXTO_Clear   (1UL)
 
#define UART_INTENCLR_ERROR_Pos   (9UL)
 
#define UART_INTENCLR_ERROR_Msk   (0x1UL << UART_INTENCLR_ERROR_Pos)
 
#define UART_INTENCLR_ERROR_Disabled   (0UL)
 
#define UART_INTENCLR_ERROR_Enabled   (1UL)
 
#define UART_INTENCLR_ERROR_Clear   (1UL)
 
#define UART_INTENCLR_TXDRDY_Pos   (7UL)
 
#define UART_INTENCLR_TXDRDY_Msk   (0x1UL << UART_INTENCLR_TXDRDY_Pos)
 
#define UART_INTENCLR_TXDRDY_Disabled   (0UL)
 
#define UART_INTENCLR_TXDRDY_Enabled   (1UL)
 
#define UART_INTENCLR_TXDRDY_Clear   (1UL)
 
#define UART_INTENCLR_RXDRDY_Pos   (2UL)
 
#define UART_INTENCLR_RXDRDY_Msk   (0x1UL << UART_INTENCLR_RXDRDY_Pos)
 
#define UART_INTENCLR_RXDRDY_Disabled   (0UL)
 
#define UART_INTENCLR_RXDRDY_Enabled   (1UL)
 
#define UART_INTENCLR_RXDRDY_Clear   (1UL)
 
#define UART_INTENCLR_NCTS_Pos   (1UL)
 
#define UART_INTENCLR_NCTS_Msk   (0x1UL << UART_INTENCLR_NCTS_Pos)
 
#define UART_INTENCLR_NCTS_Disabled   (0UL)
 
#define UART_INTENCLR_NCTS_Enabled   (1UL)
 
#define UART_INTENCLR_NCTS_Clear   (1UL)
 
#define UART_INTENCLR_CTS_Pos   (0UL)
 
#define UART_INTENCLR_CTS_Msk   (0x1UL << UART_INTENCLR_CTS_Pos)
 
#define UART_INTENCLR_CTS_Disabled   (0UL)
 
#define UART_INTENCLR_CTS_Enabled   (1UL)
 
#define UART_INTENCLR_CTS_Clear   (1UL)
 
#define UART_ERRORSRC_BREAK_Pos   (3UL)
 
#define UART_ERRORSRC_BREAK_Msk   (0x1UL << UART_ERRORSRC_BREAK_Pos)
 
#define UART_ERRORSRC_BREAK_NotPresent   (0UL)
 
#define UART_ERRORSRC_BREAK_Present   (1UL)
 
#define UART_ERRORSRC_FRAMING_Pos   (2UL)
 
#define UART_ERRORSRC_FRAMING_Msk   (0x1UL << UART_ERRORSRC_FRAMING_Pos)
 
#define UART_ERRORSRC_FRAMING_NotPresent   (0UL)
 
#define UART_ERRORSRC_FRAMING_Present   (1UL)
 
#define UART_ERRORSRC_PARITY_Pos   (1UL)
 
#define UART_ERRORSRC_PARITY_Msk   (0x1UL << UART_ERRORSRC_PARITY_Pos)
 
#define UART_ERRORSRC_PARITY_NotPresent   (0UL)
 
#define UART_ERRORSRC_PARITY_Present   (1UL)
 
#define UART_ERRORSRC_OVERRUN_Pos   (0UL)
 
#define UART_ERRORSRC_OVERRUN_Msk   (0x1UL << UART_ERRORSRC_OVERRUN_Pos)
 
#define UART_ERRORSRC_OVERRUN_NotPresent   (0UL)
 
#define UART_ERRORSRC_OVERRUN_Present   (1UL)
 
#define UART_ENABLE_ENABLE_Pos   (0UL)
 
#define UART_ENABLE_ENABLE_Msk   (0xFUL << UART_ENABLE_ENABLE_Pos)
 
#define UART_ENABLE_ENABLE_Disabled   (0UL)
 
#define UART_ENABLE_ENABLE_Enabled   (4UL)
 
#define UART_PSELRTS_PSELRTS_Pos   (0UL)
 
#define UART_PSELRTS_PSELRTS_Msk   (0xFFFFFFFFUL << UART_PSELRTS_PSELRTS_Pos)
 
#define UART_PSELRTS_PSELRTS_Disconnected   (0xFFFFFFFFUL)
 
#define UART_PSELTXD_PSELTXD_Pos   (0UL)
 
#define UART_PSELTXD_PSELTXD_Msk   (0xFFFFFFFFUL << UART_PSELTXD_PSELTXD_Pos)
 
#define UART_PSELTXD_PSELTXD_Disconnected   (0xFFFFFFFFUL)
 
#define UART_PSELCTS_PSELCTS_Pos   (0UL)
 
#define UART_PSELCTS_PSELCTS_Msk   (0xFFFFFFFFUL << UART_PSELCTS_PSELCTS_Pos)
 
#define UART_PSELCTS_PSELCTS_Disconnected   (0xFFFFFFFFUL)
 
#define UART_PSELRXD_PSELRXD_Pos   (0UL)
 
#define UART_PSELRXD_PSELRXD_Msk   (0xFFFFFFFFUL << UART_PSELRXD_PSELRXD_Pos)
 
#define UART_PSELRXD_PSELRXD_Disconnected   (0xFFFFFFFFUL)
 
#define UART_RXD_RXD_Pos   (0UL)
 
#define UART_RXD_RXD_Msk   (0xFFUL << UART_RXD_RXD_Pos)
 
#define UART_TXD_TXD_Pos   (0UL)
 
#define UART_TXD_TXD_Msk   (0xFFUL << UART_TXD_TXD_Pos)
 
#define UART_BAUDRATE_BAUDRATE_Pos   (0UL)
 
#define UART_BAUDRATE_BAUDRATE_Msk   (0xFFFFFFFFUL << UART_BAUDRATE_BAUDRATE_Pos)
 
#define UART_BAUDRATE_BAUDRATE_Baud1200   (0x0004F000UL)
 
#define UART_BAUDRATE_BAUDRATE_Baud2400   (0x0009D000UL)
 
#define UART_BAUDRATE_BAUDRATE_Baud4800   (0x0013B000UL)
 
#define UART_BAUDRATE_BAUDRATE_Baud9600   (0x00275000UL)
 
#define UART_BAUDRATE_BAUDRATE_Baud14400   (0x003B0000UL)
 
#define UART_BAUDRATE_BAUDRATE_Baud19200   (0x004EA000UL)
 
#define UART_BAUDRATE_BAUDRATE_Baud28800   (0x0075F000UL)
 
#define UART_BAUDRATE_BAUDRATE_Baud38400   (0x009D5000UL)
 
#define UART_BAUDRATE_BAUDRATE_Baud57600   (0x00EBF000UL)
 
#define UART_BAUDRATE_BAUDRATE_Baud76800   (0x013A9000UL)
 
#define UART_BAUDRATE_BAUDRATE_Baud115200   (0x01D7E000UL)
 
#define UART_BAUDRATE_BAUDRATE_Baud230400   (0x03AFB000UL)
 
#define UART_BAUDRATE_BAUDRATE_Baud250000   (0x04000000UL)
 
#define UART_BAUDRATE_BAUDRATE_Baud460800   (0x075F7000UL)
 
#define UART_BAUDRATE_BAUDRATE_Baud921600   (0x0EBED000UL)
 
#define UART_BAUDRATE_BAUDRATE_Baud1M   (0x10000000UL)
 
#define UART_CONFIG_PARITY_Pos   (1UL)
 
#define UART_CONFIG_PARITY_Msk   (0x7UL << UART_CONFIG_PARITY_Pos)
 
#define UART_CONFIG_PARITY_Excluded   (0x0UL)
 
#define UART_CONFIG_PARITY_Included   (0x7UL)
 
#define UART_CONFIG_HWFC_Pos   (0UL)
 
#define UART_CONFIG_HWFC_Msk   (0x1UL << UART_CONFIG_HWFC_Pos)
 
#define UART_CONFIG_HWFC_Disabled   (0UL)
 
#define UART_CONFIG_HWFC_Enabled   (1UL)
 
#define UARTE_SHORTS_ENDRX_STOPRX_Pos   (6UL)
 
#define UARTE_SHORTS_ENDRX_STOPRX_Msk   (0x1UL << UARTE_SHORTS_ENDRX_STOPRX_Pos)
 
#define UARTE_SHORTS_ENDRX_STOPRX_Disabled   (0UL)
 
#define UARTE_SHORTS_ENDRX_STOPRX_Enabled   (1UL)
 
#define UARTE_SHORTS_ENDRX_STARTRX_Pos   (5UL)
 
#define UARTE_SHORTS_ENDRX_STARTRX_Msk   (0x1UL << UARTE_SHORTS_ENDRX_STARTRX_Pos)
 
#define UARTE_SHORTS_ENDRX_STARTRX_Disabled   (0UL)
 
#define UARTE_SHORTS_ENDRX_STARTRX_Enabled   (1UL)
 
#define UARTE_INTEN_TXSTOPPED_Pos   (22UL)
 
#define UARTE_INTEN_TXSTOPPED_Msk   (0x1UL << UARTE_INTEN_TXSTOPPED_Pos)
 
#define UARTE_INTEN_TXSTOPPED_Disabled   (0UL)
 
#define UARTE_INTEN_TXSTOPPED_Enabled   (1UL)
 
#define UARTE_INTEN_TXSTARTED_Pos   (20UL)
 
#define UARTE_INTEN_TXSTARTED_Msk   (0x1UL << UARTE_INTEN_TXSTARTED_Pos)
 
#define UARTE_INTEN_TXSTARTED_Disabled   (0UL)
 
#define UARTE_INTEN_TXSTARTED_Enabled   (1UL)
 
#define UARTE_INTEN_RXSTARTED_Pos   (19UL)
 
#define UARTE_INTEN_RXSTARTED_Msk   (0x1UL << UARTE_INTEN_RXSTARTED_Pos)
 
#define UARTE_INTEN_RXSTARTED_Disabled   (0UL)
 
#define UARTE_INTEN_RXSTARTED_Enabled   (1UL)
 
#define UARTE_INTEN_RXTO_Pos   (17UL)
 
#define UARTE_INTEN_RXTO_Msk   (0x1UL << UARTE_INTEN_RXTO_Pos)
 
#define UARTE_INTEN_RXTO_Disabled   (0UL)
 
#define UARTE_INTEN_RXTO_Enabled   (1UL)
 
#define UARTE_INTEN_ERROR_Pos   (9UL)
 
#define UARTE_INTEN_ERROR_Msk   (0x1UL << UARTE_INTEN_ERROR_Pos)
 
#define UARTE_INTEN_ERROR_Disabled   (0UL)
 
#define UARTE_INTEN_ERROR_Enabled   (1UL)
 
#define UARTE_INTEN_ENDTX_Pos   (8UL)
 
#define UARTE_INTEN_ENDTX_Msk   (0x1UL << UARTE_INTEN_ENDTX_Pos)
 
#define UARTE_INTEN_ENDTX_Disabled   (0UL)
 
#define UARTE_INTEN_ENDTX_Enabled   (1UL)
 
#define UARTE_INTEN_ENDRX_Pos   (4UL)
 
#define UARTE_INTEN_ENDRX_Msk   (0x1UL << UARTE_INTEN_ENDRX_Pos)
 
#define UARTE_INTEN_ENDRX_Disabled   (0UL)
 
#define UARTE_INTEN_ENDRX_Enabled   (1UL)
 
#define UARTE_INTEN_NCTS_Pos   (1UL)
 
#define UARTE_INTEN_NCTS_Msk   (0x1UL << UARTE_INTEN_NCTS_Pos)
 
#define UARTE_INTEN_NCTS_Disabled   (0UL)
 
#define UARTE_INTEN_NCTS_Enabled   (1UL)
 
#define UARTE_INTEN_CTS_Pos   (0UL)
 
#define UARTE_INTEN_CTS_Msk   (0x1UL << UARTE_INTEN_CTS_Pos)
 
#define UARTE_INTEN_CTS_Disabled   (0UL)
 
#define UARTE_INTEN_CTS_Enabled   (1UL)
 
#define UARTE_INTENSET_TXSTOPPED_Pos   (22UL)
 
#define UARTE_INTENSET_TXSTOPPED_Msk   (0x1UL << UARTE_INTENSET_TXSTOPPED_Pos)
 
#define UARTE_INTENSET_TXSTOPPED_Disabled   (0UL)
 
#define UARTE_INTENSET_TXSTOPPED_Enabled   (1UL)
 
#define UARTE_INTENSET_TXSTOPPED_Set   (1UL)
 
#define UARTE_INTENSET_TXSTARTED_Pos   (20UL)
 
#define UARTE_INTENSET_TXSTARTED_Msk   (0x1UL << UARTE_INTENSET_TXSTARTED_Pos)
 
#define UARTE_INTENSET_TXSTARTED_Disabled   (0UL)
 
#define UARTE_INTENSET_TXSTARTED_Enabled   (1UL)
 
#define UARTE_INTENSET_TXSTARTED_Set   (1UL)
 
#define UARTE_INTENSET_RXSTARTED_Pos   (19UL)
 
#define UARTE_INTENSET_RXSTARTED_Msk   (0x1UL << UARTE_INTENSET_RXSTARTED_Pos)
 
#define UARTE_INTENSET_RXSTARTED_Disabled   (0UL)
 
#define UARTE_INTENSET_RXSTARTED_Enabled   (1UL)
 
#define UARTE_INTENSET_RXSTARTED_Set   (1UL)
 
#define UARTE_INTENSET_RXTO_Pos   (17UL)
 
#define UARTE_INTENSET_RXTO_Msk   (0x1UL << UARTE_INTENSET_RXTO_Pos)
 
#define UARTE_INTENSET_RXTO_Disabled   (0UL)
 
#define UARTE_INTENSET_RXTO_Enabled   (1UL)
 
#define UARTE_INTENSET_RXTO_Set   (1UL)
 
#define UARTE_INTENSET_ERROR_Pos   (9UL)
 
#define UARTE_INTENSET_ERROR_Msk   (0x1UL << UARTE_INTENSET_ERROR_Pos)
 
#define UARTE_INTENSET_ERROR_Disabled   (0UL)
 
#define UARTE_INTENSET_ERROR_Enabled   (1UL)
 
#define UARTE_INTENSET_ERROR_Set   (1UL)
 
#define UARTE_INTENSET_ENDTX_Pos   (8UL)
 
#define UARTE_INTENSET_ENDTX_Msk   (0x1UL << UARTE_INTENSET_ENDTX_Pos)
 
#define UARTE_INTENSET_ENDTX_Disabled   (0UL)
 
#define UARTE_INTENSET_ENDTX_Enabled   (1UL)
 
#define UARTE_INTENSET_ENDTX_Set   (1UL)
 
#define UARTE_INTENSET_ENDRX_Pos   (4UL)
 
#define UARTE_INTENSET_ENDRX_Msk   (0x1UL << UARTE_INTENSET_ENDRX_Pos)
 
#define UARTE_INTENSET_ENDRX_Disabled   (0UL)
 
#define UARTE_INTENSET_ENDRX_Enabled   (1UL)
 
#define UARTE_INTENSET_ENDRX_Set   (1UL)
 
#define UARTE_INTENSET_NCTS_Pos   (1UL)
 
#define UARTE_INTENSET_NCTS_Msk   (0x1UL << UARTE_INTENSET_NCTS_Pos)
 
#define UARTE_INTENSET_NCTS_Disabled   (0UL)
 
#define UARTE_INTENSET_NCTS_Enabled   (1UL)
 
#define UARTE_INTENSET_NCTS_Set   (1UL)
 
#define UARTE_INTENSET_CTS_Pos   (0UL)
 
#define UARTE_INTENSET_CTS_Msk   (0x1UL << UARTE_INTENSET_CTS_Pos)
 
#define UARTE_INTENSET_CTS_Disabled   (0UL)
 
#define UARTE_INTENSET_CTS_Enabled   (1UL)
 
#define UARTE_INTENSET_CTS_Set   (1UL)
 
#define UARTE_INTENCLR_TXSTOPPED_Pos   (22UL)
 
#define UARTE_INTENCLR_TXSTOPPED_Msk   (0x1UL << UARTE_INTENCLR_TXSTOPPED_Pos)
 
#define UARTE_INTENCLR_TXSTOPPED_Disabled   (0UL)
 
#define UARTE_INTENCLR_TXSTOPPED_Enabled   (1UL)
 
#define UARTE_INTENCLR_TXSTOPPED_Clear   (1UL)
 
#define UARTE_INTENCLR_TXSTARTED_Pos   (20UL)
 
#define UARTE_INTENCLR_TXSTARTED_Msk   (0x1UL << UARTE_INTENCLR_TXSTARTED_Pos)
 
#define UARTE_INTENCLR_TXSTARTED_Disabled   (0UL)
 
#define UARTE_INTENCLR_TXSTARTED_Enabled   (1UL)
 
#define UARTE_INTENCLR_TXSTARTED_Clear   (1UL)
 
#define UARTE_INTENCLR_RXSTARTED_Pos   (19UL)
 
#define UARTE_INTENCLR_RXSTARTED_Msk   (0x1UL << UARTE_INTENCLR_RXSTARTED_Pos)
 
#define UARTE_INTENCLR_RXSTARTED_Disabled   (0UL)
 
#define UARTE_INTENCLR_RXSTARTED_Enabled   (1UL)
 
#define UARTE_INTENCLR_RXSTARTED_Clear   (1UL)
 
#define UARTE_INTENCLR_RXTO_Pos   (17UL)
 
#define UARTE_INTENCLR_RXTO_Msk   (0x1UL << UARTE_INTENCLR_RXTO_Pos)
 
#define UARTE_INTENCLR_RXTO_Disabled   (0UL)
 
#define UARTE_INTENCLR_RXTO_Enabled   (1UL)
 
#define UARTE_INTENCLR_RXTO_Clear   (1UL)
 
#define UARTE_INTENCLR_ERROR_Pos   (9UL)
 
#define UARTE_INTENCLR_ERROR_Msk   (0x1UL << UARTE_INTENCLR_ERROR_Pos)
 
#define UARTE_INTENCLR_ERROR_Disabled   (0UL)
 
#define UARTE_INTENCLR_ERROR_Enabled   (1UL)
 
#define UARTE_INTENCLR_ERROR_Clear   (1UL)
 
#define UARTE_INTENCLR_ENDTX_Pos   (8UL)
 
#define UARTE_INTENCLR_ENDTX_Msk   (0x1UL << UARTE_INTENCLR_ENDTX_Pos)
 
#define UARTE_INTENCLR_ENDTX_Disabled   (0UL)
 
#define UARTE_INTENCLR_ENDTX_Enabled   (1UL)
 
#define UARTE_INTENCLR_ENDTX_Clear   (1UL)
 
#define UARTE_INTENCLR_ENDRX_Pos   (4UL)
 
#define UARTE_INTENCLR_ENDRX_Msk   (0x1UL << UARTE_INTENCLR_ENDRX_Pos)
 
#define UARTE_INTENCLR_ENDRX_Disabled   (0UL)
 
#define UARTE_INTENCLR_ENDRX_Enabled   (1UL)
 
#define UARTE_INTENCLR_ENDRX_Clear   (1UL)
 
#define UARTE_INTENCLR_NCTS_Pos   (1UL)
 
#define UARTE_INTENCLR_NCTS_Msk   (0x1UL << UARTE_INTENCLR_NCTS_Pos)
 
#define UARTE_INTENCLR_NCTS_Disabled   (0UL)
 
#define UARTE_INTENCLR_NCTS_Enabled   (1UL)
 
#define UARTE_INTENCLR_NCTS_Clear   (1UL)
 
#define UARTE_INTENCLR_CTS_Pos   (0UL)
 
#define UARTE_INTENCLR_CTS_Msk   (0x1UL << UARTE_INTENCLR_CTS_Pos)
 
#define UARTE_INTENCLR_CTS_Disabled   (0UL)
 
#define UARTE_INTENCLR_CTS_Enabled   (1UL)
 
#define UARTE_INTENCLR_CTS_Clear   (1UL)
 
#define UARTE_ERRORSRC_BREAK_Pos   (3UL)
 
#define UARTE_ERRORSRC_BREAK_Msk   (0x1UL << UARTE_ERRORSRC_BREAK_Pos)
 
#define UARTE_ERRORSRC_BREAK_NotPresent   (0UL)
 
#define UARTE_ERRORSRC_BREAK_Present   (1UL)
 
#define UARTE_ERRORSRC_FRAMING_Pos   (2UL)
 
#define UARTE_ERRORSRC_FRAMING_Msk   (0x1UL << UARTE_ERRORSRC_FRAMING_Pos)
 
#define UARTE_ERRORSRC_FRAMING_NotPresent   (0UL)
 
#define UARTE_ERRORSRC_FRAMING_Present   (1UL)
 
#define UARTE_ERRORSRC_PARITY_Pos   (1UL)
 
#define UARTE_ERRORSRC_PARITY_Msk   (0x1UL << UARTE_ERRORSRC_PARITY_Pos)
 
#define UARTE_ERRORSRC_PARITY_NotPresent   (0UL)
 
#define UARTE_ERRORSRC_PARITY_Present   (1UL)
 
#define UARTE_ERRORSRC_OVERRUN_Pos   (0UL)
 
#define UARTE_ERRORSRC_OVERRUN_Msk   (0x1UL << UARTE_ERRORSRC_OVERRUN_Pos)
 
#define UARTE_ERRORSRC_OVERRUN_NotPresent   (0UL)
 
#define UARTE_ERRORSRC_OVERRUN_Present   (1UL)
 
#define UARTE_ENABLE_ENABLE_Pos   (0UL)
 
#define UARTE_ENABLE_ENABLE_Msk   (0xFUL << UARTE_ENABLE_ENABLE_Pos)
 
#define UARTE_ENABLE_ENABLE_Disabled   (0UL)
 
#define UARTE_ENABLE_ENABLE_Enabled   (8UL)
 
#define UARTE_PSEL_RTS_CONNECT_Pos   (31UL)
 
#define UARTE_PSEL_RTS_CONNECT_Msk   (0x1UL << UARTE_PSEL_RTS_CONNECT_Pos)
 
#define UARTE_PSEL_RTS_CONNECT_Connected   (0UL)
 
#define UARTE_PSEL_RTS_CONNECT_Disconnected   (1UL)
 
#define UARTE_PSEL_RTS_PIN_Pos   (0UL)
 
#define UARTE_PSEL_RTS_PIN_Msk   (0x1FUL << UARTE_PSEL_RTS_PIN_Pos)
 
#define UARTE_PSEL_TXD_CONNECT_Pos   (31UL)
 
#define UARTE_PSEL_TXD_CONNECT_Msk   (0x1UL << UARTE_PSEL_TXD_CONNECT_Pos)
 
#define UARTE_PSEL_TXD_CONNECT_Connected   (0UL)
 
#define UARTE_PSEL_TXD_CONNECT_Disconnected   (1UL)
 
#define UARTE_PSEL_TXD_PIN_Pos   (0UL)
 
#define UARTE_PSEL_TXD_PIN_Msk   (0x1FUL << UARTE_PSEL_TXD_PIN_Pos)
 
#define UARTE_PSEL_CTS_CONNECT_Pos   (31UL)
 
#define UARTE_PSEL_CTS_CONNECT_Msk   (0x1UL << UARTE_PSEL_CTS_CONNECT_Pos)
 
#define UARTE_PSEL_CTS_CONNECT_Connected   (0UL)
 
#define UARTE_PSEL_CTS_CONNECT_Disconnected   (1UL)
 
#define UARTE_PSEL_CTS_PIN_Pos   (0UL)
 
#define UARTE_PSEL_CTS_PIN_Msk   (0x1FUL << UARTE_PSEL_CTS_PIN_Pos)
 
#define UARTE_PSEL_RXD_CONNECT_Pos   (31UL)
 
#define UARTE_PSEL_RXD_CONNECT_Msk   (0x1UL << UARTE_PSEL_RXD_CONNECT_Pos)
 
#define UARTE_PSEL_RXD_CONNECT_Connected   (0UL)
 
#define UARTE_PSEL_RXD_CONNECT_Disconnected   (1UL)
 
#define UARTE_PSEL_RXD_PIN_Pos   (0UL)
 
#define UARTE_PSEL_RXD_PIN_Msk   (0x1FUL << UARTE_PSEL_RXD_PIN_Pos)
 
#define UARTE_BAUDRATE_BAUDRATE_Pos   (0UL)
 
#define UARTE_BAUDRATE_BAUDRATE_Msk   (0xFFFFFFFFUL << UARTE_BAUDRATE_BAUDRATE_Pos)
 
#define UARTE_BAUDRATE_BAUDRATE_Baud1200   (0x0004F000UL)
 
#define UARTE_BAUDRATE_BAUDRATE_Baud2400   (0x0009D000UL)
 
#define UARTE_BAUDRATE_BAUDRATE_Baud4800   (0x0013B000UL)
 
#define UARTE_BAUDRATE_BAUDRATE_Baud9600   (0x00275000UL)
 
#define UARTE_BAUDRATE_BAUDRATE_Baud14400   (0x003AF000UL)
 
#define UARTE_BAUDRATE_BAUDRATE_Baud19200   (0x004EA000UL)
 
#define UARTE_BAUDRATE_BAUDRATE_Baud28800   (0x0075C000UL)
 
#define UARTE_BAUDRATE_BAUDRATE_Baud38400   (0x009D0000UL)
 
#define UARTE_BAUDRATE_BAUDRATE_Baud57600   (0x00EB0000UL)
 
#define UARTE_BAUDRATE_BAUDRATE_Baud76800   (0x013A9000UL)
 
#define UARTE_BAUDRATE_BAUDRATE_Baud115200   (0x01D60000UL)
 
#define UARTE_BAUDRATE_BAUDRATE_Baud230400   (0x03B00000UL)
 
#define UARTE_BAUDRATE_BAUDRATE_Baud250000   (0x04000000UL)
 
#define UARTE_BAUDRATE_BAUDRATE_Baud460800   (0x07400000UL)
 
#define UARTE_BAUDRATE_BAUDRATE_Baud921600   (0x0F000000UL)
 
#define UARTE_BAUDRATE_BAUDRATE_Baud1M   (0x10000000UL)
 
#define UARTE_RXD_PTR_PTR_Pos   (0UL)
 
#define UARTE_RXD_PTR_PTR_Msk   (0xFFFFFFFFUL << UARTE_RXD_PTR_PTR_Pos)
 
#define UARTE_RXD_MAXCNT_MAXCNT_Pos   (0UL)
 
#define UARTE_RXD_MAXCNT_MAXCNT_Msk   (0xFFUL << UARTE_RXD_MAXCNT_MAXCNT_Pos)
 
#define UARTE_RXD_AMOUNT_AMOUNT_Pos   (0UL)
 
#define UARTE_RXD_AMOUNT_AMOUNT_Msk   (0xFFUL << UARTE_RXD_AMOUNT_AMOUNT_Pos)
 
#define UARTE_TXD_PTR_PTR_Pos   (0UL)
 
#define UARTE_TXD_PTR_PTR_Msk   (0xFFFFFFFFUL << UARTE_TXD_PTR_PTR_Pos)
 
#define UARTE_TXD_MAXCNT_MAXCNT_Pos   (0UL)
 
#define UARTE_TXD_MAXCNT_MAXCNT_Msk   (0xFFUL << UARTE_TXD_MAXCNT_MAXCNT_Pos)
 
#define UARTE_TXD_AMOUNT_AMOUNT_Pos   (0UL)
 
#define UARTE_TXD_AMOUNT_AMOUNT_Msk   (0xFFUL << UARTE_TXD_AMOUNT_AMOUNT_Pos)
 
#define UARTE_CONFIG_PARITY_Pos   (1UL)
 
#define UARTE_CONFIG_PARITY_Msk   (0x7UL << UARTE_CONFIG_PARITY_Pos)
 
#define UARTE_CONFIG_PARITY_Excluded   (0x0UL)
 
#define UARTE_CONFIG_PARITY_Included   (0x7UL)
 
#define UARTE_CONFIG_HWFC_Pos   (0UL)
 
#define UARTE_CONFIG_HWFC_Msk   (0x1UL << UARTE_CONFIG_HWFC_Pos)
 
#define UARTE_CONFIG_HWFC_Disabled   (0UL)
 
#define UARTE_CONFIG_HWFC_Enabled   (1UL)
 
#define UICR_NRFFW_NRFFW_Pos   (0UL)
 
#define UICR_NRFFW_NRFFW_Msk   (0xFFFFFFFFUL << UICR_NRFFW_NRFFW_Pos)
 
#define UICR_NRFHW_NRFHW_Pos   (0UL)
 
#define UICR_NRFHW_NRFHW_Msk   (0xFFFFFFFFUL << UICR_NRFHW_NRFHW_Pos)
 
#define UICR_CUSTOMER_CUSTOMER_Pos   (0UL)
 
#define UICR_CUSTOMER_CUSTOMER_Msk   (0xFFFFFFFFUL << UICR_CUSTOMER_CUSTOMER_Pos)
 
#define UICR_PSELRESET_CONNECT_Pos   (31UL)
 
#define UICR_PSELRESET_CONNECT_Msk   (0x1UL << UICR_PSELRESET_CONNECT_Pos)
 
#define UICR_PSELRESET_CONNECT_Connected   (0UL)
 
#define UICR_PSELRESET_CONNECT_Disconnected   (1UL)
 
#define UICR_PSELRESET_PIN_Pos   (0UL)
 
#define UICR_PSELRESET_PIN_Msk   (0x1FUL << UICR_PSELRESET_PIN_Pos)
 
#define UICR_APPROTECT_PALL_Pos   (0UL)
 
#define UICR_APPROTECT_PALL_Msk   (0xFFUL << UICR_APPROTECT_PALL_Pos)
 
#define UICR_APPROTECT_PALL_Enabled   (0x00UL)
 
#define UICR_APPROTECT_PALL_Disabled   (0xFFUL)
 
#define UICR_NFCPINS_PROTECT_Pos   (0UL)
 
#define UICR_NFCPINS_PROTECT_Msk   (0x1UL << UICR_NFCPINS_PROTECT_Pos)
 
#define UICR_NFCPINS_PROTECT_Disabled   (0UL)
 
#define UICR_NFCPINS_PROTECT_NFC   (1UL)
 
#define WDT_INTENSET_TIMEOUT_Pos   (0UL)
 
#define WDT_INTENSET_TIMEOUT_Msk   (0x1UL << WDT_INTENSET_TIMEOUT_Pos)
 
#define WDT_INTENSET_TIMEOUT_Disabled   (0UL)
 
#define WDT_INTENSET_TIMEOUT_Enabled   (1UL)
 
#define WDT_INTENSET_TIMEOUT_Set   (1UL)
 
#define WDT_INTENCLR_TIMEOUT_Pos   (0UL)
 
#define WDT_INTENCLR_TIMEOUT_Msk   (0x1UL << WDT_INTENCLR_TIMEOUT_Pos)
 
#define WDT_INTENCLR_TIMEOUT_Disabled   (0UL)
 
#define WDT_INTENCLR_TIMEOUT_Enabled   (1UL)
 
#define WDT_INTENCLR_TIMEOUT_Clear   (1UL)
 
#define WDT_RUNSTATUS_RUNSTATUS_Pos   (0UL)
 
#define WDT_RUNSTATUS_RUNSTATUS_Msk   (0x1UL << WDT_RUNSTATUS_RUNSTATUS_Pos)
 
#define WDT_RUNSTATUS_RUNSTATUS_NotRunning   (0UL)
 
#define WDT_RUNSTATUS_RUNSTATUS_Running   (1UL)
 
#define WDT_REQSTATUS_RR7_Pos   (7UL)
 
#define WDT_REQSTATUS_RR7_Msk   (0x1UL << WDT_REQSTATUS_RR7_Pos)
 
#define WDT_REQSTATUS_RR7_DisabledOrRequested   (0UL)
 
#define WDT_REQSTATUS_RR7_EnabledAndUnrequested   (1UL)
 
#define WDT_REQSTATUS_RR6_Pos   (6UL)
 
#define WDT_REQSTATUS_RR6_Msk   (0x1UL << WDT_REQSTATUS_RR6_Pos)
 
#define WDT_REQSTATUS_RR6_DisabledOrRequested   (0UL)
 
#define WDT_REQSTATUS_RR6_EnabledAndUnrequested   (1UL)
 
#define WDT_REQSTATUS_RR5_Pos   (5UL)
 
#define WDT_REQSTATUS_RR5_Msk   (0x1UL << WDT_REQSTATUS_RR5_Pos)
 
#define WDT_REQSTATUS_RR5_DisabledOrRequested   (0UL)
 
#define WDT_REQSTATUS_RR5_EnabledAndUnrequested   (1UL)
 
#define WDT_REQSTATUS_RR4_Pos   (4UL)
 
#define WDT_REQSTATUS_RR4_Msk   (0x1UL << WDT_REQSTATUS_RR4_Pos)
 
#define WDT_REQSTATUS_RR4_DisabledOrRequested   (0UL)
 
#define WDT_REQSTATUS_RR4_EnabledAndUnrequested   (1UL)
 
#define WDT_REQSTATUS_RR3_Pos   (3UL)
 
#define WDT_REQSTATUS_RR3_Msk   (0x1UL << WDT_REQSTATUS_RR3_Pos)
 
#define WDT_REQSTATUS_RR3_DisabledOrRequested   (0UL)
 
#define WDT_REQSTATUS_RR3_EnabledAndUnrequested   (1UL)
 
#define WDT_REQSTATUS_RR2_Pos   (2UL)
 
#define WDT_REQSTATUS_RR2_Msk   (0x1UL << WDT_REQSTATUS_RR2_Pos)
 
#define WDT_REQSTATUS_RR2_DisabledOrRequested   (0UL)
 
#define WDT_REQSTATUS_RR2_EnabledAndUnrequested   (1UL)
 
#define WDT_REQSTATUS_RR1_Pos   (1UL)
 
#define WDT_REQSTATUS_RR1_Msk   (0x1UL << WDT_REQSTATUS_RR1_Pos)
 
#define WDT_REQSTATUS_RR1_DisabledOrRequested   (0UL)
 
#define WDT_REQSTATUS_RR1_EnabledAndUnrequested   (1UL)
 
#define WDT_REQSTATUS_RR0_Pos   (0UL)
 
#define WDT_REQSTATUS_RR0_Msk   (0x1UL << WDT_REQSTATUS_RR0_Pos)
 
#define WDT_REQSTATUS_RR0_DisabledOrRequested   (0UL)
 
#define WDT_REQSTATUS_RR0_EnabledAndUnrequested   (1UL)
 
#define WDT_CRV_CRV_Pos   (0UL)
 
#define WDT_CRV_CRV_Msk   (0xFFFFFFFFUL << WDT_CRV_CRV_Pos)
 
#define WDT_RREN_RR7_Pos   (7UL)
 
#define WDT_RREN_RR7_Msk   (0x1UL << WDT_RREN_RR7_Pos)
 
#define WDT_RREN_RR7_Disabled   (0UL)
 
#define WDT_RREN_RR7_Enabled   (1UL)
 
#define WDT_RREN_RR6_Pos   (6UL)
 
#define WDT_RREN_RR6_Msk   (0x1UL << WDT_RREN_RR6_Pos)
 
#define WDT_RREN_RR6_Disabled   (0UL)
 
#define WDT_RREN_RR6_Enabled   (1UL)
 
#define WDT_RREN_RR5_Pos   (5UL)
 
#define WDT_RREN_RR5_Msk   (0x1UL << WDT_RREN_RR5_Pos)
 
#define WDT_RREN_RR5_Disabled   (0UL)
 
#define WDT_RREN_RR5_Enabled   (1UL)
 
#define WDT_RREN_RR4_Pos   (4UL)
 
#define WDT_RREN_RR4_Msk   (0x1UL << WDT_RREN_RR4_Pos)
 
#define WDT_RREN_RR4_Disabled   (0UL)
 
#define WDT_RREN_RR4_Enabled   (1UL)
 
#define WDT_RREN_RR3_Pos   (3UL)
 
#define WDT_RREN_RR3_Msk   (0x1UL << WDT_RREN_RR3_Pos)
 
#define WDT_RREN_RR3_Disabled   (0UL)
 
#define WDT_RREN_RR3_Enabled   (1UL)
 
#define WDT_RREN_RR2_Pos   (2UL)
 
#define WDT_RREN_RR2_Msk   (0x1UL << WDT_RREN_RR2_Pos)
 
#define WDT_RREN_RR2_Disabled   (0UL)
 
#define WDT_RREN_RR2_Enabled   (1UL)
 
#define WDT_RREN_RR1_Pos   (1UL)
 
#define WDT_RREN_RR1_Msk   (0x1UL << WDT_RREN_RR1_Pos)
 
#define WDT_RREN_RR1_Disabled   (0UL)
 
#define WDT_RREN_RR1_Enabled   (1UL)
 
#define WDT_RREN_RR0_Pos   (0UL)
 
#define WDT_RREN_RR0_Msk   (0x1UL << WDT_RREN_RR0_Pos)
 
#define WDT_RREN_RR0_Disabled   (0UL)
 
#define WDT_RREN_RR0_Enabled   (1UL)
 
#define WDT_CONFIG_HALT_Pos   (3UL)
 
#define WDT_CONFIG_HALT_Msk   (0x1UL << WDT_CONFIG_HALT_Pos)
 
#define WDT_CONFIG_HALT_Pause   (0UL)
 
#define WDT_CONFIG_HALT_Run   (1UL)
 
#define WDT_CONFIG_SLEEP_Pos   (0UL)
 
#define WDT_CONFIG_SLEEP_Msk   (0x1UL << WDT_CONFIG_SLEEP_Pos)
 
#define WDT_CONFIG_SLEEP_Pause   (0UL)
 
#define WDT_CONFIG_SLEEP_Run   (1UL)
 
#define WDT_RR_RR_Pos   (0UL)
 
#define WDT_RR_RR_Msk   (0xFFFFFFFFUL << WDT_RR_RR_Pos)
 
#define WDT_RR_RR_Reload   (0x6E524635UL)
 

Macro Definition Documentation

◆ AAR_ADDRPTR_ADDRPTR_Msk

#define AAR_ADDRPTR_ADDRPTR_Msk   (0xFFFFFFFFUL << AAR_ADDRPTR_ADDRPTR_Pos)

Bit mask of ADDRPTR field.

Definition at line 127 of file nrf52_bitfields.h.

◆ AAR_ADDRPTR_ADDRPTR_Pos

#define AAR_ADDRPTR_ADDRPTR_Pos   (0UL)

Position of ADDRPTR field.

Definition at line 126 of file nrf52_bitfields.h.

◆ AAR_ENABLE_ENABLE_Disabled

#define AAR_ENABLE_ENABLE_Disabled   (0UL)

Disable

Definition at line 105 of file nrf52_bitfields.h.

◆ AAR_ENABLE_ENABLE_Enabled

#define AAR_ENABLE_ENABLE_Enabled   (3UL)

Enable

Definition at line 106 of file nrf52_bitfields.h.

◆ AAR_ENABLE_ENABLE_Msk

#define AAR_ENABLE_ENABLE_Msk   (0x3UL << AAR_ENABLE_ENABLE_Pos)

Bit mask of ENABLE field.

Definition at line 104 of file nrf52_bitfields.h.

◆ AAR_ENABLE_ENABLE_Pos

#define AAR_ENABLE_ENABLE_Pos   (0UL)

Position of ENABLE field.

Definition at line 103 of file nrf52_bitfields.h.

◆ AAR_INTENCLR_END_Clear

#define AAR_INTENCLR_END_Clear   (1UL)

Disable

Definition at line 90 of file nrf52_bitfields.h.

◆ AAR_INTENCLR_END_Disabled

#define AAR_INTENCLR_END_Disabled   (0UL)

Read: Disabled

Definition at line 88 of file nrf52_bitfields.h.

◆ AAR_INTENCLR_END_Enabled

#define AAR_INTENCLR_END_Enabled   (1UL)

Read: Enabled

Definition at line 89 of file nrf52_bitfields.h.

◆ AAR_INTENCLR_END_Msk

#define AAR_INTENCLR_END_Msk   (0x1UL << AAR_INTENCLR_END_Pos)

Bit mask of END field.

Definition at line 87 of file nrf52_bitfields.h.

◆ AAR_INTENCLR_END_Pos

#define AAR_INTENCLR_END_Pos   (0UL)

Position of END field.

Definition at line 86 of file nrf52_bitfields.h.

◆ AAR_INTENCLR_NOTRESOLVED_Clear

#define AAR_INTENCLR_NOTRESOLVED_Clear   (1UL)

Disable

Definition at line 76 of file nrf52_bitfields.h.

◆ AAR_INTENCLR_NOTRESOLVED_Disabled

#define AAR_INTENCLR_NOTRESOLVED_Disabled   (0UL)

Read: Disabled

Definition at line 74 of file nrf52_bitfields.h.

◆ AAR_INTENCLR_NOTRESOLVED_Enabled

#define AAR_INTENCLR_NOTRESOLVED_Enabled   (1UL)

Read: Enabled

Definition at line 75 of file nrf52_bitfields.h.

◆ AAR_INTENCLR_NOTRESOLVED_Msk

#define AAR_INTENCLR_NOTRESOLVED_Msk   (0x1UL << AAR_INTENCLR_NOTRESOLVED_Pos)

Bit mask of NOTRESOLVED field.

Definition at line 73 of file nrf52_bitfields.h.

◆ AAR_INTENCLR_NOTRESOLVED_Pos

#define AAR_INTENCLR_NOTRESOLVED_Pos   (2UL)

Position of NOTRESOLVED field.

Definition at line 72 of file nrf52_bitfields.h.

◆ AAR_INTENCLR_RESOLVED_Clear

#define AAR_INTENCLR_RESOLVED_Clear   (1UL)

Disable

Definition at line 83 of file nrf52_bitfields.h.

◆ AAR_INTENCLR_RESOLVED_Disabled

#define AAR_INTENCLR_RESOLVED_Disabled   (0UL)

Read: Disabled

Definition at line 81 of file nrf52_bitfields.h.

◆ AAR_INTENCLR_RESOLVED_Enabled

#define AAR_INTENCLR_RESOLVED_Enabled   (1UL)

Read: Enabled

Definition at line 82 of file nrf52_bitfields.h.

◆ AAR_INTENCLR_RESOLVED_Msk

#define AAR_INTENCLR_RESOLVED_Msk   (0x1UL << AAR_INTENCLR_RESOLVED_Pos)

Bit mask of RESOLVED field.

Definition at line 80 of file nrf52_bitfields.h.

◆ AAR_INTENCLR_RESOLVED_Pos

#define AAR_INTENCLR_RESOLVED_Pos   (1UL)

Position of RESOLVED field.

Definition at line 79 of file nrf52_bitfields.h.

◆ AAR_INTENSET_END_Disabled

#define AAR_INTENSET_END_Disabled   (0UL)

Read: Disabled

Definition at line 64 of file nrf52_bitfields.h.

◆ AAR_INTENSET_END_Enabled

#define AAR_INTENSET_END_Enabled   (1UL)

Read: Enabled

Definition at line 65 of file nrf52_bitfields.h.

◆ AAR_INTENSET_END_Msk

#define AAR_INTENSET_END_Msk   (0x1UL << AAR_INTENSET_END_Pos)

Bit mask of END field.

Definition at line 63 of file nrf52_bitfields.h.

◆ AAR_INTENSET_END_Pos

#define AAR_INTENSET_END_Pos   (0UL)

Position of END field.

Definition at line 62 of file nrf52_bitfields.h.

◆ AAR_INTENSET_END_Set

#define AAR_INTENSET_END_Set   (1UL)

Enable

Definition at line 66 of file nrf52_bitfields.h.

◆ AAR_INTENSET_NOTRESOLVED_Disabled

#define AAR_INTENSET_NOTRESOLVED_Disabled   (0UL)

Read: Disabled

Definition at line 50 of file nrf52_bitfields.h.

◆ AAR_INTENSET_NOTRESOLVED_Enabled

#define AAR_INTENSET_NOTRESOLVED_Enabled   (1UL)

Read: Enabled

Definition at line 51 of file nrf52_bitfields.h.

◆ AAR_INTENSET_NOTRESOLVED_Msk

#define AAR_INTENSET_NOTRESOLVED_Msk   (0x1UL << AAR_INTENSET_NOTRESOLVED_Pos)

Bit mask of NOTRESOLVED field.

Definition at line 49 of file nrf52_bitfields.h.

◆ AAR_INTENSET_NOTRESOLVED_Pos

#define AAR_INTENSET_NOTRESOLVED_Pos   (2UL)

Position of NOTRESOLVED field.

Definition at line 48 of file nrf52_bitfields.h.

◆ AAR_INTENSET_NOTRESOLVED_Set

#define AAR_INTENSET_NOTRESOLVED_Set   (1UL)

Enable

Definition at line 52 of file nrf52_bitfields.h.

◆ AAR_INTENSET_RESOLVED_Disabled

#define AAR_INTENSET_RESOLVED_Disabled   (0UL)

Read: Disabled

Definition at line 57 of file nrf52_bitfields.h.

◆ AAR_INTENSET_RESOLVED_Enabled

#define AAR_INTENSET_RESOLVED_Enabled   (1UL)

Read: Enabled

Definition at line 58 of file nrf52_bitfields.h.

◆ AAR_INTENSET_RESOLVED_Msk

#define AAR_INTENSET_RESOLVED_Msk   (0x1UL << AAR_INTENSET_RESOLVED_Pos)

Bit mask of RESOLVED field.

Definition at line 56 of file nrf52_bitfields.h.

◆ AAR_INTENSET_RESOLVED_Pos

#define AAR_INTENSET_RESOLVED_Pos   (1UL)

Position of RESOLVED field.

Definition at line 55 of file nrf52_bitfields.h.

◆ AAR_INTENSET_RESOLVED_Set

#define AAR_INTENSET_RESOLVED_Set   (1UL)

Enable

Definition at line 59 of file nrf52_bitfields.h.

◆ AAR_IRKPTR_IRKPTR_Msk

#define AAR_IRKPTR_IRKPTR_Msk   (0xFFFFFFFFUL << AAR_IRKPTR_IRKPTR_Pos)

Bit mask of IRKPTR field.

Definition at line 120 of file nrf52_bitfields.h.

◆ AAR_IRKPTR_IRKPTR_Pos

#define AAR_IRKPTR_IRKPTR_Pos   (0UL)

Position of IRKPTR field.

Definition at line 119 of file nrf52_bitfields.h.

◆ AAR_NIRK_NIRK_Msk

#define AAR_NIRK_NIRK_Msk   (0x1FUL << AAR_NIRK_NIRK_Pos)

Bit mask of NIRK field.

Definition at line 113 of file nrf52_bitfields.h.

◆ AAR_NIRK_NIRK_Pos

#define AAR_NIRK_NIRK_Pos   (0UL)

Position of NIRK field.

Definition at line 112 of file nrf52_bitfields.h.

◆ AAR_SCRATCHPTR_SCRATCHPTR_Msk

#define AAR_SCRATCHPTR_SCRATCHPTR_Msk   (0xFFFFFFFFUL << AAR_SCRATCHPTR_SCRATCHPTR_Pos)

Bit mask of SCRATCHPTR field.

Definition at line 134 of file nrf52_bitfields.h.

◆ AAR_SCRATCHPTR_SCRATCHPTR_Pos

#define AAR_SCRATCHPTR_SCRATCHPTR_Pos   (0UL)

Position of SCRATCHPTR field.

Definition at line 133 of file nrf52_bitfields.h.

◆ AAR_STATUS_STATUS_Msk

#define AAR_STATUS_STATUS_Msk   (0xFUL << AAR_STATUS_STATUS_Pos)

Bit mask of STATUS field.

Definition at line 97 of file nrf52_bitfields.h.

◆ AAR_STATUS_STATUS_Pos

#define AAR_STATUS_STATUS_Pos   (0UL)

Position of STATUS field.

Definition at line 96 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION0_Disabled

#define BPROT_CONFIG0_REGION0_Disabled   (0UL)

Protection disabled

Definition at line 332 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION0_Enabled

#define BPROT_CONFIG0_REGION0_Enabled   (1UL)

Protection enable

Definition at line 333 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION0_Msk

#define BPROT_CONFIG0_REGION0_Msk   (0x1UL << BPROT_CONFIG0_REGION0_Pos)

Bit mask of REGION0 field.

Definition at line 331 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION0_Pos

#define BPROT_CONFIG0_REGION0_Pos   (0UL)

Position of REGION0 field.

Definition at line 330 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION10_Disabled

#define BPROT_CONFIG0_REGION10_Disabled   (0UL)

Protection disabled

Definition at line 272 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION10_Enabled

#define BPROT_CONFIG0_REGION10_Enabled   (1UL)

Protection enable

Definition at line 273 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION10_Msk

#define BPROT_CONFIG0_REGION10_Msk   (0x1UL << BPROT_CONFIG0_REGION10_Pos)

Bit mask of REGION10 field.

Definition at line 271 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION10_Pos

#define BPROT_CONFIG0_REGION10_Pos   (10UL)

Position of REGION10 field.

Definition at line 270 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION11_Disabled

#define BPROT_CONFIG0_REGION11_Disabled   (0UL)

Protection disabled

Definition at line 266 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION11_Enabled

#define BPROT_CONFIG0_REGION11_Enabled   (1UL)

Protection enable

Definition at line 267 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION11_Msk

#define BPROT_CONFIG0_REGION11_Msk   (0x1UL << BPROT_CONFIG0_REGION11_Pos)

Bit mask of REGION11 field.

Definition at line 265 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION11_Pos

#define BPROT_CONFIG0_REGION11_Pos   (11UL)

Position of REGION11 field.

Definition at line 264 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION12_Disabled

#define BPROT_CONFIG0_REGION12_Disabled   (0UL)

Protection disabled

Definition at line 260 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION12_Enabled

#define BPROT_CONFIG0_REGION12_Enabled   (1UL)

Protection enable

Definition at line 261 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION12_Msk

#define BPROT_CONFIG0_REGION12_Msk   (0x1UL << BPROT_CONFIG0_REGION12_Pos)

Bit mask of REGION12 field.

Definition at line 259 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION12_Pos

#define BPROT_CONFIG0_REGION12_Pos   (12UL)

Position of REGION12 field.

Definition at line 258 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION13_Disabled

#define BPROT_CONFIG0_REGION13_Disabled   (0UL)

Protection disabled

Definition at line 254 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION13_Enabled

#define BPROT_CONFIG0_REGION13_Enabled   (1UL)

Protection enable

Definition at line 255 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION13_Msk

#define BPROT_CONFIG0_REGION13_Msk   (0x1UL << BPROT_CONFIG0_REGION13_Pos)

Bit mask of REGION13 field.

Definition at line 253 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION13_Pos

#define BPROT_CONFIG0_REGION13_Pos   (13UL)

Position of REGION13 field.

Definition at line 252 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION14_Disabled

#define BPROT_CONFIG0_REGION14_Disabled   (0UL)

Protection disabled

Definition at line 248 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION14_Enabled

#define BPROT_CONFIG0_REGION14_Enabled   (1UL)

Protection enable

Definition at line 249 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION14_Msk

#define BPROT_CONFIG0_REGION14_Msk   (0x1UL << BPROT_CONFIG0_REGION14_Pos)

Bit mask of REGION14 field.

Definition at line 247 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION14_Pos

#define BPROT_CONFIG0_REGION14_Pos   (14UL)

Position of REGION14 field.

Definition at line 246 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION15_Disabled

#define BPROT_CONFIG0_REGION15_Disabled   (0UL)

Protection disabled

Definition at line 242 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION15_Enabled

#define BPROT_CONFIG0_REGION15_Enabled   (1UL)

Protection enable

Definition at line 243 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION15_Msk

#define BPROT_CONFIG0_REGION15_Msk   (0x1UL << BPROT_CONFIG0_REGION15_Pos)

Bit mask of REGION15 field.

Definition at line 241 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION15_Pos

#define BPROT_CONFIG0_REGION15_Pos   (15UL)

Position of REGION15 field.

Definition at line 240 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION16_Disabled

#define BPROT_CONFIG0_REGION16_Disabled   (0UL)

Protection disabled

Definition at line 236 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION16_Enabled

#define BPROT_CONFIG0_REGION16_Enabled   (1UL)

Protection enable

Definition at line 237 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION16_Msk

#define BPROT_CONFIG0_REGION16_Msk   (0x1UL << BPROT_CONFIG0_REGION16_Pos)

Bit mask of REGION16 field.

Definition at line 235 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION16_Pos

#define BPROT_CONFIG0_REGION16_Pos   (16UL)

Position of REGION16 field.

Definition at line 234 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION17_Disabled

#define BPROT_CONFIG0_REGION17_Disabled   (0UL)

Protection disabled

Definition at line 230 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION17_Enabled

#define BPROT_CONFIG0_REGION17_Enabled   (1UL)

Protection enable

Definition at line 231 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION17_Msk

#define BPROT_CONFIG0_REGION17_Msk   (0x1UL << BPROT_CONFIG0_REGION17_Pos)

Bit mask of REGION17 field.

Definition at line 229 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION17_Pos

#define BPROT_CONFIG0_REGION17_Pos   (17UL)

Position of REGION17 field.

Definition at line 228 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION18_Disabled

#define BPROT_CONFIG0_REGION18_Disabled   (0UL)

Protection disabled

Definition at line 224 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION18_Enabled

#define BPROT_CONFIG0_REGION18_Enabled   (1UL)

Protection enable

Definition at line 225 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION18_Msk

#define BPROT_CONFIG0_REGION18_Msk   (0x1UL << BPROT_CONFIG0_REGION18_Pos)

Bit mask of REGION18 field.

Definition at line 223 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION18_Pos

#define BPROT_CONFIG0_REGION18_Pos   (18UL)

Position of REGION18 field.

Definition at line 222 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION19_Disabled

#define BPROT_CONFIG0_REGION19_Disabled   (0UL)

Protection disabled

Definition at line 218 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION19_Enabled

#define BPROT_CONFIG0_REGION19_Enabled   (1UL)

Protection enable

Definition at line 219 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION19_Msk

#define BPROT_CONFIG0_REGION19_Msk   (0x1UL << BPROT_CONFIG0_REGION19_Pos)

Bit mask of REGION19 field.

Definition at line 217 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION19_Pos

#define BPROT_CONFIG0_REGION19_Pos   (19UL)

Position of REGION19 field.

Definition at line 216 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION1_Disabled

#define BPROT_CONFIG0_REGION1_Disabled   (0UL)

Protection disabled

Definition at line 326 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION1_Enabled

#define BPROT_CONFIG0_REGION1_Enabled   (1UL)

Protection enable

Definition at line 327 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION1_Msk

#define BPROT_CONFIG0_REGION1_Msk   (0x1UL << BPROT_CONFIG0_REGION1_Pos)

Bit mask of REGION1 field.

Definition at line 325 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION1_Pos

#define BPROT_CONFIG0_REGION1_Pos   (1UL)

Position of REGION1 field.

Definition at line 324 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION20_Disabled

#define BPROT_CONFIG0_REGION20_Disabled   (0UL)

Protection disabled

Definition at line 212 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION20_Enabled

#define BPROT_CONFIG0_REGION20_Enabled   (1UL)

Protection enable

Definition at line 213 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION20_Msk

#define BPROT_CONFIG0_REGION20_Msk   (0x1UL << BPROT_CONFIG0_REGION20_Pos)

Bit mask of REGION20 field.

Definition at line 211 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION20_Pos

#define BPROT_CONFIG0_REGION20_Pos   (20UL)

Position of REGION20 field.

Definition at line 210 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION21_Disabled

#define BPROT_CONFIG0_REGION21_Disabled   (0UL)

Protection disabled

Definition at line 206 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION21_Enabled

#define BPROT_CONFIG0_REGION21_Enabled   (1UL)

Protection enable

Definition at line 207 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION21_Msk

#define BPROT_CONFIG0_REGION21_Msk   (0x1UL << BPROT_CONFIG0_REGION21_Pos)

Bit mask of REGION21 field.

Definition at line 205 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION21_Pos

#define BPROT_CONFIG0_REGION21_Pos   (21UL)

Position of REGION21 field.

Definition at line 204 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION22_Disabled

#define BPROT_CONFIG0_REGION22_Disabled   (0UL)

Protection disabled

Definition at line 200 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION22_Enabled

#define BPROT_CONFIG0_REGION22_Enabled   (1UL)

Protection enable

Definition at line 201 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION22_Msk

#define BPROT_CONFIG0_REGION22_Msk   (0x1UL << BPROT_CONFIG0_REGION22_Pos)

Bit mask of REGION22 field.

Definition at line 199 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION22_Pos

#define BPROT_CONFIG0_REGION22_Pos   (22UL)

Position of REGION22 field.

Definition at line 198 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION23_Disabled

#define BPROT_CONFIG0_REGION23_Disabled   (0UL)

Protection disabled

Definition at line 194 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION23_Enabled

#define BPROT_CONFIG0_REGION23_Enabled   (1UL)

Protection enable

Definition at line 195 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION23_Msk

#define BPROT_CONFIG0_REGION23_Msk   (0x1UL << BPROT_CONFIG0_REGION23_Pos)

Bit mask of REGION23 field.

Definition at line 193 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION23_Pos

#define BPROT_CONFIG0_REGION23_Pos   (23UL)

Position of REGION23 field.

Definition at line 192 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION24_Disabled

#define BPROT_CONFIG0_REGION24_Disabled   (0UL)

Protection disabled

Definition at line 188 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION24_Enabled

#define BPROT_CONFIG0_REGION24_Enabled   (1UL)

Protection enable

Definition at line 189 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION24_Msk

#define BPROT_CONFIG0_REGION24_Msk   (0x1UL << BPROT_CONFIG0_REGION24_Pos)

Bit mask of REGION24 field.

Definition at line 187 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION24_Pos

#define BPROT_CONFIG0_REGION24_Pos   (24UL)

Position of REGION24 field.

Definition at line 186 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION25_Disabled

#define BPROT_CONFIG0_REGION25_Disabled   (0UL)

Protection disabled

Definition at line 182 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION25_Enabled

#define BPROT_CONFIG0_REGION25_Enabled   (1UL)

Protection enable

Definition at line 183 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION25_Msk

#define BPROT_CONFIG0_REGION25_Msk   (0x1UL << BPROT_CONFIG0_REGION25_Pos)

Bit mask of REGION25 field.

Definition at line 181 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION25_Pos

#define BPROT_CONFIG0_REGION25_Pos   (25UL)

Position of REGION25 field.

Definition at line 180 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION26_Disabled

#define BPROT_CONFIG0_REGION26_Disabled   (0UL)

Protection disabled

Definition at line 176 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION26_Enabled

#define BPROT_CONFIG0_REGION26_Enabled   (1UL)

Protection enable

Definition at line 177 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION26_Msk

#define BPROT_CONFIG0_REGION26_Msk   (0x1UL << BPROT_CONFIG0_REGION26_Pos)

Bit mask of REGION26 field.

Definition at line 175 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION26_Pos

#define BPROT_CONFIG0_REGION26_Pos   (26UL)

Position of REGION26 field.

Definition at line 174 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION27_Disabled

#define BPROT_CONFIG0_REGION27_Disabled   (0UL)

Protection disabled

Definition at line 170 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION27_Enabled

#define BPROT_CONFIG0_REGION27_Enabled   (1UL)

Protection enable

Definition at line 171 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION27_Msk

#define BPROT_CONFIG0_REGION27_Msk   (0x1UL << BPROT_CONFIG0_REGION27_Pos)

Bit mask of REGION27 field.

Definition at line 169 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION27_Pos

#define BPROT_CONFIG0_REGION27_Pos   (27UL)

Position of REGION27 field.

Definition at line 168 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION28_Disabled

#define BPROT_CONFIG0_REGION28_Disabled   (0UL)

Protection disabled

Definition at line 164 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION28_Enabled

#define BPROT_CONFIG0_REGION28_Enabled   (1UL)

Protection enable

Definition at line 165 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION28_Msk

#define BPROT_CONFIG0_REGION28_Msk   (0x1UL << BPROT_CONFIG0_REGION28_Pos)

Bit mask of REGION28 field.

Definition at line 163 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION28_Pos

#define BPROT_CONFIG0_REGION28_Pos   (28UL)

Position of REGION28 field.

Definition at line 162 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION29_Disabled

#define BPROT_CONFIG0_REGION29_Disabled   (0UL)

Protection disabled

Definition at line 158 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION29_Enabled

#define BPROT_CONFIG0_REGION29_Enabled   (1UL)

Protection enable

Definition at line 159 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION29_Msk

#define BPROT_CONFIG0_REGION29_Msk   (0x1UL << BPROT_CONFIG0_REGION29_Pos)

Bit mask of REGION29 field.

Definition at line 157 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION29_Pos

#define BPROT_CONFIG0_REGION29_Pos   (29UL)

Position of REGION29 field.

Definition at line 156 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION2_Disabled

#define BPROT_CONFIG0_REGION2_Disabled   (0UL)

Protection disabled

Definition at line 320 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION2_Enabled

#define BPROT_CONFIG0_REGION2_Enabled   (1UL)

Protection enable

Definition at line 321 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION2_Msk

#define BPROT_CONFIG0_REGION2_Msk   (0x1UL << BPROT_CONFIG0_REGION2_Pos)

Bit mask of REGION2 field.

Definition at line 319 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION2_Pos

#define BPROT_CONFIG0_REGION2_Pos   (2UL)

Position of REGION2 field.

Definition at line 318 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION30_Disabled

#define BPROT_CONFIG0_REGION30_Disabled   (0UL)

Protection disabled

Definition at line 152 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION30_Enabled

#define BPROT_CONFIG0_REGION30_Enabled   (1UL)

Protection enable

Definition at line 153 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION30_Msk

#define BPROT_CONFIG0_REGION30_Msk   (0x1UL << BPROT_CONFIG0_REGION30_Pos)

Bit mask of REGION30 field.

Definition at line 151 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION30_Pos

#define BPROT_CONFIG0_REGION30_Pos   (30UL)

Position of REGION30 field.

Definition at line 150 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION31_Disabled

#define BPROT_CONFIG0_REGION31_Disabled   (0UL)

Protection disabled

Definition at line 146 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION31_Enabled

#define BPROT_CONFIG0_REGION31_Enabled   (1UL)

Protection enable

Definition at line 147 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION31_Msk

#define BPROT_CONFIG0_REGION31_Msk   (0x1UL << BPROT_CONFIG0_REGION31_Pos)

Bit mask of REGION31 field.

Definition at line 145 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION31_Pos

#define BPROT_CONFIG0_REGION31_Pos   (31UL)

Position of REGION31 field.

Definition at line 144 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION3_Disabled

#define BPROT_CONFIG0_REGION3_Disabled   (0UL)

Protection disabled

Definition at line 314 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION3_Enabled

#define BPROT_CONFIG0_REGION3_Enabled   (1UL)

Protection enable

Definition at line 315 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION3_Msk

#define BPROT_CONFIG0_REGION3_Msk   (0x1UL << BPROT_CONFIG0_REGION3_Pos)

Bit mask of REGION3 field.

Definition at line 313 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION3_Pos

#define BPROT_CONFIG0_REGION3_Pos   (3UL)

Position of REGION3 field.

Definition at line 312 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION4_Disabled

#define BPROT_CONFIG0_REGION4_Disabled   (0UL)

Protection disabled

Definition at line 308 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION4_Enabled

#define BPROT_CONFIG0_REGION4_Enabled   (1UL)

Protection enable

Definition at line 309 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION4_Msk

#define BPROT_CONFIG0_REGION4_Msk   (0x1UL << BPROT_CONFIG0_REGION4_Pos)

Bit mask of REGION4 field.

Definition at line 307 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION4_Pos

#define BPROT_CONFIG0_REGION4_Pos   (4UL)

Position of REGION4 field.

Definition at line 306 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION5_Disabled

#define BPROT_CONFIG0_REGION5_Disabled   (0UL)

Protection disabled

Definition at line 302 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION5_Enabled

#define BPROT_CONFIG0_REGION5_Enabled   (1UL)

Protection enable

Definition at line 303 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION5_Msk

#define BPROT_CONFIG0_REGION5_Msk   (0x1UL << BPROT_CONFIG0_REGION5_Pos)

Bit mask of REGION5 field.

Definition at line 301 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION5_Pos

#define BPROT_CONFIG0_REGION5_Pos   (5UL)

Position of REGION5 field.

Definition at line 300 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION6_Disabled

#define BPROT_CONFIG0_REGION6_Disabled   (0UL)

Protection disabled

Definition at line 296 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION6_Enabled

#define BPROT_CONFIG0_REGION6_Enabled   (1UL)

Protection enable

Definition at line 297 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION6_Msk

#define BPROT_CONFIG0_REGION6_Msk   (0x1UL << BPROT_CONFIG0_REGION6_Pos)

Bit mask of REGION6 field.

Definition at line 295 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION6_Pos

#define BPROT_CONFIG0_REGION6_Pos   (6UL)

Position of REGION6 field.

Definition at line 294 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION7_Disabled

#define BPROT_CONFIG0_REGION7_Disabled   (0UL)

Protection disabled

Definition at line 290 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION7_Enabled

#define BPROT_CONFIG0_REGION7_Enabled   (1UL)

Protection enable

Definition at line 291 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION7_Msk

#define BPROT_CONFIG0_REGION7_Msk   (0x1UL << BPROT_CONFIG0_REGION7_Pos)

Bit mask of REGION7 field.

Definition at line 289 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION7_Pos

#define BPROT_CONFIG0_REGION7_Pos   (7UL)

Position of REGION7 field.

Definition at line 288 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION8_Disabled

#define BPROT_CONFIG0_REGION8_Disabled   (0UL)

Protection disabled

Definition at line 284 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION8_Enabled

#define BPROT_CONFIG0_REGION8_Enabled   (1UL)

Protection enable

Definition at line 285 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION8_Msk

#define BPROT_CONFIG0_REGION8_Msk   (0x1UL << BPROT_CONFIG0_REGION8_Pos)

Bit mask of REGION8 field.

Definition at line 283 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION8_Pos

#define BPROT_CONFIG0_REGION8_Pos   (8UL)

Position of REGION8 field.

Definition at line 282 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION9_Disabled

#define BPROT_CONFIG0_REGION9_Disabled   (0UL)

Protection disabled

Definition at line 278 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION9_Enabled

#define BPROT_CONFIG0_REGION9_Enabled   (1UL)

Protection enable

Definition at line 279 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION9_Msk

#define BPROT_CONFIG0_REGION9_Msk   (0x1UL << BPROT_CONFIG0_REGION9_Pos)

Bit mask of REGION9 field.

Definition at line 277 of file nrf52_bitfields.h.

◆ BPROT_CONFIG0_REGION9_Pos

#define BPROT_CONFIG0_REGION9_Pos   (9UL)

Position of REGION9 field.

Definition at line 276 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION32_Disabled

#define BPROT_CONFIG1_REGION32_Disabled   (0UL)

Protection disabled

Definition at line 527 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION32_Enabled

#define BPROT_CONFIG1_REGION32_Enabled   (1UL)

Protection enabled

Definition at line 528 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION32_Msk

#define BPROT_CONFIG1_REGION32_Msk   (0x1UL << BPROT_CONFIG1_REGION32_Pos)

Bit mask of REGION32 field.

Definition at line 526 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION32_Pos

#define BPROT_CONFIG1_REGION32_Pos   (0UL)

Position of REGION32 field.

Definition at line 525 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION33_Disabled

#define BPROT_CONFIG1_REGION33_Disabled   (0UL)

Protection disabled

Definition at line 521 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION33_Enabled

#define BPROT_CONFIG1_REGION33_Enabled   (1UL)

Protection enabled

Definition at line 522 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION33_Msk

#define BPROT_CONFIG1_REGION33_Msk   (0x1UL << BPROT_CONFIG1_REGION33_Pos)

Bit mask of REGION33 field.

Definition at line 520 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION33_Pos

#define BPROT_CONFIG1_REGION33_Pos   (1UL)

Position of REGION33 field.

Definition at line 519 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION34_Disabled

#define BPROT_CONFIG1_REGION34_Disabled   (0UL)

Protection disabled

Definition at line 515 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION34_Enabled

#define BPROT_CONFIG1_REGION34_Enabled   (1UL)

Protection enabled

Definition at line 516 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION34_Msk

#define BPROT_CONFIG1_REGION34_Msk   (0x1UL << BPROT_CONFIG1_REGION34_Pos)

Bit mask of REGION34 field.

Definition at line 514 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION34_Pos

#define BPROT_CONFIG1_REGION34_Pos   (2UL)

Position of REGION34 field.

Definition at line 513 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION35_Disabled

#define BPROT_CONFIG1_REGION35_Disabled   (0UL)

Protection disabled

Definition at line 509 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION35_Enabled

#define BPROT_CONFIG1_REGION35_Enabled   (1UL)

Protection enabled

Definition at line 510 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION35_Msk

#define BPROT_CONFIG1_REGION35_Msk   (0x1UL << BPROT_CONFIG1_REGION35_Pos)

Bit mask of REGION35 field.

Definition at line 508 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION35_Pos

#define BPROT_CONFIG1_REGION35_Pos   (3UL)

Position of REGION35 field.

Definition at line 507 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION36_Disabled

#define BPROT_CONFIG1_REGION36_Disabled   (0UL)

Protection disabled

Definition at line 503 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION36_Enabled

#define BPROT_CONFIG1_REGION36_Enabled   (1UL)

Protection enabled

Definition at line 504 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION36_Msk

#define BPROT_CONFIG1_REGION36_Msk   (0x1UL << BPROT_CONFIG1_REGION36_Pos)

Bit mask of REGION36 field.

Definition at line 502 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION36_Pos

#define BPROT_CONFIG1_REGION36_Pos   (4UL)

Position of REGION36 field.

Definition at line 501 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION37_Disabled

#define BPROT_CONFIG1_REGION37_Disabled   (0UL)

Protection disabled

Definition at line 497 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION37_Enabled

#define BPROT_CONFIG1_REGION37_Enabled   (1UL)

Protection enabled

Definition at line 498 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION37_Msk

#define BPROT_CONFIG1_REGION37_Msk   (0x1UL << BPROT_CONFIG1_REGION37_Pos)

Bit mask of REGION37 field.

Definition at line 496 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION37_Pos

#define BPROT_CONFIG1_REGION37_Pos   (5UL)

Position of REGION37 field.

Definition at line 495 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION38_Disabled

#define BPROT_CONFIG1_REGION38_Disabled   (0UL)

Protection disabled

Definition at line 491 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION38_Enabled

#define BPROT_CONFIG1_REGION38_Enabled   (1UL)

Protection enabled

Definition at line 492 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION38_Msk

#define BPROT_CONFIG1_REGION38_Msk   (0x1UL << BPROT_CONFIG1_REGION38_Pos)

Bit mask of REGION38 field.

Definition at line 490 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION38_Pos

#define BPROT_CONFIG1_REGION38_Pos   (6UL)

Position of REGION38 field.

Definition at line 489 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION39_Disabled

#define BPROT_CONFIG1_REGION39_Disabled   (0UL)

Protection disabled

Definition at line 485 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION39_Enabled

#define BPROT_CONFIG1_REGION39_Enabled   (1UL)

Protection enabled

Definition at line 486 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION39_Msk

#define BPROT_CONFIG1_REGION39_Msk   (0x1UL << BPROT_CONFIG1_REGION39_Pos)

Bit mask of REGION39 field.

Definition at line 484 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION39_Pos

#define BPROT_CONFIG1_REGION39_Pos   (7UL)

Position of REGION39 field.

Definition at line 483 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION40_Disabled

#define BPROT_CONFIG1_REGION40_Disabled   (0UL)

Protection disabled

Definition at line 479 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION40_Enabled

#define BPROT_CONFIG1_REGION40_Enabled   (1UL)

Protection enabled

Definition at line 480 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION40_Msk

#define BPROT_CONFIG1_REGION40_Msk   (0x1UL << BPROT_CONFIG1_REGION40_Pos)

Bit mask of REGION40 field.

Definition at line 478 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION40_Pos

#define BPROT_CONFIG1_REGION40_Pos   (8UL)

Position of REGION40 field.

Definition at line 477 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION41_Disabled

#define BPROT_CONFIG1_REGION41_Disabled   (0UL)

Protection disabled

Definition at line 473 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION41_Enabled

#define BPROT_CONFIG1_REGION41_Enabled   (1UL)

Protection enabled

Definition at line 474 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION41_Msk

#define BPROT_CONFIG1_REGION41_Msk   (0x1UL << BPROT_CONFIG1_REGION41_Pos)

Bit mask of REGION41 field.

Definition at line 472 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION41_Pos

#define BPROT_CONFIG1_REGION41_Pos   (9UL)

Position of REGION41 field.

Definition at line 471 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION42_Disabled

#define BPROT_CONFIG1_REGION42_Disabled   (0UL)

Protection disabled

Definition at line 467 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION42_Enabled

#define BPROT_CONFIG1_REGION42_Enabled   (1UL)

Protection enabled

Definition at line 468 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION42_Msk

#define BPROT_CONFIG1_REGION42_Msk   (0x1UL << BPROT_CONFIG1_REGION42_Pos)

Bit mask of REGION42 field.

Definition at line 466 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION42_Pos

#define BPROT_CONFIG1_REGION42_Pos   (10UL)

Position of REGION42 field.

Definition at line 465 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION43_Disabled

#define BPROT_CONFIG1_REGION43_Disabled   (0UL)

Protection disabled

Definition at line 461 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION43_Enabled

#define BPROT_CONFIG1_REGION43_Enabled   (1UL)

Protection enabled

Definition at line 462 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION43_Msk

#define BPROT_CONFIG1_REGION43_Msk   (0x1UL << BPROT_CONFIG1_REGION43_Pos)

Bit mask of REGION43 field.

Definition at line 460 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION43_Pos

#define BPROT_CONFIG1_REGION43_Pos   (11UL)

Position of REGION43 field.

Definition at line 459 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION44_Disabled

#define BPROT_CONFIG1_REGION44_Disabled   (0UL)

Protection disabled

Definition at line 455 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION44_Enabled

#define BPROT_CONFIG1_REGION44_Enabled   (1UL)

Protection enabled

Definition at line 456 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION44_Msk

#define BPROT_CONFIG1_REGION44_Msk   (0x1UL << BPROT_CONFIG1_REGION44_Pos)

Bit mask of REGION44 field.

Definition at line 454 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION44_Pos

#define BPROT_CONFIG1_REGION44_Pos   (12UL)

Position of REGION44 field.

Definition at line 453 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION45_Disabled

#define BPROT_CONFIG1_REGION45_Disabled   (0UL)

Protection disabled

Definition at line 449 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION45_Enabled

#define BPROT_CONFIG1_REGION45_Enabled   (1UL)

Protection enabled

Definition at line 450 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION45_Msk

#define BPROT_CONFIG1_REGION45_Msk   (0x1UL << BPROT_CONFIG1_REGION45_Pos)

Bit mask of REGION45 field.

Definition at line 448 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION45_Pos

#define BPROT_CONFIG1_REGION45_Pos   (13UL)

Position of REGION45 field.

Definition at line 447 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION46_Disabled

#define BPROT_CONFIG1_REGION46_Disabled   (0UL)

Protection disabled

Definition at line 443 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION46_Enabled

#define BPROT_CONFIG1_REGION46_Enabled   (1UL)

Protection enabled

Definition at line 444 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION46_Msk

#define BPROT_CONFIG1_REGION46_Msk   (0x1UL << BPROT_CONFIG1_REGION46_Pos)

Bit mask of REGION46 field.

Definition at line 442 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION46_Pos

#define BPROT_CONFIG1_REGION46_Pos   (14UL)

Position of REGION46 field.

Definition at line 441 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION47_Disabled

#define BPROT_CONFIG1_REGION47_Disabled   (0UL)

Protection disabled

Definition at line 437 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION47_Enabled

#define BPROT_CONFIG1_REGION47_Enabled   (1UL)

Protection enabled

Definition at line 438 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION47_Msk

#define BPROT_CONFIG1_REGION47_Msk   (0x1UL << BPROT_CONFIG1_REGION47_Pos)

Bit mask of REGION47 field.

Definition at line 436 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION47_Pos

#define BPROT_CONFIG1_REGION47_Pos   (15UL)

Position of REGION47 field.

Definition at line 435 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION48_Disabled

#define BPROT_CONFIG1_REGION48_Disabled   (0UL)

Protection disabled

Definition at line 431 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION48_Enabled

#define BPROT_CONFIG1_REGION48_Enabled   (1UL)

Protection enabled

Definition at line 432 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION48_Msk

#define BPROT_CONFIG1_REGION48_Msk   (0x1UL << BPROT_CONFIG1_REGION48_Pos)

Bit mask of REGION48 field.

Definition at line 430 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION48_Pos

#define BPROT_CONFIG1_REGION48_Pos   (16UL)

Position of REGION48 field.

Definition at line 429 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION49_Disabled

#define BPROT_CONFIG1_REGION49_Disabled   (0UL)

Protection disabled

Definition at line 425 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION49_Enabled

#define BPROT_CONFIG1_REGION49_Enabled   (1UL)

Protection enabled

Definition at line 426 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION49_Msk

#define BPROT_CONFIG1_REGION49_Msk   (0x1UL << BPROT_CONFIG1_REGION49_Pos)

Bit mask of REGION49 field.

Definition at line 424 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION49_Pos

#define BPROT_CONFIG1_REGION49_Pos   (17UL)

Position of REGION49 field.

Definition at line 423 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION50_Disabled

#define BPROT_CONFIG1_REGION50_Disabled   (0UL)

Protection disabled

Definition at line 419 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION50_Enabled

#define BPROT_CONFIG1_REGION50_Enabled   (1UL)

Protection enabled

Definition at line 420 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION50_Msk

#define BPROT_CONFIG1_REGION50_Msk   (0x1UL << BPROT_CONFIG1_REGION50_Pos)

Bit mask of REGION50 field.

Definition at line 418 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION50_Pos

#define BPROT_CONFIG1_REGION50_Pos   (18UL)

Position of REGION50 field.

Definition at line 417 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION51_Disabled

#define BPROT_CONFIG1_REGION51_Disabled   (0UL)

Protection disabled

Definition at line 413 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION51_Enabled

#define BPROT_CONFIG1_REGION51_Enabled   (1UL)

Protection enabled

Definition at line 414 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION51_Msk

#define BPROT_CONFIG1_REGION51_Msk   (0x1UL << BPROT_CONFIG1_REGION51_Pos)

Bit mask of REGION51 field.

Definition at line 412 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION51_Pos

#define BPROT_CONFIG1_REGION51_Pos   (19UL)

Position of REGION51 field.

Definition at line 411 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION52_Disabled

#define BPROT_CONFIG1_REGION52_Disabled   (0UL)

Protection disabled

Definition at line 407 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION52_Enabled

#define BPROT_CONFIG1_REGION52_Enabled   (1UL)

Protection enabled

Definition at line 408 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION52_Msk

#define BPROT_CONFIG1_REGION52_Msk   (0x1UL << BPROT_CONFIG1_REGION52_Pos)

Bit mask of REGION52 field.

Definition at line 406 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION52_Pos

#define BPROT_CONFIG1_REGION52_Pos   (20UL)

Position of REGION52 field.

Definition at line 405 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION53_Disabled

#define BPROT_CONFIG1_REGION53_Disabled   (0UL)

Protection disabled

Definition at line 401 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION53_Enabled

#define BPROT_CONFIG1_REGION53_Enabled   (1UL)

Protection enabled

Definition at line 402 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION53_Msk

#define BPROT_CONFIG1_REGION53_Msk   (0x1UL << BPROT_CONFIG1_REGION53_Pos)

Bit mask of REGION53 field.

Definition at line 400 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION53_Pos

#define BPROT_CONFIG1_REGION53_Pos   (21UL)

Position of REGION53 field.

Definition at line 399 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION54_Disabled

#define BPROT_CONFIG1_REGION54_Disabled   (0UL)

Protection disabled

Definition at line 395 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION54_Enabled

#define BPROT_CONFIG1_REGION54_Enabled   (1UL)

Protection enabled

Definition at line 396 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION54_Msk

#define BPROT_CONFIG1_REGION54_Msk   (0x1UL << BPROT_CONFIG1_REGION54_Pos)

Bit mask of REGION54 field.

Definition at line 394 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION54_Pos

#define BPROT_CONFIG1_REGION54_Pos   (22UL)

Position of REGION54 field.

Definition at line 393 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION55_Disabled

#define BPROT_CONFIG1_REGION55_Disabled   (0UL)

Protection disabled

Definition at line 389 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION55_Enabled

#define BPROT_CONFIG1_REGION55_Enabled   (1UL)

Protection enabled

Definition at line 390 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION55_Msk

#define BPROT_CONFIG1_REGION55_Msk   (0x1UL << BPROT_CONFIG1_REGION55_Pos)

Bit mask of REGION55 field.

Definition at line 388 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION55_Pos

#define BPROT_CONFIG1_REGION55_Pos   (23UL)

Position of REGION55 field.

Definition at line 387 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION56_Disabled

#define BPROT_CONFIG1_REGION56_Disabled   (0UL)

Protection disabled

Definition at line 383 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION56_Enabled

#define BPROT_CONFIG1_REGION56_Enabled   (1UL)

Protection enabled

Definition at line 384 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION56_Msk

#define BPROT_CONFIG1_REGION56_Msk   (0x1UL << BPROT_CONFIG1_REGION56_Pos)

Bit mask of REGION56 field.

Definition at line 382 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION56_Pos

#define BPROT_CONFIG1_REGION56_Pos   (24UL)

Position of REGION56 field.

Definition at line 381 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION57_Disabled

#define BPROT_CONFIG1_REGION57_Disabled   (0UL)

Protection disabled

Definition at line 377 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION57_Enabled

#define BPROT_CONFIG1_REGION57_Enabled   (1UL)

Protection enabled

Definition at line 378 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION57_Msk

#define BPROT_CONFIG1_REGION57_Msk   (0x1UL << BPROT_CONFIG1_REGION57_Pos)

Bit mask of REGION57 field.

Definition at line 376 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION57_Pos

#define BPROT_CONFIG1_REGION57_Pos   (25UL)

Position of REGION57 field.

Definition at line 375 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION58_Disabled

#define BPROT_CONFIG1_REGION58_Disabled   (0UL)

Protection disabled

Definition at line 371 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION58_Enabled

#define BPROT_CONFIG1_REGION58_Enabled   (1UL)

Protection enabled

Definition at line 372 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION58_Msk

#define BPROT_CONFIG1_REGION58_Msk   (0x1UL << BPROT_CONFIG1_REGION58_Pos)

Bit mask of REGION58 field.

Definition at line 370 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION58_Pos

#define BPROT_CONFIG1_REGION58_Pos   (26UL)

Position of REGION58 field.

Definition at line 369 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION59_Disabled

#define BPROT_CONFIG1_REGION59_Disabled   (0UL)

Protection disabled

Definition at line 365 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION59_Enabled

#define BPROT_CONFIG1_REGION59_Enabled   (1UL)

Protection enabled

Definition at line 366 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION59_Msk

#define BPROT_CONFIG1_REGION59_Msk   (0x1UL << BPROT_CONFIG1_REGION59_Pos)

Bit mask of REGION59 field.

Definition at line 364 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION59_Pos

#define BPROT_CONFIG1_REGION59_Pos   (27UL)

Position of REGION59 field.

Definition at line 363 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION60_Disabled

#define BPROT_CONFIG1_REGION60_Disabled   (0UL)

Protection disabled

Definition at line 359 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION60_Enabled

#define BPROT_CONFIG1_REGION60_Enabled   (1UL)

Protection enabled

Definition at line 360 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION60_Msk

#define BPROT_CONFIG1_REGION60_Msk   (0x1UL << BPROT_CONFIG1_REGION60_Pos)

Bit mask of REGION60 field.

Definition at line 358 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION60_Pos

#define BPROT_CONFIG1_REGION60_Pos   (28UL)

Position of REGION60 field.

Definition at line 357 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION61_Disabled

#define BPROT_CONFIG1_REGION61_Disabled   (0UL)

Protection disabled

Definition at line 353 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION61_Enabled

#define BPROT_CONFIG1_REGION61_Enabled   (1UL)

Protection enabled

Definition at line 354 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION61_Msk

#define BPROT_CONFIG1_REGION61_Msk   (0x1UL << BPROT_CONFIG1_REGION61_Pos)

Bit mask of REGION61 field.

Definition at line 352 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION61_Pos

#define BPROT_CONFIG1_REGION61_Pos   (29UL)

Position of REGION61 field.

Definition at line 351 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION62_Disabled

#define BPROT_CONFIG1_REGION62_Disabled   (0UL)

Protection disabled

Definition at line 347 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION62_Enabled

#define BPROT_CONFIG1_REGION62_Enabled   (1UL)

Protection enabled

Definition at line 348 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION62_Msk

#define BPROT_CONFIG1_REGION62_Msk   (0x1UL << BPROT_CONFIG1_REGION62_Pos)

Bit mask of REGION62 field.

Definition at line 346 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION62_Pos

#define BPROT_CONFIG1_REGION62_Pos   (30UL)

Position of REGION62 field.

Definition at line 345 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION63_Disabled

#define BPROT_CONFIG1_REGION63_Disabled   (0UL)

Protection disabled

Definition at line 341 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION63_Enabled

#define BPROT_CONFIG1_REGION63_Enabled   (1UL)

Protection enabled

Definition at line 342 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION63_Msk

#define BPROT_CONFIG1_REGION63_Msk   (0x1UL << BPROT_CONFIG1_REGION63_Pos)

Bit mask of REGION63 field.

Definition at line 340 of file nrf52_bitfields.h.

◆ BPROT_CONFIG1_REGION63_Pos

#define BPROT_CONFIG1_REGION63_Pos   (31UL)

Position of REGION63 field.

Definition at line 339 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION64_Disabled

#define BPROT_CONFIG2_REGION64_Disabled   (0UL)

Protection disabled

Definition at line 731 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION64_Enabled

#define BPROT_CONFIG2_REGION64_Enabled   (1UL)

Protection enabled

Definition at line 732 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION64_Msk

#define BPROT_CONFIG2_REGION64_Msk   (0x1UL << BPROT_CONFIG2_REGION64_Pos)

Bit mask of REGION64 field.

Definition at line 730 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION64_Pos

#define BPROT_CONFIG2_REGION64_Pos   (0UL)

Position of REGION64 field.

Definition at line 729 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION65_Disabled

#define BPROT_CONFIG2_REGION65_Disabled   (0UL)

Protection disabled

Definition at line 725 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION65_Enabled

#define BPROT_CONFIG2_REGION65_Enabled   (1UL)

Protection enabled

Definition at line 726 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION65_Msk

#define BPROT_CONFIG2_REGION65_Msk   (0x1UL << BPROT_CONFIG2_REGION65_Pos)

Bit mask of REGION65 field.

Definition at line 724 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION65_Pos

#define BPROT_CONFIG2_REGION65_Pos   (1UL)

Position of REGION65 field.

Definition at line 723 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION66_Disabled

#define BPROT_CONFIG2_REGION66_Disabled   (0UL)

Protection disabled

Definition at line 719 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION66_Enabled

#define BPROT_CONFIG2_REGION66_Enabled   (1UL)

Protection enabled

Definition at line 720 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION66_Msk

#define BPROT_CONFIG2_REGION66_Msk   (0x1UL << BPROT_CONFIG2_REGION66_Pos)

Bit mask of REGION66 field.

Definition at line 718 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION66_Pos

#define BPROT_CONFIG2_REGION66_Pos   (2UL)

Position of REGION66 field.

Definition at line 717 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION67_Disabled

#define BPROT_CONFIG2_REGION67_Disabled   (0UL)

Protection disabled

Definition at line 713 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION67_Enabled

#define BPROT_CONFIG2_REGION67_Enabled   (1UL)

Protection enabled

Definition at line 714 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION67_Msk

#define BPROT_CONFIG2_REGION67_Msk   (0x1UL << BPROT_CONFIG2_REGION67_Pos)

Bit mask of REGION67 field.

Definition at line 712 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION67_Pos

#define BPROT_CONFIG2_REGION67_Pos   (3UL)

Position of REGION67 field.

Definition at line 711 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION68_Disabled

#define BPROT_CONFIG2_REGION68_Disabled   (0UL)

Protection disabled

Definition at line 707 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION68_Enabled

#define BPROT_CONFIG2_REGION68_Enabled   (1UL)

Protection enabled

Definition at line 708 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION68_Msk

#define BPROT_CONFIG2_REGION68_Msk   (0x1UL << BPROT_CONFIG2_REGION68_Pos)

Bit mask of REGION68 field.

Definition at line 706 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION68_Pos

#define BPROT_CONFIG2_REGION68_Pos   (4UL)

Position of REGION68 field.

Definition at line 705 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION69_Disabled

#define BPROT_CONFIG2_REGION69_Disabled   (0UL)

Protection disabled

Definition at line 701 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION69_Enabled

#define BPROT_CONFIG2_REGION69_Enabled   (1UL)

Protection enabled

Definition at line 702 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION69_Msk

#define BPROT_CONFIG2_REGION69_Msk   (0x1UL << BPROT_CONFIG2_REGION69_Pos)

Bit mask of REGION69 field.

Definition at line 700 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION69_Pos

#define BPROT_CONFIG2_REGION69_Pos   (5UL)

Position of REGION69 field.

Definition at line 699 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION70_Disabled

#define BPROT_CONFIG2_REGION70_Disabled   (0UL)

Protection disabled

Definition at line 695 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION70_Enabled

#define BPROT_CONFIG2_REGION70_Enabled   (1UL)

Protection enabled

Definition at line 696 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION70_Msk

#define BPROT_CONFIG2_REGION70_Msk   (0x1UL << BPROT_CONFIG2_REGION70_Pos)

Bit mask of REGION70 field.

Definition at line 694 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION70_Pos

#define BPROT_CONFIG2_REGION70_Pos   (6UL)

Position of REGION70 field.

Definition at line 693 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION71_Disabled

#define BPROT_CONFIG2_REGION71_Disabled   (0UL)

Protection disabled

Definition at line 689 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION71_Enabled

#define BPROT_CONFIG2_REGION71_Enabled   (1UL)

Protection enabled

Definition at line 690 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION71_Msk

#define BPROT_CONFIG2_REGION71_Msk   (0x1UL << BPROT_CONFIG2_REGION71_Pos)

Bit mask of REGION71 field.

Definition at line 688 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION71_Pos

#define BPROT_CONFIG2_REGION71_Pos   (7UL)

Position of REGION71 field.

Definition at line 687 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION72_Disabled

#define BPROT_CONFIG2_REGION72_Disabled   (0UL)

Protection disabled

Definition at line 683 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION72_Enabled

#define BPROT_CONFIG2_REGION72_Enabled   (1UL)

Protection enabled

Definition at line 684 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION72_Msk

#define BPROT_CONFIG2_REGION72_Msk   (0x1UL << BPROT_CONFIG2_REGION72_Pos)

Bit mask of REGION72 field.

Definition at line 682 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION72_Pos

#define BPROT_CONFIG2_REGION72_Pos   (8UL)

Position of REGION72 field.

Definition at line 681 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION73_Disabled

#define BPROT_CONFIG2_REGION73_Disabled   (0UL)

Protection disabled

Definition at line 677 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION73_Enabled

#define BPROT_CONFIG2_REGION73_Enabled   (1UL)

Protection enabled

Definition at line 678 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION73_Msk

#define BPROT_CONFIG2_REGION73_Msk   (0x1UL << BPROT_CONFIG2_REGION73_Pos)

Bit mask of REGION73 field.

Definition at line 676 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION73_Pos

#define BPROT_CONFIG2_REGION73_Pos   (9UL)

Position of REGION73 field.

Definition at line 675 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION74_Disabled

#define BPROT_CONFIG2_REGION74_Disabled   (0UL)

Protection disabled

Definition at line 671 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION74_Enabled

#define BPROT_CONFIG2_REGION74_Enabled   (1UL)

Protection enabled

Definition at line 672 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION74_Msk

#define BPROT_CONFIG2_REGION74_Msk   (0x1UL << BPROT_CONFIG2_REGION74_Pos)

Bit mask of REGION74 field.

Definition at line 670 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION74_Pos

#define BPROT_CONFIG2_REGION74_Pos   (10UL)

Position of REGION74 field.

Definition at line 669 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION75_Disabled

#define BPROT_CONFIG2_REGION75_Disabled   (0UL)

Protection disabled

Definition at line 665 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION75_Enabled

#define BPROT_CONFIG2_REGION75_Enabled   (1UL)

Protection enabled

Definition at line 666 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION75_Msk

#define BPROT_CONFIG2_REGION75_Msk   (0x1UL << BPROT_CONFIG2_REGION75_Pos)

Bit mask of REGION75 field.

Definition at line 664 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION75_Pos

#define BPROT_CONFIG2_REGION75_Pos   (11UL)

Position of REGION75 field.

Definition at line 663 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION76_Disabled

#define BPROT_CONFIG2_REGION76_Disabled   (0UL)

Protection disabled

Definition at line 659 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION76_Enabled

#define BPROT_CONFIG2_REGION76_Enabled   (1UL)

Protection enabled

Definition at line 660 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION76_Msk

#define BPROT_CONFIG2_REGION76_Msk   (0x1UL << BPROT_CONFIG2_REGION76_Pos)

Bit mask of REGION76 field.

Definition at line 658 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION76_Pos

#define BPROT_CONFIG2_REGION76_Pos   (12UL)

Position of REGION76 field.

Definition at line 657 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION77_Disabled

#define BPROT_CONFIG2_REGION77_Disabled   (0UL)

Protection disabled

Definition at line 653 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION77_Enabled

#define BPROT_CONFIG2_REGION77_Enabled   (1UL)

Protection enabled

Definition at line 654 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION77_Msk

#define BPROT_CONFIG2_REGION77_Msk   (0x1UL << BPROT_CONFIG2_REGION77_Pos)

Bit mask of REGION77 field.

Definition at line 652 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION77_Pos

#define BPROT_CONFIG2_REGION77_Pos   (13UL)

Position of REGION77 field.

Definition at line 651 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION78_Disabled

#define BPROT_CONFIG2_REGION78_Disabled   (0UL)

Protection disabled

Definition at line 647 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION78_Enabled

#define BPROT_CONFIG2_REGION78_Enabled   (1UL)

Protection enabled

Definition at line 648 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION78_Msk

#define BPROT_CONFIG2_REGION78_Msk   (0x1UL << BPROT_CONFIG2_REGION78_Pos)

Bit mask of REGION78 field.

Definition at line 646 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION78_Pos

#define BPROT_CONFIG2_REGION78_Pos   (14UL)

Position of REGION78 field.

Definition at line 645 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION79_Disabled

#define BPROT_CONFIG2_REGION79_Disabled   (0UL)

Protection disabled

Definition at line 641 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION79_Enabled

#define BPROT_CONFIG2_REGION79_Enabled   (1UL)

Protection enabled

Definition at line 642 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION79_Msk

#define BPROT_CONFIG2_REGION79_Msk   (0x1UL << BPROT_CONFIG2_REGION79_Pos)

Bit mask of REGION79 field.

Definition at line 640 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION79_Pos

#define BPROT_CONFIG2_REGION79_Pos   (15UL)

Position of REGION79 field.

Definition at line 639 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION80_Disabled

#define BPROT_CONFIG2_REGION80_Disabled   (0UL)

Protection disabled

Definition at line 635 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION80_Enabled

#define BPROT_CONFIG2_REGION80_Enabled   (1UL)

Protection enabled

Definition at line 636 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION80_Msk

#define BPROT_CONFIG2_REGION80_Msk   (0x1UL << BPROT_CONFIG2_REGION80_Pos)

Bit mask of REGION80 field.

Definition at line 634 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION80_Pos

#define BPROT_CONFIG2_REGION80_Pos   (16UL)

Position of REGION80 field.

Definition at line 633 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION81_Disabled

#define BPROT_CONFIG2_REGION81_Disabled   (0UL)

Protection disabled

Definition at line 629 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION81_Enabled

#define BPROT_CONFIG2_REGION81_Enabled   (1UL)

Protection enabled

Definition at line 630 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION81_Msk

#define BPROT_CONFIG2_REGION81_Msk   (0x1UL << BPROT_CONFIG2_REGION81_Pos)

Bit mask of REGION81 field.

Definition at line 628 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION81_Pos

#define BPROT_CONFIG2_REGION81_Pos   (17UL)

Position of REGION81 field.

Definition at line 627 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION82_Disabled

#define BPROT_CONFIG2_REGION82_Disabled   (0UL)

Protection disabled

Definition at line 623 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION82_Enabled

#define BPROT_CONFIG2_REGION82_Enabled   (1UL)

Protection enabled

Definition at line 624 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION82_Msk

#define BPROT_CONFIG2_REGION82_Msk   (0x1UL << BPROT_CONFIG2_REGION82_Pos)

Bit mask of REGION82 field.

Definition at line 622 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION82_Pos

#define BPROT_CONFIG2_REGION82_Pos   (18UL)

Position of REGION82 field.

Definition at line 621 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION83_Disabled

#define BPROT_CONFIG2_REGION83_Disabled   (0UL)

Protection disabled

Definition at line 617 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION83_Enabled

#define BPROT_CONFIG2_REGION83_Enabled   (1UL)

Protection enabled

Definition at line 618 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION83_Msk

#define BPROT_CONFIG2_REGION83_Msk   (0x1UL << BPROT_CONFIG2_REGION83_Pos)

Bit mask of REGION83 field.

Definition at line 616 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION83_Pos

#define BPROT_CONFIG2_REGION83_Pos   (19UL)

Position of REGION83 field.

Definition at line 615 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION84_Disabled

#define BPROT_CONFIG2_REGION84_Disabled   (0UL)

Protection disabled

Definition at line 611 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION84_Enabled

#define BPROT_CONFIG2_REGION84_Enabled   (1UL)

Protection enabled

Definition at line 612 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION84_Msk

#define BPROT_CONFIG2_REGION84_Msk   (0x1UL << BPROT_CONFIG2_REGION84_Pos)

Bit mask of REGION84 field.

Definition at line 610 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION84_Pos

#define BPROT_CONFIG2_REGION84_Pos   (20UL)

Position of REGION84 field.

Definition at line 609 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION85_Disabled

#define BPROT_CONFIG2_REGION85_Disabled   (0UL)

Protection disabled

Definition at line 605 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION85_Enabled

#define BPROT_CONFIG2_REGION85_Enabled   (1UL)

Protection enabled

Definition at line 606 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION85_Msk

#define BPROT_CONFIG2_REGION85_Msk   (0x1UL << BPROT_CONFIG2_REGION85_Pos)

Bit mask of REGION85 field.

Definition at line 604 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION85_Pos

#define BPROT_CONFIG2_REGION85_Pos   (21UL)

Position of REGION85 field.

Definition at line 603 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION86_Disabled

#define BPROT_CONFIG2_REGION86_Disabled   (0UL)

Protection disabled

Definition at line 599 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION86_Enabled

#define BPROT_CONFIG2_REGION86_Enabled   (1UL)

Protection enabled

Definition at line 600 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION86_Msk

#define BPROT_CONFIG2_REGION86_Msk   (0x1UL << BPROT_CONFIG2_REGION86_Pos)

Bit mask of REGION86 field.

Definition at line 598 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION86_Pos

#define BPROT_CONFIG2_REGION86_Pos   (22UL)

Position of REGION86 field.

Definition at line 597 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION87_Disabled

#define BPROT_CONFIG2_REGION87_Disabled   (0UL)

Protection disabled

Definition at line 593 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION87_Enabled

#define BPROT_CONFIG2_REGION87_Enabled   (1UL)

Protection enabled

Definition at line 594 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION87_Msk

#define BPROT_CONFIG2_REGION87_Msk   (0x1UL << BPROT_CONFIG2_REGION87_Pos)

Bit mask of REGION87 field.

Definition at line 592 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION87_Pos

#define BPROT_CONFIG2_REGION87_Pos   (23UL)

Position of REGION87 field.

Definition at line 591 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION88_Disabled

#define BPROT_CONFIG2_REGION88_Disabled   (0UL)

Protection disabled

Definition at line 587 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION88_Enabled

#define BPROT_CONFIG2_REGION88_Enabled   (1UL)

Protection enabled

Definition at line 588 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION88_Msk

#define BPROT_CONFIG2_REGION88_Msk   (0x1UL << BPROT_CONFIG2_REGION88_Pos)

Bit mask of REGION88 field.

Definition at line 586 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION88_Pos

#define BPROT_CONFIG2_REGION88_Pos   (24UL)

Position of REGION88 field.

Definition at line 585 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION89_Disabled

#define BPROT_CONFIG2_REGION89_Disabled   (0UL)

Protection disabled

Definition at line 581 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION89_Enabled

#define BPROT_CONFIG2_REGION89_Enabled   (1UL)

Protection enabled

Definition at line 582 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION89_Msk

#define BPROT_CONFIG2_REGION89_Msk   (0x1UL << BPROT_CONFIG2_REGION89_Pos)

Bit mask of REGION89 field.

Definition at line 580 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION89_Pos

#define BPROT_CONFIG2_REGION89_Pos   (25UL)

Position of REGION89 field.

Definition at line 579 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION90_Disabled

#define BPROT_CONFIG2_REGION90_Disabled   (0UL)

Protection disabled

Definition at line 575 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION90_Enabled

#define BPROT_CONFIG2_REGION90_Enabled   (1UL)

Protection enabled

Definition at line 576 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION90_Msk

#define BPROT_CONFIG2_REGION90_Msk   (0x1UL << BPROT_CONFIG2_REGION90_Pos)

Bit mask of REGION90 field.

Definition at line 574 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION90_Pos

#define BPROT_CONFIG2_REGION90_Pos   (26UL)

Position of REGION90 field.

Definition at line 573 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION91_Disabled

#define BPROT_CONFIG2_REGION91_Disabled   (0UL)

Protection disabled

Definition at line 569 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION91_Enabled

#define BPROT_CONFIG2_REGION91_Enabled   (1UL)

Protection enabled

Definition at line 570 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION91_Msk

#define BPROT_CONFIG2_REGION91_Msk   (0x1UL << BPROT_CONFIG2_REGION91_Pos)

Bit mask of REGION91 field.

Definition at line 568 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION91_Pos

#define BPROT_CONFIG2_REGION91_Pos   (27UL)

Position of REGION91 field.

Definition at line 567 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION92_Disabled

#define BPROT_CONFIG2_REGION92_Disabled   (0UL)

Protection disabled

Definition at line 563 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION92_Enabled

#define BPROT_CONFIG2_REGION92_Enabled   (1UL)

Protection enabled

Definition at line 564 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION92_Msk

#define BPROT_CONFIG2_REGION92_Msk   (0x1UL << BPROT_CONFIG2_REGION92_Pos)

Bit mask of REGION92 field.

Definition at line 562 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION92_Pos

#define BPROT_CONFIG2_REGION92_Pos   (28UL)

Position of REGION92 field.

Definition at line 561 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION93_Disabled

#define BPROT_CONFIG2_REGION93_Disabled   (0UL)

Protection disabled

Definition at line 557 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION93_Enabled

#define BPROT_CONFIG2_REGION93_Enabled   (1UL)

Protection enabled

Definition at line 558 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION93_Msk

#define BPROT_CONFIG2_REGION93_Msk   (0x1UL << BPROT_CONFIG2_REGION93_Pos)

Bit mask of REGION93 field.

Definition at line 556 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION93_Pos

#define BPROT_CONFIG2_REGION93_Pos   (29UL)

Position of REGION93 field.

Definition at line 555 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION94_Disabled

#define BPROT_CONFIG2_REGION94_Disabled   (0UL)

Protection disabled

Definition at line 551 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION94_Enabled

#define BPROT_CONFIG2_REGION94_Enabled   (1UL)

Protection enabled

Definition at line 552 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION94_Msk

#define BPROT_CONFIG2_REGION94_Msk   (0x1UL << BPROT_CONFIG2_REGION94_Pos)

Bit mask of REGION94 field.

Definition at line 550 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION94_Pos

#define BPROT_CONFIG2_REGION94_Pos   (30UL)

Position of REGION94 field.

Definition at line 549 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION95_Disabled

#define BPROT_CONFIG2_REGION95_Disabled   (0UL)

Protection disabled

Definition at line 545 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION95_Enabled

#define BPROT_CONFIG2_REGION95_Enabled   (1UL)

Protection enabled

Definition at line 546 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION95_Msk

#define BPROT_CONFIG2_REGION95_Msk   (0x1UL << BPROT_CONFIG2_REGION95_Pos)

Bit mask of REGION95 field.

Definition at line 544 of file nrf52_bitfields.h.

◆ BPROT_CONFIG2_REGION95_Pos

#define BPROT_CONFIG2_REGION95_Pos   (31UL)

Position of REGION95 field.

Definition at line 543 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION100_Disabled

#define BPROT_CONFIG3_REGION100_Disabled   (0UL)

Protection disabled

Definition at line 902 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION100_Enabled

#define BPROT_CONFIG3_REGION100_Enabled   (1UL)

Protection enabled

Definition at line 903 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION100_Msk

#define BPROT_CONFIG3_REGION100_Msk   (0x1UL << BPROT_CONFIG3_REGION100_Pos)

Bit mask of REGION100 field.

Definition at line 901 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION100_Pos

#define BPROT_CONFIG3_REGION100_Pos   (4UL)

Position of REGION100 field.

Definition at line 900 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION101_Disabled

#define BPROT_CONFIG3_REGION101_Disabled   (0UL)

Protection disabled

Definition at line 896 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION101_Enabled

#define BPROT_CONFIG3_REGION101_Enabled   (1UL)

Protection enabled

Definition at line 897 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION101_Msk

#define BPROT_CONFIG3_REGION101_Msk   (0x1UL << BPROT_CONFIG3_REGION101_Pos)

Bit mask of REGION101 field.

Definition at line 895 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION101_Pos

#define BPROT_CONFIG3_REGION101_Pos   (5UL)

Position of REGION101 field.

Definition at line 894 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION102_Disabled

#define BPROT_CONFIG3_REGION102_Disabled   (0UL)

Protection disabled

Definition at line 890 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION102_Enabled

#define BPROT_CONFIG3_REGION102_Enabled   (1UL)

Protection enabled

Definition at line 891 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION102_Msk

#define BPROT_CONFIG3_REGION102_Msk   (0x1UL << BPROT_CONFIG3_REGION102_Pos)

Bit mask of REGION102 field.

Definition at line 889 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION102_Pos

#define BPROT_CONFIG3_REGION102_Pos   (6UL)

Position of REGION102 field.

Definition at line 888 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION103_Disabled

#define BPROT_CONFIG3_REGION103_Disabled   (0UL)

Protection disabled

Definition at line 884 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION103_Enabled

#define BPROT_CONFIG3_REGION103_Enabled   (1UL)

Protection enabled

Definition at line 885 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION103_Msk

#define BPROT_CONFIG3_REGION103_Msk   (0x1UL << BPROT_CONFIG3_REGION103_Pos)

Bit mask of REGION103 field.

Definition at line 883 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION103_Pos

#define BPROT_CONFIG3_REGION103_Pos   (7UL)

Position of REGION103 field.

Definition at line 882 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION104_Disabled

#define BPROT_CONFIG3_REGION104_Disabled   (0UL)

Protection disabled

Definition at line 878 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION104_Enabled

#define BPROT_CONFIG3_REGION104_Enabled   (1UL)

Protection enabled

Definition at line 879 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION104_Msk

#define BPROT_CONFIG3_REGION104_Msk   (0x1UL << BPROT_CONFIG3_REGION104_Pos)

Bit mask of REGION104 field.

Definition at line 877 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION104_Pos

#define BPROT_CONFIG3_REGION104_Pos   (8UL)

Position of REGION104 field.

Definition at line 876 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION105_Disabled

#define BPROT_CONFIG3_REGION105_Disabled   (0UL)

Protection disabled

Definition at line 872 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION105_Enabled

#define BPROT_CONFIG3_REGION105_Enabled   (1UL)

Protection enabled

Definition at line 873 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION105_Msk

#define BPROT_CONFIG3_REGION105_Msk   (0x1UL << BPROT_CONFIG3_REGION105_Pos)

Bit mask of REGION105 field.

Definition at line 871 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION105_Pos

#define BPROT_CONFIG3_REGION105_Pos   (9UL)

Position of REGION105 field.

Definition at line 870 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION106_Disabled

#define BPROT_CONFIG3_REGION106_Disabled   (0UL)

Protection disabled

Definition at line 866 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION106_Enabled

#define BPROT_CONFIG3_REGION106_Enabled   (1UL)

Protection enabled

Definition at line 867 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION106_Msk

#define BPROT_CONFIG3_REGION106_Msk   (0x1UL << BPROT_CONFIG3_REGION106_Pos)

Bit mask of REGION106 field.

Definition at line 865 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION106_Pos

#define BPROT_CONFIG3_REGION106_Pos   (10UL)

Position of REGION106 field.

Definition at line 864 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION107_Disabled

#define BPROT_CONFIG3_REGION107_Disabled   (0UL)

Protection disabled

Definition at line 860 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION107_Enabled

#define BPROT_CONFIG3_REGION107_Enabled   (1UL)

Protection enabled

Definition at line 861 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION107_Msk

#define BPROT_CONFIG3_REGION107_Msk   (0x1UL << BPROT_CONFIG3_REGION107_Pos)

Bit mask of REGION107 field.

Definition at line 859 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION107_Pos

#define BPROT_CONFIG3_REGION107_Pos   (11UL)

Position of REGION107 field.

Definition at line 858 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION108_Disabled

#define BPROT_CONFIG3_REGION108_Disabled   (0UL)

Protection disabled

Definition at line 854 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION108_Enabled

#define BPROT_CONFIG3_REGION108_Enabled   (1UL)

Protection enabled

Definition at line 855 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION108_Msk

#define BPROT_CONFIG3_REGION108_Msk   (0x1UL << BPROT_CONFIG3_REGION108_Pos)

Bit mask of REGION108 field.

Definition at line 853 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION108_Pos

#define BPROT_CONFIG3_REGION108_Pos   (12UL)

Position of REGION108 field.

Definition at line 852 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION109_Disabled

#define BPROT_CONFIG3_REGION109_Disabled   (0UL)

Protection disabled

Definition at line 848 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION109_Enabled

#define BPROT_CONFIG3_REGION109_Enabled   (1UL)

Protection enabled

Definition at line 849 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION109_Msk

#define BPROT_CONFIG3_REGION109_Msk   (0x1UL << BPROT_CONFIG3_REGION109_Pos)

Bit mask of REGION109 field.

Definition at line 847 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION109_Pos

#define BPROT_CONFIG3_REGION109_Pos   (13UL)

Position of REGION109 field.

Definition at line 846 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION110_Disabled

#define BPROT_CONFIG3_REGION110_Disabled   (0UL)

Protection disabled

Definition at line 842 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION110_Enabled

#define BPROT_CONFIG3_REGION110_Enabled   (1UL)

Protection enabled

Definition at line 843 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION110_Msk

#define BPROT_CONFIG3_REGION110_Msk   (0x1UL << BPROT_CONFIG3_REGION110_Pos)

Bit mask of REGION110 field.

Definition at line 841 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION110_Pos

#define BPROT_CONFIG3_REGION110_Pos   (14UL)

Position of REGION110 field.

Definition at line 840 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION111_Disabled

#define BPROT_CONFIG3_REGION111_Disabled   (0UL)

Protection disabled

Definition at line 836 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION111_Enabled

#define BPROT_CONFIG3_REGION111_Enabled   (1UL)

Protection enabled

Definition at line 837 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION111_Msk

#define BPROT_CONFIG3_REGION111_Msk   (0x1UL << BPROT_CONFIG3_REGION111_Pos)

Bit mask of REGION111 field.

Definition at line 835 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION111_Pos

#define BPROT_CONFIG3_REGION111_Pos   (15UL)

Position of REGION111 field.

Definition at line 834 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION112_Disabled

#define BPROT_CONFIG3_REGION112_Disabled   (0UL)

Protection disabled

Definition at line 830 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION112_Enabled

#define BPROT_CONFIG3_REGION112_Enabled   (1UL)

Protection enabled

Definition at line 831 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION112_Msk

#define BPROT_CONFIG3_REGION112_Msk   (0x1UL << BPROT_CONFIG3_REGION112_Pos)

Bit mask of REGION112 field.

Definition at line 829 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION112_Pos

#define BPROT_CONFIG3_REGION112_Pos   (16UL)

Position of REGION112 field.

Definition at line 828 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION113_Disabled

#define BPROT_CONFIG3_REGION113_Disabled   (0UL)

Protection disabled

Definition at line 824 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION113_Enabled

#define BPROT_CONFIG3_REGION113_Enabled   (1UL)

Protection enabled

Definition at line 825 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION113_Msk

#define BPROT_CONFIG3_REGION113_Msk   (0x1UL << BPROT_CONFIG3_REGION113_Pos)

Bit mask of REGION113 field.

Definition at line 823 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION113_Pos

#define BPROT_CONFIG3_REGION113_Pos   (17UL)

Position of REGION113 field.

Definition at line 822 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION114_Disabled

#define BPROT_CONFIG3_REGION114_Disabled   (0UL)

Protection disabled

Definition at line 818 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION114_Enabled

#define BPROT_CONFIG3_REGION114_Enabled   (1UL)

Protection enabled

Definition at line 819 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION114_Msk

#define BPROT_CONFIG3_REGION114_Msk   (0x1UL << BPROT_CONFIG3_REGION114_Pos)

Bit mask of REGION114 field.

Definition at line 817 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION114_Pos

#define BPROT_CONFIG3_REGION114_Pos   (18UL)

Position of REGION114 field.

Definition at line 816 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION115_Disabled

#define BPROT_CONFIG3_REGION115_Disabled   (0UL)

Protection disabled

Definition at line 812 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION115_Enabled

#define BPROT_CONFIG3_REGION115_Enabled   (1UL)

Protection enabled

Definition at line 813 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION115_Msk

#define BPROT_CONFIG3_REGION115_Msk   (0x1UL << BPROT_CONFIG3_REGION115_Pos)

Bit mask of REGION115 field.

Definition at line 811 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION115_Pos

#define BPROT_CONFIG3_REGION115_Pos   (19UL)

Position of REGION115 field.

Definition at line 810 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION116_Disabled

#define BPROT_CONFIG3_REGION116_Disabled   (0UL)

Protection disabled

Definition at line 806 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION116_Enabled

#define BPROT_CONFIG3_REGION116_Enabled   (1UL)

Protection enabled

Definition at line 807 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION116_Msk

#define BPROT_CONFIG3_REGION116_Msk   (0x1UL << BPROT_CONFIG3_REGION116_Pos)

Bit mask of REGION116 field.

Definition at line 805 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION116_Pos

#define BPROT_CONFIG3_REGION116_Pos   (20UL)

Position of REGION116 field.

Definition at line 804 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION117_Disabled

#define BPROT_CONFIG3_REGION117_Disabled   (0UL)

Protection disabled

Definition at line 800 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION117_Enabled

#define BPROT_CONFIG3_REGION117_Enabled   (1UL)

Protection enabled

Definition at line 801 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION117_Msk

#define BPROT_CONFIG3_REGION117_Msk   (0x1UL << BPROT_CONFIG3_REGION117_Pos)

Bit mask of REGION117 field.

Definition at line 799 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION117_Pos

#define BPROT_CONFIG3_REGION117_Pos   (21UL)

Position of REGION117 field.

Definition at line 798 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION118_Disabled

#define BPROT_CONFIG3_REGION118_Disabled   (0UL)

Protection disabled

Definition at line 794 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION118_Enabled

#define BPROT_CONFIG3_REGION118_Enabled   (1UL)

Protection enabled

Definition at line 795 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION118_Msk

#define BPROT_CONFIG3_REGION118_Msk   (0x1UL << BPROT_CONFIG3_REGION118_Pos)

Bit mask of REGION118 field.

Definition at line 793 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION118_Pos

#define BPROT_CONFIG3_REGION118_Pos   (22UL)

Position of REGION118 field.

Definition at line 792 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION119_Disabled

#define BPROT_CONFIG3_REGION119_Disabled   (0UL)

Protection disabled

Definition at line 788 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION119_Enabled

#define BPROT_CONFIG3_REGION119_Enabled   (1UL)

Protection enabled

Definition at line 789 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION119_Msk

#define BPROT_CONFIG3_REGION119_Msk   (0x1UL << BPROT_CONFIG3_REGION119_Pos)

Bit mask of REGION119 field.

Definition at line 787 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION119_Pos

#define BPROT_CONFIG3_REGION119_Pos   (23UL)

Position of REGION119 field.

Definition at line 786 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION120_Disabled

#define BPROT_CONFIG3_REGION120_Disabled   (0UL)

Protection disabled

Definition at line 782 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION120_Enabled

#define BPROT_CONFIG3_REGION120_Enabled   (1UL)

Protection enabled

Definition at line 783 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION120_Msk

#define BPROT_CONFIG3_REGION120_Msk   (0x1UL << BPROT_CONFIG3_REGION120_Pos)

Bit mask of REGION120 field.

Definition at line 781 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION120_Pos

#define BPROT_CONFIG3_REGION120_Pos   (24UL)

Position of REGION120 field.

Definition at line 780 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION121_Disabled

#define BPROT_CONFIG3_REGION121_Disabled   (0UL)

Protection disabled

Definition at line 776 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION121_Enabled

#define BPROT_CONFIG3_REGION121_Enabled   (1UL)

Protection enabled

Definition at line 777 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION121_Msk

#define BPROT_CONFIG3_REGION121_Msk   (0x1UL << BPROT_CONFIG3_REGION121_Pos)

Bit mask of REGION121 field.

Definition at line 775 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION121_Pos

#define BPROT_CONFIG3_REGION121_Pos   (25UL)

Position of REGION121 field.

Definition at line 774 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION122_Disabled

#define BPROT_CONFIG3_REGION122_Disabled   (0UL)

Protection disabled

Definition at line 770 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION122_Enabled

#define BPROT_CONFIG3_REGION122_Enabled   (1UL)

Protection enabled

Definition at line 771 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION122_Msk

#define BPROT_CONFIG3_REGION122_Msk   (0x1UL << BPROT_CONFIG3_REGION122_Pos)

Bit mask of REGION122 field.

Definition at line 769 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION122_Pos

#define BPROT_CONFIG3_REGION122_Pos   (26UL)

Position of REGION122 field.

Definition at line 768 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION123_Disabled

#define BPROT_CONFIG3_REGION123_Disabled   (0UL)

Protection disabled

Definition at line 764 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION123_Enabled

#define BPROT_CONFIG3_REGION123_Enabled   (1UL)

Protection enabled

Definition at line 765 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION123_Msk

#define BPROT_CONFIG3_REGION123_Msk   (0x1UL << BPROT_CONFIG3_REGION123_Pos)

Bit mask of REGION123 field.

Definition at line 763 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION123_Pos

#define BPROT_CONFIG3_REGION123_Pos   (27UL)

Position of REGION123 field.

Definition at line 762 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION124_Disabled

#define BPROT_CONFIG3_REGION124_Disabled   (0UL)

Protection disabled

Definition at line 758 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION124_Enabled

#define BPROT_CONFIG3_REGION124_Enabled   (1UL)

Protection enabled

Definition at line 759 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION124_Msk

#define BPROT_CONFIG3_REGION124_Msk   (0x1UL << BPROT_CONFIG3_REGION124_Pos)

Bit mask of REGION124 field.

Definition at line 757 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION124_Pos

#define BPROT_CONFIG3_REGION124_Pos   (28UL)

Position of REGION124 field.

Definition at line 756 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION125_Disabled

#define BPROT_CONFIG3_REGION125_Disabled   (0UL)

Protection disabled

Definition at line 752 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION125_Enabled

#define BPROT_CONFIG3_REGION125_Enabled   (1UL)

Protection enabled

Definition at line 753 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION125_Msk

#define BPROT_CONFIG3_REGION125_Msk   (0x1UL << BPROT_CONFIG3_REGION125_Pos)

Bit mask of REGION125 field.

Definition at line 751 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION125_Pos

#define BPROT_CONFIG3_REGION125_Pos   (29UL)

Position of REGION125 field.

Definition at line 750 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION126_Disabled

#define BPROT_CONFIG3_REGION126_Disabled   (0UL)

Protection disabled

Definition at line 746 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION126_Enabled

#define BPROT_CONFIG3_REGION126_Enabled   (1UL)

Protection enabled

Definition at line 747 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION126_Msk

#define BPROT_CONFIG3_REGION126_Msk   (0x1UL << BPROT_CONFIG3_REGION126_Pos)

Bit mask of REGION126 field.

Definition at line 745 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION126_Pos

#define BPROT_CONFIG3_REGION126_Pos   (30UL)

Position of REGION126 field.

Definition at line 744 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION127_Disabled

#define BPROT_CONFIG3_REGION127_Disabled   (0UL)

Protection disabled

Definition at line 740 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION127_Enabled

#define BPROT_CONFIG3_REGION127_Enabled   (1UL)

Protection enabled

Definition at line 741 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION127_Msk

#define BPROT_CONFIG3_REGION127_Msk   (0x1UL << BPROT_CONFIG3_REGION127_Pos)

Bit mask of REGION127 field.

Definition at line 739 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION127_Pos

#define BPROT_CONFIG3_REGION127_Pos   (31UL)

Position of REGION127 field.

Definition at line 738 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION96_Disabled

#define BPROT_CONFIG3_REGION96_Disabled   (0UL)

Protection disabled

Definition at line 926 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION96_Enabled

#define BPROT_CONFIG3_REGION96_Enabled   (1UL)

Protection enabled

Definition at line 927 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION96_Msk

#define BPROT_CONFIG3_REGION96_Msk   (0x1UL << BPROT_CONFIG3_REGION96_Pos)

Bit mask of REGION96 field.

Definition at line 925 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION96_Pos

#define BPROT_CONFIG3_REGION96_Pos   (0UL)

Position of REGION96 field.

Definition at line 924 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION97_Disabled

#define BPROT_CONFIG3_REGION97_Disabled   (0UL)

Protection disabled

Definition at line 920 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION97_Enabled

#define BPROT_CONFIG3_REGION97_Enabled   (1UL)

Protection enabled

Definition at line 921 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION97_Msk

#define BPROT_CONFIG3_REGION97_Msk   (0x1UL << BPROT_CONFIG3_REGION97_Pos)

Bit mask of REGION97 field.

Definition at line 919 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION97_Pos

#define BPROT_CONFIG3_REGION97_Pos   (1UL)

Position of REGION97 field.

Definition at line 918 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION98_Disabled

#define BPROT_CONFIG3_REGION98_Disabled   (0UL)

Protection disabled

Definition at line 914 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION98_Enabled

#define BPROT_CONFIG3_REGION98_Enabled   (1UL)

Protection enabled

Definition at line 915 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION98_Msk

#define BPROT_CONFIG3_REGION98_Msk   (0x1UL << BPROT_CONFIG3_REGION98_Pos)

Bit mask of REGION98 field.

Definition at line 913 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION98_Pos

#define BPROT_CONFIG3_REGION98_Pos   (2UL)

Position of REGION98 field.

Definition at line 912 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION99_Disabled

#define BPROT_CONFIG3_REGION99_Disabled   (0UL)

Protection disabled

Definition at line 908 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION99_Enabled

#define BPROT_CONFIG3_REGION99_Enabled   (1UL)

Protection enabled

Definition at line 909 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION99_Msk

#define BPROT_CONFIG3_REGION99_Msk   (0x1UL << BPROT_CONFIG3_REGION99_Pos)

Bit mask of REGION99 field.

Definition at line 907 of file nrf52_bitfields.h.

◆ BPROT_CONFIG3_REGION99_Pos

#define BPROT_CONFIG3_REGION99_Pos   (3UL)

Position of REGION99 field.

Definition at line 906 of file nrf52_bitfields.h.

◆ BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Disabled

#define BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Disabled   (1UL)

Disable in debug

Definition at line 537 of file nrf52_bitfields.h.

◆ BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Enabled

#define BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Enabled   (0UL)

Enable in debug

Definition at line 536 of file nrf52_bitfields.h.

◆ BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Msk

#define BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Msk   (0x1UL << BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Pos)

Bit mask of DISABLEINDEBUG field.

Definition at line 535 of file nrf52_bitfields.h.

◆ BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Pos

#define BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Pos   (0UL)

Position of DISABLEINDEBUG field.

Definition at line 534 of file nrf52_bitfields.h.

◆ CCM_CNFPTR_CNFPTR_Msk

#define CCM_CNFPTR_CNFPTR_Msk   (0xFFFFFFFFUL << CCM_CNFPTR_CNFPTR_Pos)

Bit mask of CNFPTR field.

Definition at line 1034 of file nrf52_bitfields.h.

◆ CCM_CNFPTR_CNFPTR_Pos

#define CCM_CNFPTR_CNFPTR_Pos   (0UL)

Position of CNFPTR field.

Definition at line 1033 of file nrf52_bitfields.h.

◆ CCM_ENABLE_ENABLE_Disabled

#define CCM_ENABLE_ENABLE_Disabled   (0UL)

Disable

Definition at line 1005 of file nrf52_bitfields.h.

◆ CCM_ENABLE_ENABLE_Enabled

#define CCM_ENABLE_ENABLE_Enabled   (2UL)

Enable

Definition at line 1006 of file nrf52_bitfields.h.

◆ CCM_ENABLE_ENABLE_Msk

#define CCM_ENABLE_ENABLE_Msk   (0x3UL << CCM_ENABLE_ENABLE_Pos)

Bit mask of ENABLE field.

Definition at line 1004 of file nrf52_bitfields.h.

◆ CCM_ENABLE_ENABLE_Pos

#define CCM_ENABLE_ENABLE_Pos   (0UL)

Position of ENABLE field.

Definition at line 1003 of file nrf52_bitfields.h.

◆ CCM_INPTR_INPTR_Msk

#define CCM_INPTR_INPTR_Msk   (0xFFFFFFFFUL << CCM_INPTR_INPTR_Pos)

Bit mask of INPTR field.

Definition at line 1041 of file nrf52_bitfields.h.

◆ CCM_INPTR_INPTR_Pos

#define CCM_INPTR_INPTR_Pos   (0UL)

Position of INPTR field.

Definition at line 1040 of file nrf52_bitfields.h.

◆ CCM_INTENCLR_ENDCRYPT_Clear

#define CCM_INTENCLR_ENDCRYPT_Clear   (1UL)

Disable

Definition at line 981 of file nrf52_bitfields.h.

◆ CCM_INTENCLR_ENDCRYPT_Disabled

#define CCM_INTENCLR_ENDCRYPT_Disabled   (0UL)

Read: Disabled

Definition at line 979 of file nrf52_bitfields.h.

◆ CCM_INTENCLR_ENDCRYPT_Enabled

#define CCM_INTENCLR_ENDCRYPT_Enabled   (1UL)

Read: Enabled

Definition at line 980 of file nrf52_bitfields.h.

◆ CCM_INTENCLR_ENDCRYPT_Msk

#define CCM_INTENCLR_ENDCRYPT_Msk   (0x1UL << CCM_INTENCLR_ENDCRYPT_Pos)

Bit mask of ENDCRYPT field.

Definition at line 978 of file nrf52_bitfields.h.

◆ CCM_INTENCLR_ENDCRYPT_Pos

#define CCM_INTENCLR_ENDCRYPT_Pos   (1UL)

Position of ENDCRYPT field.

Definition at line 977 of file nrf52_bitfields.h.

◆ CCM_INTENCLR_ENDKSGEN_Clear

#define CCM_INTENCLR_ENDKSGEN_Clear   (1UL)

Disable

Definition at line 988 of file nrf52_bitfields.h.

◆ CCM_INTENCLR_ENDKSGEN_Disabled

#define CCM_INTENCLR_ENDKSGEN_Disabled   (0UL)

Read: Disabled

Definition at line 986 of file nrf52_bitfields.h.

◆ CCM_INTENCLR_ENDKSGEN_Enabled

#define CCM_INTENCLR_ENDKSGEN_Enabled   (1UL)

Read: Enabled

Definition at line 987 of file nrf52_bitfields.h.

◆ CCM_INTENCLR_ENDKSGEN_Msk

#define CCM_INTENCLR_ENDKSGEN_Msk   (0x1UL << CCM_INTENCLR_ENDKSGEN_Pos)

Bit mask of ENDKSGEN field.

Definition at line 985 of file nrf52_bitfields.h.

◆ CCM_INTENCLR_ENDKSGEN_Pos

#define CCM_INTENCLR_ENDKSGEN_Pos   (0UL)

Position of ENDKSGEN field.

Definition at line 984 of file nrf52_bitfields.h.

◆ CCM_INTENCLR_ERROR_Clear

#define CCM_INTENCLR_ERROR_Clear   (1UL)

Disable

Definition at line 974 of file nrf52_bitfields.h.

◆ CCM_INTENCLR_ERROR_Disabled

#define CCM_INTENCLR_ERROR_Disabled   (0UL)

Read: Disabled

Definition at line 972 of file nrf52_bitfields.h.

◆ CCM_INTENCLR_ERROR_Enabled

#define CCM_INTENCLR_ERROR_Enabled   (1UL)

Read: Enabled

Definition at line 973 of file nrf52_bitfields.h.

◆ CCM_INTENCLR_ERROR_Msk

#define CCM_INTENCLR_ERROR_Msk   (0x1UL << CCM_INTENCLR_ERROR_Pos)

Bit mask of ERROR field.

Definition at line 971 of file nrf52_bitfields.h.

◆ CCM_INTENCLR_ERROR_Pos

#define CCM_INTENCLR_ERROR_Pos   (2UL)

Position of ERROR field.

Definition at line 970 of file nrf52_bitfields.h.

◆ CCM_INTENSET_ENDCRYPT_Disabled

#define CCM_INTENSET_ENDCRYPT_Disabled   (0UL)

Read: Disabled

Definition at line 955 of file nrf52_bitfields.h.

◆ CCM_INTENSET_ENDCRYPT_Enabled

#define CCM_INTENSET_ENDCRYPT_Enabled   (1UL)

Read: Enabled

Definition at line 956 of file nrf52_bitfields.h.

◆ CCM_INTENSET_ENDCRYPT_Msk

#define CCM_INTENSET_ENDCRYPT_Msk   (0x1UL << CCM_INTENSET_ENDCRYPT_Pos)

Bit mask of ENDCRYPT field.

Definition at line 954 of file nrf52_bitfields.h.

◆ CCM_INTENSET_ENDCRYPT_Pos

#define CCM_INTENSET_ENDCRYPT_Pos   (1UL)

Position of ENDCRYPT field.

Definition at line 953 of file nrf52_bitfields.h.

◆ CCM_INTENSET_ENDCRYPT_Set

#define CCM_INTENSET_ENDCRYPT_Set   (1UL)

Enable

Definition at line 957 of file nrf52_bitfields.h.

◆ CCM_INTENSET_ENDKSGEN_Disabled

#define CCM_INTENSET_ENDKSGEN_Disabled   (0UL)

Read: Disabled

Definition at line 962 of file nrf52_bitfields.h.

◆ CCM_INTENSET_ENDKSGEN_Enabled

#define CCM_INTENSET_ENDKSGEN_Enabled   (1UL)

Read: Enabled

Definition at line 963 of file nrf52_bitfields.h.

◆ CCM_INTENSET_ENDKSGEN_Msk

#define CCM_INTENSET_ENDKSGEN_Msk   (0x1UL << CCM_INTENSET_ENDKSGEN_Pos)

Bit mask of ENDKSGEN field.

Definition at line 961 of file nrf52_bitfields.h.

◆ CCM_INTENSET_ENDKSGEN_Pos

#define CCM_INTENSET_ENDKSGEN_Pos   (0UL)

Position of ENDKSGEN field.

Definition at line 960 of file nrf52_bitfields.h.

◆ CCM_INTENSET_ENDKSGEN_Set

#define CCM_INTENSET_ENDKSGEN_Set   (1UL)

Enable

Definition at line 964 of file nrf52_bitfields.h.

◆ CCM_INTENSET_ERROR_Disabled

#define CCM_INTENSET_ERROR_Disabled   (0UL)

Read: Disabled

Definition at line 948 of file nrf52_bitfields.h.

◆ CCM_INTENSET_ERROR_Enabled

#define CCM_INTENSET_ERROR_Enabled   (1UL)

Read: Enabled

Definition at line 949 of file nrf52_bitfields.h.

◆ CCM_INTENSET_ERROR_Msk

#define CCM_INTENSET_ERROR_Msk   (0x1UL << CCM_INTENSET_ERROR_Pos)

Bit mask of ERROR field.

Definition at line 947 of file nrf52_bitfields.h.

◆ CCM_INTENSET_ERROR_Pos

#define CCM_INTENSET_ERROR_Pos   (2UL)

Position of ERROR field.

Definition at line 946 of file nrf52_bitfields.h.

◆ CCM_INTENSET_ERROR_Set

#define CCM_INTENSET_ERROR_Set   (1UL)

Enable

Definition at line 950 of file nrf52_bitfields.h.

◆ CCM_MICSTATUS_MICSTATUS_CheckFailed

#define CCM_MICSTATUS_MICSTATUS_CheckFailed   (0UL)

MIC check failed

Definition at line 996 of file nrf52_bitfields.h.

◆ CCM_MICSTATUS_MICSTATUS_CheckPassed

#define CCM_MICSTATUS_MICSTATUS_CheckPassed   (1UL)

MIC check passed

Definition at line 997 of file nrf52_bitfields.h.

◆ CCM_MICSTATUS_MICSTATUS_Msk

#define CCM_MICSTATUS_MICSTATUS_Msk   (0x1UL << CCM_MICSTATUS_MICSTATUS_Pos)

Bit mask of MICSTATUS field.

Definition at line 995 of file nrf52_bitfields.h.

◆ CCM_MICSTATUS_MICSTATUS_Pos

#define CCM_MICSTATUS_MICSTATUS_Pos   (0UL)

Position of MICSTATUS field.

Definition at line 994 of file nrf52_bitfields.h.

◆ CCM_MODE_DATARATE_1Mbit

#define CCM_MODE_DATARATE_1Mbit   (0UL)

In synch with 1 Mbit data rate

Definition at line 1020 of file nrf52_bitfields.h.

◆ CCM_MODE_DATARATE_2Mbit

#define CCM_MODE_DATARATE_2Mbit   (1UL)

In synch with 2 Mbit data rate

Definition at line 1021 of file nrf52_bitfields.h.

◆ CCM_MODE_DATARATE_Msk

#define CCM_MODE_DATARATE_Msk   (0x1UL << CCM_MODE_DATARATE_Pos)

Bit mask of DATARATE field.

Definition at line 1019 of file nrf52_bitfields.h.

◆ CCM_MODE_DATARATE_Pos

#define CCM_MODE_DATARATE_Pos   (16UL)

Position of DATARATE field.

Definition at line 1018 of file nrf52_bitfields.h.

◆ CCM_MODE_LENGTH_Default

#define CCM_MODE_LENGTH_Default   (0UL)

Default length. Effective length of LENGTH field is 5-bit

Definition at line 1014 of file nrf52_bitfields.h.

◆ CCM_MODE_LENGTH_Extended

#define CCM_MODE_LENGTH_Extended   (1UL)

Extended length. Effective length of LENGTH field is 8-bit

Definition at line 1015 of file nrf52_bitfields.h.

◆ CCM_MODE_LENGTH_Msk

#define CCM_MODE_LENGTH_Msk   (0x1UL << CCM_MODE_LENGTH_Pos)

Bit mask of LENGTH field.

Definition at line 1013 of file nrf52_bitfields.h.

◆ CCM_MODE_LENGTH_Pos

#define CCM_MODE_LENGTH_Pos   (24UL)

Position of LENGTH field.

Definition at line 1012 of file nrf52_bitfields.h.

◆ CCM_MODE_MODE_Decryption

#define CCM_MODE_MODE_Decryption   (1UL)

AES CCM packet decryption mode

Definition at line 1027 of file nrf52_bitfields.h.

◆ CCM_MODE_MODE_Encryption

#define CCM_MODE_MODE_Encryption   (0UL)

AES CCM packet encryption mode

Definition at line 1026 of file nrf52_bitfields.h.

◆ CCM_MODE_MODE_Msk

#define CCM_MODE_MODE_Msk   (0x1UL << CCM_MODE_MODE_Pos)

Bit mask of MODE field.

Definition at line 1025 of file nrf52_bitfields.h.

◆ CCM_MODE_MODE_Pos

#define CCM_MODE_MODE_Pos   (0UL)

Position of MODE field.

Definition at line 1024 of file nrf52_bitfields.h.

◆ CCM_OUTPTR_OUTPTR_Msk

#define CCM_OUTPTR_OUTPTR_Msk   (0xFFFFFFFFUL << CCM_OUTPTR_OUTPTR_Pos)

Bit mask of OUTPTR field.

Definition at line 1048 of file nrf52_bitfields.h.

◆ CCM_OUTPTR_OUTPTR_Pos

#define CCM_OUTPTR_OUTPTR_Pos   (0UL)

Position of OUTPTR field.

Definition at line 1047 of file nrf52_bitfields.h.

◆ CCM_SCRATCHPTR_SCRATCHPTR_Msk

#define CCM_SCRATCHPTR_SCRATCHPTR_Msk   (0xFFFFFFFFUL << CCM_SCRATCHPTR_SCRATCHPTR_Pos)

Bit mask of SCRATCHPTR field.

Definition at line 1055 of file nrf52_bitfields.h.

◆ CCM_SCRATCHPTR_SCRATCHPTR_Pos

#define CCM_SCRATCHPTR_SCRATCHPTR_Pos   (0UL)

Position of SCRATCHPTR field.

Definition at line 1054 of file nrf52_bitfields.h.

◆ CCM_SHORTS_ENDKSGEN_CRYPT_Disabled

#define CCM_SHORTS_ENDKSGEN_CRYPT_Disabled   (0UL)

Disable shortcut

Definition at line 939 of file nrf52_bitfields.h.

◆ CCM_SHORTS_ENDKSGEN_CRYPT_Enabled

#define CCM_SHORTS_ENDKSGEN_CRYPT_Enabled   (1UL)

Enable shortcut

Definition at line 940 of file nrf52_bitfields.h.

◆ CCM_SHORTS_ENDKSGEN_CRYPT_Msk

#define CCM_SHORTS_ENDKSGEN_CRYPT_Msk   (0x1UL << CCM_SHORTS_ENDKSGEN_CRYPT_Pos)

Bit mask of ENDKSGEN_CRYPT field.

Definition at line 938 of file nrf52_bitfields.h.

◆ CCM_SHORTS_ENDKSGEN_CRYPT_Pos

#define CCM_SHORTS_ENDKSGEN_CRYPT_Pos   (0UL)

Position of ENDKSGEN_CRYPT field.

Definition at line 937 of file nrf52_bitfields.h.

◆ CLOCK_CTIV_CTIV_Msk

#define CLOCK_CTIV_CTIV_Msk   (0x7FUL << CLOCK_CTIV_CTIV_Pos)

Bit mask of CTIV field.

Definition at line 1197 of file nrf52_bitfields.h.

◆ CLOCK_CTIV_CTIV_Pos

#define CLOCK_CTIV_CTIV_Pos   (0UL)

Position of CTIV field.

Definition at line 1196 of file nrf52_bitfields.h.

◆ CLOCK_HFCLKRUN_STATUS_Msk

#define CLOCK_HFCLKRUN_STATUS_Msk   (0x1UL << CLOCK_HFCLKRUN_STATUS_Pos)

Bit mask of STATUS field.

Definition at line 1128 of file nrf52_bitfields.h.

◆ CLOCK_HFCLKRUN_STATUS_NotTriggered

#define CLOCK_HFCLKRUN_STATUS_NotTriggered   (0UL)

Task not triggered

Definition at line 1129 of file nrf52_bitfields.h.

◆ CLOCK_HFCLKRUN_STATUS_Pos

#define CLOCK_HFCLKRUN_STATUS_Pos   (0UL)

Position of STATUS field.

Definition at line 1127 of file nrf52_bitfields.h.

◆ CLOCK_HFCLKRUN_STATUS_Triggered

#define CLOCK_HFCLKRUN_STATUS_Triggered   (1UL)

Task triggered

Definition at line 1130 of file nrf52_bitfields.h.

◆ CLOCK_HFCLKSTAT_SRC_Msk

#define CLOCK_HFCLKSTAT_SRC_Msk   (0x1UL << CLOCK_HFCLKSTAT_SRC_Pos)

Bit mask of SRC field.

Definition at line 1143 of file nrf52_bitfields.h.

◆ CLOCK_HFCLKSTAT_SRC_Pos

#define CLOCK_HFCLKSTAT_SRC_Pos   (0UL)

Position of SRC field.

Definition at line 1142 of file nrf52_bitfields.h.

◆ CLOCK_HFCLKSTAT_SRC_RC

#define CLOCK_HFCLKSTAT_SRC_RC   (0UL)

Internal oscillator (HFINT)

Definition at line 1144 of file nrf52_bitfields.h.

◆ CLOCK_HFCLKSTAT_SRC_Xtal

#define CLOCK_HFCLKSTAT_SRC_Xtal   (1UL)

32 MHz crystal oscillator (HFXO)

Definition at line 1145 of file nrf52_bitfields.h.

◆ CLOCK_HFCLKSTAT_STATE_Msk

#define CLOCK_HFCLKSTAT_STATE_Msk   (0x1UL << CLOCK_HFCLKSTAT_STATE_Pos)

Bit mask of STATE field.

Definition at line 1137 of file nrf52_bitfields.h.

◆ CLOCK_HFCLKSTAT_STATE_NotRunning

#define CLOCK_HFCLKSTAT_STATE_NotRunning   (0UL)

HFCLK not running

Definition at line 1138 of file nrf52_bitfields.h.

◆ CLOCK_HFCLKSTAT_STATE_Pos

#define CLOCK_HFCLKSTAT_STATE_Pos   (16UL)

Position of STATE field.

Definition at line 1136 of file nrf52_bitfields.h.

◆ CLOCK_HFCLKSTAT_STATE_Running

#define CLOCK_HFCLKSTAT_STATE_Running   (1UL)

HFCLK running

Definition at line 1139 of file nrf52_bitfields.h.

◆ CLOCK_INTENCLR_CTTO_Clear

#define CLOCK_INTENCLR_CTTO_Clear   (1UL)

Disable

Definition at line 1100 of file nrf52_bitfields.h.

◆ CLOCK_INTENCLR_CTTO_Disabled

#define CLOCK_INTENCLR_CTTO_Disabled   (0UL)

Read: Disabled

Definition at line 1098 of file nrf52_bitfields.h.

◆ CLOCK_INTENCLR_CTTO_Enabled

#define CLOCK_INTENCLR_CTTO_Enabled   (1UL)

Read: Enabled

Definition at line 1099 of file nrf52_bitfields.h.

◆ CLOCK_INTENCLR_CTTO_Msk

#define CLOCK_INTENCLR_CTTO_Msk   (0x1UL << CLOCK_INTENCLR_CTTO_Pos)

Bit mask of CTTO field.

Definition at line 1097 of file nrf52_bitfields.h.

◆ CLOCK_INTENCLR_CTTO_Pos

#define CLOCK_INTENCLR_CTTO_Pos   (4UL)

Position of CTTO field.

Definition at line 1096 of file nrf52_bitfields.h.

◆ CLOCK_INTENCLR_DONE_Clear

#define CLOCK_INTENCLR_DONE_Clear   (1UL)

Disable

Definition at line 1107 of file nrf52_bitfields.h.

◆ CLOCK_INTENCLR_DONE_Disabled

#define CLOCK_INTENCLR_DONE_Disabled   (0UL)

Read: Disabled

Definition at line 1105 of file nrf52_bitfields.h.

◆ CLOCK_INTENCLR_DONE_Enabled

#define CLOCK_INTENCLR_DONE_Enabled   (1UL)

Read: Enabled

Definition at line 1106 of file nrf52_bitfields.h.

◆ CLOCK_INTENCLR_DONE_Msk

#define CLOCK_INTENCLR_DONE_Msk   (0x1UL << CLOCK_INTENCLR_DONE_Pos)

Bit mask of DONE field.

Definition at line 1104 of file nrf52_bitfields.h.

◆ CLOCK_INTENCLR_DONE_Pos

#define CLOCK_INTENCLR_DONE_Pos   (3UL)

Position of DONE field.

Definition at line 1103 of file nrf52_bitfields.h.

◆ CLOCK_INTENCLR_HFCLKSTARTED_Clear

#define CLOCK_INTENCLR_HFCLKSTARTED_Clear   (1UL)

Disable

Definition at line 1121 of file nrf52_bitfields.h.

◆ CLOCK_INTENCLR_HFCLKSTARTED_Disabled

#define CLOCK_INTENCLR_HFCLKSTARTED_Disabled   (0UL)

Read: Disabled

Definition at line 1119 of file nrf52_bitfields.h.

◆ CLOCK_INTENCLR_HFCLKSTARTED_Enabled

#define CLOCK_INTENCLR_HFCLKSTARTED_Enabled   (1UL)

Read: Enabled

Definition at line 1120 of file nrf52_bitfields.h.

◆ CLOCK_INTENCLR_HFCLKSTARTED_Msk

#define CLOCK_INTENCLR_HFCLKSTARTED_Msk   (0x1UL << CLOCK_INTENCLR_HFCLKSTARTED_Pos)

Bit mask of HFCLKSTARTED field.

Definition at line 1118 of file nrf52_bitfields.h.

◆ CLOCK_INTENCLR_HFCLKSTARTED_Pos

#define CLOCK_INTENCLR_HFCLKSTARTED_Pos   (0UL)

Position of HFCLKSTARTED field.

Definition at line 1117 of file nrf52_bitfields.h.

◆ CLOCK_INTENCLR_LFCLKSTARTED_Clear

#define CLOCK_INTENCLR_LFCLKSTARTED_Clear   (1UL)

Disable

Definition at line 1114 of file nrf52_bitfields.h.

◆ CLOCK_INTENCLR_LFCLKSTARTED_Disabled

#define CLOCK_INTENCLR_LFCLKSTARTED_Disabled   (0UL)

Read: Disabled

Definition at line 1112 of file nrf52_bitfields.h.

◆ CLOCK_INTENCLR_LFCLKSTARTED_Enabled

#define CLOCK_INTENCLR_LFCLKSTARTED_Enabled   (1UL)

Read: Enabled

Definition at line 1113 of file nrf52_bitfields.h.

◆ CLOCK_INTENCLR_LFCLKSTARTED_Msk

#define CLOCK_INTENCLR_LFCLKSTARTED_Msk   (0x1UL << CLOCK_INTENCLR_LFCLKSTARTED_Pos)

Bit mask of LFCLKSTARTED field.

Definition at line 1111 of file nrf52_bitfields.h.

◆ CLOCK_INTENCLR_LFCLKSTARTED_Pos

#define CLOCK_INTENCLR_LFCLKSTARTED_Pos   (1UL)

Position of LFCLKSTARTED field.

Definition at line 1110 of file nrf52_bitfields.h.

◆ CLOCK_INTENSET_CTTO_Disabled

#define CLOCK_INTENSET_CTTO_Disabled   (0UL)

Read: Disabled

Definition at line 1067 of file nrf52_bitfields.h.

◆ CLOCK_INTENSET_CTTO_Enabled

#define CLOCK_INTENSET_CTTO_Enabled   (1UL)

Read: Enabled

Definition at line 1068 of file nrf52_bitfields.h.

◆ CLOCK_INTENSET_CTTO_Msk

#define CLOCK_INTENSET_CTTO_Msk   (0x1UL << CLOCK_INTENSET_CTTO_Pos)

Bit mask of CTTO field.

Definition at line 1066 of file nrf52_bitfields.h.

◆ CLOCK_INTENSET_CTTO_Pos

#define CLOCK_INTENSET_CTTO_Pos   (4UL)

Position of CTTO field.

Definition at line 1065 of file nrf52_bitfields.h.

◆ CLOCK_INTENSET_CTTO_Set

#define CLOCK_INTENSET_CTTO_Set   (1UL)

Enable

Definition at line 1069 of file nrf52_bitfields.h.

◆ CLOCK_INTENSET_DONE_Disabled

#define CLOCK_INTENSET_DONE_Disabled   (0UL)

Read: Disabled

Definition at line 1074 of file nrf52_bitfields.h.

◆ CLOCK_INTENSET_DONE_Enabled

#define CLOCK_INTENSET_DONE_Enabled   (1UL)

Read: Enabled

Definition at line 1075 of file nrf52_bitfields.h.

◆ CLOCK_INTENSET_DONE_Msk

#define CLOCK_INTENSET_DONE_Msk   (0x1UL << CLOCK_INTENSET_DONE_Pos)

Bit mask of DONE field.

Definition at line 1073 of file nrf52_bitfields.h.

◆ CLOCK_INTENSET_DONE_Pos

#define CLOCK_INTENSET_DONE_Pos   (3UL)

Position of DONE field.

Definition at line 1072 of file nrf52_bitfields.h.

◆ CLOCK_INTENSET_DONE_Set

#define CLOCK_INTENSET_DONE_Set   (1UL)

Enable

Definition at line 1076 of file nrf52_bitfields.h.

◆ CLOCK_INTENSET_HFCLKSTARTED_Disabled

#define CLOCK_INTENSET_HFCLKSTARTED_Disabled   (0UL)

Read: Disabled

Definition at line 1088 of file nrf52_bitfields.h.

◆ CLOCK_INTENSET_HFCLKSTARTED_Enabled

#define CLOCK_INTENSET_HFCLKSTARTED_Enabled   (1UL)

Read: Enabled

Definition at line 1089 of file nrf52_bitfields.h.

◆ CLOCK_INTENSET_HFCLKSTARTED_Msk

#define CLOCK_INTENSET_HFCLKSTARTED_Msk   (0x1UL << CLOCK_INTENSET_HFCLKSTARTED_Pos)

Bit mask of HFCLKSTARTED field.

Definition at line 1087 of file nrf52_bitfields.h.

◆ CLOCK_INTENSET_HFCLKSTARTED_Pos

#define CLOCK_INTENSET_HFCLKSTARTED_Pos   (0UL)

Position of HFCLKSTARTED field.

Definition at line 1086 of file nrf52_bitfields.h.

◆ CLOCK_INTENSET_HFCLKSTARTED_Set

#define CLOCK_INTENSET_HFCLKSTARTED_Set   (1UL)

Enable

Definition at line 1090 of file nrf52_bitfields.h.

◆ CLOCK_INTENSET_LFCLKSTARTED_Disabled

#define CLOCK_INTENSET_LFCLKSTARTED_Disabled   (0UL)

Read: Disabled

Definition at line 1081 of file nrf52_bitfields.h.

◆ CLOCK_INTENSET_LFCLKSTARTED_Enabled

#define CLOCK_INTENSET_LFCLKSTARTED_Enabled   (1UL)

Read: Enabled

Definition at line 1082 of file nrf52_bitfields.h.

◆ CLOCK_INTENSET_LFCLKSTARTED_Msk

#define CLOCK_INTENSET_LFCLKSTARTED_Msk   (0x1UL << CLOCK_INTENSET_LFCLKSTARTED_Pos)

Bit mask of LFCLKSTARTED field.

Definition at line 1080 of file nrf52_bitfields.h.

◆ CLOCK_INTENSET_LFCLKSTARTED_Pos

#define CLOCK_INTENSET_LFCLKSTARTED_Pos   (1UL)

Position of LFCLKSTARTED field.

Definition at line 1079 of file nrf52_bitfields.h.

◆ CLOCK_INTENSET_LFCLKSTARTED_Set

#define CLOCK_INTENSET_LFCLKSTARTED_Set   (1UL)

Enable

Definition at line 1083 of file nrf52_bitfields.h.

◆ CLOCK_LFCLKRUN_STATUS_Msk

#define CLOCK_LFCLKRUN_STATUS_Msk   (0x1UL << CLOCK_LFCLKRUN_STATUS_Pos)

Bit mask of STATUS field.

Definition at line 1152 of file nrf52_bitfields.h.

◆ CLOCK_LFCLKRUN_STATUS_NotTriggered

#define CLOCK_LFCLKRUN_STATUS_NotTriggered   (0UL)

Task not triggered

Definition at line 1153 of file nrf52_bitfields.h.

◆ CLOCK_LFCLKRUN_STATUS_Pos

#define CLOCK_LFCLKRUN_STATUS_Pos   (0UL)

Position of STATUS field.

Definition at line 1151 of file nrf52_bitfields.h.

◆ CLOCK_LFCLKRUN_STATUS_Triggered

#define CLOCK_LFCLKRUN_STATUS_Triggered   (1UL)

Task triggered

Definition at line 1154 of file nrf52_bitfields.h.

◆ CLOCK_LFCLKSRC_SRC_Msk

#define CLOCK_LFCLKSRC_SRC_Msk   (0x3UL << CLOCK_LFCLKSRC_SRC_Pos)

Bit mask of SRC field.

Definition at line 1187 of file nrf52_bitfields.h.

◆ CLOCK_LFCLKSRC_SRC_Pos

#define CLOCK_LFCLKSRC_SRC_Pos   (0UL)

Position of SRC field.

Definition at line 1186 of file nrf52_bitfields.h.

◆ CLOCK_LFCLKSRC_SRC_RC

#define CLOCK_LFCLKSRC_SRC_RC   (0UL)

32.768 kHz RC oscillator

Definition at line 1188 of file nrf52_bitfields.h.

◆ CLOCK_LFCLKSRC_SRC_Synth

#define CLOCK_LFCLKSRC_SRC_Synth   (2UL)

32.768 kHz synthesized from HFCLK

Definition at line 1190 of file nrf52_bitfields.h.

◆ CLOCK_LFCLKSRC_SRC_Xtal

#define CLOCK_LFCLKSRC_SRC_Xtal   (1UL)

32.768 kHz crystal oscillator

Definition at line 1189 of file nrf52_bitfields.h.

◆ CLOCK_LFCLKSRCCOPY_SRC_Msk

#define CLOCK_LFCLKSRCCOPY_SRC_Msk   (0x3UL << CLOCK_LFCLKSRCCOPY_SRC_Pos)

Bit mask of SRC field.

Definition at line 1177 of file nrf52_bitfields.h.

◆ CLOCK_LFCLKSRCCOPY_SRC_Pos

#define CLOCK_LFCLKSRCCOPY_SRC_Pos   (0UL)

Position of SRC field.

Definition at line 1176 of file nrf52_bitfields.h.

◆ CLOCK_LFCLKSRCCOPY_SRC_RC

#define CLOCK_LFCLKSRCCOPY_SRC_RC   (0UL)

32.768 kHz RC oscillator

Definition at line 1178 of file nrf52_bitfields.h.

◆ CLOCK_LFCLKSRCCOPY_SRC_Synth

#define CLOCK_LFCLKSRCCOPY_SRC_Synth   (2UL)

32.768 kHz synthesized from HFCLK

Definition at line 1180 of file nrf52_bitfields.h.

◆ CLOCK_LFCLKSRCCOPY_SRC_Xtal

#define CLOCK_LFCLKSRCCOPY_SRC_Xtal   (1UL)

32.768 kHz crystal oscillator

Definition at line 1179 of file nrf52_bitfields.h.

◆ CLOCK_LFCLKSTAT_SRC_Msk

#define CLOCK_LFCLKSTAT_SRC_Msk   (0x3UL << CLOCK_LFCLKSTAT_SRC_Pos)

Bit mask of SRC field.

Definition at line 1167 of file nrf52_bitfields.h.

◆ CLOCK_LFCLKSTAT_SRC_Pos

#define CLOCK_LFCLKSTAT_SRC_Pos   (0UL)

Position of SRC field.

Definition at line 1166 of file nrf52_bitfields.h.

◆ CLOCK_LFCLKSTAT_SRC_RC

#define CLOCK_LFCLKSTAT_SRC_RC   (0UL)

32.768 kHz RC oscillator

Definition at line 1168 of file nrf52_bitfields.h.

◆ CLOCK_LFCLKSTAT_SRC_Synth

#define CLOCK_LFCLKSTAT_SRC_Synth   (2UL)

32.768 kHz synthesized from HFCLK

Definition at line 1170 of file nrf52_bitfields.h.

◆ CLOCK_LFCLKSTAT_SRC_Xtal

#define CLOCK_LFCLKSTAT_SRC_Xtal   (1UL)

32.768 kHz crystal oscillator

Definition at line 1169 of file nrf52_bitfields.h.

◆ CLOCK_LFCLKSTAT_STATE_Msk

#define CLOCK_LFCLKSTAT_STATE_Msk   (0x1UL << CLOCK_LFCLKSTAT_STATE_Pos)

Bit mask of STATE field.

Definition at line 1161 of file nrf52_bitfields.h.

◆ CLOCK_LFCLKSTAT_STATE_NotRunning

#define CLOCK_LFCLKSTAT_STATE_NotRunning   (0UL)

LFCLK not running

Definition at line 1162 of file nrf52_bitfields.h.

◆ CLOCK_LFCLKSTAT_STATE_Pos

#define CLOCK_LFCLKSTAT_STATE_Pos   (16UL)

Position of STATE field.

Definition at line 1160 of file nrf52_bitfields.h.

◆ CLOCK_LFCLKSTAT_STATE_Running

#define CLOCK_LFCLKSTAT_STATE_Running   (1UL)

LFCLK running

Definition at line 1163 of file nrf52_bitfields.h.

◆ CLOCK_TRACECONFIG_TRACEMUX_GPIO

#define CLOCK_TRACECONFIG_TRACEMUX_GPIO   (0UL)

GPIOs multiplexed onto all trace-pins

Definition at line 1205 of file nrf52_bitfields.h.

◆ CLOCK_TRACECONFIG_TRACEMUX_Msk

#define CLOCK_TRACECONFIG_TRACEMUX_Msk   (0x3UL << CLOCK_TRACECONFIG_TRACEMUX_Pos)

Bit mask of TRACEMUX field.

Definition at line 1204 of file nrf52_bitfields.h.

◆ CLOCK_TRACECONFIG_TRACEMUX_Parallel

#define CLOCK_TRACECONFIG_TRACEMUX_Parallel   (2UL)

TRACECLK and TRACEDATA multiplexed onto P0.20, P0.18, P0.16, P0.15 and P0.14.

Definition at line 1207 of file nrf52_bitfields.h.

◆ CLOCK_TRACECONFIG_TRACEMUX_Pos

#define CLOCK_TRACECONFIG_TRACEMUX_Pos   (16UL)

Position of TRACEMUX field.

Definition at line 1203 of file nrf52_bitfields.h.

◆ CLOCK_TRACECONFIG_TRACEMUX_Serial

#define CLOCK_TRACECONFIG_TRACEMUX_Serial   (1UL)

SWO multiplexed onto P0.18, GPIO multiplexed onto other trace pins

Definition at line 1206 of file nrf52_bitfields.h.

◆ CLOCK_TRACECONFIG_TRACEPORTSPEED_16MHz

#define CLOCK_TRACECONFIG_TRACEPORTSPEED_16MHz   (1UL)

16 MHz Trace Port clock (TRACECLK = 8 MHz)

Definition at line 1213 of file nrf52_bitfields.h.

◆ CLOCK_TRACECONFIG_TRACEPORTSPEED_32MHz

#define CLOCK_TRACECONFIG_TRACEPORTSPEED_32MHz   (0UL)

32 MHz Trace Port clock (TRACECLK = 16 MHz)

Definition at line 1212 of file nrf52_bitfields.h.

◆ CLOCK_TRACECONFIG_TRACEPORTSPEED_4MHz

#define CLOCK_TRACECONFIG_TRACEPORTSPEED_4MHz   (3UL)

4 MHz Trace Port clock (TRACECLK = 2 MHz)

Definition at line 1215 of file nrf52_bitfields.h.

◆ CLOCK_TRACECONFIG_TRACEPORTSPEED_8MHz

#define CLOCK_TRACECONFIG_TRACEPORTSPEED_8MHz   (2UL)

8 MHz Trace Port clock (TRACECLK = 4 MHz)

Definition at line 1214 of file nrf52_bitfields.h.

◆ CLOCK_TRACECONFIG_TRACEPORTSPEED_Msk

#define CLOCK_TRACECONFIG_TRACEPORTSPEED_Msk   (0x3UL << CLOCK_TRACECONFIG_TRACEPORTSPEED_Pos)

Bit mask of TRACEPORTSPEED field.

Definition at line 1211 of file nrf52_bitfields.h.

◆ CLOCK_TRACECONFIG_TRACEPORTSPEED_Pos

#define CLOCK_TRACECONFIG_TRACEPORTSPEED_Pos   (0UL)

Position of TRACEPORTSPEED field.

Definition at line 1210 of file nrf52_bitfields.h.

◆ COMP_ENABLE_ENABLE_Disabled

#define COMP_ENABLE_ENABLE_Disabled   (0UL)

Disable

Definition at line 1358 of file nrf52_bitfields.h.

◆ COMP_ENABLE_ENABLE_Enabled

#define COMP_ENABLE_ENABLE_Enabled   (2UL)

Enable

Definition at line 1359 of file nrf52_bitfields.h.

◆ COMP_ENABLE_ENABLE_Msk

#define COMP_ENABLE_ENABLE_Msk   (0x3UL << COMP_ENABLE_ENABLE_Pos)

Bit mask of ENABLE field.

Definition at line 1357 of file nrf52_bitfields.h.

◆ COMP_ENABLE_ENABLE_Pos

#define COMP_ENABLE_ENABLE_Pos   (0UL)

Position of ENABLE field.

Definition at line 1356 of file nrf52_bitfields.h.

◆ COMP_EXTREFSEL_EXTREFSEL_AnalogReference0

#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference0   (0UL)

Use AIN0 as external analog reference

Definition at line 1394 of file nrf52_bitfields.h.

◆ COMP_EXTREFSEL_EXTREFSEL_AnalogReference1

#define COMP_EXTREFSEL_EXTREFSEL_AnalogReference1   (1UL)

Use AIN1 as external analog reference

Definition at line 1395 of file nrf52_bitfields.h.

◆ COMP_EXTREFSEL_EXTREFSEL_Msk

#define COMP_EXTREFSEL_EXTREFSEL_Msk   (0x1UL << COMP_EXTREFSEL_EXTREFSEL_Pos)

Bit mask of EXTREFSEL field.

Definition at line 1393 of file nrf52_bitfields.h.

◆ COMP_EXTREFSEL_EXTREFSEL_Pos

#define COMP_EXTREFSEL_EXTREFSEL_Pos   (0UL)

Position of EXTREFSEL field.

Definition at line 1392 of file nrf52_bitfields.h.

◆ COMP_HYST_HYST_Hyst50mV

#define COMP_HYST_HYST_Hyst50mV   (1UL)

Comparator hysteresis enabled

Definition at line 1431 of file nrf52_bitfields.h.

◆ COMP_HYST_HYST_Msk

#define COMP_HYST_HYST_Msk   (0x1UL << COMP_HYST_HYST_Pos)

Bit mask of HYST field.

Definition at line 1429 of file nrf52_bitfields.h.

◆ COMP_HYST_HYST_NoHyst

#define COMP_HYST_HYST_NoHyst   (0UL)

Comparator hysteresis disabled

Definition at line 1430 of file nrf52_bitfields.h.

◆ COMP_HYST_HYST_Pos

#define COMP_HYST_HYST_Pos   (0UL)

Position of HYST field.

Definition at line 1428 of file nrf52_bitfields.h.

◆ COMP_INTEN_CROSS_Disabled

#define COMP_INTEN_CROSS_Disabled   (0UL)

Disable

Definition at line 1260 of file nrf52_bitfields.h.

◆ COMP_INTEN_CROSS_Enabled

#define COMP_INTEN_CROSS_Enabled   (1UL)

Enable

Definition at line 1261 of file nrf52_bitfields.h.

◆ COMP_INTEN_CROSS_Msk

#define COMP_INTEN_CROSS_Msk   (0x1UL << COMP_INTEN_CROSS_Pos)

Bit mask of CROSS field.

Definition at line 1259 of file nrf52_bitfields.h.

◆ COMP_INTEN_CROSS_Pos

#define COMP_INTEN_CROSS_Pos   (3UL)

Position of CROSS field.

Definition at line 1258 of file nrf52_bitfields.h.

◆ COMP_INTEN_DOWN_Disabled

#define COMP_INTEN_DOWN_Disabled   (0UL)

Disable

Definition at line 1272 of file nrf52_bitfields.h.

◆ COMP_INTEN_DOWN_Enabled

#define COMP_INTEN_DOWN_Enabled   (1UL)

Enable

Definition at line 1273 of file nrf52_bitfields.h.

◆ COMP_INTEN_DOWN_Msk

#define COMP_INTEN_DOWN_Msk   (0x1UL << COMP_INTEN_DOWN_Pos)

Bit mask of DOWN field.

Definition at line 1271 of file nrf52_bitfields.h.

◆ COMP_INTEN_DOWN_Pos

#define COMP_INTEN_DOWN_Pos   (1UL)

Position of DOWN field.

Definition at line 1270 of file nrf52_bitfields.h.

◆ COMP_INTEN_READY_Disabled

#define COMP_INTEN_READY_Disabled   (0UL)

Disable

Definition at line 1278 of file nrf52_bitfields.h.

◆ COMP_INTEN_READY_Enabled

#define COMP_INTEN_READY_Enabled   (1UL)

Enable

Definition at line 1279 of file nrf52_bitfields.h.

◆ COMP_INTEN_READY_Msk

#define COMP_INTEN_READY_Msk   (0x1UL << COMP_INTEN_READY_Pos)

Bit mask of READY field.

Definition at line 1277 of file nrf52_bitfields.h.

◆ COMP_INTEN_READY_Pos

#define COMP_INTEN_READY_Pos   (0UL)

Position of READY field.

Definition at line 1276 of file nrf52_bitfields.h.

◆ COMP_INTEN_UP_Disabled

#define COMP_INTEN_UP_Disabled   (0UL)

Disable

Definition at line 1266 of file nrf52_bitfields.h.

◆ COMP_INTEN_UP_Enabled

#define COMP_INTEN_UP_Enabled   (1UL)

Enable

Definition at line 1267 of file nrf52_bitfields.h.

◆ COMP_INTEN_UP_Msk

#define COMP_INTEN_UP_Msk   (0x1UL << COMP_INTEN_UP_Pos)

Bit mask of UP field.

Definition at line 1265 of file nrf52_bitfields.h.

◆ COMP_INTEN_UP_Pos

#define COMP_INTEN_UP_Pos   (2UL)

Position of UP field.

Definition at line 1264 of file nrf52_bitfields.h.

◆ COMP_INTENCLR_CROSS_Clear

#define COMP_INTENCLR_CROSS_Clear   (1UL)

Disable

Definition at line 1320 of file nrf52_bitfields.h.

◆ COMP_INTENCLR_CROSS_Disabled

#define COMP_INTENCLR_CROSS_Disabled   (0UL)

Read: Disabled

Definition at line 1318 of file nrf52_bitfields.h.

◆ COMP_INTENCLR_CROSS_Enabled

#define COMP_INTENCLR_CROSS_Enabled   (1UL)

Read: Enabled

Definition at line 1319 of file nrf52_bitfields.h.

◆ COMP_INTENCLR_CROSS_Msk

#define COMP_INTENCLR_CROSS_Msk   (0x1UL << COMP_INTENCLR_CROSS_Pos)

Bit mask of CROSS field.

Definition at line 1317 of file nrf52_bitfields.h.

◆ COMP_INTENCLR_CROSS_Pos

#define COMP_INTENCLR_CROSS_Pos   (3UL)

Position of CROSS field.

Definition at line 1316 of file nrf52_bitfields.h.

◆ COMP_INTENCLR_DOWN_Clear

#define COMP_INTENCLR_DOWN_Clear   (1UL)

Disable

Definition at line 1334 of file nrf52_bitfields.h.

◆ COMP_INTENCLR_DOWN_Disabled

#define COMP_INTENCLR_DOWN_Disabled   (0UL)

Read: Disabled

Definition at line 1332 of file nrf52_bitfields.h.

◆ COMP_INTENCLR_DOWN_Enabled

#define COMP_INTENCLR_DOWN_Enabled   (1UL)

Read: Enabled

Definition at line 1333 of file nrf52_bitfields.h.

◆ COMP_INTENCLR_DOWN_Msk

#define COMP_INTENCLR_DOWN_Msk   (0x1UL << COMP_INTENCLR_DOWN_Pos)

Bit mask of DOWN field.

Definition at line 1331 of file nrf52_bitfields.h.

◆ COMP_INTENCLR_DOWN_Pos

#define COMP_INTENCLR_DOWN_Pos   (1UL)

Position of DOWN field.

Definition at line 1330 of file nrf52_bitfields.h.

◆ COMP_INTENCLR_READY_Clear

#define COMP_INTENCLR_READY_Clear   (1UL)

Disable

Definition at line 1341 of file nrf52_bitfields.h.

◆ COMP_INTENCLR_READY_Disabled

#define COMP_INTENCLR_READY_Disabled   (0UL)

Read: Disabled

Definition at line 1339 of file nrf52_bitfields.h.

◆ COMP_INTENCLR_READY_Enabled

#define COMP_INTENCLR_READY_Enabled   (1UL)

Read: Enabled

Definition at line 1340 of file nrf52_bitfields.h.

◆ COMP_INTENCLR_READY_Msk

#define COMP_INTENCLR_READY_Msk   (0x1UL << COMP_INTENCLR_READY_Pos)

Bit mask of READY field.

Definition at line 1338 of file nrf52_bitfields.h.

◆ COMP_INTENCLR_READY_Pos

#define COMP_INTENCLR_READY_Pos   (0UL)

Position of READY field.

Definition at line 1337 of file nrf52_bitfields.h.

◆ COMP_INTENCLR_UP_Clear

#define COMP_INTENCLR_UP_Clear   (1UL)

Disable

Definition at line 1327 of file nrf52_bitfields.h.

◆ COMP_INTENCLR_UP_Disabled

#define COMP_INTENCLR_UP_Disabled   (0UL)

Read: Disabled

Definition at line 1325 of file nrf52_bitfields.h.

◆ COMP_INTENCLR_UP_Enabled

#define COMP_INTENCLR_UP_Enabled   (1UL)

Read: Enabled

Definition at line 1326 of file nrf52_bitfields.h.

◆ COMP_INTENCLR_UP_Msk

#define COMP_INTENCLR_UP_Msk   (0x1UL << COMP_INTENCLR_UP_Pos)

Bit mask of UP field.

Definition at line 1324 of file nrf52_bitfields.h.

◆ COMP_INTENCLR_UP_Pos

#define COMP_INTENCLR_UP_Pos   (2UL)

Position of UP field.

Definition at line 1323 of file nrf52_bitfields.h.

◆ COMP_INTENSET_CROSS_Disabled

#define COMP_INTENSET_CROSS_Disabled   (0UL)

Read: Disabled

Definition at line 1287 of file nrf52_bitfields.h.

◆ COMP_INTENSET_CROSS_Enabled

#define COMP_INTENSET_CROSS_Enabled   (1UL)

Read: Enabled

Definition at line 1288 of file nrf52_bitfields.h.

◆ COMP_INTENSET_CROSS_Msk

#define COMP_INTENSET_CROSS_Msk   (0x1UL << COMP_INTENSET_CROSS_Pos)

Bit mask of CROSS field.

Definition at line 1286 of file nrf52_bitfields.h.

◆ COMP_INTENSET_CROSS_Pos

#define COMP_INTENSET_CROSS_Pos   (3UL)

Position of CROSS field.

Definition at line 1285 of file nrf52_bitfields.h.

◆ COMP_INTENSET_CROSS_Set

#define COMP_INTENSET_CROSS_Set   (1UL)

Enable

Definition at line 1289 of file nrf52_bitfields.h.

◆ COMP_INTENSET_DOWN_Disabled

#define COMP_INTENSET_DOWN_Disabled   (0UL)

Read: Disabled

Definition at line 1301 of file nrf52_bitfields.h.

◆ COMP_INTENSET_DOWN_Enabled

#define COMP_INTENSET_DOWN_Enabled   (1UL)

Read: Enabled

Definition at line 1302 of file nrf52_bitfields.h.

◆ COMP_INTENSET_DOWN_Msk

#define COMP_INTENSET_DOWN_Msk   (0x1UL << COMP_INTENSET_DOWN_Pos)

Bit mask of DOWN field.

Definition at line 1300 of file nrf52_bitfields.h.

◆ COMP_INTENSET_DOWN_Pos

#define COMP_INTENSET_DOWN_Pos   (1UL)

Position of DOWN field.

Definition at line 1299 of file nrf52_bitfields.h.

◆ COMP_INTENSET_DOWN_Set

#define COMP_INTENSET_DOWN_Set   (1UL)

Enable

Definition at line 1303 of file nrf52_bitfields.h.

◆ COMP_INTENSET_READY_Disabled

#define COMP_INTENSET_READY_Disabled   (0UL)

Read: Disabled

Definition at line 1308 of file nrf52_bitfields.h.

◆ COMP_INTENSET_READY_Enabled

#define COMP_INTENSET_READY_Enabled   (1UL)

Read: Enabled

Definition at line 1309 of file nrf52_bitfields.h.

◆ COMP_INTENSET_READY_Msk

#define COMP_INTENSET_READY_Msk   (0x1UL << COMP_INTENSET_READY_Pos)

Bit mask of READY field.

Definition at line 1307 of file nrf52_bitfields.h.

◆ COMP_INTENSET_READY_Pos

#define COMP_INTENSET_READY_Pos   (0UL)

Position of READY field.

Definition at line 1306 of file nrf52_bitfields.h.

◆ COMP_INTENSET_READY_Set

#define COMP_INTENSET_READY_Set   (1UL)

Enable

Definition at line 1310 of file nrf52_bitfields.h.

◆ COMP_INTENSET_UP_Disabled

#define COMP_INTENSET_UP_Disabled   (0UL)

Read: Disabled

Definition at line 1294 of file nrf52_bitfields.h.

◆ COMP_INTENSET_UP_Enabled

#define COMP_INTENSET_UP_Enabled   (1UL)

Read: Enabled

Definition at line 1295 of file nrf52_bitfields.h.

◆ COMP_INTENSET_UP_Msk

#define COMP_INTENSET_UP_Msk   (0x1UL << COMP_INTENSET_UP_Pos)

Bit mask of UP field.

Definition at line 1293 of file nrf52_bitfields.h.

◆ COMP_INTENSET_UP_Pos

#define COMP_INTENSET_UP_Pos   (2UL)

Position of UP field.

Definition at line 1292 of file nrf52_bitfields.h.

◆ COMP_INTENSET_UP_Set

#define COMP_INTENSET_UP_Set   (1UL)

Enable

Definition at line 1296 of file nrf52_bitfields.h.

◆ COMP_ISOURCE_ISOURCE_Ien10mA

#define COMP_ISOURCE_ISOURCE_Ien10mA   (3UL)

Current source enabled (+/- 10 uA)

Definition at line 1442 of file nrf52_bitfields.h.

◆ COMP_ISOURCE_ISOURCE_Ien2mA5

#define COMP_ISOURCE_ISOURCE_Ien2mA5   (1UL)

Current source enabled (+/- 2.5 uA)

Definition at line 1440 of file nrf52_bitfields.h.

◆ COMP_ISOURCE_ISOURCE_Ien5mA

#define COMP_ISOURCE_ISOURCE_Ien5mA   (2UL)

Current source enabled (+/- 5 uA)

Definition at line 1441 of file nrf52_bitfields.h.

◆ COMP_ISOURCE_ISOURCE_Msk

#define COMP_ISOURCE_ISOURCE_Msk   (0x3UL << COMP_ISOURCE_ISOURCE_Pos)

Bit mask of ISOURCE field.

Definition at line 1438 of file nrf52_bitfields.h.

◆ COMP_ISOURCE_ISOURCE_Off

#define COMP_ISOURCE_ISOURCE_Off   (0UL)

Current source disabled

Definition at line 1439 of file nrf52_bitfields.h.

◆ COMP_ISOURCE_ISOURCE_Pos

#define COMP_ISOURCE_ISOURCE_Pos   (0UL)

Position of ISOURCE field.

Definition at line 1437 of file nrf52_bitfields.h.

◆ COMP_MODE_MAIN_Diff

#define COMP_MODE_MAIN_Diff   (1UL)

Differential mode

Definition at line 1415 of file nrf52_bitfields.h.

◆ COMP_MODE_MAIN_Msk

#define COMP_MODE_MAIN_Msk   (0x1UL << COMP_MODE_MAIN_Pos)

Bit mask of MAIN field.

Definition at line 1413 of file nrf52_bitfields.h.

◆ COMP_MODE_MAIN_Pos

#define COMP_MODE_MAIN_Pos   (8UL)

Position of MAIN field.

Definition at line 1412 of file nrf52_bitfields.h.

◆ COMP_MODE_MAIN_SE

#define COMP_MODE_MAIN_SE   (0UL)

Single ended mode

Definition at line 1414 of file nrf52_bitfields.h.

◆ COMP_MODE_SP_High

#define COMP_MODE_SP_High   (2UL)

High speed mode

Definition at line 1422 of file nrf52_bitfields.h.

◆ COMP_MODE_SP_Low

#define COMP_MODE_SP_Low   (0UL)

Low power mode

Definition at line 1420 of file nrf52_bitfields.h.

◆ COMP_MODE_SP_Msk

#define COMP_MODE_SP_Msk   (0x3UL << COMP_MODE_SP_Pos)

Bit mask of SP field.

Definition at line 1419 of file nrf52_bitfields.h.

◆ COMP_MODE_SP_Normal

#define COMP_MODE_SP_Normal   (1UL)

Normal mode

Definition at line 1421 of file nrf52_bitfields.h.

◆ COMP_MODE_SP_Pos

#define COMP_MODE_SP_Pos   (0UL)

Position of SP field.

Definition at line 1418 of file nrf52_bitfields.h.

◆ COMP_PSEL_PSEL_AnalogInput0

#define COMP_PSEL_PSEL_AnalogInput0   (0UL)

AIN0 selected as analog input

Definition at line 1367 of file nrf52_bitfields.h.

◆ COMP_PSEL_PSEL_AnalogInput1

#define COMP_PSEL_PSEL_AnalogInput1   (1UL)

AIN1 selected as analog input

Definition at line 1368 of file nrf52_bitfields.h.

◆ COMP_PSEL_PSEL_AnalogInput2

#define COMP_PSEL_PSEL_AnalogInput2   (2UL)

AIN2 selected as analog input

Definition at line 1369 of file nrf52_bitfields.h.

◆ COMP_PSEL_PSEL_AnalogInput3

#define COMP_PSEL_PSEL_AnalogInput3   (3UL)

AIN3 selected as analog input

Definition at line 1370 of file nrf52_bitfields.h.

◆ COMP_PSEL_PSEL_AnalogInput4

#define COMP_PSEL_PSEL_AnalogInput4   (4UL)

AIN4 selected as analog input

Definition at line 1371 of file nrf52_bitfields.h.

◆ COMP_PSEL_PSEL_AnalogInput5

#define COMP_PSEL_PSEL_AnalogInput5   (5UL)

AIN5 selected as analog input

Definition at line 1372 of file nrf52_bitfields.h.

◆ COMP_PSEL_PSEL_AnalogInput6

#define COMP_PSEL_PSEL_AnalogInput6   (6UL)

AIN6 selected as analog input

Definition at line 1373 of file nrf52_bitfields.h.

◆ COMP_PSEL_PSEL_AnalogInput7

#define COMP_PSEL_PSEL_AnalogInput7   (7UL)

AIN7 selected as analog input

Definition at line 1374 of file nrf52_bitfields.h.

◆ COMP_PSEL_PSEL_Msk

#define COMP_PSEL_PSEL_Msk   (0x7UL << COMP_PSEL_PSEL_Pos)

Bit mask of PSEL field.

Definition at line 1366 of file nrf52_bitfields.h.

◆ COMP_PSEL_PSEL_Pos

#define COMP_PSEL_PSEL_Pos   (0UL)

Position of PSEL field.

Definition at line 1365 of file nrf52_bitfields.h.

◆ COMP_REFSEL_REFSEL_ARef

#define COMP_REFSEL_REFSEL_ARef   (5UL)

VREF = AREF (VDD >= VREF >= AREFMIN)

Definition at line 1386 of file nrf52_bitfields.h.

◆ COMP_REFSEL_REFSEL_Int1V2

#define COMP_REFSEL_REFSEL_Int1V2   (0UL)

VREF = internal 1.2 V reference (VDD >= 1.7 V)

Definition at line 1382 of file nrf52_bitfields.h.

◆ COMP_REFSEL_REFSEL_Int1V8

#define COMP_REFSEL_REFSEL_Int1V8   (1UL)

VREF = internal 1.8 V reference (VDD >= VREF + 0.2 V)

Definition at line 1383 of file nrf52_bitfields.h.

◆ COMP_REFSEL_REFSEL_Int2V4

#define COMP_REFSEL_REFSEL_Int2V4   (2UL)

VREF = internal 2.4 V reference (VDD >= VREF + 0.2 V)

Definition at line 1384 of file nrf52_bitfields.h.

◆ COMP_REFSEL_REFSEL_Msk

#define COMP_REFSEL_REFSEL_Msk   (0x7UL << COMP_REFSEL_REFSEL_Pos)

Bit mask of REFSEL field.

Definition at line 1381 of file nrf52_bitfields.h.

◆ COMP_REFSEL_REFSEL_Pos

#define COMP_REFSEL_REFSEL_Pos   (0UL)

Position of REFSEL field.

Definition at line 1380 of file nrf52_bitfields.h.

◆ COMP_REFSEL_REFSEL_VDD

#define COMP_REFSEL_REFSEL_VDD   (4UL)

VREF = VDD

Definition at line 1385 of file nrf52_bitfields.h.

◆ COMP_RESULT_RESULT_Above

#define COMP_RESULT_RESULT_Above   (1UL)

Input voltage is above the threshold (VIN+ > VIN-)

Definition at line 1350 of file nrf52_bitfields.h.

◆ COMP_RESULT_RESULT_Below

#define COMP_RESULT_RESULT_Below   (0UL)

Input voltage is below the threshold (VIN+ < VIN-)

Definition at line 1349 of file nrf52_bitfields.h.

◆ COMP_RESULT_RESULT_Msk

#define COMP_RESULT_RESULT_Msk   (0x1UL << COMP_RESULT_RESULT_Pos)

Bit mask of RESULT field.

Definition at line 1348 of file nrf52_bitfields.h.

◆ COMP_RESULT_RESULT_Pos

#define COMP_RESULT_RESULT_Pos   (0UL)

Position of RESULT field.

Definition at line 1347 of file nrf52_bitfields.h.

◆ COMP_SHORTS_CROSS_STOP_Disabled

#define COMP_SHORTS_CROSS_STOP_Disabled   (0UL)

Disable shortcut

Definition at line 1227 of file nrf52_bitfields.h.

◆ COMP_SHORTS_CROSS_STOP_Enabled

#define COMP_SHORTS_CROSS_STOP_Enabled   (1UL)

Enable shortcut

Definition at line 1228 of file nrf52_bitfields.h.

◆ COMP_SHORTS_CROSS_STOP_Msk

#define COMP_SHORTS_CROSS_STOP_Msk   (0x1UL << COMP_SHORTS_CROSS_STOP_Pos)

Bit mask of CROSS_STOP field.

Definition at line 1226 of file nrf52_bitfields.h.

◆ COMP_SHORTS_CROSS_STOP_Pos

#define COMP_SHORTS_CROSS_STOP_Pos   (4UL)

Position of CROSS_STOP field.

Definition at line 1225 of file nrf52_bitfields.h.

◆ COMP_SHORTS_DOWN_STOP_Disabled

#define COMP_SHORTS_DOWN_STOP_Disabled   (0UL)

Disable shortcut

Definition at line 1239 of file nrf52_bitfields.h.

◆ COMP_SHORTS_DOWN_STOP_Enabled

#define COMP_SHORTS_DOWN_STOP_Enabled   (1UL)

Enable shortcut

Definition at line 1240 of file nrf52_bitfields.h.

◆ COMP_SHORTS_DOWN_STOP_Msk

#define COMP_SHORTS_DOWN_STOP_Msk   (0x1UL << COMP_SHORTS_DOWN_STOP_Pos)

Bit mask of DOWN_STOP field.

Definition at line 1238 of file nrf52_bitfields.h.

◆ COMP_SHORTS_DOWN_STOP_Pos

#define COMP_SHORTS_DOWN_STOP_Pos   (2UL)

Position of DOWN_STOP field.

Definition at line 1237 of file nrf52_bitfields.h.

◆ COMP_SHORTS_READY_SAMPLE_Disabled

#define COMP_SHORTS_READY_SAMPLE_Disabled   (0UL)

Disable shortcut

Definition at line 1251 of file nrf52_bitfields.h.

◆ COMP_SHORTS_READY_SAMPLE_Enabled

#define COMP_SHORTS_READY_SAMPLE_Enabled   (1UL)

Enable shortcut

Definition at line 1252 of file nrf52_bitfields.h.

◆ COMP_SHORTS_READY_SAMPLE_Msk

#define COMP_SHORTS_READY_SAMPLE_Msk   (0x1UL << COMP_SHORTS_READY_SAMPLE_Pos)

Bit mask of READY_SAMPLE field.

Definition at line 1250 of file nrf52_bitfields.h.

◆ COMP_SHORTS_READY_SAMPLE_Pos

#define COMP_SHORTS_READY_SAMPLE_Pos   (0UL)

Position of READY_SAMPLE field.

Definition at line 1249 of file nrf52_bitfields.h.

◆ COMP_SHORTS_READY_STOP_Disabled

#define COMP_SHORTS_READY_STOP_Disabled   (0UL)

Disable shortcut

Definition at line 1245 of file nrf52_bitfields.h.

◆ COMP_SHORTS_READY_STOP_Enabled

#define COMP_SHORTS_READY_STOP_Enabled   (1UL)

Enable shortcut

Definition at line 1246 of file nrf52_bitfields.h.

◆ COMP_SHORTS_READY_STOP_Msk

#define COMP_SHORTS_READY_STOP_Msk   (0x1UL << COMP_SHORTS_READY_STOP_Pos)

Bit mask of READY_STOP field.

Definition at line 1244 of file nrf52_bitfields.h.

◆ COMP_SHORTS_READY_STOP_Pos

#define COMP_SHORTS_READY_STOP_Pos   (1UL)

Position of READY_STOP field.

Definition at line 1243 of file nrf52_bitfields.h.

◆ COMP_SHORTS_UP_STOP_Disabled

#define COMP_SHORTS_UP_STOP_Disabled   (0UL)

Disable shortcut

Definition at line 1233 of file nrf52_bitfields.h.

◆ COMP_SHORTS_UP_STOP_Enabled

#define COMP_SHORTS_UP_STOP_Enabled   (1UL)

Enable shortcut

Definition at line 1234 of file nrf52_bitfields.h.

◆ COMP_SHORTS_UP_STOP_Msk

#define COMP_SHORTS_UP_STOP_Msk   (0x1UL << COMP_SHORTS_UP_STOP_Pos)

Bit mask of UP_STOP field.

Definition at line 1232 of file nrf52_bitfields.h.

◆ COMP_SHORTS_UP_STOP_Pos

#define COMP_SHORTS_UP_STOP_Pos   (3UL)

Position of UP_STOP field.

Definition at line 1231 of file nrf52_bitfields.h.

◆ COMP_TH_THDOWN_Msk

#define COMP_TH_THDOWN_Msk   (0x3FUL << COMP_TH_THDOWN_Pos)

Bit mask of THDOWN field.

Definition at line 1402 of file nrf52_bitfields.h.

◆ COMP_TH_THDOWN_Pos

#define COMP_TH_THDOWN_Pos   (8UL)

Position of THDOWN field.

Definition at line 1401 of file nrf52_bitfields.h.

◆ COMP_TH_THUP_Msk

#define COMP_TH_THUP_Msk   (0x3FUL << COMP_TH_THUP_Pos)

Bit mask of THUP field.

Definition at line 1406 of file nrf52_bitfields.h.

◆ COMP_TH_THUP_Pos

#define COMP_TH_THUP_Pos   (0UL)

Position of THUP field.

Definition at line 1405 of file nrf52_bitfields.h.

◆ ECB_ECBDATAPTR_ECBDATAPTR_Msk

#define ECB_ECBDATAPTR_ECBDATAPTR_Msk   (0xFFFFFFFFUL << ECB_ECBDATAPTR_ECBDATAPTR_Pos)

Bit mask of ECBDATAPTR field.

Definition at line 1487 of file nrf52_bitfields.h.

◆ ECB_ECBDATAPTR_ECBDATAPTR_Pos

#define ECB_ECBDATAPTR_ECBDATAPTR_Pos   (0UL)

Position of ECBDATAPTR field.

Definition at line 1486 of file nrf52_bitfields.h.

◆ ECB_INTENCLR_ENDECB_Clear

#define ECB_INTENCLR_ENDECB_Clear   (1UL)

Disable

Definition at line 1480 of file nrf52_bitfields.h.

◆ ECB_INTENCLR_ENDECB_Disabled

#define ECB_INTENCLR_ENDECB_Disabled   (0UL)

Read: Disabled

Definition at line 1478 of file nrf52_bitfields.h.

◆ ECB_INTENCLR_ENDECB_Enabled

#define ECB_INTENCLR_ENDECB_Enabled   (1UL)

Read: Enabled

Definition at line 1479 of file nrf52_bitfields.h.

◆ ECB_INTENCLR_ENDECB_Msk

#define ECB_INTENCLR_ENDECB_Msk   (0x1UL << ECB_INTENCLR_ENDECB_Pos)

Bit mask of ENDECB field.

Definition at line 1477 of file nrf52_bitfields.h.

◆ ECB_INTENCLR_ENDECB_Pos

#define ECB_INTENCLR_ENDECB_Pos   (0UL)

Position of ENDECB field.

Definition at line 1476 of file nrf52_bitfields.h.

◆ ECB_INTENCLR_ERRORECB_Clear

#define ECB_INTENCLR_ERRORECB_Clear   (1UL)

Disable

Definition at line 1473 of file nrf52_bitfields.h.

◆ ECB_INTENCLR_ERRORECB_Disabled

#define ECB_INTENCLR_ERRORECB_Disabled   (0UL)

Read: Disabled

Definition at line 1471 of file nrf52_bitfields.h.

◆ ECB_INTENCLR_ERRORECB_Enabled

#define ECB_INTENCLR_ERRORECB_Enabled   (1UL)

Read: Enabled

Definition at line 1472 of file nrf52_bitfields.h.

◆ ECB_INTENCLR_ERRORECB_Msk

#define ECB_INTENCLR_ERRORECB_Msk   (0x1UL << ECB_INTENCLR_ERRORECB_Pos)

Bit mask of ERRORECB field.

Definition at line 1470 of file nrf52_bitfields.h.

◆ ECB_INTENCLR_ERRORECB_Pos

#define ECB_INTENCLR_ERRORECB_Pos   (1UL)

Position of ERRORECB field.

Definition at line 1469 of file nrf52_bitfields.h.

◆ ECB_INTENSET_ENDECB_Disabled

#define ECB_INTENSET_ENDECB_Disabled   (0UL)

Read: Disabled

Definition at line 1461 of file nrf52_bitfields.h.

◆ ECB_INTENSET_ENDECB_Enabled

#define ECB_INTENSET_ENDECB_Enabled   (1UL)

Read: Enabled

Definition at line 1462 of file nrf52_bitfields.h.

◆ ECB_INTENSET_ENDECB_Msk

#define ECB_INTENSET_ENDECB_Msk   (0x1UL << ECB_INTENSET_ENDECB_Pos)

Bit mask of ENDECB field.

Definition at line 1460 of file nrf52_bitfields.h.

◆ ECB_INTENSET_ENDECB_Pos

#define ECB_INTENSET_ENDECB_Pos   (0UL)

Position of ENDECB field.

Definition at line 1459 of file nrf52_bitfields.h.

◆ ECB_INTENSET_ENDECB_Set

#define ECB_INTENSET_ENDECB_Set   (1UL)

Enable

Definition at line 1463 of file nrf52_bitfields.h.

◆ ECB_INTENSET_ERRORECB_Disabled

#define ECB_INTENSET_ERRORECB_Disabled   (0UL)

Read: Disabled

Definition at line 1454 of file nrf52_bitfields.h.

◆ ECB_INTENSET_ERRORECB_Enabled

#define ECB_INTENSET_ERRORECB_Enabled   (1UL)

Read: Enabled

Definition at line 1455 of file nrf52_bitfields.h.

◆ ECB_INTENSET_ERRORECB_Msk

#define ECB_INTENSET_ERRORECB_Msk   (0x1UL << ECB_INTENSET_ERRORECB_Pos)

Bit mask of ERRORECB field.

Definition at line 1453 of file nrf52_bitfields.h.

◆ ECB_INTENSET_ERRORECB_Pos

#define ECB_INTENSET_ERRORECB_Pos   (1UL)

Position of ERRORECB field.

Definition at line 1452 of file nrf52_bitfields.h.

◆ ECB_INTENSET_ERRORECB_Set

#define ECB_INTENSET_ERRORECB_Set   (1UL)

Enable

Definition at line 1456 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED0_Disabled

#define EGU_INTEN_TRIGGERED0_Disabled   (0UL)

Disable

Definition at line 1589 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED0_Enabled

#define EGU_INTEN_TRIGGERED0_Enabled   (1UL)

Enable

Definition at line 1590 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED0_Msk

#define EGU_INTEN_TRIGGERED0_Msk   (0x1UL << EGU_INTEN_TRIGGERED0_Pos)

Bit mask of TRIGGERED0 field.

Definition at line 1588 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED0_Pos

#define EGU_INTEN_TRIGGERED0_Pos   (0UL)

Position of TRIGGERED0 field.

Definition at line 1587 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED10_Disabled

#define EGU_INTEN_TRIGGERED10_Disabled   (0UL)

Disable

Definition at line 1529 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED10_Enabled

#define EGU_INTEN_TRIGGERED10_Enabled   (1UL)

Enable

Definition at line 1530 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED10_Msk

#define EGU_INTEN_TRIGGERED10_Msk   (0x1UL << EGU_INTEN_TRIGGERED10_Pos)

Bit mask of TRIGGERED10 field.

Definition at line 1528 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED10_Pos

#define EGU_INTEN_TRIGGERED10_Pos   (10UL)

Position of TRIGGERED10 field.

Definition at line 1527 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED11_Disabled

#define EGU_INTEN_TRIGGERED11_Disabled   (0UL)

Disable

Definition at line 1523 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED11_Enabled

#define EGU_INTEN_TRIGGERED11_Enabled   (1UL)

Enable

Definition at line 1524 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED11_Msk

#define EGU_INTEN_TRIGGERED11_Msk   (0x1UL << EGU_INTEN_TRIGGERED11_Pos)

Bit mask of TRIGGERED11 field.

Definition at line 1522 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED11_Pos

#define EGU_INTEN_TRIGGERED11_Pos   (11UL)

Position of TRIGGERED11 field.

Definition at line 1521 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED12_Disabled

#define EGU_INTEN_TRIGGERED12_Disabled   (0UL)

Disable

Definition at line 1517 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED12_Enabled

#define EGU_INTEN_TRIGGERED12_Enabled   (1UL)

Enable

Definition at line 1518 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED12_Msk

#define EGU_INTEN_TRIGGERED12_Msk   (0x1UL << EGU_INTEN_TRIGGERED12_Pos)

Bit mask of TRIGGERED12 field.

Definition at line 1516 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED12_Pos

#define EGU_INTEN_TRIGGERED12_Pos   (12UL)

Position of TRIGGERED12 field.

Definition at line 1515 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED13_Disabled

#define EGU_INTEN_TRIGGERED13_Disabled   (0UL)

Disable

Definition at line 1511 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED13_Enabled

#define EGU_INTEN_TRIGGERED13_Enabled   (1UL)

Enable

Definition at line 1512 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED13_Msk

#define EGU_INTEN_TRIGGERED13_Msk   (0x1UL << EGU_INTEN_TRIGGERED13_Pos)

Bit mask of TRIGGERED13 field.

Definition at line 1510 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED13_Pos

#define EGU_INTEN_TRIGGERED13_Pos   (13UL)

Position of TRIGGERED13 field.

Definition at line 1509 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED14_Disabled

#define EGU_INTEN_TRIGGERED14_Disabled   (0UL)

Disable

Definition at line 1505 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED14_Enabled

#define EGU_INTEN_TRIGGERED14_Enabled   (1UL)

Enable

Definition at line 1506 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED14_Msk

#define EGU_INTEN_TRIGGERED14_Msk   (0x1UL << EGU_INTEN_TRIGGERED14_Pos)

Bit mask of TRIGGERED14 field.

Definition at line 1504 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED14_Pos

#define EGU_INTEN_TRIGGERED14_Pos   (14UL)

Position of TRIGGERED14 field.

Definition at line 1503 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED15_Disabled

#define EGU_INTEN_TRIGGERED15_Disabled   (0UL)

Disable

Definition at line 1499 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED15_Enabled

#define EGU_INTEN_TRIGGERED15_Enabled   (1UL)

Enable

Definition at line 1500 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED15_Msk

#define EGU_INTEN_TRIGGERED15_Msk   (0x1UL << EGU_INTEN_TRIGGERED15_Pos)

Bit mask of TRIGGERED15 field.

Definition at line 1498 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED15_Pos

#define EGU_INTEN_TRIGGERED15_Pos   (15UL)

Position of TRIGGERED15 field.

Definition at line 1497 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED1_Disabled

#define EGU_INTEN_TRIGGERED1_Disabled   (0UL)

Disable

Definition at line 1583 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED1_Enabled

#define EGU_INTEN_TRIGGERED1_Enabled   (1UL)

Enable

Definition at line 1584 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED1_Msk

#define EGU_INTEN_TRIGGERED1_Msk   (0x1UL << EGU_INTEN_TRIGGERED1_Pos)

Bit mask of TRIGGERED1 field.

Definition at line 1582 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED1_Pos

#define EGU_INTEN_TRIGGERED1_Pos   (1UL)

Position of TRIGGERED1 field.

Definition at line 1581 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED2_Disabled

#define EGU_INTEN_TRIGGERED2_Disabled   (0UL)

Disable

Definition at line 1577 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED2_Enabled

#define EGU_INTEN_TRIGGERED2_Enabled   (1UL)

Enable

Definition at line 1578 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED2_Msk

#define EGU_INTEN_TRIGGERED2_Msk   (0x1UL << EGU_INTEN_TRIGGERED2_Pos)

Bit mask of TRIGGERED2 field.

Definition at line 1576 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED2_Pos

#define EGU_INTEN_TRIGGERED2_Pos   (2UL)

Position of TRIGGERED2 field.

Definition at line 1575 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED3_Disabled

#define EGU_INTEN_TRIGGERED3_Disabled   (0UL)

Disable

Definition at line 1571 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED3_Enabled

#define EGU_INTEN_TRIGGERED3_Enabled   (1UL)

Enable

Definition at line 1572 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED3_Msk

#define EGU_INTEN_TRIGGERED3_Msk   (0x1UL << EGU_INTEN_TRIGGERED3_Pos)

Bit mask of TRIGGERED3 field.

Definition at line 1570 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED3_Pos

#define EGU_INTEN_TRIGGERED3_Pos   (3UL)

Position of TRIGGERED3 field.

Definition at line 1569 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED4_Disabled

#define EGU_INTEN_TRIGGERED4_Disabled   (0UL)

Disable

Definition at line 1565 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED4_Enabled

#define EGU_INTEN_TRIGGERED4_Enabled   (1UL)

Enable

Definition at line 1566 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED4_Msk

#define EGU_INTEN_TRIGGERED4_Msk   (0x1UL << EGU_INTEN_TRIGGERED4_Pos)

Bit mask of TRIGGERED4 field.

Definition at line 1564 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED4_Pos

#define EGU_INTEN_TRIGGERED4_Pos   (4UL)

Position of TRIGGERED4 field.

Definition at line 1563 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED5_Disabled

#define EGU_INTEN_TRIGGERED5_Disabled   (0UL)

Disable

Definition at line 1559 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED5_Enabled

#define EGU_INTEN_TRIGGERED5_Enabled   (1UL)

Enable

Definition at line 1560 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED5_Msk

#define EGU_INTEN_TRIGGERED5_Msk   (0x1UL << EGU_INTEN_TRIGGERED5_Pos)

Bit mask of TRIGGERED5 field.

Definition at line 1558 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED5_Pos

#define EGU_INTEN_TRIGGERED5_Pos   (5UL)

Position of TRIGGERED5 field.

Definition at line 1557 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED6_Disabled

#define EGU_INTEN_TRIGGERED6_Disabled   (0UL)

Disable

Definition at line 1553 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED6_Enabled

#define EGU_INTEN_TRIGGERED6_Enabled   (1UL)

Enable

Definition at line 1554 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED6_Msk

#define EGU_INTEN_TRIGGERED6_Msk   (0x1UL << EGU_INTEN_TRIGGERED6_Pos)

Bit mask of TRIGGERED6 field.

Definition at line 1552 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED6_Pos

#define EGU_INTEN_TRIGGERED6_Pos   (6UL)

Position of TRIGGERED6 field.

Definition at line 1551 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED7_Disabled

#define EGU_INTEN_TRIGGERED7_Disabled   (0UL)

Disable

Definition at line 1547 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED7_Enabled

#define EGU_INTEN_TRIGGERED7_Enabled   (1UL)

Enable

Definition at line 1548 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED7_Msk

#define EGU_INTEN_TRIGGERED7_Msk   (0x1UL << EGU_INTEN_TRIGGERED7_Pos)

Bit mask of TRIGGERED7 field.

Definition at line 1546 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED7_Pos

#define EGU_INTEN_TRIGGERED7_Pos   (7UL)

Position of TRIGGERED7 field.

Definition at line 1545 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED8_Disabled

#define EGU_INTEN_TRIGGERED8_Disabled   (0UL)

Disable

Definition at line 1541 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED8_Enabled

#define EGU_INTEN_TRIGGERED8_Enabled   (1UL)

Enable

Definition at line 1542 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED8_Msk

#define EGU_INTEN_TRIGGERED8_Msk   (0x1UL << EGU_INTEN_TRIGGERED8_Pos)

Bit mask of TRIGGERED8 field.

Definition at line 1540 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED8_Pos

#define EGU_INTEN_TRIGGERED8_Pos   (8UL)

Position of TRIGGERED8 field.

Definition at line 1539 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED9_Disabled

#define EGU_INTEN_TRIGGERED9_Disabled   (0UL)

Disable

Definition at line 1535 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED9_Enabled

#define EGU_INTEN_TRIGGERED9_Enabled   (1UL)

Enable

Definition at line 1536 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED9_Msk

#define EGU_INTEN_TRIGGERED9_Msk   (0x1UL << EGU_INTEN_TRIGGERED9_Pos)

Bit mask of TRIGGERED9 field.

Definition at line 1534 of file nrf52_bitfields.h.

◆ EGU_INTEN_TRIGGERED9_Pos

#define EGU_INTEN_TRIGGERED9_Pos   (9UL)

Position of TRIGGERED9 field.

Definition at line 1533 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED0_Clear

#define EGU_INTENCLR_TRIGGERED0_Clear   (1UL)

Disable

Definition at line 1820 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED0_Disabled

#define EGU_INTENCLR_TRIGGERED0_Disabled   (0UL)

Read: Disabled

Definition at line 1818 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED0_Enabled

#define EGU_INTENCLR_TRIGGERED0_Enabled   (1UL)

Read: Enabled

Definition at line 1819 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED0_Msk

#define EGU_INTENCLR_TRIGGERED0_Msk   (0x1UL << EGU_INTENCLR_TRIGGERED0_Pos)

Bit mask of TRIGGERED0 field.

Definition at line 1817 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED0_Pos

#define EGU_INTENCLR_TRIGGERED0_Pos   (0UL)

Position of TRIGGERED0 field.

Definition at line 1816 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED10_Clear

#define EGU_INTENCLR_TRIGGERED10_Clear   (1UL)

Disable

Definition at line 1750 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED10_Disabled

#define EGU_INTENCLR_TRIGGERED10_Disabled   (0UL)

Read: Disabled

Definition at line 1748 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED10_Enabled

#define EGU_INTENCLR_TRIGGERED10_Enabled   (1UL)

Read: Enabled

Definition at line 1749 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED10_Msk

#define EGU_INTENCLR_TRIGGERED10_Msk   (0x1UL << EGU_INTENCLR_TRIGGERED10_Pos)

Bit mask of TRIGGERED10 field.

Definition at line 1747 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED10_Pos

#define EGU_INTENCLR_TRIGGERED10_Pos   (10UL)

Position of TRIGGERED10 field.

Definition at line 1746 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED11_Clear

#define EGU_INTENCLR_TRIGGERED11_Clear   (1UL)

Disable

Definition at line 1743 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED11_Disabled

#define EGU_INTENCLR_TRIGGERED11_Disabled   (0UL)

Read: Disabled

Definition at line 1741 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED11_Enabled

#define EGU_INTENCLR_TRIGGERED11_Enabled   (1UL)

Read: Enabled

Definition at line 1742 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED11_Msk

#define EGU_INTENCLR_TRIGGERED11_Msk   (0x1UL << EGU_INTENCLR_TRIGGERED11_Pos)

Bit mask of TRIGGERED11 field.

Definition at line 1740 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED11_Pos

#define EGU_INTENCLR_TRIGGERED11_Pos   (11UL)

Position of TRIGGERED11 field.

Definition at line 1739 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED12_Clear

#define EGU_INTENCLR_TRIGGERED12_Clear   (1UL)

Disable

Definition at line 1736 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED12_Disabled

#define EGU_INTENCLR_TRIGGERED12_Disabled   (0UL)

Read: Disabled

Definition at line 1734 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED12_Enabled

#define EGU_INTENCLR_TRIGGERED12_Enabled   (1UL)

Read: Enabled

Definition at line 1735 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED12_Msk

#define EGU_INTENCLR_TRIGGERED12_Msk   (0x1UL << EGU_INTENCLR_TRIGGERED12_Pos)

Bit mask of TRIGGERED12 field.

Definition at line 1733 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED12_Pos

#define EGU_INTENCLR_TRIGGERED12_Pos   (12UL)

Position of TRIGGERED12 field.

Definition at line 1732 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED13_Clear

#define EGU_INTENCLR_TRIGGERED13_Clear   (1UL)

Disable

Definition at line 1729 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED13_Disabled

#define EGU_INTENCLR_TRIGGERED13_Disabled   (0UL)

Read: Disabled

Definition at line 1727 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED13_Enabled

#define EGU_INTENCLR_TRIGGERED13_Enabled   (1UL)

Read: Enabled

Definition at line 1728 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED13_Msk

#define EGU_INTENCLR_TRIGGERED13_Msk   (0x1UL << EGU_INTENCLR_TRIGGERED13_Pos)

Bit mask of TRIGGERED13 field.

Definition at line 1726 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED13_Pos

#define EGU_INTENCLR_TRIGGERED13_Pos   (13UL)

Position of TRIGGERED13 field.

Definition at line 1725 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED14_Clear

#define EGU_INTENCLR_TRIGGERED14_Clear   (1UL)

Disable

Definition at line 1722 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED14_Disabled

#define EGU_INTENCLR_TRIGGERED14_Disabled   (0UL)

Read: Disabled

Definition at line 1720 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED14_Enabled

#define EGU_INTENCLR_TRIGGERED14_Enabled   (1UL)

Read: Enabled

Definition at line 1721 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED14_Msk

#define EGU_INTENCLR_TRIGGERED14_Msk   (0x1UL << EGU_INTENCLR_TRIGGERED14_Pos)

Bit mask of TRIGGERED14 field.

Definition at line 1719 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED14_Pos

#define EGU_INTENCLR_TRIGGERED14_Pos   (14UL)

Position of TRIGGERED14 field.

Definition at line 1718 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED15_Clear

#define EGU_INTENCLR_TRIGGERED15_Clear   (1UL)

Disable

Definition at line 1715 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED15_Disabled

#define EGU_INTENCLR_TRIGGERED15_Disabled   (0UL)

Read: Disabled

Definition at line 1713 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED15_Enabled

#define EGU_INTENCLR_TRIGGERED15_Enabled   (1UL)

Read: Enabled

Definition at line 1714 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED15_Msk

#define EGU_INTENCLR_TRIGGERED15_Msk   (0x1UL << EGU_INTENCLR_TRIGGERED15_Pos)

Bit mask of TRIGGERED15 field.

Definition at line 1712 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED15_Pos

#define EGU_INTENCLR_TRIGGERED15_Pos   (15UL)

Position of TRIGGERED15 field.

Definition at line 1711 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED1_Clear

#define EGU_INTENCLR_TRIGGERED1_Clear   (1UL)

Disable

Definition at line 1813 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED1_Disabled

#define EGU_INTENCLR_TRIGGERED1_Disabled   (0UL)

Read: Disabled

Definition at line 1811 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED1_Enabled

#define EGU_INTENCLR_TRIGGERED1_Enabled   (1UL)

Read: Enabled

Definition at line 1812 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED1_Msk

#define EGU_INTENCLR_TRIGGERED1_Msk   (0x1UL << EGU_INTENCLR_TRIGGERED1_Pos)

Bit mask of TRIGGERED1 field.

Definition at line 1810 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED1_Pos

#define EGU_INTENCLR_TRIGGERED1_Pos   (1UL)

Position of TRIGGERED1 field.

Definition at line 1809 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED2_Clear

#define EGU_INTENCLR_TRIGGERED2_Clear   (1UL)

Disable

Definition at line 1806 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED2_Disabled

#define EGU_INTENCLR_TRIGGERED2_Disabled   (0UL)

Read: Disabled

Definition at line 1804 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED2_Enabled

#define EGU_INTENCLR_TRIGGERED2_Enabled   (1UL)

Read: Enabled

Definition at line 1805 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED2_Msk

#define EGU_INTENCLR_TRIGGERED2_Msk   (0x1UL << EGU_INTENCLR_TRIGGERED2_Pos)

Bit mask of TRIGGERED2 field.

Definition at line 1803 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED2_Pos

#define EGU_INTENCLR_TRIGGERED2_Pos   (2UL)

Position of TRIGGERED2 field.

Definition at line 1802 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED3_Clear

#define EGU_INTENCLR_TRIGGERED3_Clear   (1UL)

Disable

Definition at line 1799 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED3_Disabled

#define EGU_INTENCLR_TRIGGERED3_Disabled   (0UL)

Read: Disabled

Definition at line 1797 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED3_Enabled

#define EGU_INTENCLR_TRIGGERED3_Enabled   (1UL)

Read: Enabled

Definition at line 1798 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED3_Msk

#define EGU_INTENCLR_TRIGGERED3_Msk   (0x1UL << EGU_INTENCLR_TRIGGERED3_Pos)

Bit mask of TRIGGERED3 field.

Definition at line 1796 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED3_Pos

#define EGU_INTENCLR_TRIGGERED3_Pos   (3UL)

Position of TRIGGERED3 field.

Definition at line 1795 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED4_Clear

#define EGU_INTENCLR_TRIGGERED4_Clear   (1UL)

Disable

Definition at line 1792 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED4_Disabled

#define EGU_INTENCLR_TRIGGERED4_Disabled   (0UL)

Read: Disabled

Definition at line 1790 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED4_Enabled

#define EGU_INTENCLR_TRIGGERED4_Enabled   (1UL)

Read: Enabled

Definition at line 1791 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED4_Msk

#define EGU_INTENCLR_TRIGGERED4_Msk   (0x1UL << EGU_INTENCLR_TRIGGERED4_Pos)

Bit mask of TRIGGERED4 field.

Definition at line 1789 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED4_Pos

#define EGU_INTENCLR_TRIGGERED4_Pos   (4UL)

Position of TRIGGERED4 field.

Definition at line 1788 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED5_Clear

#define EGU_INTENCLR_TRIGGERED5_Clear   (1UL)

Disable

Definition at line 1785 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED5_Disabled

#define EGU_INTENCLR_TRIGGERED5_Disabled   (0UL)

Read: Disabled

Definition at line 1783 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED5_Enabled

#define EGU_INTENCLR_TRIGGERED5_Enabled   (1UL)

Read: Enabled

Definition at line 1784 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED5_Msk

#define EGU_INTENCLR_TRIGGERED5_Msk   (0x1UL << EGU_INTENCLR_TRIGGERED5_Pos)

Bit mask of TRIGGERED5 field.

Definition at line 1782 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED5_Pos

#define EGU_INTENCLR_TRIGGERED5_Pos   (5UL)

Position of TRIGGERED5 field.

Definition at line 1781 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED6_Clear

#define EGU_INTENCLR_TRIGGERED6_Clear   (1UL)

Disable

Definition at line 1778 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED6_Disabled

#define EGU_INTENCLR_TRIGGERED6_Disabled   (0UL)

Read: Disabled

Definition at line 1776 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED6_Enabled

#define EGU_INTENCLR_TRIGGERED6_Enabled   (1UL)

Read: Enabled

Definition at line 1777 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED6_Msk

#define EGU_INTENCLR_TRIGGERED6_Msk   (0x1UL << EGU_INTENCLR_TRIGGERED6_Pos)

Bit mask of TRIGGERED6 field.

Definition at line 1775 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED6_Pos

#define EGU_INTENCLR_TRIGGERED6_Pos   (6UL)

Position of TRIGGERED6 field.

Definition at line 1774 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED7_Clear

#define EGU_INTENCLR_TRIGGERED7_Clear   (1UL)

Disable

Definition at line 1771 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED7_Disabled

#define EGU_INTENCLR_TRIGGERED7_Disabled   (0UL)

Read: Disabled

Definition at line 1769 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED7_Enabled

#define EGU_INTENCLR_TRIGGERED7_Enabled   (1UL)

Read: Enabled

Definition at line 1770 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED7_Msk

#define EGU_INTENCLR_TRIGGERED7_Msk   (0x1UL << EGU_INTENCLR_TRIGGERED7_Pos)

Bit mask of TRIGGERED7 field.

Definition at line 1768 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED7_Pos

#define EGU_INTENCLR_TRIGGERED7_Pos   (7UL)

Position of TRIGGERED7 field.

Definition at line 1767 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED8_Clear

#define EGU_INTENCLR_TRIGGERED8_Clear   (1UL)

Disable

Definition at line 1764 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED8_Disabled

#define EGU_INTENCLR_TRIGGERED8_Disabled   (0UL)

Read: Disabled

Definition at line 1762 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED8_Enabled

#define EGU_INTENCLR_TRIGGERED8_Enabled   (1UL)

Read: Enabled

Definition at line 1763 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED8_Msk

#define EGU_INTENCLR_TRIGGERED8_Msk   (0x1UL << EGU_INTENCLR_TRIGGERED8_Pos)

Bit mask of TRIGGERED8 field.

Definition at line 1761 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED8_Pos

#define EGU_INTENCLR_TRIGGERED8_Pos   (8UL)

Position of TRIGGERED8 field.

Definition at line 1760 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED9_Clear

#define EGU_INTENCLR_TRIGGERED9_Clear   (1UL)

Disable

Definition at line 1757 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED9_Disabled

#define EGU_INTENCLR_TRIGGERED9_Disabled   (0UL)

Read: Disabled

Definition at line 1755 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED9_Enabled

#define EGU_INTENCLR_TRIGGERED9_Enabled   (1UL)

Read: Enabled

Definition at line 1756 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED9_Msk

#define EGU_INTENCLR_TRIGGERED9_Msk   (0x1UL << EGU_INTENCLR_TRIGGERED9_Pos)

Bit mask of TRIGGERED9 field.

Definition at line 1754 of file nrf52_bitfields.h.

◆ EGU_INTENCLR_TRIGGERED9_Pos

#define EGU_INTENCLR_TRIGGERED9_Pos   (9UL)

Position of TRIGGERED9 field.

Definition at line 1753 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED0_Disabled

#define EGU_INTENSET_TRIGGERED0_Disabled   (0UL)

Read: Disabled

Definition at line 1703 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED0_Enabled

#define EGU_INTENSET_TRIGGERED0_Enabled   (1UL)

Read: Enabled

Definition at line 1704 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED0_Msk

#define EGU_INTENSET_TRIGGERED0_Msk   (0x1UL << EGU_INTENSET_TRIGGERED0_Pos)

Bit mask of TRIGGERED0 field.

Definition at line 1702 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED0_Pos

#define EGU_INTENSET_TRIGGERED0_Pos   (0UL)

Position of TRIGGERED0 field.

Definition at line 1701 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED0_Set

#define EGU_INTENSET_TRIGGERED0_Set   (1UL)

Enable

Definition at line 1705 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED10_Disabled

#define EGU_INTENSET_TRIGGERED10_Disabled   (0UL)

Read: Disabled

Definition at line 1633 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED10_Enabled

#define EGU_INTENSET_TRIGGERED10_Enabled   (1UL)

Read: Enabled

Definition at line 1634 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED10_Msk

#define EGU_INTENSET_TRIGGERED10_Msk   (0x1UL << EGU_INTENSET_TRIGGERED10_Pos)

Bit mask of TRIGGERED10 field.

Definition at line 1632 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED10_Pos

#define EGU_INTENSET_TRIGGERED10_Pos   (10UL)

Position of TRIGGERED10 field.

Definition at line 1631 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED10_Set

#define EGU_INTENSET_TRIGGERED10_Set   (1UL)

Enable

Definition at line 1635 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED11_Disabled

#define EGU_INTENSET_TRIGGERED11_Disabled   (0UL)

Read: Disabled

Definition at line 1626 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED11_Enabled

#define EGU_INTENSET_TRIGGERED11_Enabled   (1UL)

Read: Enabled

Definition at line 1627 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED11_Msk

#define EGU_INTENSET_TRIGGERED11_Msk   (0x1UL << EGU_INTENSET_TRIGGERED11_Pos)

Bit mask of TRIGGERED11 field.

Definition at line 1625 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED11_Pos

#define EGU_INTENSET_TRIGGERED11_Pos   (11UL)

Position of TRIGGERED11 field.

Definition at line 1624 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED11_Set

#define EGU_INTENSET_TRIGGERED11_Set   (1UL)

Enable

Definition at line 1628 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED12_Disabled

#define EGU_INTENSET_TRIGGERED12_Disabled   (0UL)

Read: Disabled

Definition at line 1619 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED12_Enabled

#define EGU_INTENSET_TRIGGERED12_Enabled   (1UL)

Read: Enabled

Definition at line 1620 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED12_Msk

#define EGU_INTENSET_TRIGGERED12_Msk   (0x1UL << EGU_INTENSET_TRIGGERED12_Pos)

Bit mask of TRIGGERED12 field.

Definition at line 1618 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED12_Pos

#define EGU_INTENSET_TRIGGERED12_Pos   (12UL)

Position of TRIGGERED12 field.

Definition at line 1617 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED12_Set

#define EGU_INTENSET_TRIGGERED12_Set   (1UL)

Enable

Definition at line 1621 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED13_Disabled

#define EGU_INTENSET_TRIGGERED13_Disabled   (0UL)

Read: Disabled

Definition at line 1612 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED13_Enabled

#define EGU_INTENSET_TRIGGERED13_Enabled   (1UL)

Read: Enabled

Definition at line 1613 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED13_Msk

#define EGU_INTENSET_TRIGGERED13_Msk   (0x1UL << EGU_INTENSET_TRIGGERED13_Pos)

Bit mask of TRIGGERED13 field.

Definition at line 1611 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED13_Pos

#define EGU_INTENSET_TRIGGERED13_Pos   (13UL)

Position of TRIGGERED13 field.

Definition at line 1610 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED13_Set

#define EGU_INTENSET_TRIGGERED13_Set   (1UL)

Enable

Definition at line 1614 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED14_Disabled

#define EGU_INTENSET_TRIGGERED14_Disabled   (0UL)

Read: Disabled

Definition at line 1605 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED14_Enabled

#define EGU_INTENSET_TRIGGERED14_Enabled   (1UL)

Read: Enabled

Definition at line 1606 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED14_Msk

#define EGU_INTENSET_TRIGGERED14_Msk   (0x1UL << EGU_INTENSET_TRIGGERED14_Pos)

Bit mask of TRIGGERED14 field.

Definition at line 1604 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED14_Pos

#define EGU_INTENSET_TRIGGERED14_Pos   (14UL)

Position of TRIGGERED14 field.

Definition at line 1603 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED14_Set

#define EGU_INTENSET_TRIGGERED14_Set   (1UL)

Enable

Definition at line 1607 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED15_Disabled

#define EGU_INTENSET_TRIGGERED15_Disabled   (0UL)

Read: Disabled

Definition at line 1598 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED15_Enabled

#define EGU_INTENSET_TRIGGERED15_Enabled   (1UL)

Read: Enabled

Definition at line 1599 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED15_Msk

#define EGU_INTENSET_TRIGGERED15_Msk   (0x1UL << EGU_INTENSET_TRIGGERED15_Pos)

Bit mask of TRIGGERED15 field.

Definition at line 1597 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED15_Pos

#define EGU_INTENSET_TRIGGERED15_Pos   (15UL)

Position of TRIGGERED15 field.

Definition at line 1596 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED15_Set

#define EGU_INTENSET_TRIGGERED15_Set   (1UL)

Enable

Definition at line 1600 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED1_Disabled

#define EGU_INTENSET_TRIGGERED1_Disabled   (0UL)

Read: Disabled

Definition at line 1696 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED1_Enabled

#define EGU_INTENSET_TRIGGERED1_Enabled   (1UL)

Read: Enabled

Definition at line 1697 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED1_Msk

#define EGU_INTENSET_TRIGGERED1_Msk   (0x1UL << EGU_INTENSET_TRIGGERED1_Pos)

Bit mask of TRIGGERED1 field.

Definition at line 1695 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED1_Pos

#define EGU_INTENSET_TRIGGERED1_Pos   (1UL)

Position of TRIGGERED1 field.

Definition at line 1694 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED1_Set

#define EGU_INTENSET_TRIGGERED1_Set   (1UL)

Enable

Definition at line 1698 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED2_Disabled

#define EGU_INTENSET_TRIGGERED2_Disabled   (0UL)

Read: Disabled

Definition at line 1689 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED2_Enabled

#define EGU_INTENSET_TRIGGERED2_Enabled   (1UL)

Read: Enabled

Definition at line 1690 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED2_Msk

#define EGU_INTENSET_TRIGGERED2_Msk   (0x1UL << EGU_INTENSET_TRIGGERED2_Pos)

Bit mask of TRIGGERED2 field.

Definition at line 1688 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED2_Pos

#define EGU_INTENSET_TRIGGERED2_Pos   (2UL)

Position of TRIGGERED2 field.

Definition at line 1687 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED2_Set

#define EGU_INTENSET_TRIGGERED2_Set   (1UL)

Enable

Definition at line 1691 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED3_Disabled

#define EGU_INTENSET_TRIGGERED3_Disabled   (0UL)

Read: Disabled

Definition at line 1682 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED3_Enabled

#define EGU_INTENSET_TRIGGERED3_Enabled   (1UL)

Read: Enabled

Definition at line 1683 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED3_Msk

#define EGU_INTENSET_TRIGGERED3_Msk   (0x1UL << EGU_INTENSET_TRIGGERED3_Pos)

Bit mask of TRIGGERED3 field.

Definition at line 1681 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED3_Pos

#define EGU_INTENSET_TRIGGERED3_Pos   (3UL)

Position of TRIGGERED3 field.

Definition at line 1680 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED3_Set

#define EGU_INTENSET_TRIGGERED3_Set   (1UL)

Enable

Definition at line 1684 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED4_Disabled

#define EGU_INTENSET_TRIGGERED4_Disabled   (0UL)

Read: Disabled

Definition at line 1675 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED4_Enabled

#define EGU_INTENSET_TRIGGERED4_Enabled   (1UL)

Read: Enabled

Definition at line 1676 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED4_Msk

#define EGU_INTENSET_TRIGGERED4_Msk   (0x1UL << EGU_INTENSET_TRIGGERED4_Pos)

Bit mask of TRIGGERED4 field.

Definition at line 1674 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED4_Pos

#define EGU_INTENSET_TRIGGERED4_Pos   (4UL)

Position of TRIGGERED4 field.

Definition at line 1673 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED4_Set

#define EGU_INTENSET_TRIGGERED4_Set   (1UL)

Enable

Definition at line 1677 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED5_Disabled

#define EGU_INTENSET_TRIGGERED5_Disabled   (0UL)

Read: Disabled

Definition at line 1668 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED5_Enabled

#define EGU_INTENSET_TRIGGERED5_Enabled   (1UL)

Read: Enabled

Definition at line 1669 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED5_Msk

#define EGU_INTENSET_TRIGGERED5_Msk   (0x1UL << EGU_INTENSET_TRIGGERED5_Pos)

Bit mask of TRIGGERED5 field.

Definition at line 1667 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED5_Pos

#define EGU_INTENSET_TRIGGERED5_Pos   (5UL)

Position of TRIGGERED5 field.

Definition at line 1666 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED5_Set

#define EGU_INTENSET_TRIGGERED5_Set   (1UL)

Enable

Definition at line 1670 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED6_Disabled

#define EGU_INTENSET_TRIGGERED6_Disabled   (0UL)

Read: Disabled

Definition at line 1661 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED6_Enabled

#define EGU_INTENSET_TRIGGERED6_Enabled   (1UL)

Read: Enabled

Definition at line 1662 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED6_Msk

#define EGU_INTENSET_TRIGGERED6_Msk   (0x1UL << EGU_INTENSET_TRIGGERED6_Pos)

Bit mask of TRIGGERED6 field.

Definition at line 1660 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED6_Pos

#define EGU_INTENSET_TRIGGERED6_Pos   (6UL)

Position of TRIGGERED6 field.

Definition at line 1659 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED6_Set

#define EGU_INTENSET_TRIGGERED6_Set   (1UL)

Enable

Definition at line 1663 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED7_Disabled

#define EGU_INTENSET_TRIGGERED7_Disabled   (0UL)

Read: Disabled

Definition at line 1654 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED7_Enabled

#define EGU_INTENSET_TRIGGERED7_Enabled   (1UL)

Read: Enabled

Definition at line 1655 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED7_Msk

#define EGU_INTENSET_TRIGGERED7_Msk   (0x1UL << EGU_INTENSET_TRIGGERED7_Pos)

Bit mask of TRIGGERED7 field.

Definition at line 1653 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED7_Pos

#define EGU_INTENSET_TRIGGERED7_Pos   (7UL)

Position of TRIGGERED7 field.

Definition at line 1652 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED7_Set

#define EGU_INTENSET_TRIGGERED7_Set   (1UL)

Enable

Definition at line 1656 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED8_Disabled

#define EGU_INTENSET_TRIGGERED8_Disabled   (0UL)

Read: Disabled

Definition at line 1647 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED8_Enabled

#define EGU_INTENSET_TRIGGERED8_Enabled   (1UL)

Read: Enabled

Definition at line 1648 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED8_Msk

#define EGU_INTENSET_TRIGGERED8_Msk   (0x1UL << EGU_INTENSET_TRIGGERED8_Pos)

Bit mask of TRIGGERED8 field.

Definition at line 1646 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED8_Pos

#define EGU_INTENSET_TRIGGERED8_Pos   (8UL)

Position of TRIGGERED8 field.

Definition at line 1645 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED8_Set

#define EGU_INTENSET_TRIGGERED8_Set   (1UL)

Enable

Definition at line 1649 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED9_Disabled

#define EGU_INTENSET_TRIGGERED9_Disabled   (0UL)

Read: Disabled

Definition at line 1640 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED9_Enabled

#define EGU_INTENSET_TRIGGERED9_Enabled   (1UL)

Read: Enabled

Definition at line 1641 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED9_Msk

#define EGU_INTENSET_TRIGGERED9_Msk   (0x1UL << EGU_INTENSET_TRIGGERED9_Pos)

Bit mask of TRIGGERED9 field.

Definition at line 1639 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED9_Pos

#define EGU_INTENSET_TRIGGERED9_Pos   (9UL)

Position of TRIGGERED9 field.

Definition at line 1638 of file nrf52_bitfields.h.

◆ EGU_INTENSET_TRIGGERED9_Set

#define EGU_INTENSET_TRIGGERED9_Set   (1UL)

Enable

Definition at line 1642 of file nrf52_bitfields.h.

◆ FICR_CODEPAGESIZE_CODEPAGESIZE_Msk

#define FICR_CODEPAGESIZE_CODEPAGESIZE_Msk   (0xFFFFFFFFUL << FICR_CODEPAGESIZE_CODEPAGESIZE_Pos)

Bit mask of CODEPAGESIZE field.

Definition at line 1831 of file nrf52_bitfields.h.

◆ FICR_CODEPAGESIZE_CODEPAGESIZE_Pos

#define FICR_CODEPAGESIZE_CODEPAGESIZE_Pos   (0UL)

Position of CODEPAGESIZE field.

Definition at line 1830 of file nrf52_bitfields.h.

◆ FICR_CODESIZE_CODESIZE_Msk

#define FICR_CODESIZE_CODESIZE_Msk   (0xFFFFFFFFUL << FICR_CODESIZE_CODESIZE_Pos)

Bit mask of CODESIZE field.

Definition at line 1838 of file nrf52_bitfields.h.

◆ FICR_CODESIZE_CODESIZE_Pos

#define FICR_CODESIZE_CODESIZE_Pos   (0UL)

Position of CODESIZE field.

Definition at line 1837 of file nrf52_bitfields.h.

◆ FICR_CONFIGID_FWID_Msk

#define FICR_CONFIGID_FWID_Msk   (0xFFFFUL << FICR_CONFIGID_FWID_Pos)

Bit mask of FWID field.

Definition at line 1845 of file nrf52_bitfields.h.

◆ FICR_CONFIGID_FWID_Pos

#define FICR_CONFIGID_FWID_Pos   (16UL)

Position of FWID field.

Definition at line 1844 of file nrf52_bitfields.h.

◆ FICR_CONFIGID_HWID_Msk

#define FICR_CONFIGID_HWID_Msk   (0xFFFFUL << FICR_CONFIGID_HWID_Pos)

Bit mask of HWID field.

Definition at line 1849 of file nrf52_bitfields.h.

◆ FICR_CONFIGID_HWID_Pos

#define FICR_CONFIGID_HWID_Pos   (0UL)

Position of HWID field.

Definition at line 1848 of file nrf52_bitfields.h.

◆ FICR_DEVICEADDR_DEVICEADDR_Msk

#define FICR_DEVICEADDR_DEVICEADDR_Msk   (0xFFFFFFFFUL << FICR_DEVICEADDR_DEVICEADDR_Pos)

Bit mask of DEVICEADDR field.

Definition at line 1886 of file nrf52_bitfields.h.

◆ FICR_DEVICEADDR_DEVICEADDR_Pos

#define FICR_DEVICEADDR_DEVICEADDR_Pos   (0UL)

Position of DEVICEADDR field.

Definition at line 1885 of file nrf52_bitfields.h.

◆ FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Msk

#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Msk   (0x1UL << FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Pos)

Bit mask of DEVICEADDRTYPE field.

Definition at line 1877 of file nrf52_bitfields.h.

◆ FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Pos

#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Pos   (0UL)

Position of DEVICEADDRTYPE field.

Definition at line 1876 of file nrf52_bitfields.h.

◆ FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Public

#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Public   (0UL)

Public address

Definition at line 1878 of file nrf52_bitfields.h.

◆ FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Random

#define FICR_DEVICEADDRTYPE_DEVICEADDRTYPE_Random   (1UL)

Random address

Definition at line 1879 of file nrf52_bitfields.h.

◆ FICR_DEVICEID_DEVICEID_Msk

#define FICR_DEVICEID_DEVICEID_Msk   (0xFFFFFFFFUL << FICR_DEVICEID_DEVICEID_Pos)

Bit mask of DEVICEID field.

Definition at line 1856 of file nrf52_bitfields.h.

◆ FICR_DEVICEID_DEVICEID_Pos

#define FICR_DEVICEID_DEVICEID_Pos   (0UL)

Position of DEVICEID field.

Definition at line 1855 of file nrf52_bitfields.h.

◆ FICR_ER_ER_Msk

#define FICR_ER_ER_Msk   (0xFFFFFFFFUL << FICR_ER_ER_Pos)

Bit mask of ER field.

Definition at line 1863 of file nrf52_bitfields.h.

◆ FICR_ER_ER_Pos

#define FICR_ER_ER_Pos   (0UL)

Position of ER field.

Definition at line 1862 of file nrf52_bitfields.h.

◆ FICR_INFO_FLASH_FLASH_K128

#define FICR_INFO_FLASH_FLASH_K128   (128UL)

128 kByte FLASH

Definition at line 1940 of file nrf52_bitfields.h.

◆ FICR_INFO_FLASH_FLASH_K256

#define FICR_INFO_FLASH_FLASH_K256   (256UL)

256 kByte FLASH

Definition at line 1941 of file nrf52_bitfields.h.

◆ FICR_INFO_FLASH_FLASH_K512

#define FICR_INFO_FLASH_FLASH_K512   (512UL)

512 kByte FLASH

Definition at line 1942 of file nrf52_bitfields.h.

◆ FICR_INFO_FLASH_FLASH_Msk

#define FICR_INFO_FLASH_FLASH_Msk   (0xFFFFFFFFUL << FICR_INFO_FLASH_FLASH_Pos)

Bit mask of FLASH field.

Definition at line 1939 of file nrf52_bitfields.h.

◆ FICR_INFO_FLASH_FLASH_Pos

#define FICR_INFO_FLASH_FLASH_Pos   (0UL)

Position of FLASH field.

Definition at line 1938 of file nrf52_bitfields.h.

◆ FICR_INFO_FLASH_FLASH_Unspecified

#define FICR_INFO_FLASH_FLASH_Unspecified   (0xFFFFFFFFUL)

Unspecified

Definition at line 1943 of file nrf52_bitfields.h.

◆ FICR_INFO_PACKAGE_PACKAGE_Msk

#define FICR_INFO_PACKAGE_PACKAGE_Msk   (0xFFFFFFFFUL << FICR_INFO_PACKAGE_PACKAGE_Pos)

Bit mask of PACKAGE field.

Definition at line 1915 of file nrf52_bitfields.h.

◆ FICR_INFO_PACKAGE_PACKAGE_nRF51CSP56A

#define FICR_INFO_PACKAGE_PACKAGE_nRF51CSP56A   (0x1000UL)

nRF51x22 CDxx - WLCSP 56 balls

Definition at line 1917 of file nrf52_bitfields.h.

◆ FICR_INFO_PACKAGE_PACKAGE_nRF51CSP62A

#define FICR_INFO_PACKAGE_PACKAGE_nRF51CSP62A   (0x1001UL)

nRF51x22 CExx - WLCSP 62 balls

Definition at line 1918 of file nrf52_bitfields.h.

◆ FICR_INFO_PACKAGE_PACKAGE_nRF51CSP62B

#define FICR_INFO_PACKAGE_PACKAGE_nRF51CSP62B   (0x1002UL)

nRF51x22 CFxx - WLCSP 62 balls

Definition at line 1919 of file nrf52_bitfields.h.

◆ FICR_INFO_PACKAGE_PACKAGE_nRF51CSP62C

#define FICR_INFO_PACKAGE_PACKAGE_nRF51CSP62C   (0x1003UL)

nRF51x22 CTxx - WLCSP 62 balls

Definition at line 1920 of file nrf52_bitfields.h.

◆ FICR_INFO_PACKAGE_PACKAGE_Pos

#define FICR_INFO_PACKAGE_PACKAGE_Pos   (0UL)

Position of PACKAGE field.

Definition at line 1914 of file nrf52_bitfields.h.

◆ FICR_INFO_PACKAGE_PACKAGE_QFN48

#define FICR_INFO_PACKAGE_PACKAGE_QFN48   (0x0000UL)

48-pin QFN with 31 GPIO

Definition at line 1916 of file nrf52_bitfields.h.

◆ FICR_INFO_PACKAGE_PACKAGE_Unspecified

#define FICR_INFO_PACKAGE_PACKAGE_Unspecified   (0xFFFFFFFFUL)

Unspecified

Definition at line 1921 of file nrf52_bitfields.h.

◆ FICR_INFO_PART_PART_Msk

#define FICR_INFO_PART_PART_Msk   (0xFFFFFFFFUL << FICR_INFO_PART_PART_Pos)

Bit mask of PART field.

Definition at line 1893 of file nrf52_bitfields.h.

◆ FICR_INFO_PART_PART_N51422

#define FICR_INFO_PART_PART_N51422   (0x51422UL)

nRF51422

Definition at line 1894 of file nrf52_bitfields.h.

◆ FICR_INFO_PART_PART_N51822

#define FICR_INFO_PART_PART_N51822   (0x51822UL)

nRF51822

Definition at line 1895 of file nrf52_bitfields.h.

◆ FICR_INFO_PART_PART_N52000

#define FICR_INFO_PART_PART_N52000   (0x52000UL)

nRF52000

Definition at line 1896 of file nrf52_bitfields.h.

◆ FICR_INFO_PART_PART_Pos

#define FICR_INFO_PART_PART_Pos   (0UL)

Position of PART field.

Definition at line 1892 of file nrf52_bitfields.h.

◆ FICR_INFO_PART_PART_Unspecified

#define FICR_INFO_PART_PART_Unspecified   (0xFFFFFFFFUL)

Unspecified

Definition at line 1897 of file nrf52_bitfields.h.

◆ FICR_INFO_RAM_RAM_K16

#define FICR_INFO_RAM_RAM_K16   (16UL)

16 kByte RAM

Definition at line 1929 of file nrf52_bitfields.h.

◆ FICR_INFO_RAM_RAM_K32

#define FICR_INFO_RAM_RAM_K32   (32UL)

32 kByte RAM

Definition at line 1930 of file nrf52_bitfields.h.

◆ FICR_INFO_RAM_RAM_K64

#define FICR_INFO_RAM_RAM_K64   (64UL)

64 kByte RAM

Definition at line 1931 of file nrf52_bitfields.h.

◆ FICR_INFO_RAM_RAM_Msk

#define FICR_INFO_RAM_RAM_Msk   (0xFFFFFFFFUL << FICR_INFO_RAM_RAM_Pos)

Bit mask of RAM field.

Definition at line 1928 of file nrf52_bitfields.h.

◆ FICR_INFO_RAM_RAM_Pos

#define FICR_INFO_RAM_RAM_Pos   (0UL)

Position of RAM field.

Definition at line 1927 of file nrf52_bitfields.h.

◆ FICR_INFO_RAM_RAM_Unspecified

#define FICR_INFO_RAM_RAM_Unspecified   (0xFFFFFFFFUL)

Unspecified

Definition at line 1932 of file nrf52_bitfields.h.

◆ FICR_INFO_VARIANT_VARIANT_Msk

#define FICR_INFO_VARIANT_VARIANT_Msk   (0xFFFFFFFFUL << FICR_INFO_VARIANT_VARIANT_Pos)

Bit mask of VARIANT field.

Definition at line 1904 of file nrf52_bitfields.h.

◆ FICR_INFO_VARIANT_VARIANT_nRF51C

#define FICR_INFO_VARIANT_VARIANT_nRF51C   (0x1002UL)

nRF51-C

Definition at line 1905 of file nrf52_bitfields.h.

◆ FICR_INFO_VARIANT_VARIANT_nRF51D

#define FICR_INFO_VARIANT_VARIANT_nRF51D   (0x1003UL)

nRF51-D

Definition at line 1906 of file nrf52_bitfields.h.

◆ FICR_INFO_VARIANT_VARIANT_nRF51E

#define FICR_INFO_VARIANT_VARIANT_nRF51E   (0x1004UL)

nRF51-E

Definition at line 1907 of file nrf52_bitfields.h.

◆ FICR_INFO_VARIANT_VARIANT_Pos

#define FICR_INFO_VARIANT_VARIANT_Pos   (0UL)

Position of VARIANT field.

Definition at line 1903 of file nrf52_bitfields.h.

◆ FICR_INFO_VARIANT_VARIANT_Unspecified

#define FICR_INFO_VARIANT_VARIANT_Unspecified   (0xFFFFFFFFUL)

Unspecified

Definition at line 1908 of file nrf52_bitfields.h.

◆ FICR_IR_IR_Msk

#define FICR_IR_IR_Msk   (0xFFFFFFFFUL << FICR_IR_IR_Pos)

Bit mask of IR field.

Definition at line 1870 of file nrf52_bitfields.h.

◆ FICR_IR_IR_Pos

#define FICR_IR_IR_Pos   (0UL)

Position of IR field.

Definition at line 1869 of file nrf52_bitfields.h.

◆ FICR_NFC_TAGHEADER0_MFGID_Msk

#define FICR_NFC_TAGHEADER0_MFGID_Msk   (0xFFUL << FICR_NFC_TAGHEADER0_MFGID_Pos)

Bit mask of MFGID field.

Definition at line 1962 of file nrf52_bitfields.h.

◆ FICR_NFC_TAGHEADER0_MFGID_Pos

#define FICR_NFC_TAGHEADER0_MFGID_Pos   (0UL)

Position of MFGID field.

Definition at line 1961 of file nrf52_bitfields.h.

◆ FICR_NFC_TAGHEADER0_UD1_Msk

#define FICR_NFC_TAGHEADER0_UD1_Msk   (0xFFUL << FICR_NFC_TAGHEADER0_UD1_Pos)

Bit mask of UD1 field.

Definition at line 1958 of file nrf52_bitfields.h.

◆ FICR_NFC_TAGHEADER0_UD1_Pos

#define FICR_NFC_TAGHEADER0_UD1_Pos   (8UL)

Position of UD1 field.

Definition at line 1957 of file nrf52_bitfields.h.

◆ FICR_NFC_TAGHEADER0_UD2_Msk

#define FICR_NFC_TAGHEADER0_UD2_Msk   (0xFFUL << FICR_NFC_TAGHEADER0_UD2_Pos)

Bit mask of UD2 field.

Definition at line 1954 of file nrf52_bitfields.h.

◆ FICR_NFC_TAGHEADER0_UD2_Pos

#define FICR_NFC_TAGHEADER0_UD2_Pos   (16UL)

Position of UD2 field.

Definition at line 1953 of file nrf52_bitfields.h.

◆ FICR_NFC_TAGHEADER0_UD3_Msk

#define FICR_NFC_TAGHEADER0_UD3_Msk   (0xFFUL << FICR_NFC_TAGHEADER0_UD3_Pos)

Bit mask of UD3 field.

Definition at line 1950 of file nrf52_bitfields.h.

◆ FICR_NFC_TAGHEADER0_UD3_Pos

#define FICR_NFC_TAGHEADER0_UD3_Pos   (24UL)

Position of UD3 field.

Definition at line 1949 of file nrf52_bitfields.h.

◆ FICR_NFC_TAGHEADER1_UD4_Msk

#define FICR_NFC_TAGHEADER1_UD4_Msk   (0xFFUL << FICR_NFC_TAGHEADER1_UD4_Pos)

Bit mask of UD4 field.

Definition at line 1981 of file nrf52_bitfields.h.

◆ FICR_NFC_TAGHEADER1_UD4_Pos

#define FICR_NFC_TAGHEADER1_UD4_Pos   (0UL)

Position of UD4 field.

Definition at line 1980 of file nrf52_bitfields.h.

◆ FICR_NFC_TAGHEADER1_UD5_Msk

#define FICR_NFC_TAGHEADER1_UD5_Msk   (0xFFUL << FICR_NFC_TAGHEADER1_UD5_Pos)

Bit mask of UD5 field.

Definition at line 1977 of file nrf52_bitfields.h.

◆ FICR_NFC_TAGHEADER1_UD5_Pos

#define FICR_NFC_TAGHEADER1_UD5_Pos   (8UL)

Position of UD5 field.

Definition at line 1976 of file nrf52_bitfields.h.

◆ FICR_NFC_TAGHEADER1_UD6_Msk

#define FICR_NFC_TAGHEADER1_UD6_Msk   (0xFFUL << FICR_NFC_TAGHEADER1_UD6_Pos)

Bit mask of UD6 field.

Definition at line 1973 of file nrf52_bitfields.h.

◆ FICR_NFC_TAGHEADER1_UD6_Pos

#define FICR_NFC_TAGHEADER1_UD6_Pos   (16UL)

Position of UD6 field.

Definition at line 1972 of file nrf52_bitfields.h.

◆ FICR_NFC_TAGHEADER1_UD7_Msk

#define FICR_NFC_TAGHEADER1_UD7_Msk   (0xFFUL << FICR_NFC_TAGHEADER1_UD7_Pos)

Bit mask of UD7 field.

Definition at line 1969 of file nrf52_bitfields.h.

◆ FICR_NFC_TAGHEADER1_UD7_Pos

#define FICR_NFC_TAGHEADER1_UD7_Pos   (24UL)

Position of UD7 field.

Definition at line 1968 of file nrf52_bitfields.h.

◆ FICR_NFC_TAGHEADER2_UD10_Msk

#define FICR_NFC_TAGHEADER2_UD10_Msk   (0xFFUL << FICR_NFC_TAGHEADER2_UD10_Pos)

Bit mask of UD10 field.

Definition at line 1992 of file nrf52_bitfields.h.

◆ FICR_NFC_TAGHEADER2_UD10_Pos

#define FICR_NFC_TAGHEADER2_UD10_Pos   (16UL)

Position of UD10 field.

Definition at line 1991 of file nrf52_bitfields.h.

◆ FICR_NFC_TAGHEADER2_UD11_Msk

#define FICR_NFC_TAGHEADER2_UD11_Msk   (0xFFUL << FICR_NFC_TAGHEADER2_UD11_Pos)

Bit mask of UD11 field.

Definition at line 1988 of file nrf52_bitfields.h.

◆ FICR_NFC_TAGHEADER2_UD11_Pos

#define FICR_NFC_TAGHEADER2_UD11_Pos   (24UL)

Position of UD11 field.

Definition at line 1987 of file nrf52_bitfields.h.

◆ FICR_NFC_TAGHEADER2_UD8_Msk

#define FICR_NFC_TAGHEADER2_UD8_Msk   (0xFFUL << FICR_NFC_TAGHEADER2_UD8_Pos)

Bit mask of UD8 field.

Definition at line 2000 of file nrf52_bitfields.h.

◆ FICR_NFC_TAGHEADER2_UD8_Pos

#define FICR_NFC_TAGHEADER2_UD8_Pos   (0UL)

Position of UD8 field.

Definition at line 1999 of file nrf52_bitfields.h.

◆ FICR_NFC_TAGHEADER2_UD9_Msk

#define FICR_NFC_TAGHEADER2_UD9_Msk   (0xFFUL << FICR_NFC_TAGHEADER2_UD9_Pos)

Bit mask of UD9 field.

Definition at line 1996 of file nrf52_bitfields.h.

◆ FICR_NFC_TAGHEADER2_UD9_Pos

#define FICR_NFC_TAGHEADER2_UD9_Pos   (8UL)

Position of UD9 field.

Definition at line 1995 of file nrf52_bitfields.h.

◆ FICR_NFC_TAGHEADER3_UD12_Msk

#define FICR_NFC_TAGHEADER3_UD12_Msk   (0xFFUL << FICR_NFC_TAGHEADER3_UD12_Pos)

Bit mask of UD12 field.

Definition at line 2019 of file nrf52_bitfields.h.

◆ FICR_NFC_TAGHEADER3_UD12_Pos

#define FICR_NFC_TAGHEADER3_UD12_Pos   (0UL)

Position of UD12 field.

Definition at line 2018 of file nrf52_bitfields.h.

◆ FICR_NFC_TAGHEADER3_UD13_Msk

#define FICR_NFC_TAGHEADER3_UD13_Msk   (0xFFUL << FICR_NFC_TAGHEADER3_UD13_Pos)

Bit mask of UD13 field.

Definition at line 2015 of file nrf52_bitfields.h.

◆ FICR_NFC_TAGHEADER3_UD13_Pos

#define FICR_NFC_TAGHEADER3_UD13_Pos   (8UL)

Position of UD13 field.

Definition at line 2014 of file nrf52_bitfields.h.

◆ FICR_NFC_TAGHEADER3_UD14_Msk

#define FICR_NFC_TAGHEADER3_UD14_Msk   (0xFFUL << FICR_NFC_TAGHEADER3_UD14_Pos)

Bit mask of UD14 field.

Definition at line 2011 of file nrf52_bitfields.h.

◆ FICR_NFC_TAGHEADER3_UD14_Pos

#define FICR_NFC_TAGHEADER3_UD14_Pos   (16UL)

Position of UD14 field.

Definition at line 2010 of file nrf52_bitfields.h.

◆ FICR_NFC_TAGHEADER3_UD15_Msk

#define FICR_NFC_TAGHEADER3_UD15_Msk   (0xFFUL << FICR_NFC_TAGHEADER3_UD15_Pos)

Bit mask of UD15 field.

Definition at line 2007 of file nrf52_bitfields.h.

◆ FICR_NFC_TAGHEADER3_UD15_Pos

#define FICR_NFC_TAGHEADER3_UD15_Pos   (24UL)

Position of UD15 field.

Definition at line 2006 of file nrf52_bitfields.h.

◆ GPIO_DETECTMODE_DETECTMODE_Default

#define GPIO_DETECTMODE_DETECTMODE_Default   (0UL)

Use default behaviour

Definition at line 6239 of file nrf52_bitfields.h.

◆ GPIO_DETECTMODE_DETECTMODE_LDETECT

#define GPIO_DETECTMODE_DETECTMODE_LDETECT   (1UL)

Use LDETECT behaviour

Definition at line 6240 of file nrf52_bitfields.h.

◆ GPIO_DETECTMODE_DETECTMODE_Msk

#define GPIO_DETECTMODE_DETECTMODE_Msk   (0x1UL << GPIO_DETECTMODE_DETECTMODE_Pos)

Bit mask of DETECTMODE field.

Definition at line 6238 of file nrf52_bitfields.h.

◆ GPIO_DETECTMODE_DETECTMODE_Pos

#define GPIO_DETECTMODE_DETECTMODE_Pos   (0UL)

Position of DETECTMODE field.

Definition at line 6237 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN0_Input

#define GPIO_DIR_PIN0_Input   (0UL)

Pin set as input

Definition at line 5769 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN0_Msk

#define GPIO_DIR_PIN0_Msk   (0x1UL << GPIO_DIR_PIN0_Pos)

Bit mask of PIN0 field.

Definition at line 5768 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN0_Output

#define GPIO_DIR_PIN0_Output   (1UL)

Pin set as output

Definition at line 5770 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN0_Pos

#define GPIO_DIR_PIN0_Pos   (0UL)

Position of PIN0 field.

Definition at line 5767 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN10_Input

#define GPIO_DIR_PIN10_Input   (0UL)

Pin set as input

Definition at line 5709 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN10_Msk

#define GPIO_DIR_PIN10_Msk   (0x1UL << GPIO_DIR_PIN10_Pos)

Bit mask of PIN10 field.

Definition at line 5708 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN10_Output

#define GPIO_DIR_PIN10_Output   (1UL)

Pin set as output

Definition at line 5710 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN10_Pos

#define GPIO_DIR_PIN10_Pos   (10UL)

Position of PIN10 field.

Definition at line 5707 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN11_Input

#define GPIO_DIR_PIN11_Input   (0UL)

Pin set as input

Definition at line 5703 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN11_Msk

#define GPIO_DIR_PIN11_Msk   (0x1UL << GPIO_DIR_PIN11_Pos)

Bit mask of PIN11 field.

Definition at line 5702 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN11_Output

#define GPIO_DIR_PIN11_Output   (1UL)

Pin set as output

Definition at line 5704 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN11_Pos

#define GPIO_DIR_PIN11_Pos   (11UL)

Position of PIN11 field.

Definition at line 5701 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN12_Input

#define GPIO_DIR_PIN12_Input   (0UL)

Pin set as input

Definition at line 5697 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN12_Msk

#define GPIO_DIR_PIN12_Msk   (0x1UL << GPIO_DIR_PIN12_Pos)

Bit mask of PIN12 field.

Definition at line 5696 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN12_Output

#define GPIO_DIR_PIN12_Output   (1UL)

Pin set as output

Definition at line 5698 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN12_Pos

#define GPIO_DIR_PIN12_Pos   (12UL)

Position of PIN12 field.

Definition at line 5695 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN13_Input

#define GPIO_DIR_PIN13_Input   (0UL)

Pin set as input

Definition at line 5691 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN13_Msk

#define GPIO_DIR_PIN13_Msk   (0x1UL << GPIO_DIR_PIN13_Pos)

Bit mask of PIN13 field.

Definition at line 5690 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN13_Output

#define GPIO_DIR_PIN13_Output   (1UL)

Pin set as output

Definition at line 5692 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN13_Pos

#define GPIO_DIR_PIN13_Pos   (13UL)

Position of PIN13 field.

Definition at line 5689 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN14_Input

#define GPIO_DIR_PIN14_Input   (0UL)

Pin set as input

Definition at line 5685 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN14_Msk

#define GPIO_DIR_PIN14_Msk   (0x1UL << GPIO_DIR_PIN14_Pos)

Bit mask of PIN14 field.

Definition at line 5684 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN14_Output

#define GPIO_DIR_PIN14_Output   (1UL)

Pin set as output

Definition at line 5686 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN14_Pos

#define GPIO_DIR_PIN14_Pos   (14UL)

Position of PIN14 field.

Definition at line 5683 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN15_Input

#define GPIO_DIR_PIN15_Input   (0UL)

Pin set as input

Definition at line 5679 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN15_Msk

#define GPIO_DIR_PIN15_Msk   (0x1UL << GPIO_DIR_PIN15_Pos)

Bit mask of PIN15 field.

Definition at line 5678 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN15_Output

#define GPIO_DIR_PIN15_Output   (1UL)

Pin set as output

Definition at line 5680 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN15_Pos

#define GPIO_DIR_PIN15_Pos   (15UL)

Position of PIN15 field.

Definition at line 5677 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN16_Input

#define GPIO_DIR_PIN16_Input   (0UL)

Pin set as input

Definition at line 5673 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN16_Msk

#define GPIO_DIR_PIN16_Msk   (0x1UL << GPIO_DIR_PIN16_Pos)

Bit mask of PIN16 field.

Definition at line 5672 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN16_Output

#define GPIO_DIR_PIN16_Output   (1UL)

Pin set as output

Definition at line 5674 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN16_Pos

#define GPIO_DIR_PIN16_Pos   (16UL)

Position of PIN16 field.

Definition at line 5671 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN17_Input

#define GPIO_DIR_PIN17_Input   (0UL)

Pin set as input

Definition at line 5667 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN17_Msk

#define GPIO_DIR_PIN17_Msk   (0x1UL << GPIO_DIR_PIN17_Pos)

Bit mask of PIN17 field.

Definition at line 5666 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN17_Output

#define GPIO_DIR_PIN17_Output   (1UL)

Pin set as output

Definition at line 5668 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN17_Pos

#define GPIO_DIR_PIN17_Pos   (17UL)

Position of PIN17 field.

Definition at line 5665 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN18_Input

#define GPIO_DIR_PIN18_Input   (0UL)

Pin set as input

Definition at line 5661 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN18_Msk

#define GPIO_DIR_PIN18_Msk   (0x1UL << GPIO_DIR_PIN18_Pos)

Bit mask of PIN18 field.

Definition at line 5660 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN18_Output

#define GPIO_DIR_PIN18_Output   (1UL)

Pin set as output

Definition at line 5662 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN18_Pos

#define GPIO_DIR_PIN18_Pos   (18UL)

Position of PIN18 field.

Definition at line 5659 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN19_Input

#define GPIO_DIR_PIN19_Input   (0UL)

Pin set as input

Definition at line 5655 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN19_Msk

#define GPIO_DIR_PIN19_Msk   (0x1UL << GPIO_DIR_PIN19_Pos)

Bit mask of PIN19 field.

Definition at line 5654 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN19_Output

#define GPIO_DIR_PIN19_Output   (1UL)

Pin set as output

Definition at line 5656 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN19_Pos

#define GPIO_DIR_PIN19_Pos   (19UL)

Position of PIN19 field.

Definition at line 5653 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN1_Input

#define GPIO_DIR_PIN1_Input   (0UL)

Pin set as input

Definition at line 5763 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN1_Msk

#define GPIO_DIR_PIN1_Msk   (0x1UL << GPIO_DIR_PIN1_Pos)

Bit mask of PIN1 field.

Definition at line 5762 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN1_Output

#define GPIO_DIR_PIN1_Output   (1UL)

Pin set as output

Definition at line 5764 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN1_Pos

#define GPIO_DIR_PIN1_Pos   (1UL)

Position of PIN1 field.

Definition at line 5761 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN20_Input

#define GPIO_DIR_PIN20_Input   (0UL)

Pin set as input

Definition at line 5649 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN20_Msk

#define GPIO_DIR_PIN20_Msk   (0x1UL << GPIO_DIR_PIN20_Pos)

Bit mask of PIN20 field.

Definition at line 5648 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN20_Output

#define GPIO_DIR_PIN20_Output   (1UL)

Pin set as output

Definition at line 5650 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN20_Pos

#define GPIO_DIR_PIN20_Pos   (20UL)

Position of PIN20 field.

Definition at line 5647 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN21_Input

#define GPIO_DIR_PIN21_Input   (0UL)

Pin set as input

Definition at line 5643 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN21_Msk

#define GPIO_DIR_PIN21_Msk   (0x1UL << GPIO_DIR_PIN21_Pos)

Bit mask of PIN21 field.

Definition at line 5642 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN21_Output

#define GPIO_DIR_PIN21_Output   (1UL)

Pin set as output

Definition at line 5644 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN21_Pos

#define GPIO_DIR_PIN21_Pos   (21UL)

Position of PIN21 field.

Definition at line 5641 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN22_Input

#define GPIO_DIR_PIN22_Input   (0UL)

Pin set as input

Definition at line 5637 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN22_Msk

#define GPIO_DIR_PIN22_Msk   (0x1UL << GPIO_DIR_PIN22_Pos)

Bit mask of PIN22 field.

Definition at line 5636 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN22_Output

#define GPIO_DIR_PIN22_Output   (1UL)

Pin set as output

Definition at line 5638 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN22_Pos

#define GPIO_DIR_PIN22_Pos   (22UL)

Position of PIN22 field.

Definition at line 5635 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN23_Input

#define GPIO_DIR_PIN23_Input   (0UL)

Pin set as input

Definition at line 5631 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN23_Msk

#define GPIO_DIR_PIN23_Msk   (0x1UL << GPIO_DIR_PIN23_Pos)

Bit mask of PIN23 field.

Definition at line 5630 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN23_Output

#define GPIO_DIR_PIN23_Output   (1UL)

Pin set as output

Definition at line 5632 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN23_Pos

#define GPIO_DIR_PIN23_Pos   (23UL)

Position of PIN23 field.

Definition at line 5629 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN24_Input

#define GPIO_DIR_PIN24_Input   (0UL)

Pin set as input

Definition at line 5625 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN24_Msk

#define GPIO_DIR_PIN24_Msk   (0x1UL << GPIO_DIR_PIN24_Pos)

Bit mask of PIN24 field.

Definition at line 5624 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN24_Output

#define GPIO_DIR_PIN24_Output   (1UL)

Pin set as output

Definition at line 5626 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN24_Pos

#define GPIO_DIR_PIN24_Pos   (24UL)

Position of PIN24 field.

Definition at line 5623 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN25_Input

#define GPIO_DIR_PIN25_Input   (0UL)

Pin set as input

Definition at line 5619 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN25_Msk

#define GPIO_DIR_PIN25_Msk   (0x1UL << GPIO_DIR_PIN25_Pos)

Bit mask of PIN25 field.

Definition at line 5618 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN25_Output

#define GPIO_DIR_PIN25_Output   (1UL)

Pin set as output

Definition at line 5620 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN25_Pos

#define GPIO_DIR_PIN25_Pos   (25UL)

Position of PIN25 field.

Definition at line 5617 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN26_Input

#define GPIO_DIR_PIN26_Input   (0UL)

Pin set as input

Definition at line 5613 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN26_Msk

#define GPIO_DIR_PIN26_Msk   (0x1UL << GPIO_DIR_PIN26_Pos)

Bit mask of PIN26 field.

Definition at line 5612 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN26_Output

#define GPIO_DIR_PIN26_Output   (1UL)

Pin set as output

Definition at line 5614 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN26_Pos

#define GPIO_DIR_PIN26_Pos   (26UL)

Position of PIN26 field.

Definition at line 5611 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN27_Input

#define GPIO_DIR_PIN27_Input   (0UL)

Pin set as input

Definition at line 5607 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN27_Msk

#define GPIO_DIR_PIN27_Msk   (0x1UL << GPIO_DIR_PIN27_Pos)

Bit mask of PIN27 field.

Definition at line 5606 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN27_Output

#define GPIO_DIR_PIN27_Output   (1UL)

Pin set as output

Definition at line 5608 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN27_Pos

#define GPIO_DIR_PIN27_Pos   (27UL)

Position of PIN27 field.

Definition at line 5605 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN28_Input

#define GPIO_DIR_PIN28_Input   (0UL)

Pin set as input

Definition at line 5601 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN28_Msk

#define GPIO_DIR_PIN28_Msk   (0x1UL << GPIO_DIR_PIN28_Pos)

Bit mask of PIN28 field.

Definition at line 5600 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN28_Output

#define GPIO_DIR_PIN28_Output   (1UL)

Pin set as output

Definition at line 5602 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN28_Pos

#define GPIO_DIR_PIN28_Pos   (28UL)

Position of PIN28 field.

Definition at line 5599 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN29_Input

#define GPIO_DIR_PIN29_Input   (0UL)

Pin set as input

Definition at line 5595 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN29_Msk

#define GPIO_DIR_PIN29_Msk   (0x1UL << GPIO_DIR_PIN29_Pos)

Bit mask of PIN29 field.

Definition at line 5594 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN29_Output

#define GPIO_DIR_PIN29_Output   (1UL)

Pin set as output

Definition at line 5596 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN29_Pos

#define GPIO_DIR_PIN29_Pos   (29UL)

Position of PIN29 field.

Definition at line 5593 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN2_Input

#define GPIO_DIR_PIN2_Input   (0UL)

Pin set as input

Definition at line 5757 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN2_Msk

#define GPIO_DIR_PIN2_Msk   (0x1UL << GPIO_DIR_PIN2_Pos)

Bit mask of PIN2 field.

Definition at line 5756 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN2_Output

#define GPIO_DIR_PIN2_Output   (1UL)

Pin set as output

Definition at line 5758 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN2_Pos

#define GPIO_DIR_PIN2_Pos   (2UL)

Position of PIN2 field.

Definition at line 5755 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN30_Input

#define GPIO_DIR_PIN30_Input   (0UL)

Pin set as input

Definition at line 5589 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN30_Msk

#define GPIO_DIR_PIN30_Msk   (0x1UL << GPIO_DIR_PIN30_Pos)

Bit mask of PIN30 field.

Definition at line 5588 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN30_Output

#define GPIO_DIR_PIN30_Output   (1UL)

Pin set as output

Definition at line 5590 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN30_Pos

#define GPIO_DIR_PIN30_Pos   (30UL)

Position of PIN30 field.

Definition at line 5587 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN31_Input

#define GPIO_DIR_PIN31_Input   (0UL)

Pin set as input

Definition at line 5583 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN31_Msk

#define GPIO_DIR_PIN31_Msk   (0x1UL << GPIO_DIR_PIN31_Pos)

Bit mask of PIN31 field.

Definition at line 5582 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN31_Output

#define GPIO_DIR_PIN31_Output   (1UL)

Pin set as output

Definition at line 5584 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN31_Pos

#define GPIO_DIR_PIN31_Pos   (31UL)

Position of PIN31 field.

Definition at line 5581 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN3_Input

#define GPIO_DIR_PIN3_Input   (0UL)

Pin set as input

Definition at line 5751 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN3_Msk

#define GPIO_DIR_PIN3_Msk   (0x1UL << GPIO_DIR_PIN3_Pos)

Bit mask of PIN3 field.

Definition at line 5750 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN3_Output

#define GPIO_DIR_PIN3_Output   (1UL)

Pin set as output

Definition at line 5752 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN3_Pos

#define GPIO_DIR_PIN3_Pos   (3UL)

Position of PIN3 field.

Definition at line 5749 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN4_Input

#define GPIO_DIR_PIN4_Input   (0UL)

Pin set as input

Definition at line 5745 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN4_Msk

#define GPIO_DIR_PIN4_Msk   (0x1UL << GPIO_DIR_PIN4_Pos)

Bit mask of PIN4 field.

Definition at line 5744 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN4_Output

#define GPIO_DIR_PIN4_Output   (1UL)

Pin set as output

Definition at line 5746 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN4_Pos

#define GPIO_DIR_PIN4_Pos   (4UL)

Position of PIN4 field.

Definition at line 5743 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN5_Input

#define GPIO_DIR_PIN5_Input   (0UL)

Pin set as input

Definition at line 5739 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN5_Msk

#define GPIO_DIR_PIN5_Msk   (0x1UL << GPIO_DIR_PIN5_Pos)

Bit mask of PIN5 field.

Definition at line 5738 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN5_Output

#define GPIO_DIR_PIN5_Output   (1UL)

Pin set as output

Definition at line 5740 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN5_Pos

#define GPIO_DIR_PIN5_Pos   (5UL)

Position of PIN5 field.

Definition at line 5737 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN6_Input

#define GPIO_DIR_PIN6_Input   (0UL)

Pin set as input

Definition at line 5733 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN6_Msk

#define GPIO_DIR_PIN6_Msk   (0x1UL << GPIO_DIR_PIN6_Pos)

Bit mask of PIN6 field.

Definition at line 5732 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN6_Output

#define GPIO_DIR_PIN6_Output   (1UL)

Pin set as output

Definition at line 5734 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN6_Pos

#define GPIO_DIR_PIN6_Pos   (6UL)

Position of PIN6 field.

Definition at line 5731 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN7_Input

#define GPIO_DIR_PIN7_Input   (0UL)

Pin set as input

Definition at line 5727 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN7_Msk

#define GPIO_DIR_PIN7_Msk   (0x1UL << GPIO_DIR_PIN7_Pos)

Bit mask of PIN7 field.

Definition at line 5726 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN7_Output

#define GPIO_DIR_PIN7_Output   (1UL)

Pin set as output

Definition at line 5728 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN7_Pos

#define GPIO_DIR_PIN7_Pos   (7UL)

Position of PIN7 field.

Definition at line 5725 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN8_Input

#define GPIO_DIR_PIN8_Input   (0UL)

Pin set as input

Definition at line 5721 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN8_Msk

#define GPIO_DIR_PIN8_Msk   (0x1UL << GPIO_DIR_PIN8_Pos)

Bit mask of PIN8 field.

Definition at line 5720 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN8_Output

#define GPIO_DIR_PIN8_Output   (1UL)

Pin set as output

Definition at line 5722 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN8_Pos

#define GPIO_DIR_PIN8_Pos   (8UL)

Position of PIN8 field.

Definition at line 5719 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN9_Input

#define GPIO_DIR_PIN9_Input   (0UL)

Pin set as input

Definition at line 5715 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN9_Msk

#define GPIO_DIR_PIN9_Msk   (0x1UL << GPIO_DIR_PIN9_Pos)

Bit mask of PIN9 field.

Definition at line 5714 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN9_Output

#define GPIO_DIR_PIN9_Output   (1UL)

Pin set as output

Definition at line 5716 of file nrf52_bitfields.h.

◆ GPIO_DIR_PIN9_Pos

#define GPIO_DIR_PIN9_Pos   (9UL)

Position of PIN9 field.

Definition at line 5713 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN0_Clear

#define GPIO_DIRCLR_PIN0_Clear   (1UL)

Write: writing a '1' sets pin to input; writing a '0' has no effect

Definition at line 6224 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN0_Input

#define GPIO_DIRCLR_PIN0_Input   (0UL)

Read: pin set as input

Definition at line 6222 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN0_Msk

#define GPIO_DIRCLR_PIN0_Msk   (0x1UL << GPIO_DIRCLR_PIN0_Pos)

Bit mask of PIN0 field.

Definition at line 6221 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN0_Output

#define GPIO_DIRCLR_PIN0_Output   (1UL)

Read: pin set as output

Definition at line 6223 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN0_Pos

#define GPIO_DIRCLR_PIN0_Pos   (0UL)

Position of PIN0 field.

Definition at line 6220 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN10_Clear

#define GPIO_DIRCLR_PIN10_Clear   (1UL)

Write: writing a '1' sets pin to input; writing a '0' has no effect

Definition at line 6154 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN10_Input

#define GPIO_DIRCLR_PIN10_Input   (0UL)

Read: pin set as input

Definition at line 6152 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN10_Msk

#define GPIO_DIRCLR_PIN10_Msk   (0x1UL << GPIO_DIRCLR_PIN10_Pos)

Bit mask of PIN10 field.

Definition at line 6151 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN10_Output

#define GPIO_DIRCLR_PIN10_Output   (1UL)

Read: pin set as output

Definition at line 6153 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN10_Pos

#define GPIO_DIRCLR_PIN10_Pos   (10UL)

Position of PIN10 field.

Definition at line 6150 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN11_Clear

#define GPIO_DIRCLR_PIN11_Clear   (1UL)

Write: writing a '1' sets pin to input; writing a '0' has no effect

Definition at line 6147 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN11_Input

#define GPIO_DIRCLR_PIN11_Input   (0UL)

Read: pin set as input

Definition at line 6145 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN11_Msk

#define GPIO_DIRCLR_PIN11_Msk   (0x1UL << GPIO_DIRCLR_PIN11_Pos)

Bit mask of PIN11 field.

Definition at line 6144 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN11_Output

#define GPIO_DIRCLR_PIN11_Output   (1UL)

Read: pin set as output

Definition at line 6146 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN11_Pos

#define GPIO_DIRCLR_PIN11_Pos   (11UL)

Position of PIN11 field.

Definition at line 6143 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN12_Clear

#define GPIO_DIRCLR_PIN12_Clear   (1UL)

Write: writing a '1' sets pin to input; writing a '0' has no effect

Definition at line 6140 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN12_Input

#define GPIO_DIRCLR_PIN12_Input   (0UL)

Read: pin set as input

Definition at line 6138 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN12_Msk

#define GPIO_DIRCLR_PIN12_Msk   (0x1UL << GPIO_DIRCLR_PIN12_Pos)

Bit mask of PIN12 field.

Definition at line 6137 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN12_Output

#define GPIO_DIRCLR_PIN12_Output   (1UL)

Read: pin set as output

Definition at line 6139 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN12_Pos

#define GPIO_DIRCLR_PIN12_Pos   (12UL)

Position of PIN12 field.

Definition at line 6136 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN13_Clear

#define GPIO_DIRCLR_PIN13_Clear   (1UL)

Write: writing a '1' sets pin to input; writing a '0' has no effect

Definition at line 6133 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN13_Input

#define GPIO_DIRCLR_PIN13_Input   (0UL)

Read: pin set as input

Definition at line 6131 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN13_Msk

#define GPIO_DIRCLR_PIN13_Msk   (0x1UL << GPIO_DIRCLR_PIN13_Pos)

Bit mask of PIN13 field.

Definition at line 6130 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN13_Output

#define GPIO_DIRCLR_PIN13_Output   (1UL)

Read: pin set as output

Definition at line 6132 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN13_Pos

#define GPIO_DIRCLR_PIN13_Pos   (13UL)

Position of PIN13 field.

Definition at line 6129 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN14_Clear

#define GPIO_DIRCLR_PIN14_Clear   (1UL)

Write: writing a '1' sets pin to input; writing a '0' has no effect

Definition at line 6126 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN14_Input

#define GPIO_DIRCLR_PIN14_Input   (0UL)

Read: pin set as input

Definition at line 6124 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN14_Msk

#define GPIO_DIRCLR_PIN14_Msk   (0x1UL << GPIO_DIRCLR_PIN14_Pos)

Bit mask of PIN14 field.

Definition at line 6123 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN14_Output

#define GPIO_DIRCLR_PIN14_Output   (1UL)

Read: pin set as output

Definition at line 6125 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN14_Pos

#define GPIO_DIRCLR_PIN14_Pos   (14UL)

Position of PIN14 field.

Definition at line 6122 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN15_Clear

#define GPIO_DIRCLR_PIN15_Clear   (1UL)

Write: writing a '1' sets pin to input; writing a '0' has no effect

Definition at line 6119 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN15_Input

#define GPIO_DIRCLR_PIN15_Input   (0UL)

Read: pin set as input

Definition at line 6117 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN15_Msk

#define GPIO_DIRCLR_PIN15_Msk   (0x1UL << GPIO_DIRCLR_PIN15_Pos)

Bit mask of PIN15 field.

Definition at line 6116 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN15_Output

#define GPIO_DIRCLR_PIN15_Output   (1UL)

Read: pin set as output

Definition at line 6118 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN15_Pos

#define GPIO_DIRCLR_PIN15_Pos   (15UL)

Position of PIN15 field.

Definition at line 6115 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN16_Clear

#define GPIO_DIRCLR_PIN16_Clear   (1UL)

Write: writing a '1' sets pin to input; writing a '0' has no effect

Definition at line 6112 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN16_Input

#define GPIO_DIRCLR_PIN16_Input   (0UL)

Read: pin set as input

Definition at line 6110 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN16_Msk

#define GPIO_DIRCLR_PIN16_Msk   (0x1UL << GPIO_DIRCLR_PIN16_Pos)

Bit mask of PIN16 field.

Definition at line 6109 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN16_Output

#define GPIO_DIRCLR_PIN16_Output   (1UL)

Read: pin set as output

Definition at line 6111 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN16_Pos

#define GPIO_DIRCLR_PIN16_Pos   (16UL)

Position of PIN16 field.

Definition at line 6108 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN17_Clear

#define GPIO_DIRCLR_PIN17_Clear   (1UL)

Write: writing a '1' sets pin to input; writing a '0' has no effect

Definition at line 6105 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN17_Input

#define GPIO_DIRCLR_PIN17_Input   (0UL)

Read: pin set as input

Definition at line 6103 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN17_Msk

#define GPIO_DIRCLR_PIN17_Msk   (0x1UL << GPIO_DIRCLR_PIN17_Pos)

Bit mask of PIN17 field.

Definition at line 6102 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN17_Output

#define GPIO_DIRCLR_PIN17_Output   (1UL)

Read: pin set as output

Definition at line 6104 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN17_Pos

#define GPIO_DIRCLR_PIN17_Pos   (17UL)

Position of PIN17 field.

Definition at line 6101 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN18_Clear

#define GPIO_DIRCLR_PIN18_Clear   (1UL)

Write: writing a '1' sets pin to input; writing a '0' has no effect

Definition at line 6098 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN18_Input

#define GPIO_DIRCLR_PIN18_Input   (0UL)

Read: pin set as input

Definition at line 6096 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN18_Msk

#define GPIO_DIRCLR_PIN18_Msk   (0x1UL << GPIO_DIRCLR_PIN18_Pos)

Bit mask of PIN18 field.

Definition at line 6095 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN18_Output

#define GPIO_DIRCLR_PIN18_Output   (1UL)

Read: pin set as output

Definition at line 6097 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN18_Pos

#define GPIO_DIRCLR_PIN18_Pos   (18UL)

Position of PIN18 field.

Definition at line 6094 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN19_Clear

#define GPIO_DIRCLR_PIN19_Clear   (1UL)

Write: writing a '1' sets pin to input; writing a '0' has no effect

Definition at line 6091 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN19_Input

#define GPIO_DIRCLR_PIN19_Input   (0UL)

Read: pin set as input

Definition at line 6089 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN19_Msk

#define GPIO_DIRCLR_PIN19_Msk   (0x1UL << GPIO_DIRCLR_PIN19_Pos)

Bit mask of PIN19 field.

Definition at line 6088 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN19_Output

#define GPIO_DIRCLR_PIN19_Output   (1UL)

Read: pin set as output

Definition at line 6090 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN19_Pos

#define GPIO_DIRCLR_PIN19_Pos   (19UL)

Position of PIN19 field.

Definition at line 6087 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN1_Clear

#define GPIO_DIRCLR_PIN1_Clear   (1UL)

Write: writing a '1' sets pin to input; writing a '0' has no effect

Definition at line 6217 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN1_Input

#define GPIO_DIRCLR_PIN1_Input   (0UL)

Read: pin set as input

Definition at line 6215 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN1_Msk

#define GPIO_DIRCLR_PIN1_Msk   (0x1UL << GPIO_DIRCLR_PIN1_Pos)

Bit mask of PIN1 field.

Definition at line 6214 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN1_Output

#define GPIO_DIRCLR_PIN1_Output   (1UL)

Read: pin set as output

Definition at line 6216 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN1_Pos

#define GPIO_DIRCLR_PIN1_Pos   (1UL)

Position of PIN1 field.

Definition at line 6213 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN20_Clear

#define GPIO_DIRCLR_PIN20_Clear   (1UL)

Write: writing a '1' sets pin to input; writing a '0' has no effect

Definition at line 6084 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN20_Input

#define GPIO_DIRCLR_PIN20_Input   (0UL)

Read: pin set as input

Definition at line 6082 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN20_Msk

#define GPIO_DIRCLR_PIN20_Msk   (0x1UL << GPIO_DIRCLR_PIN20_Pos)

Bit mask of PIN20 field.

Definition at line 6081 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN20_Output

#define GPIO_DIRCLR_PIN20_Output   (1UL)

Read: pin set as output

Definition at line 6083 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN20_Pos

#define GPIO_DIRCLR_PIN20_Pos   (20UL)

Position of PIN20 field.

Definition at line 6080 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN21_Clear

#define GPIO_DIRCLR_PIN21_Clear   (1UL)

Write: writing a '1' sets pin to input; writing a '0' has no effect

Definition at line 6077 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN21_Input

#define GPIO_DIRCLR_PIN21_Input   (0UL)

Read: pin set as input

Definition at line 6075 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN21_Msk

#define GPIO_DIRCLR_PIN21_Msk   (0x1UL << GPIO_DIRCLR_PIN21_Pos)

Bit mask of PIN21 field.

Definition at line 6074 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN21_Output

#define GPIO_DIRCLR_PIN21_Output   (1UL)

Read: pin set as output

Definition at line 6076 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN21_Pos

#define GPIO_DIRCLR_PIN21_Pos   (21UL)

Position of PIN21 field.

Definition at line 6073 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN22_Clear

#define GPIO_DIRCLR_PIN22_Clear   (1UL)

Write: writing a '1' sets pin to input; writing a '0' has no effect

Definition at line 6070 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN22_Input

#define GPIO_DIRCLR_PIN22_Input   (0UL)

Read: pin set as input

Definition at line 6068 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN22_Msk

#define GPIO_DIRCLR_PIN22_Msk   (0x1UL << GPIO_DIRCLR_PIN22_Pos)

Bit mask of PIN22 field.

Definition at line 6067 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN22_Output

#define GPIO_DIRCLR_PIN22_Output   (1UL)

Read: pin set as output

Definition at line 6069 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN22_Pos

#define GPIO_DIRCLR_PIN22_Pos   (22UL)

Position of PIN22 field.

Definition at line 6066 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN23_Clear

#define GPIO_DIRCLR_PIN23_Clear   (1UL)

Write: writing a '1' sets pin to input; writing a '0' has no effect

Definition at line 6063 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN23_Input

#define GPIO_DIRCLR_PIN23_Input   (0UL)

Read: pin set as input

Definition at line 6061 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN23_Msk

#define GPIO_DIRCLR_PIN23_Msk   (0x1UL << GPIO_DIRCLR_PIN23_Pos)

Bit mask of PIN23 field.

Definition at line 6060 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN23_Output

#define GPIO_DIRCLR_PIN23_Output   (1UL)

Read: pin set as output

Definition at line 6062 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN23_Pos

#define GPIO_DIRCLR_PIN23_Pos   (23UL)

Position of PIN23 field.

Definition at line 6059 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN24_Clear

#define GPIO_DIRCLR_PIN24_Clear   (1UL)

Write: writing a '1' sets pin to input; writing a '0' has no effect

Definition at line 6056 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN24_Input

#define GPIO_DIRCLR_PIN24_Input   (0UL)

Read: pin set as input

Definition at line 6054 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN24_Msk

#define GPIO_DIRCLR_PIN24_Msk   (0x1UL << GPIO_DIRCLR_PIN24_Pos)

Bit mask of PIN24 field.

Definition at line 6053 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN24_Output

#define GPIO_DIRCLR_PIN24_Output   (1UL)

Read: pin set as output

Definition at line 6055 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN24_Pos

#define GPIO_DIRCLR_PIN24_Pos   (24UL)

Position of PIN24 field.

Definition at line 6052 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN25_Clear

#define GPIO_DIRCLR_PIN25_Clear   (1UL)

Write: writing a '1' sets pin to input; writing a '0' has no effect

Definition at line 6049 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN25_Input

#define GPIO_DIRCLR_PIN25_Input   (0UL)

Read: pin set as input

Definition at line 6047 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN25_Msk

#define GPIO_DIRCLR_PIN25_Msk   (0x1UL << GPIO_DIRCLR_PIN25_Pos)

Bit mask of PIN25 field.

Definition at line 6046 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN25_Output

#define GPIO_DIRCLR_PIN25_Output   (1UL)

Read: pin set as output

Definition at line 6048 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN25_Pos

#define GPIO_DIRCLR_PIN25_Pos   (25UL)

Position of PIN25 field.

Definition at line 6045 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN26_Clear

#define GPIO_DIRCLR_PIN26_Clear   (1UL)

Write: writing a '1' sets pin to input; writing a '0' has no effect

Definition at line 6042 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN26_Input

#define GPIO_DIRCLR_PIN26_Input   (0UL)

Read: pin set as input

Definition at line 6040 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN26_Msk

#define GPIO_DIRCLR_PIN26_Msk   (0x1UL << GPIO_DIRCLR_PIN26_Pos)

Bit mask of PIN26 field.

Definition at line 6039 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN26_Output

#define GPIO_DIRCLR_PIN26_Output   (1UL)

Read: pin set as output

Definition at line 6041 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN26_Pos

#define GPIO_DIRCLR_PIN26_Pos   (26UL)

Position of PIN26 field.

Definition at line 6038 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN27_Clear

#define GPIO_DIRCLR_PIN27_Clear   (1UL)

Write: writing a '1' sets pin to input; writing a '0' has no effect

Definition at line 6035 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN27_Input

#define GPIO_DIRCLR_PIN27_Input   (0UL)

Read: pin set as input

Definition at line 6033 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN27_Msk

#define GPIO_DIRCLR_PIN27_Msk   (0x1UL << GPIO_DIRCLR_PIN27_Pos)

Bit mask of PIN27 field.

Definition at line 6032 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN27_Output

#define GPIO_DIRCLR_PIN27_Output   (1UL)

Read: pin set as output

Definition at line 6034 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN27_Pos

#define GPIO_DIRCLR_PIN27_Pos   (27UL)

Position of PIN27 field.

Definition at line 6031 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN28_Clear

#define GPIO_DIRCLR_PIN28_Clear   (1UL)

Write: writing a '1' sets pin to input; writing a '0' has no effect

Definition at line 6028 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN28_Input

#define GPIO_DIRCLR_PIN28_Input   (0UL)

Read: pin set as input

Definition at line 6026 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN28_Msk

#define GPIO_DIRCLR_PIN28_Msk   (0x1UL << GPIO_DIRCLR_PIN28_Pos)

Bit mask of PIN28 field.

Definition at line 6025 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN28_Output

#define GPIO_DIRCLR_PIN28_Output   (1UL)

Read: pin set as output

Definition at line 6027 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN28_Pos

#define GPIO_DIRCLR_PIN28_Pos   (28UL)

Position of PIN28 field.

Definition at line 6024 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN29_Clear

#define GPIO_DIRCLR_PIN29_Clear   (1UL)

Write: writing a '1' sets pin to input; writing a '0' has no effect

Definition at line 6021 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN29_Input

#define GPIO_DIRCLR_PIN29_Input   (0UL)

Read: pin set as input

Definition at line 6019 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN29_Msk

#define GPIO_DIRCLR_PIN29_Msk   (0x1UL << GPIO_DIRCLR_PIN29_Pos)

Bit mask of PIN29 field.

Definition at line 6018 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN29_Output

#define GPIO_DIRCLR_PIN29_Output   (1UL)

Read: pin set as output

Definition at line 6020 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN29_Pos

#define GPIO_DIRCLR_PIN29_Pos   (29UL)

Position of PIN29 field.

Definition at line 6017 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN2_Clear

#define GPIO_DIRCLR_PIN2_Clear   (1UL)

Write: writing a '1' sets pin to input; writing a '0' has no effect

Definition at line 6210 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN2_Input

#define GPIO_DIRCLR_PIN2_Input   (0UL)

Read: pin set as input

Definition at line 6208 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN2_Msk

#define GPIO_DIRCLR_PIN2_Msk   (0x1UL << GPIO_DIRCLR_PIN2_Pos)

Bit mask of PIN2 field.

Definition at line 6207 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN2_Output

#define GPIO_DIRCLR_PIN2_Output   (1UL)

Read: pin set as output

Definition at line 6209 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN2_Pos

#define GPIO_DIRCLR_PIN2_Pos   (2UL)

Position of PIN2 field.

Definition at line 6206 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN30_Clear

#define GPIO_DIRCLR_PIN30_Clear   (1UL)

Write: writing a '1' sets pin to input; writing a '0' has no effect

Definition at line 6014 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN30_Input

#define GPIO_DIRCLR_PIN30_Input   (0UL)

Read: pin set as input

Definition at line 6012 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN30_Msk

#define GPIO_DIRCLR_PIN30_Msk   (0x1UL << GPIO_DIRCLR_PIN30_Pos)

Bit mask of PIN30 field.

Definition at line 6011 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN30_Output

#define GPIO_DIRCLR_PIN30_Output   (1UL)

Read: pin set as output

Definition at line 6013 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN30_Pos

#define GPIO_DIRCLR_PIN30_Pos   (30UL)

Position of PIN30 field.

Definition at line 6010 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN31_Clear

#define GPIO_DIRCLR_PIN31_Clear   (1UL)

Write: writing a '1' sets pin to input; writing a '0' has no effect

Definition at line 6007 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN31_Input

#define GPIO_DIRCLR_PIN31_Input   (0UL)

Read: pin set as input

Definition at line 6005 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN31_Msk

#define GPIO_DIRCLR_PIN31_Msk   (0x1UL << GPIO_DIRCLR_PIN31_Pos)

Bit mask of PIN31 field.

Definition at line 6004 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN31_Output

#define GPIO_DIRCLR_PIN31_Output   (1UL)

Read: pin set as output

Definition at line 6006 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN31_Pos

#define GPIO_DIRCLR_PIN31_Pos   (31UL)

Position of PIN31 field.

Definition at line 6003 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN3_Clear

#define GPIO_DIRCLR_PIN3_Clear   (1UL)

Write: writing a '1' sets pin to input; writing a '0' has no effect

Definition at line 6203 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN3_Input

#define GPIO_DIRCLR_PIN3_Input   (0UL)

Read: pin set as input

Definition at line 6201 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN3_Msk

#define GPIO_DIRCLR_PIN3_Msk   (0x1UL << GPIO_DIRCLR_PIN3_Pos)

Bit mask of PIN3 field.

Definition at line 6200 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN3_Output

#define GPIO_DIRCLR_PIN3_Output   (1UL)

Read: pin set as output

Definition at line 6202 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN3_Pos

#define GPIO_DIRCLR_PIN3_Pos   (3UL)

Position of PIN3 field.

Definition at line 6199 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN4_Clear

#define GPIO_DIRCLR_PIN4_Clear   (1UL)

Write: writing a '1' sets pin to input; writing a '0' has no effect

Definition at line 6196 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN4_Input

#define GPIO_DIRCLR_PIN4_Input   (0UL)

Read: pin set as input

Definition at line 6194 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN4_Msk

#define GPIO_DIRCLR_PIN4_Msk   (0x1UL << GPIO_DIRCLR_PIN4_Pos)

Bit mask of PIN4 field.

Definition at line 6193 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN4_Output

#define GPIO_DIRCLR_PIN4_Output   (1UL)

Read: pin set as output

Definition at line 6195 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN4_Pos

#define GPIO_DIRCLR_PIN4_Pos   (4UL)

Position of PIN4 field.

Definition at line 6192 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN5_Clear

#define GPIO_DIRCLR_PIN5_Clear   (1UL)

Write: writing a '1' sets pin to input; writing a '0' has no effect

Definition at line 6189 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN5_Input

#define GPIO_DIRCLR_PIN5_Input   (0UL)

Read: pin set as input

Definition at line 6187 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN5_Msk

#define GPIO_DIRCLR_PIN5_Msk   (0x1UL << GPIO_DIRCLR_PIN5_Pos)

Bit mask of PIN5 field.

Definition at line 6186 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN5_Output

#define GPIO_DIRCLR_PIN5_Output   (1UL)

Read: pin set as output

Definition at line 6188 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN5_Pos

#define GPIO_DIRCLR_PIN5_Pos   (5UL)

Position of PIN5 field.

Definition at line 6185 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN6_Clear

#define GPIO_DIRCLR_PIN6_Clear   (1UL)

Write: writing a '1' sets pin to input; writing a '0' has no effect

Definition at line 6182 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN6_Input

#define GPIO_DIRCLR_PIN6_Input   (0UL)

Read: pin set as input

Definition at line 6180 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN6_Msk

#define GPIO_DIRCLR_PIN6_Msk   (0x1UL << GPIO_DIRCLR_PIN6_Pos)

Bit mask of PIN6 field.

Definition at line 6179 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN6_Output

#define GPIO_DIRCLR_PIN6_Output   (1UL)

Read: pin set as output

Definition at line 6181 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN6_Pos

#define GPIO_DIRCLR_PIN6_Pos   (6UL)

Position of PIN6 field.

Definition at line 6178 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN7_Clear

#define GPIO_DIRCLR_PIN7_Clear   (1UL)

Write: writing a '1' sets pin to input; writing a '0' has no effect

Definition at line 6175 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN7_Input

#define GPIO_DIRCLR_PIN7_Input   (0UL)

Read: pin set as input

Definition at line 6173 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN7_Msk

#define GPIO_DIRCLR_PIN7_Msk   (0x1UL << GPIO_DIRCLR_PIN7_Pos)

Bit mask of PIN7 field.

Definition at line 6172 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN7_Output

#define GPIO_DIRCLR_PIN7_Output   (1UL)

Read: pin set as output

Definition at line 6174 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN7_Pos

#define GPIO_DIRCLR_PIN7_Pos   (7UL)

Position of PIN7 field.

Definition at line 6171 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN8_Clear

#define GPIO_DIRCLR_PIN8_Clear   (1UL)

Write: writing a '1' sets pin to input; writing a '0' has no effect

Definition at line 6168 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN8_Input

#define GPIO_DIRCLR_PIN8_Input   (0UL)

Read: pin set as input

Definition at line 6166 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN8_Msk

#define GPIO_DIRCLR_PIN8_Msk   (0x1UL << GPIO_DIRCLR_PIN8_Pos)

Bit mask of PIN8 field.

Definition at line 6165 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN8_Output

#define GPIO_DIRCLR_PIN8_Output   (1UL)

Read: pin set as output

Definition at line 6167 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN8_Pos

#define GPIO_DIRCLR_PIN8_Pos   (8UL)

Position of PIN8 field.

Definition at line 6164 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN9_Clear

#define GPIO_DIRCLR_PIN9_Clear   (1UL)

Write: writing a '1' sets pin to input; writing a '0' has no effect

Definition at line 6161 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN9_Input

#define GPIO_DIRCLR_PIN9_Input   (0UL)

Read: pin set as input

Definition at line 6159 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN9_Msk

#define GPIO_DIRCLR_PIN9_Msk   (0x1UL << GPIO_DIRCLR_PIN9_Pos)

Bit mask of PIN9 field.

Definition at line 6158 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN9_Output

#define GPIO_DIRCLR_PIN9_Output   (1UL)

Read: pin set as output

Definition at line 6160 of file nrf52_bitfields.h.

◆ GPIO_DIRCLR_PIN9_Pos

#define GPIO_DIRCLR_PIN9_Pos   (9UL)

Position of PIN9 field.

Definition at line 6157 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN0_Input

#define GPIO_DIRSET_PIN0_Input   (0UL)

Read: pin set as input

Definition at line 5995 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN0_Msk

#define GPIO_DIRSET_PIN0_Msk   (0x1UL << GPIO_DIRSET_PIN0_Pos)

Bit mask of PIN0 field.

Definition at line 5994 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN0_Output

#define GPIO_DIRSET_PIN0_Output   (1UL)

Read: pin set as output

Definition at line 5996 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN0_Pos

#define GPIO_DIRSET_PIN0_Pos   (0UL)

Position of PIN0 field.

Definition at line 5993 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN0_Set

#define GPIO_DIRSET_PIN0_Set   (1UL)

Write: writing a '1' sets pin to output; writing a '0' has no effect

Definition at line 5997 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN10_Input

#define GPIO_DIRSET_PIN10_Input   (0UL)

Read: pin set as input

Definition at line 5925 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN10_Msk

#define GPIO_DIRSET_PIN10_Msk   (0x1UL << GPIO_DIRSET_PIN10_Pos)

Bit mask of PIN10 field.

Definition at line 5924 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN10_Output

#define GPIO_DIRSET_PIN10_Output   (1UL)

Read: pin set as output

Definition at line 5926 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN10_Pos

#define GPIO_DIRSET_PIN10_Pos   (10UL)

Position of PIN10 field.

Definition at line 5923 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN10_Set

#define GPIO_DIRSET_PIN10_Set   (1UL)

Write: writing a '1' sets pin to output; writing a '0' has no effect

Definition at line 5927 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN11_Input

#define GPIO_DIRSET_PIN11_Input   (0UL)

Read: pin set as input

Definition at line 5918 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN11_Msk

#define GPIO_DIRSET_PIN11_Msk   (0x1UL << GPIO_DIRSET_PIN11_Pos)

Bit mask of PIN11 field.

Definition at line 5917 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN11_Output

#define GPIO_DIRSET_PIN11_Output   (1UL)

Read: pin set as output

Definition at line 5919 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN11_Pos

#define GPIO_DIRSET_PIN11_Pos   (11UL)

Position of PIN11 field.

Definition at line 5916 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN11_Set

#define GPIO_DIRSET_PIN11_Set   (1UL)

Write: writing a '1' sets pin to output; writing a '0' has no effect

Definition at line 5920 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN12_Input

#define GPIO_DIRSET_PIN12_Input   (0UL)

Read: pin set as input

Definition at line 5911 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN12_Msk

#define GPIO_DIRSET_PIN12_Msk   (0x1UL << GPIO_DIRSET_PIN12_Pos)

Bit mask of PIN12 field.

Definition at line 5910 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN12_Output

#define GPIO_DIRSET_PIN12_Output   (1UL)

Read: pin set as output

Definition at line 5912 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN12_Pos

#define GPIO_DIRSET_PIN12_Pos   (12UL)

Position of PIN12 field.

Definition at line 5909 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN12_Set

#define GPIO_DIRSET_PIN12_Set   (1UL)

Write: writing a '1' sets pin to output; writing a '0' has no effect

Definition at line 5913 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN13_Input

#define GPIO_DIRSET_PIN13_Input   (0UL)

Read: pin set as input

Definition at line 5904 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN13_Msk

#define GPIO_DIRSET_PIN13_Msk   (0x1UL << GPIO_DIRSET_PIN13_Pos)

Bit mask of PIN13 field.

Definition at line 5903 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN13_Output

#define GPIO_DIRSET_PIN13_Output   (1UL)

Read: pin set as output

Definition at line 5905 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN13_Pos

#define GPIO_DIRSET_PIN13_Pos   (13UL)

Position of PIN13 field.

Definition at line 5902 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN13_Set

#define GPIO_DIRSET_PIN13_Set   (1UL)

Write: writing a '1' sets pin to output; writing a '0' has no effect

Definition at line 5906 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN14_Input

#define GPIO_DIRSET_PIN14_Input   (0UL)

Read: pin set as input

Definition at line 5897 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN14_Msk

#define GPIO_DIRSET_PIN14_Msk   (0x1UL << GPIO_DIRSET_PIN14_Pos)

Bit mask of PIN14 field.

Definition at line 5896 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN14_Output

#define GPIO_DIRSET_PIN14_Output   (1UL)

Read: pin set as output

Definition at line 5898 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN14_Pos

#define GPIO_DIRSET_PIN14_Pos   (14UL)

Position of PIN14 field.

Definition at line 5895 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN14_Set

#define GPIO_DIRSET_PIN14_Set   (1UL)

Write: writing a '1' sets pin to output; writing a '0' has no effect

Definition at line 5899 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN15_Input

#define GPIO_DIRSET_PIN15_Input   (0UL)

Read: pin set as input

Definition at line 5890 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN15_Msk

#define GPIO_DIRSET_PIN15_Msk   (0x1UL << GPIO_DIRSET_PIN15_Pos)

Bit mask of PIN15 field.

Definition at line 5889 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN15_Output

#define GPIO_DIRSET_PIN15_Output   (1UL)

Read: pin set as output

Definition at line 5891 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN15_Pos

#define GPIO_DIRSET_PIN15_Pos   (15UL)

Position of PIN15 field.

Definition at line 5888 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN15_Set

#define GPIO_DIRSET_PIN15_Set   (1UL)

Write: writing a '1' sets pin to output; writing a '0' has no effect

Definition at line 5892 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN16_Input

#define GPIO_DIRSET_PIN16_Input   (0UL)

Read: pin set as input

Definition at line 5883 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN16_Msk

#define GPIO_DIRSET_PIN16_Msk   (0x1UL << GPIO_DIRSET_PIN16_Pos)

Bit mask of PIN16 field.

Definition at line 5882 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN16_Output

#define GPIO_DIRSET_PIN16_Output   (1UL)

Read: pin set as output

Definition at line 5884 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN16_Pos

#define GPIO_DIRSET_PIN16_Pos   (16UL)

Position of PIN16 field.

Definition at line 5881 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN16_Set

#define GPIO_DIRSET_PIN16_Set   (1UL)

Write: writing a '1' sets pin to output; writing a '0' has no effect

Definition at line 5885 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN17_Input

#define GPIO_DIRSET_PIN17_Input   (0UL)

Read: pin set as input

Definition at line 5876 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN17_Msk

#define GPIO_DIRSET_PIN17_Msk   (0x1UL << GPIO_DIRSET_PIN17_Pos)

Bit mask of PIN17 field.

Definition at line 5875 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN17_Output

#define GPIO_DIRSET_PIN17_Output   (1UL)

Read: pin set as output

Definition at line 5877 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN17_Pos

#define GPIO_DIRSET_PIN17_Pos   (17UL)

Position of PIN17 field.

Definition at line 5874 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN17_Set

#define GPIO_DIRSET_PIN17_Set   (1UL)

Write: writing a '1' sets pin to output; writing a '0' has no effect

Definition at line 5878 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN18_Input

#define GPIO_DIRSET_PIN18_Input   (0UL)

Read: pin set as input

Definition at line 5869 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN18_Msk

#define GPIO_DIRSET_PIN18_Msk   (0x1UL << GPIO_DIRSET_PIN18_Pos)

Bit mask of PIN18 field.

Definition at line 5868 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN18_Output

#define GPIO_DIRSET_PIN18_Output   (1UL)

Read: pin set as output

Definition at line 5870 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN18_Pos

#define GPIO_DIRSET_PIN18_Pos   (18UL)

Position of PIN18 field.

Definition at line 5867 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN18_Set

#define GPIO_DIRSET_PIN18_Set   (1UL)

Write: writing a '1' sets pin to output; writing a '0' has no effect

Definition at line 5871 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN19_Input

#define GPIO_DIRSET_PIN19_Input   (0UL)

Read: pin set as input

Definition at line 5862 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN19_Msk

#define GPIO_DIRSET_PIN19_Msk   (0x1UL << GPIO_DIRSET_PIN19_Pos)

Bit mask of PIN19 field.

Definition at line 5861 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN19_Output

#define GPIO_DIRSET_PIN19_Output   (1UL)

Read: pin set as output

Definition at line 5863 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN19_Pos

#define GPIO_DIRSET_PIN19_Pos   (19UL)

Position of PIN19 field.

Definition at line 5860 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN19_Set

#define GPIO_DIRSET_PIN19_Set   (1UL)

Write: writing a '1' sets pin to output; writing a '0' has no effect

Definition at line 5864 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN1_Input

#define GPIO_DIRSET_PIN1_Input   (0UL)

Read: pin set as input

Definition at line 5988 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN1_Msk

#define GPIO_DIRSET_PIN1_Msk   (0x1UL << GPIO_DIRSET_PIN1_Pos)

Bit mask of PIN1 field.

Definition at line 5987 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN1_Output

#define GPIO_DIRSET_PIN1_Output   (1UL)

Read: pin set as output

Definition at line 5989 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN1_Pos

#define GPIO_DIRSET_PIN1_Pos   (1UL)

Position of PIN1 field.

Definition at line 5986 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN1_Set

#define GPIO_DIRSET_PIN1_Set   (1UL)

Write: writing a '1' sets pin to output; writing a '0' has no effect

Definition at line 5990 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN20_Input

#define GPIO_DIRSET_PIN20_Input   (0UL)

Read: pin set as input

Definition at line 5855 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN20_Msk

#define GPIO_DIRSET_PIN20_Msk   (0x1UL << GPIO_DIRSET_PIN20_Pos)

Bit mask of PIN20 field.

Definition at line 5854 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN20_Output

#define GPIO_DIRSET_PIN20_Output   (1UL)

Read: pin set as output

Definition at line 5856 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN20_Pos

#define GPIO_DIRSET_PIN20_Pos   (20UL)

Position of PIN20 field.

Definition at line 5853 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN20_Set

#define GPIO_DIRSET_PIN20_Set   (1UL)

Write: writing a '1' sets pin to output; writing a '0' has no effect

Definition at line 5857 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN21_Input

#define GPIO_DIRSET_PIN21_Input   (0UL)

Read: pin set as input

Definition at line 5848 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN21_Msk

#define GPIO_DIRSET_PIN21_Msk   (0x1UL << GPIO_DIRSET_PIN21_Pos)

Bit mask of PIN21 field.

Definition at line 5847 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN21_Output

#define GPIO_DIRSET_PIN21_Output   (1UL)

Read: pin set as output

Definition at line 5849 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN21_Pos

#define GPIO_DIRSET_PIN21_Pos   (21UL)

Position of PIN21 field.

Definition at line 5846 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN21_Set

#define GPIO_DIRSET_PIN21_Set   (1UL)

Write: writing a '1' sets pin to output; writing a '0' has no effect

Definition at line 5850 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN22_Input

#define GPIO_DIRSET_PIN22_Input   (0UL)

Read: pin set as input

Definition at line 5841 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN22_Msk

#define GPIO_DIRSET_PIN22_Msk   (0x1UL << GPIO_DIRSET_PIN22_Pos)

Bit mask of PIN22 field.

Definition at line 5840 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN22_Output

#define GPIO_DIRSET_PIN22_Output   (1UL)

Read: pin set as output

Definition at line 5842 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN22_Pos

#define GPIO_DIRSET_PIN22_Pos   (22UL)

Position of PIN22 field.

Definition at line 5839 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN22_Set

#define GPIO_DIRSET_PIN22_Set   (1UL)

Write: writing a '1' sets pin to output; writing a '0' has no effect

Definition at line 5843 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN23_Input

#define GPIO_DIRSET_PIN23_Input   (0UL)

Read: pin set as input

Definition at line 5834 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN23_Msk

#define GPIO_DIRSET_PIN23_Msk   (0x1UL << GPIO_DIRSET_PIN23_Pos)

Bit mask of PIN23 field.

Definition at line 5833 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN23_Output

#define GPIO_DIRSET_PIN23_Output   (1UL)

Read: pin set as output

Definition at line 5835 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN23_Pos

#define GPIO_DIRSET_PIN23_Pos   (23UL)

Position of PIN23 field.

Definition at line 5832 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN23_Set

#define GPIO_DIRSET_PIN23_Set   (1UL)

Write: writing a '1' sets pin to output; writing a '0' has no effect

Definition at line 5836 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN24_Input

#define GPIO_DIRSET_PIN24_Input   (0UL)

Read: pin set as input

Definition at line 5827 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN24_Msk

#define GPIO_DIRSET_PIN24_Msk   (0x1UL << GPIO_DIRSET_PIN24_Pos)

Bit mask of PIN24 field.

Definition at line 5826 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN24_Output

#define GPIO_DIRSET_PIN24_Output   (1UL)

Read: pin set as output

Definition at line 5828 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN24_Pos

#define GPIO_DIRSET_PIN24_Pos   (24UL)

Position of PIN24 field.

Definition at line 5825 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN24_Set

#define GPIO_DIRSET_PIN24_Set   (1UL)

Write: writing a '1' sets pin to output; writing a '0' has no effect

Definition at line 5829 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN25_Input

#define GPIO_DIRSET_PIN25_Input   (0UL)

Read: pin set as input

Definition at line 5820 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN25_Msk

#define GPIO_DIRSET_PIN25_Msk   (0x1UL << GPIO_DIRSET_PIN25_Pos)

Bit mask of PIN25 field.

Definition at line 5819 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN25_Output

#define GPIO_DIRSET_PIN25_Output   (1UL)

Read: pin set as output

Definition at line 5821 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN25_Pos

#define GPIO_DIRSET_PIN25_Pos   (25UL)

Position of PIN25 field.

Definition at line 5818 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN25_Set

#define GPIO_DIRSET_PIN25_Set   (1UL)

Write: writing a '1' sets pin to output; writing a '0' has no effect

Definition at line 5822 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN26_Input

#define GPIO_DIRSET_PIN26_Input   (0UL)

Read: pin set as input

Definition at line 5813 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN26_Msk

#define GPIO_DIRSET_PIN26_Msk   (0x1UL << GPIO_DIRSET_PIN26_Pos)

Bit mask of PIN26 field.

Definition at line 5812 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN26_Output

#define GPIO_DIRSET_PIN26_Output   (1UL)

Read: pin set as output

Definition at line 5814 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN26_Pos

#define GPIO_DIRSET_PIN26_Pos   (26UL)

Position of PIN26 field.

Definition at line 5811 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN26_Set

#define GPIO_DIRSET_PIN26_Set   (1UL)

Write: writing a '1' sets pin to output; writing a '0' has no effect

Definition at line 5815 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN27_Input

#define GPIO_DIRSET_PIN27_Input   (0UL)

Read: pin set as input

Definition at line 5806 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN27_Msk

#define GPIO_DIRSET_PIN27_Msk   (0x1UL << GPIO_DIRSET_PIN27_Pos)

Bit mask of PIN27 field.

Definition at line 5805 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN27_Output

#define GPIO_DIRSET_PIN27_Output   (1UL)

Read: pin set as output

Definition at line 5807 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN27_Pos

#define GPIO_DIRSET_PIN27_Pos   (27UL)

Position of PIN27 field.

Definition at line 5804 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN27_Set

#define GPIO_DIRSET_PIN27_Set   (1UL)

Write: writing a '1' sets pin to output; writing a '0' has no effect

Definition at line 5808 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN28_Input

#define GPIO_DIRSET_PIN28_Input   (0UL)

Read: pin set as input

Definition at line 5799 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN28_Msk

#define GPIO_DIRSET_PIN28_Msk   (0x1UL << GPIO_DIRSET_PIN28_Pos)

Bit mask of PIN28 field.

Definition at line 5798 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN28_Output

#define GPIO_DIRSET_PIN28_Output   (1UL)

Read: pin set as output

Definition at line 5800 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN28_Pos

#define GPIO_DIRSET_PIN28_Pos   (28UL)

Position of PIN28 field.

Definition at line 5797 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN28_Set

#define GPIO_DIRSET_PIN28_Set   (1UL)

Write: writing a '1' sets pin to output; writing a '0' has no effect

Definition at line 5801 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN29_Input

#define GPIO_DIRSET_PIN29_Input   (0UL)

Read: pin set as input

Definition at line 5792 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN29_Msk

#define GPIO_DIRSET_PIN29_Msk   (0x1UL << GPIO_DIRSET_PIN29_Pos)

Bit mask of PIN29 field.

Definition at line 5791 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN29_Output

#define GPIO_DIRSET_PIN29_Output   (1UL)

Read: pin set as output

Definition at line 5793 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN29_Pos

#define GPIO_DIRSET_PIN29_Pos   (29UL)

Position of PIN29 field.

Definition at line 5790 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN29_Set

#define GPIO_DIRSET_PIN29_Set   (1UL)

Write: writing a '1' sets pin to output; writing a '0' has no effect

Definition at line 5794 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN2_Input

#define GPIO_DIRSET_PIN2_Input   (0UL)

Read: pin set as input

Definition at line 5981 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN2_Msk

#define GPIO_DIRSET_PIN2_Msk   (0x1UL << GPIO_DIRSET_PIN2_Pos)

Bit mask of PIN2 field.

Definition at line 5980 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN2_Output

#define GPIO_DIRSET_PIN2_Output   (1UL)

Read: pin set as output

Definition at line 5982 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN2_Pos

#define GPIO_DIRSET_PIN2_Pos   (2UL)

Position of PIN2 field.

Definition at line 5979 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN2_Set

#define GPIO_DIRSET_PIN2_Set   (1UL)

Write: writing a '1' sets pin to output; writing a '0' has no effect

Definition at line 5983 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN30_Input

#define GPIO_DIRSET_PIN30_Input   (0UL)

Read: pin set as input

Definition at line 5785 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN30_Msk

#define GPIO_DIRSET_PIN30_Msk   (0x1UL << GPIO_DIRSET_PIN30_Pos)

Bit mask of PIN30 field.

Definition at line 5784 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN30_Output

#define GPIO_DIRSET_PIN30_Output   (1UL)

Read: pin set as output

Definition at line 5786 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN30_Pos

#define GPIO_DIRSET_PIN30_Pos   (30UL)

Position of PIN30 field.

Definition at line 5783 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN30_Set

#define GPIO_DIRSET_PIN30_Set   (1UL)

Write: writing a '1' sets pin to output; writing a '0' has no effect

Definition at line 5787 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN31_Input

#define GPIO_DIRSET_PIN31_Input   (0UL)

Read: pin set as input

Definition at line 5778 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN31_Msk

#define GPIO_DIRSET_PIN31_Msk   (0x1UL << GPIO_DIRSET_PIN31_Pos)

Bit mask of PIN31 field.

Definition at line 5777 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN31_Output

#define GPIO_DIRSET_PIN31_Output   (1UL)

Read: pin set as output

Definition at line 5779 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN31_Pos

#define GPIO_DIRSET_PIN31_Pos   (31UL)

Position of PIN31 field.

Definition at line 5776 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN31_Set

#define GPIO_DIRSET_PIN31_Set   (1UL)

Write: writing a '1' sets pin to output; writing a '0' has no effect

Definition at line 5780 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN3_Input

#define GPIO_DIRSET_PIN3_Input   (0UL)

Read: pin set as input

Definition at line 5974 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN3_Msk

#define GPIO_DIRSET_PIN3_Msk   (0x1UL << GPIO_DIRSET_PIN3_Pos)

Bit mask of PIN3 field.

Definition at line 5973 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN3_Output

#define GPIO_DIRSET_PIN3_Output   (1UL)

Read: pin set as output

Definition at line 5975 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN3_Pos

#define GPIO_DIRSET_PIN3_Pos   (3UL)

Position of PIN3 field.

Definition at line 5972 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN3_Set

#define GPIO_DIRSET_PIN3_Set   (1UL)

Write: writing a '1' sets pin to output; writing a '0' has no effect

Definition at line 5976 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN4_Input

#define GPIO_DIRSET_PIN4_Input   (0UL)

Read: pin set as input

Definition at line 5967 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN4_Msk

#define GPIO_DIRSET_PIN4_Msk   (0x1UL << GPIO_DIRSET_PIN4_Pos)

Bit mask of PIN4 field.

Definition at line 5966 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN4_Output

#define GPIO_DIRSET_PIN4_Output   (1UL)

Read: pin set as output

Definition at line 5968 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN4_Pos

#define GPIO_DIRSET_PIN4_Pos   (4UL)

Position of PIN4 field.

Definition at line 5965 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN4_Set

#define GPIO_DIRSET_PIN4_Set   (1UL)

Write: writing a '1' sets pin to output; writing a '0' has no effect

Definition at line 5969 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN5_Input

#define GPIO_DIRSET_PIN5_Input   (0UL)

Read: pin set as input

Definition at line 5960 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN5_Msk

#define GPIO_DIRSET_PIN5_Msk   (0x1UL << GPIO_DIRSET_PIN5_Pos)

Bit mask of PIN5 field.

Definition at line 5959 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN5_Output

#define GPIO_DIRSET_PIN5_Output   (1UL)

Read: pin set as output

Definition at line 5961 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN5_Pos

#define GPIO_DIRSET_PIN5_Pos   (5UL)

Position of PIN5 field.

Definition at line 5958 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN5_Set

#define GPIO_DIRSET_PIN5_Set   (1UL)

Write: writing a '1' sets pin to output; writing a '0' has no effect

Definition at line 5962 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN6_Input

#define GPIO_DIRSET_PIN6_Input   (0UL)

Read: pin set as input

Definition at line 5953 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN6_Msk

#define GPIO_DIRSET_PIN6_Msk   (0x1UL << GPIO_DIRSET_PIN6_Pos)

Bit mask of PIN6 field.

Definition at line 5952 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN6_Output

#define GPIO_DIRSET_PIN6_Output   (1UL)

Read: pin set as output

Definition at line 5954 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN6_Pos

#define GPIO_DIRSET_PIN6_Pos   (6UL)

Position of PIN6 field.

Definition at line 5951 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN6_Set

#define GPIO_DIRSET_PIN6_Set   (1UL)

Write: writing a '1' sets pin to output; writing a '0' has no effect

Definition at line 5955 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN7_Input

#define GPIO_DIRSET_PIN7_Input   (0UL)

Read: pin set as input

Definition at line 5946 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN7_Msk

#define GPIO_DIRSET_PIN7_Msk   (0x1UL << GPIO_DIRSET_PIN7_Pos)

Bit mask of PIN7 field.

Definition at line 5945 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN7_Output

#define GPIO_DIRSET_PIN7_Output   (1UL)

Read: pin set as output

Definition at line 5947 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN7_Pos

#define GPIO_DIRSET_PIN7_Pos   (7UL)

Position of PIN7 field.

Definition at line 5944 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN7_Set

#define GPIO_DIRSET_PIN7_Set   (1UL)

Write: writing a '1' sets pin to output; writing a '0' has no effect

Definition at line 5948 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN8_Input

#define GPIO_DIRSET_PIN8_Input   (0UL)

Read: pin set as input

Definition at line 5939 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN8_Msk

#define GPIO_DIRSET_PIN8_Msk   (0x1UL << GPIO_DIRSET_PIN8_Pos)

Bit mask of PIN8 field.

Definition at line 5938 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN8_Output

#define GPIO_DIRSET_PIN8_Output   (1UL)

Read: pin set as output

Definition at line 5940 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN8_Pos

#define GPIO_DIRSET_PIN8_Pos   (8UL)

Position of PIN8 field.

Definition at line 5937 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN8_Set

#define GPIO_DIRSET_PIN8_Set   (1UL)

Write: writing a '1' sets pin to output; writing a '0' has no effect

Definition at line 5941 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN9_Input

#define GPIO_DIRSET_PIN9_Input   (0UL)

Read: pin set as input

Definition at line 5932 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN9_Msk

#define GPIO_DIRSET_PIN9_Msk   (0x1UL << GPIO_DIRSET_PIN9_Pos)

Bit mask of PIN9 field.

Definition at line 5931 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN9_Output

#define GPIO_DIRSET_PIN9_Output   (1UL)

Read: pin set as output

Definition at line 5933 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN9_Pos

#define GPIO_DIRSET_PIN9_Pos   (9UL)

Position of PIN9 field.

Definition at line 5930 of file nrf52_bitfields.h.

◆ GPIO_DIRSET_PIN9_Set

#define GPIO_DIRSET_PIN9_Set   (1UL)

Write: writing a '1' sets pin to output; writing a '0' has no effect

Definition at line 5934 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN0_High

#define GPIO_IN_PIN0_High   (1UL)

Pin input is high

Definition at line 5575 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN0_Low

#define GPIO_IN_PIN0_Low   (0UL)

Pin input is low

Definition at line 5574 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN0_Msk

#define GPIO_IN_PIN0_Msk   (0x1UL << GPIO_IN_PIN0_Pos)

Bit mask of PIN0 field.

Definition at line 5573 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN0_Pos

#define GPIO_IN_PIN0_Pos   (0UL)

Position of PIN0 field.

Definition at line 5572 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN10_High

#define GPIO_IN_PIN10_High   (1UL)

Pin input is high

Definition at line 5515 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN10_Low

#define GPIO_IN_PIN10_Low   (0UL)

Pin input is low

Definition at line 5514 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN10_Msk

#define GPIO_IN_PIN10_Msk   (0x1UL << GPIO_IN_PIN10_Pos)

Bit mask of PIN10 field.

Definition at line 5513 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN10_Pos

#define GPIO_IN_PIN10_Pos   (10UL)

Position of PIN10 field.

Definition at line 5512 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN11_High

#define GPIO_IN_PIN11_High   (1UL)

Pin input is high

Definition at line 5509 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN11_Low

#define GPIO_IN_PIN11_Low   (0UL)

Pin input is low

Definition at line 5508 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN11_Msk

#define GPIO_IN_PIN11_Msk   (0x1UL << GPIO_IN_PIN11_Pos)

Bit mask of PIN11 field.

Definition at line 5507 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN11_Pos

#define GPIO_IN_PIN11_Pos   (11UL)

Position of PIN11 field.

Definition at line 5506 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN12_High

#define GPIO_IN_PIN12_High   (1UL)

Pin input is high

Definition at line 5503 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN12_Low

#define GPIO_IN_PIN12_Low   (0UL)

Pin input is low

Definition at line 5502 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN12_Msk

#define GPIO_IN_PIN12_Msk   (0x1UL << GPIO_IN_PIN12_Pos)

Bit mask of PIN12 field.

Definition at line 5501 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN12_Pos

#define GPIO_IN_PIN12_Pos   (12UL)

Position of PIN12 field.

Definition at line 5500 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN13_High

#define GPIO_IN_PIN13_High   (1UL)

Pin input is high

Definition at line 5497 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN13_Low

#define GPIO_IN_PIN13_Low   (0UL)

Pin input is low

Definition at line 5496 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN13_Msk

#define GPIO_IN_PIN13_Msk   (0x1UL << GPIO_IN_PIN13_Pos)

Bit mask of PIN13 field.

Definition at line 5495 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN13_Pos

#define GPIO_IN_PIN13_Pos   (13UL)

Position of PIN13 field.

Definition at line 5494 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN14_High

#define GPIO_IN_PIN14_High   (1UL)

Pin input is high

Definition at line 5491 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN14_Low

#define GPIO_IN_PIN14_Low   (0UL)

Pin input is low

Definition at line 5490 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN14_Msk

#define GPIO_IN_PIN14_Msk   (0x1UL << GPIO_IN_PIN14_Pos)

Bit mask of PIN14 field.

Definition at line 5489 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN14_Pos

#define GPIO_IN_PIN14_Pos   (14UL)

Position of PIN14 field.

Definition at line 5488 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN15_High

#define GPIO_IN_PIN15_High   (1UL)

Pin input is high

Definition at line 5485 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN15_Low

#define GPIO_IN_PIN15_Low   (0UL)

Pin input is low

Definition at line 5484 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN15_Msk

#define GPIO_IN_PIN15_Msk   (0x1UL << GPIO_IN_PIN15_Pos)

Bit mask of PIN15 field.

Definition at line 5483 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN15_Pos

#define GPIO_IN_PIN15_Pos   (15UL)

Position of PIN15 field.

Definition at line 5482 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN16_High

#define GPIO_IN_PIN16_High   (1UL)

Pin input is high

Definition at line 5479 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN16_Low

#define GPIO_IN_PIN16_Low   (0UL)

Pin input is low

Definition at line 5478 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN16_Msk

#define GPIO_IN_PIN16_Msk   (0x1UL << GPIO_IN_PIN16_Pos)

Bit mask of PIN16 field.

Definition at line 5477 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN16_Pos

#define GPIO_IN_PIN16_Pos   (16UL)

Position of PIN16 field.

Definition at line 5476 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN17_High

#define GPIO_IN_PIN17_High   (1UL)

Pin input is high

Definition at line 5473 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN17_Low

#define GPIO_IN_PIN17_Low   (0UL)

Pin input is low

Definition at line 5472 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN17_Msk

#define GPIO_IN_PIN17_Msk   (0x1UL << GPIO_IN_PIN17_Pos)

Bit mask of PIN17 field.

Definition at line 5471 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN17_Pos

#define GPIO_IN_PIN17_Pos   (17UL)

Position of PIN17 field.

Definition at line 5470 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN18_High

#define GPIO_IN_PIN18_High   (1UL)

Pin input is high

Definition at line 5467 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN18_Low

#define GPIO_IN_PIN18_Low   (0UL)

Pin input is low

Definition at line 5466 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN18_Msk

#define GPIO_IN_PIN18_Msk   (0x1UL << GPIO_IN_PIN18_Pos)

Bit mask of PIN18 field.

Definition at line 5465 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN18_Pos

#define GPIO_IN_PIN18_Pos   (18UL)

Position of PIN18 field.

Definition at line 5464 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN19_High

#define GPIO_IN_PIN19_High   (1UL)

Pin input is high

Definition at line 5461 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN19_Low

#define GPIO_IN_PIN19_Low   (0UL)

Pin input is low

Definition at line 5460 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN19_Msk

#define GPIO_IN_PIN19_Msk   (0x1UL << GPIO_IN_PIN19_Pos)

Bit mask of PIN19 field.

Definition at line 5459 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN19_Pos

#define GPIO_IN_PIN19_Pos   (19UL)

Position of PIN19 field.

Definition at line 5458 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN1_High

#define GPIO_IN_PIN1_High   (1UL)

Pin input is high

Definition at line 5569 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN1_Low

#define GPIO_IN_PIN1_Low   (0UL)

Pin input is low

Definition at line 5568 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN1_Msk

#define GPIO_IN_PIN1_Msk   (0x1UL << GPIO_IN_PIN1_Pos)

Bit mask of PIN1 field.

Definition at line 5567 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN1_Pos

#define GPIO_IN_PIN1_Pos   (1UL)

Position of PIN1 field.

Definition at line 5566 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN20_High

#define GPIO_IN_PIN20_High   (1UL)

Pin input is high

Definition at line 5455 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN20_Low

#define GPIO_IN_PIN20_Low   (0UL)

Pin input is low

Definition at line 5454 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN20_Msk

#define GPIO_IN_PIN20_Msk   (0x1UL << GPIO_IN_PIN20_Pos)

Bit mask of PIN20 field.

Definition at line 5453 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN20_Pos

#define GPIO_IN_PIN20_Pos   (20UL)

Position of PIN20 field.

Definition at line 5452 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN21_High

#define GPIO_IN_PIN21_High   (1UL)

Pin input is high

Definition at line 5449 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN21_Low

#define GPIO_IN_PIN21_Low   (0UL)

Pin input is low

Definition at line 5448 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN21_Msk

#define GPIO_IN_PIN21_Msk   (0x1UL << GPIO_IN_PIN21_Pos)

Bit mask of PIN21 field.

Definition at line 5447 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN21_Pos

#define GPIO_IN_PIN21_Pos   (21UL)

Position of PIN21 field.

Definition at line 5446 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN22_High

#define GPIO_IN_PIN22_High   (1UL)

Pin input is high

Definition at line 5443 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN22_Low

#define GPIO_IN_PIN22_Low   (0UL)

Pin input is low

Definition at line 5442 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN22_Msk

#define GPIO_IN_PIN22_Msk   (0x1UL << GPIO_IN_PIN22_Pos)

Bit mask of PIN22 field.

Definition at line 5441 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN22_Pos

#define GPIO_IN_PIN22_Pos   (22UL)

Position of PIN22 field.

Definition at line 5440 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN23_High

#define GPIO_IN_PIN23_High   (1UL)

Pin input is high

Definition at line 5437 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN23_Low

#define GPIO_IN_PIN23_Low   (0UL)

Pin input is low

Definition at line 5436 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN23_Msk

#define GPIO_IN_PIN23_Msk   (0x1UL << GPIO_IN_PIN23_Pos)

Bit mask of PIN23 field.

Definition at line 5435 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN23_Pos

#define GPIO_IN_PIN23_Pos   (23UL)

Position of PIN23 field.

Definition at line 5434 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN24_High

#define GPIO_IN_PIN24_High   (1UL)

Pin input is high

Definition at line 5431 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN24_Low

#define GPIO_IN_PIN24_Low   (0UL)

Pin input is low

Definition at line 5430 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN24_Msk

#define GPIO_IN_PIN24_Msk   (0x1UL << GPIO_IN_PIN24_Pos)

Bit mask of PIN24 field.

Definition at line 5429 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN24_Pos

#define GPIO_IN_PIN24_Pos   (24UL)

Position of PIN24 field.

Definition at line 5428 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN25_High

#define GPIO_IN_PIN25_High   (1UL)

Pin input is high

Definition at line 5425 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN25_Low

#define GPIO_IN_PIN25_Low   (0UL)

Pin input is low

Definition at line 5424 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN25_Msk

#define GPIO_IN_PIN25_Msk   (0x1UL << GPIO_IN_PIN25_Pos)

Bit mask of PIN25 field.

Definition at line 5423 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN25_Pos

#define GPIO_IN_PIN25_Pos   (25UL)

Position of PIN25 field.

Definition at line 5422 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN26_High

#define GPIO_IN_PIN26_High   (1UL)

Pin input is high

Definition at line 5419 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN26_Low

#define GPIO_IN_PIN26_Low   (0UL)

Pin input is low

Definition at line 5418 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN26_Msk

#define GPIO_IN_PIN26_Msk   (0x1UL << GPIO_IN_PIN26_Pos)

Bit mask of PIN26 field.

Definition at line 5417 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN26_Pos

#define GPIO_IN_PIN26_Pos   (26UL)

Position of PIN26 field.

Definition at line 5416 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN27_High

#define GPIO_IN_PIN27_High   (1UL)

Pin input is high

Definition at line 5413 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN27_Low

#define GPIO_IN_PIN27_Low   (0UL)

Pin input is low

Definition at line 5412 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN27_Msk

#define GPIO_IN_PIN27_Msk   (0x1UL << GPIO_IN_PIN27_Pos)

Bit mask of PIN27 field.

Definition at line 5411 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN27_Pos

#define GPIO_IN_PIN27_Pos   (27UL)

Position of PIN27 field.

Definition at line 5410 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN28_High

#define GPIO_IN_PIN28_High   (1UL)

Pin input is high

Definition at line 5407 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN28_Low

#define GPIO_IN_PIN28_Low   (0UL)

Pin input is low

Definition at line 5406 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN28_Msk

#define GPIO_IN_PIN28_Msk   (0x1UL << GPIO_IN_PIN28_Pos)

Bit mask of PIN28 field.

Definition at line 5405 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN28_Pos

#define GPIO_IN_PIN28_Pos   (28UL)

Position of PIN28 field.

Definition at line 5404 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN29_High

#define GPIO_IN_PIN29_High   (1UL)

Pin input is high

Definition at line 5401 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN29_Low

#define GPIO_IN_PIN29_Low   (0UL)

Pin input is low

Definition at line 5400 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN29_Msk

#define GPIO_IN_PIN29_Msk   (0x1UL << GPIO_IN_PIN29_Pos)

Bit mask of PIN29 field.

Definition at line 5399 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN29_Pos

#define GPIO_IN_PIN29_Pos   (29UL)

Position of PIN29 field.

Definition at line 5398 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN2_High

#define GPIO_IN_PIN2_High   (1UL)

Pin input is high

Definition at line 5563 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN2_Low

#define GPIO_IN_PIN2_Low   (0UL)

Pin input is low

Definition at line 5562 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN2_Msk

#define GPIO_IN_PIN2_Msk   (0x1UL << GPIO_IN_PIN2_Pos)

Bit mask of PIN2 field.

Definition at line 5561 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN2_Pos

#define GPIO_IN_PIN2_Pos   (2UL)

Position of PIN2 field.

Definition at line 5560 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN30_High

#define GPIO_IN_PIN30_High   (1UL)

Pin input is high

Definition at line 5395 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN30_Low

#define GPIO_IN_PIN30_Low   (0UL)

Pin input is low

Definition at line 5394 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN30_Msk

#define GPIO_IN_PIN30_Msk   (0x1UL << GPIO_IN_PIN30_Pos)

Bit mask of PIN30 field.

Definition at line 5393 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN30_Pos

#define GPIO_IN_PIN30_Pos   (30UL)

Position of PIN30 field.

Definition at line 5392 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN31_High

#define GPIO_IN_PIN31_High   (1UL)

Pin input is high

Definition at line 5389 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN31_Low

#define GPIO_IN_PIN31_Low   (0UL)

Pin input is low

Definition at line 5388 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN31_Msk

#define GPIO_IN_PIN31_Msk   (0x1UL << GPIO_IN_PIN31_Pos)

Bit mask of PIN31 field.

Definition at line 5387 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN31_Pos

#define GPIO_IN_PIN31_Pos   (31UL)

Position of PIN31 field.

Definition at line 5386 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN3_High

#define GPIO_IN_PIN3_High   (1UL)

Pin input is high

Definition at line 5557 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN3_Low

#define GPIO_IN_PIN3_Low   (0UL)

Pin input is low

Definition at line 5556 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN3_Msk

#define GPIO_IN_PIN3_Msk   (0x1UL << GPIO_IN_PIN3_Pos)

Bit mask of PIN3 field.

Definition at line 5555 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN3_Pos

#define GPIO_IN_PIN3_Pos   (3UL)

Position of PIN3 field.

Definition at line 5554 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN4_High

#define GPIO_IN_PIN4_High   (1UL)

Pin input is high

Definition at line 5551 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN4_Low

#define GPIO_IN_PIN4_Low   (0UL)

Pin input is low

Definition at line 5550 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN4_Msk

#define GPIO_IN_PIN4_Msk   (0x1UL << GPIO_IN_PIN4_Pos)

Bit mask of PIN4 field.

Definition at line 5549 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN4_Pos

#define GPIO_IN_PIN4_Pos   (4UL)

Position of PIN4 field.

Definition at line 5548 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN5_High

#define GPIO_IN_PIN5_High   (1UL)

Pin input is high

Definition at line 5545 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN5_Low

#define GPIO_IN_PIN5_Low   (0UL)

Pin input is low

Definition at line 5544 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN5_Msk

#define GPIO_IN_PIN5_Msk   (0x1UL << GPIO_IN_PIN5_Pos)

Bit mask of PIN5 field.

Definition at line 5543 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN5_Pos

#define GPIO_IN_PIN5_Pos   (5UL)

Position of PIN5 field.

Definition at line 5542 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN6_High

#define GPIO_IN_PIN6_High   (1UL)

Pin input is high

Definition at line 5539 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN6_Low

#define GPIO_IN_PIN6_Low   (0UL)

Pin input is low

Definition at line 5538 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN6_Msk

#define GPIO_IN_PIN6_Msk   (0x1UL << GPIO_IN_PIN6_Pos)

Bit mask of PIN6 field.

Definition at line 5537 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN6_Pos

#define GPIO_IN_PIN6_Pos   (6UL)

Position of PIN6 field.

Definition at line 5536 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN7_High

#define GPIO_IN_PIN7_High   (1UL)

Pin input is high

Definition at line 5533 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN7_Low

#define GPIO_IN_PIN7_Low   (0UL)

Pin input is low

Definition at line 5532 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN7_Msk

#define GPIO_IN_PIN7_Msk   (0x1UL << GPIO_IN_PIN7_Pos)

Bit mask of PIN7 field.

Definition at line 5531 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN7_Pos

#define GPIO_IN_PIN7_Pos   (7UL)

Position of PIN7 field.

Definition at line 5530 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN8_High

#define GPIO_IN_PIN8_High   (1UL)

Pin input is high

Definition at line 5527 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN8_Low

#define GPIO_IN_PIN8_Low   (0UL)

Pin input is low

Definition at line 5526 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN8_Msk

#define GPIO_IN_PIN8_Msk   (0x1UL << GPIO_IN_PIN8_Pos)

Bit mask of PIN8 field.

Definition at line 5525 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN8_Pos

#define GPIO_IN_PIN8_Pos   (8UL)

Position of PIN8 field.

Definition at line 5524 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN9_High

#define GPIO_IN_PIN9_High   (1UL)

Pin input is high

Definition at line 5521 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN9_Low

#define GPIO_IN_PIN9_Low   (0UL)

Pin input is low

Definition at line 5520 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN9_Msk

#define GPIO_IN_PIN9_Msk   (0x1UL << GPIO_IN_PIN9_Pos)

Bit mask of PIN9 field.

Definition at line 5519 of file nrf52_bitfields.h.

◆ GPIO_IN_PIN9_Pos

#define GPIO_IN_PIN9_Pos   (9UL)

Position of PIN9 field.

Definition at line 5518 of file nrf52_bitfields.h.

◆ GPIO_LATCH_LATCH_Msk

#define GPIO_LATCH_LATCH_Msk   (0xFFFFFFFFUL << GPIO_LATCH_LATCH_Pos)

Bit mask of LATCH field.

Definition at line 6231 of file nrf52_bitfields.h.

◆ GPIO_LATCH_LATCH_Pos

#define GPIO_LATCH_LATCH_Pos   (0UL)

Position of LATCH field.

Definition at line 6230 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN0_High

#define GPIO_OUT_PIN0_High   (1UL)

Pin driver is high

Definition at line 4926 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN0_Low

#define GPIO_OUT_PIN0_Low   (0UL)

Pin driver is low

Definition at line 4925 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN0_Msk

#define GPIO_OUT_PIN0_Msk   (0x1UL << GPIO_OUT_PIN0_Pos)

Bit mask of PIN0 field.

Definition at line 4924 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN0_Pos

#define GPIO_OUT_PIN0_Pos   (0UL)

Position of PIN0 field.

Definition at line 4923 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN10_High

#define GPIO_OUT_PIN10_High   (1UL)

Pin driver is high

Definition at line 4866 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN10_Low

#define GPIO_OUT_PIN10_Low   (0UL)

Pin driver is low

Definition at line 4865 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN10_Msk

#define GPIO_OUT_PIN10_Msk   (0x1UL << GPIO_OUT_PIN10_Pos)

Bit mask of PIN10 field.

Definition at line 4864 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN10_Pos

#define GPIO_OUT_PIN10_Pos   (10UL)

Position of PIN10 field.

Definition at line 4863 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN11_High

#define GPIO_OUT_PIN11_High   (1UL)

Pin driver is high

Definition at line 4860 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN11_Low

#define GPIO_OUT_PIN11_Low   (0UL)

Pin driver is low

Definition at line 4859 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN11_Msk

#define GPIO_OUT_PIN11_Msk   (0x1UL << GPIO_OUT_PIN11_Pos)

Bit mask of PIN11 field.

Definition at line 4858 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN11_Pos

#define GPIO_OUT_PIN11_Pos   (11UL)

Position of PIN11 field.

Definition at line 4857 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN12_High

#define GPIO_OUT_PIN12_High   (1UL)

Pin driver is high

Definition at line 4854 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN12_Low

#define GPIO_OUT_PIN12_Low   (0UL)

Pin driver is low

Definition at line 4853 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN12_Msk

#define GPIO_OUT_PIN12_Msk   (0x1UL << GPIO_OUT_PIN12_Pos)

Bit mask of PIN12 field.

Definition at line 4852 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN12_Pos

#define GPIO_OUT_PIN12_Pos   (12UL)

Position of PIN12 field.

Definition at line 4851 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN13_High

#define GPIO_OUT_PIN13_High   (1UL)

Pin driver is high

Definition at line 4848 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN13_Low

#define GPIO_OUT_PIN13_Low   (0UL)

Pin driver is low

Definition at line 4847 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN13_Msk

#define GPIO_OUT_PIN13_Msk   (0x1UL << GPIO_OUT_PIN13_Pos)

Bit mask of PIN13 field.

Definition at line 4846 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN13_Pos

#define GPIO_OUT_PIN13_Pos   (13UL)

Position of PIN13 field.

Definition at line 4845 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN14_High

#define GPIO_OUT_PIN14_High   (1UL)

Pin driver is high

Definition at line 4842 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN14_Low

#define GPIO_OUT_PIN14_Low   (0UL)

Pin driver is low

Definition at line 4841 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN14_Msk

#define GPIO_OUT_PIN14_Msk   (0x1UL << GPIO_OUT_PIN14_Pos)

Bit mask of PIN14 field.

Definition at line 4840 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN14_Pos

#define GPIO_OUT_PIN14_Pos   (14UL)

Position of PIN14 field.

Definition at line 4839 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN15_High

#define GPIO_OUT_PIN15_High   (1UL)

Pin driver is high

Definition at line 4836 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN15_Low

#define GPIO_OUT_PIN15_Low   (0UL)

Pin driver is low

Definition at line 4835 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN15_Msk

#define GPIO_OUT_PIN15_Msk   (0x1UL << GPIO_OUT_PIN15_Pos)

Bit mask of PIN15 field.

Definition at line 4834 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN15_Pos

#define GPIO_OUT_PIN15_Pos   (15UL)

Position of PIN15 field.

Definition at line 4833 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN16_High

#define GPIO_OUT_PIN16_High   (1UL)

Pin driver is high

Definition at line 4830 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN16_Low

#define GPIO_OUT_PIN16_Low   (0UL)

Pin driver is low

Definition at line 4829 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN16_Msk

#define GPIO_OUT_PIN16_Msk   (0x1UL << GPIO_OUT_PIN16_Pos)

Bit mask of PIN16 field.

Definition at line 4828 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN16_Pos

#define GPIO_OUT_PIN16_Pos   (16UL)

Position of PIN16 field.

Definition at line 4827 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN17_High

#define GPIO_OUT_PIN17_High   (1UL)

Pin driver is high

Definition at line 4824 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN17_Low

#define GPIO_OUT_PIN17_Low   (0UL)

Pin driver is low

Definition at line 4823 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN17_Msk

#define GPIO_OUT_PIN17_Msk   (0x1UL << GPIO_OUT_PIN17_Pos)

Bit mask of PIN17 field.

Definition at line 4822 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN17_Pos

#define GPIO_OUT_PIN17_Pos   (17UL)

Position of PIN17 field.

Definition at line 4821 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN18_High

#define GPIO_OUT_PIN18_High   (1UL)

Pin driver is high

Definition at line 4818 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN18_Low

#define GPIO_OUT_PIN18_Low   (0UL)

Pin driver is low

Definition at line 4817 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN18_Msk

#define GPIO_OUT_PIN18_Msk   (0x1UL << GPIO_OUT_PIN18_Pos)

Bit mask of PIN18 field.

Definition at line 4816 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN18_Pos

#define GPIO_OUT_PIN18_Pos   (18UL)

Position of PIN18 field.

Definition at line 4815 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN19_High

#define GPIO_OUT_PIN19_High   (1UL)

Pin driver is high

Definition at line 4812 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN19_Low

#define GPIO_OUT_PIN19_Low   (0UL)

Pin driver is low

Definition at line 4811 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN19_Msk

#define GPIO_OUT_PIN19_Msk   (0x1UL << GPIO_OUT_PIN19_Pos)

Bit mask of PIN19 field.

Definition at line 4810 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN19_Pos

#define GPIO_OUT_PIN19_Pos   (19UL)

Position of PIN19 field.

Definition at line 4809 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN1_High

#define GPIO_OUT_PIN1_High   (1UL)

Pin driver is high

Definition at line 4920 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN1_Low

#define GPIO_OUT_PIN1_Low   (0UL)

Pin driver is low

Definition at line 4919 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN1_Msk

#define GPIO_OUT_PIN1_Msk   (0x1UL << GPIO_OUT_PIN1_Pos)

Bit mask of PIN1 field.

Definition at line 4918 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN1_Pos

#define GPIO_OUT_PIN1_Pos   (1UL)

Position of PIN1 field.

Definition at line 4917 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN20_High

#define GPIO_OUT_PIN20_High   (1UL)

Pin driver is high

Definition at line 4806 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN20_Low

#define GPIO_OUT_PIN20_Low   (0UL)

Pin driver is low

Definition at line 4805 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN20_Msk

#define GPIO_OUT_PIN20_Msk   (0x1UL << GPIO_OUT_PIN20_Pos)

Bit mask of PIN20 field.

Definition at line 4804 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN20_Pos

#define GPIO_OUT_PIN20_Pos   (20UL)

Position of PIN20 field.

Definition at line 4803 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN21_High

#define GPIO_OUT_PIN21_High   (1UL)

Pin driver is high

Definition at line 4800 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN21_Low

#define GPIO_OUT_PIN21_Low   (0UL)

Pin driver is low

Definition at line 4799 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN21_Msk

#define GPIO_OUT_PIN21_Msk   (0x1UL << GPIO_OUT_PIN21_Pos)

Bit mask of PIN21 field.

Definition at line 4798 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN21_Pos

#define GPIO_OUT_PIN21_Pos   (21UL)

Position of PIN21 field.

Definition at line 4797 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN22_High

#define GPIO_OUT_PIN22_High   (1UL)

Pin driver is high

Definition at line 4794 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN22_Low

#define GPIO_OUT_PIN22_Low   (0UL)

Pin driver is low

Definition at line 4793 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN22_Msk

#define GPIO_OUT_PIN22_Msk   (0x1UL << GPIO_OUT_PIN22_Pos)

Bit mask of PIN22 field.

Definition at line 4792 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN22_Pos

#define GPIO_OUT_PIN22_Pos   (22UL)

Position of PIN22 field.

Definition at line 4791 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN23_High

#define GPIO_OUT_PIN23_High   (1UL)

Pin driver is high

Definition at line 4788 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN23_Low

#define GPIO_OUT_PIN23_Low   (0UL)

Pin driver is low

Definition at line 4787 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN23_Msk

#define GPIO_OUT_PIN23_Msk   (0x1UL << GPIO_OUT_PIN23_Pos)

Bit mask of PIN23 field.

Definition at line 4786 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN23_Pos

#define GPIO_OUT_PIN23_Pos   (23UL)

Position of PIN23 field.

Definition at line 4785 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN24_High

#define GPIO_OUT_PIN24_High   (1UL)

Pin driver is high

Definition at line 4782 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN24_Low

#define GPIO_OUT_PIN24_Low   (0UL)

Pin driver is low

Definition at line 4781 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN24_Msk

#define GPIO_OUT_PIN24_Msk   (0x1UL << GPIO_OUT_PIN24_Pos)

Bit mask of PIN24 field.

Definition at line 4780 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN24_Pos

#define GPIO_OUT_PIN24_Pos   (24UL)

Position of PIN24 field.

Definition at line 4779 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN25_High

#define GPIO_OUT_PIN25_High   (1UL)

Pin driver is high

Definition at line 4776 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN25_Low

#define GPIO_OUT_PIN25_Low   (0UL)

Pin driver is low

Definition at line 4775 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN25_Msk

#define GPIO_OUT_PIN25_Msk   (0x1UL << GPIO_OUT_PIN25_Pos)

Bit mask of PIN25 field.

Definition at line 4774 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN25_Pos

#define GPIO_OUT_PIN25_Pos   (25UL)

Position of PIN25 field.

Definition at line 4773 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN26_High

#define GPIO_OUT_PIN26_High   (1UL)

Pin driver is high

Definition at line 4770 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN26_Low

#define GPIO_OUT_PIN26_Low   (0UL)

Pin driver is low

Definition at line 4769 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN26_Msk

#define GPIO_OUT_PIN26_Msk   (0x1UL << GPIO_OUT_PIN26_Pos)

Bit mask of PIN26 field.

Definition at line 4768 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN26_Pos

#define GPIO_OUT_PIN26_Pos   (26UL)

Position of PIN26 field.

Definition at line 4767 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN27_High

#define GPIO_OUT_PIN27_High   (1UL)

Pin driver is high

Definition at line 4764 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN27_Low

#define GPIO_OUT_PIN27_Low   (0UL)

Pin driver is low

Definition at line 4763 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN27_Msk

#define GPIO_OUT_PIN27_Msk   (0x1UL << GPIO_OUT_PIN27_Pos)

Bit mask of PIN27 field.

Definition at line 4762 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN27_Pos

#define GPIO_OUT_PIN27_Pos   (27UL)

Position of PIN27 field.

Definition at line 4761 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN28_High

#define GPIO_OUT_PIN28_High   (1UL)

Pin driver is high

Definition at line 4758 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN28_Low

#define GPIO_OUT_PIN28_Low   (0UL)

Pin driver is low

Definition at line 4757 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN28_Msk

#define GPIO_OUT_PIN28_Msk   (0x1UL << GPIO_OUT_PIN28_Pos)

Bit mask of PIN28 field.

Definition at line 4756 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN28_Pos

#define GPIO_OUT_PIN28_Pos   (28UL)

Position of PIN28 field.

Definition at line 4755 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN29_High

#define GPIO_OUT_PIN29_High   (1UL)

Pin driver is high

Definition at line 4752 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN29_Low

#define GPIO_OUT_PIN29_Low   (0UL)

Pin driver is low

Definition at line 4751 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN29_Msk

#define GPIO_OUT_PIN29_Msk   (0x1UL << GPIO_OUT_PIN29_Pos)

Bit mask of PIN29 field.

Definition at line 4750 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN29_Pos

#define GPIO_OUT_PIN29_Pos   (29UL)

Position of PIN29 field.

Definition at line 4749 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN2_High

#define GPIO_OUT_PIN2_High   (1UL)

Pin driver is high

Definition at line 4914 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN2_Low

#define GPIO_OUT_PIN2_Low   (0UL)

Pin driver is low

Definition at line 4913 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN2_Msk

#define GPIO_OUT_PIN2_Msk   (0x1UL << GPIO_OUT_PIN2_Pos)

Bit mask of PIN2 field.

Definition at line 4912 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN2_Pos

#define GPIO_OUT_PIN2_Pos   (2UL)

Position of PIN2 field.

Definition at line 4911 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN30_High

#define GPIO_OUT_PIN30_High   (1UL)

Pin driver is high

Definition at line 4746 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN30_Low

#define GPIO_OUT_PIN30_Low   (0UL)

Pin driver is low

Definition at line 4745 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN30_Msk

#define GPIO_OUT_PIN30_Msk   (0x1UL << GPIO_OUT_PIN30_Pos)

Bit mask of PIN30 field.

Definition at line 4744 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN30_Pos

#define GPIO_OUT_PIN30_Pos   (30UL)

Position of PIN30 field.

Definition at line 4743 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN31_High

#define GPIO_OUT_PIN31_High   (1UL)

Pin driver is high

Definition at line 4740 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN31_Low

#define GPIO_OUT_PIN31_Low   (0UL)

Pin driver is low

Definition at line 4739 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN31_Msk

#define GPIO_OUT_PIN31_Msk   (0x1UL << GPIO_OUT_PIN31_Pos)

Bit mask of PIN31 field.

Definition at line 4738 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN31_Pos

#define GPIO_OUT_PIN31_Pos   (31UL)

Position of PIN31 field.

Definition at line 4737 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN3_High

#define GPIO_OUT_PIN3_High   (1UL)

Pin driver is high

Definition at line 4908 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN3_Low

#define GPIO_OUT_PIN3_Low   (0UL)

Pin driver is low

Definition at line 4907 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN3_Msk

#define GPIO_OUT_PIN3_Msk   (0x1UL << GPIO_OUT_PIN3_Pos)

Bit mask of PIN3 field.

Definition at line 4906 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN3_Pos

#define GPIO_OUT_PIN3_Pos   (3UL)

Position of PIN3 field.

Definition at line 4905 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN4_High

#define GPIO_OUT_PIN4_High   (1UL)

Pin driver is high

Definition at line 4902 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN4_Low

#define GPIO_OUT_PIN4_Low   (0UL)

Pin driver is low

Definition at line 4901 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN4_Msk

#define GPIO_OUT_PIN4_Msk   (0x1UL << GPIO_OUT_PIN4_Pos)

Bit mask of PIN4 field.

Definition at line 4900 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN4_Pos

#define GPIO_OUT_PIN4_Pos   (4UL)

Position of PIN4 field.

Definition at line 4899 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN5_High

#define GPIO_OUT_PIN5_High   (1UL)

Pin driver is high

Definition at line 4896 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN5_Low

#define GPIO_OUT_PIN5_Low   (0UL)

Pin driver is low

Definition at line 4895 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN5_Msk

#define GPIO_OUT_PIN5_Msk   (0x1UL << GPIO_OUT_PIN5_Pos)

Bit mask of PIN5 field.

Definition at line 4894 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN5_Pos

#define GPIO_OUT_PIN5_Pos   (5UL)

Position of PIN5 field.

Definition at line 4893 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN6_High

#define GPIO_OUT_PIN6_High   (1UL)

Pin driver is high

Definition at line 4890 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN6_Low

#define GPIO_OUT_PIN6_Low   (0UL)

Pin driver is low

Definition at line 4889 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN6_Msk

#define GPIO_OUT_PIN6_Msk   (0x1UL << GPIO_OUT_PIN6_Pos)

Bit mask of PIN6 field.

Definition at line 4888 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN6_Pos

#define GPIO_OUT_PIN6_Pos   (6UL)

Position of PIN6 field.

Definition at line 4887 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN7_High

#define GPIO_OUT_PIN7_High   (1UL)

Pin driver is high

Definition at line 4884 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN7_Low

#define GPIO_OUT_PIN7_Low   (0UL)

Pin driver is low

Definition at line 4883 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN7_Msk

#define GPIO_OUT_PIN7_Msk   (0x1UL << GPIO_OUT_PIN7_Pos)

Bit mask of PIN7 field.

Definition at line 4882 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN7_Pos

#define GPIO_OUT_PIN7_Pos   (7UL)

Position of PIN7 field.

Definition at line 4881 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN8_High

#define GPIO_OUT_PIN8_High   (1UL)

Pin driver is high

Definition at line 4878 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN8_Low

#define GPIO_OUT_PIN8_Low   (0UL)

Pin driver is low

Definition at line 4877 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN8_Msk

#define GPIO_OUT_PIN8_Msk   (0x1UL << GPIO_OUT_PIN8_Pos)

Bit mask of PIN8 field.

Definition at line 4876 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN8_Pos

#define GPIO_OUT_PIN8_Pos   (8UL)

Position of PIN8 field.

Definition at line 4875 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN9_High

#define GPIO_OUT_PIN9_High   (1UL)

Pin driver is high

Definition at line 4872 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN9_Low

#define GPIO_OUT_PIN9_Low   (0UL)

Pin driver is low

Definition at line 4871 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN9_Msk

#define GPIO_OUT_PIN9_Msk   (0x1UL << GPIO_OUT_PIN9_Pos)

Bit mask of PIN9 field.

Definition at line 4870 of file nrf52_bitfields.h.

◆ GPIO_OUT_PIN9_Pos

#define GPIO_OUT_PIN9_Pos   (9UL)

Position of PIN9 field.

Definition at line 4869 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN0_Clear

#define GPIO_OUTCLR_PIN0_Clear   (1UL)

Write: writing a '1' sets the pin low; writing a '0' has no effect

Definition at line 5380 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN0_High

#define GPIO_OUTCLR_PIN0_High   (1UL)

Read: pin driver is high

Definition at line 5379 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN0_Low

#define GPIO_OUTCLR_PIN0_Low   (0UL)

Read: pin driver is low

Definition at line 5378 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN0_Msk

#define GPIO_OUTCLR_PIN0_Msk   (0x1UL << GPIO_OUTCLR_PIN0_Pos)

Bit mask of PIN0 field.

Definition at line 5377 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN0_Pos

#define GPIO_OUTCLR_PIN0_Pos   (0UL)

Position of PIN0 field.

Definition at line 5376 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN10_Clear

#define GPIO_OUTCLR_PIN10_Clear   (1UL)

Write: writing a '1' sets the pin low; writing a '0' has no effect

Definition at line 5310 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN10_High

#define GPIO_OUTCLR_PIN10_High   (1UL)

Read: pin driver is high

Definition at line 5309 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN10_Low

#define GPIO_OUTCLR_PIN10_Low   (0UL)

Read: pin driver is low

Definition at line 5308 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN10_Msk

#define GPIO_OUTCLR_PIN10_Msk   (0x1UL << GPIO_OUTCLR_PIN10_Pos)

Bit mask of PIN10 field.

Definition at line 5307 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN10_Pos

#define GPIO_OUTCLR_PIN10_Pos   (10UL)

Position of PIN10 field.

Definition at line 5306 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN11_Clear

#define GPIO_OUTCLR_PIN11_Clear   (1UL)

Write: writing a '1' sets the pin low; writing a '0' has no effect

Definition at line 5303 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN11_High

#define GPIO_OUTCLR_PIN11_High   (1UL)

Read: pin driver is high

Definition at line 5302 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN11_Low

#define GPIO_OUTCLR_PIN11_Low   (0UL)

Read: pin driver is low

Definition at line 5301 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN11_Msk

#define GPIO_OUTCLR_PIN11_Msk   (0x1UL << GPIO_OUTCLR_PIN11_Pos)

Bit mask of PIN11 field.

Definition at line 5300 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN11_Pos

#define GPIO_OUTCLR_PIN11_Pos   (11UL)

Position of PIN11 field.

Definition at line 5299 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN12_Clear

#define GPIO_OUTCLR_PIN12_Clear   (1UL)

Write: writing a '1' sets the pin low; writing a '0' has no effect

Definition at line 5296 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN12_High

#define GPIO_OUTCLR_PIN12_High   (1UL)

Read: pin driver is high

Definition at line 5295 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN12_Low

#define GPIO_OUTCLR_PIN12_Low   (0UL)

Read: pin driver is low

Definition at line 5294 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN12_Msk

#define GPIO_OUTCLR_PIN12_Msk   (0x1UL << GPIO_OUTCLR_PIN12_Pos)

Bit mask of PIN12 field.

Definition at line 5293 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN12_Pos

#define GPIO_OUTCLR_PIN12_Pos   (12UL)

Position of PIN12 field.

Definition at line 5292 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN13_Clear

#define GPIO_OUTCLR_PIN13_Clear   (1UL)

Write: writing a '1' sets the pin low; writing a '0' has no effect

Definition at line 5289 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN13_High

#define GPIO_OUTCLR_PIN13_High   (1UL)

Read: pin driver is high

Definition at line 5288 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN13_Low

#define GPIO_OUTCLR_PIN13_Low   (0UL)

Read: pin driver is low

Definition at line 5287 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN13_Msk

#define GPIO_OUTCLR_PIN13_Msk   (0x1UL << GPIO_OUTCLR_PIN13_Pos)

Bit mask of PIN13 field.

Definition at line 5286 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN13_Pos

#define GPIO_OUTCLR_PIN13_Pos   (13UL)

Position of PIN13 field.

Definition at line 5285 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN14_Clear

#define GPIO_OUTCLR_PIN14_Clear   (1UL)

Write: writing a '1' sets the pin low; writing a '0' has no effect

Definition at line 5282 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN14_High

#define GPIO_OUTCLR_PIN14_High   (1UL)

Read: pin driver is high

Definition at line 5281 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN14_Low

#define GPIO_OUTCLR_PIN14_Low   (0UL)

Read: pin driver is low

Definition at line 5280 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN14_Msk

#define GPIO_OUTCLR_PIN14_Msk   (0x1UL << GPIO_OUTCLR_PIN14_Pos)

Bit mask of PIN14 field.

Definition at line 5279 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN14_Pos

#define GPIO_OUTCLR_PIN14_Pos   (14UL)

Position of PIN14 field.

Definition at line 5278 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN15_Clear

#define GPIO_OUTCLR_PIN15_Clear   (1UL)

Write: writing a '1' sets the pin low; writing a '0' has no effect

Definition at line 5275 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN15_High

#define GPIO_OUTCLR_PIN15_High   (1UL)

Read: pin driver is high

Definition at line 5274 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN15_Low

#define GPIO_OUTCLR_PIN15_Low   (0UL)

Read: pin driver is low

Definition at line 5273 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN15_Msk

#define GPIO_OUTCLR_PIN15_Msk   (0x1UL << GPIO_OUTCLR_PIN15_Pos)

Bit mask of PIN15 field.

Definition at line 5272 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN15_Pos

#define GPIO_OUTCLR_PIN15_Pos   (15UL)

Position of PIN15 field.

Definition at line 5271 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN16_Clear

#define GPIO_OUTCLR_PIN16_Clear   (1UL)

Write: writing a '1' sets the pin low; writing a '0' has no effect

Definition at line 5268 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN16_High

#define GPIO_OUTCLR_PIN16_High   (1UL)

Read: pin driver is high

Definition at line 5267 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN16_Low

#define GPIO_OUTCLR_PIN16_Low   (0UL)

Read: pin driver is low

Definition at line 5266 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN16_Msk

#define GPIO_OUTCLR_PIN16_Msk   (0x1UL << GPIO_OUTCLR_PIN16_Pos)

Bit mask of PIN16 field.

Definition at line 5265 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN16_Pos

#define GPIO_OUTCLR_PIN16_Pos   (16UL)

Position of PIN16 field.

Definition at line 5264 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN17_Clear

#define GPIO_OUTCLR_PIN17_Clear   (1UL)

Write: writing a '1' sets the pin low; writing a '0' has no effect

Definition at line 5261 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN17_High

#define GPIO_OUTCLR_PIN17_High   (1UL)

Read: pin driver is high

Definition at line 5260 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN17_Low

#define GPIO_OUTCLR_PIN17_Low   (0UL)

Read: pin driver is low

Definition at line 5259 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN17_Msk

#define GPIO_OUTCLR_PIN17_Msk   (0x1UL << GPIO_OUTCLR_PIN17_Pos)

Bit mask of PIN17 field.

Definition at line 5258 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN17_Pos

#define GPIO_OUTCLR_PIN17_Pos   (17UL)

Position of PIN17 field.

Definition at line 5257 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN18_Clear

#define GPIO_OUTCLR_PIN18_Clear   (1UL)

Write: writing a '1' sets the pin low; writing a '0' has no effect

Definition at line 5254 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN18_High

#define GPIO_OUTCLR_PIN18_High   (1UL)

Read: pin driver is high

Definition at line 5253 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN18_Low

#define GPIO_OUTCLR_PIN18_Low   (0UL)

Read: pin driver is low

Definition at line 5252 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN18_Msk

#define GPIO_OUTCLR_PIN18_Msk   (0x1UL << GPIO_OUTCLR_PIN18_Pos)

Bit mask of PIN18 field.

Definition at line 5251 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN18_Pos

#define GPIO_OUTCLR_PIN18_Pos   (18UL)

Position of PIN18 field.

Definition at line 5250 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN19_Clear

#define GPIO_OUTCLR_PIN19_Clear   (1UL)

Write: writing a '1' sets the pin low; writing a '0' has no effect

Definition at line 5247 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN19_High

#define GPIO_OUTCLR_PIN19_High   (1UL)

Read: pin driver is high

Definition at line 5246 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN19_Low

#define GPIO_OUTCLR_PIN19_Low   (0UL)

Read: pin driver is low

Definition at line 5245 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN19_Msk

#define GPIO_OUTCLR_PIN19_Msk   (0x1UL << GPIO_OUTCLR_PIN19_Pos)

Bit mask of PIN19 field.

Definition at line 5244 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN19_Pos

#define GPIO_OUTCLR_PIN19_Pos   (19UL)

Position of PIN19 field.

Definition at line 5243 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN1_Clear

#define GPIO_OUTCLR_PIN1_Clear   (1UL)

Write: writing a '1' sets the pin low; writing a '0' has no effect

Definition at line 5373 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN1_High

#define GPIO_OUTCLR_PIN1_High   (1UL)

Read: pin driver is high

Definition at line 5372 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN1_Low

#define GPIO_OUTCLR_PIN1_Low   (0UL)

Read: pin driver is low

Definition at line 5371 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN1_Msk

#define GPIO_OUTCLR_PIN1_Msk   (0x1UL << GPIO_OUTCLR_PIN1_Pos)

Bit mask of PIN1 field.

Definition at line 5370 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN1_Pos

#define GPIO_OUTCLR_PIN1_Pos   (1UL)

Position of PIN1 field.

Definition at line 5369 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN20_Clear

#define GPIO_OUTCLR_PIN20_Clear   (1UL)

Write: writing a '1' sets the pin low; writing a '0' has no effect

Definition at line 5240 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN20_High

#define GPIO_OUTCLR_PIN20_High   (1UL)

Read: pin driver is high

Definition at line 5239 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN20_Low

#define GPIO_OUTCLR_PIN20_Low   (0UL)

Read: pin driver is low

Definition at line 5238 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN20_Msk

#define GPIO_OUTCLR_PIN20_Msk   (0x1UL << GPIO_OUTCLR_PIN20_Pos)

Bit mask of PIN20 field.

Definition at line 5237 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN20_Pos

#define GPIO_OUTCLR_PIN20_Pos   (20UL)

Position of PIN20 field.

Definition at line 5236 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN21_Clear

#define GPIO_OUTCLR_PIN21_Clear   (1UL)

Write: writing a '1' sets the pin low; writing a '0' has no effect

Definition at line 5233 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN21_High

#define GPIO_OUTCLR_PIN21_High   (1UL)

Read: pin driver is high

Definition at line 5232 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN21_Low

#define GPIO_OUTCLR_PIN21_Low   (0UL)

Read: pin driver is low

Definition at line 5231 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN21_Msk

#define GPIO_OUTCLR_PIN21_Msk   (0x1UL << GPIO_OUTCLR_PIN21_Pos)

Bit mask of PIN21 field.

Definition at line 5230 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN21_Pos

#define GPIO_OUTCLR_PIN21_Pos   (21UL)

Position of PIN21 field.

Definition at line 5229 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN22_Clear

#define GPIO_OUTCLR_PIN22_Clear   (1UL)

Write: writing a '1' sets the pin low; writing a '0' has no effect

Definition at line 5226 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN22_High

#define GPIO_OUTCLR_PIN22_High   (1UL)

Read: pin driver is high

Definition at line 5225 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN22_Low

#define GPIO_OUTCLR_PIN22_Low   (0UL)

Read: pin driver is low

Definition at line 5224 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN22_Msk

#define GPIO_OUTCLR_PIN22_Msk   (0x1UL << GPIO_OUTCLR_PIN22_Pos)

Bit mask of PIN22 field.

Definition at line 5223 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN22_Pos

#define GPIO_OUTCLR_PIN22_Pos   (22UL)

Position of PIN22 field.

Definition at line 5222 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN23_Clear

#define GPIO_OUTCLR_PIN23_Clear   (1UL)

Write: writing a '1' sets the pin low; writing a '0' has no effect

Definition at line 5219 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN23_High

#define GPIO_OUTCLR_PIN23_High   (1UL)

Read: pin driver is high

Definition at line 5218 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN23_Low

#define GPIO_OUTCLR_PIN23_Low   (0UL)

Read: pin driver is low

Definition at line 5217 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN23_Msk

#define GPIO_OUTCLR_PIN23_Msk   (0x1UL << GPIO_OUTCLR_PIN23_Pos)

Bit mask of PIN23 field.

Definition at line 5216 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN23_Pos

#define GPIO_OUTCLR_PIN23_Pos   (23UL)

Position of PIN23 field.

Definition at line 5215 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN24_Clear

#define GPIO_OUTCLR_PIN24_Clear   (1UL)

Write: writing a '1' sets the pin low; writing a '0' has no effect

Definition at line 5212 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN24_High

#define GPIO_OUTCLR_PIN24_High   (1UL)

Read: pin driver is high

Definition at line 5211 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN24_Low

#define GPIO_OUTCLR_PIN24_Low   (0UL)

Read: pin driver is low

Definition at line 5210 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN24_Msk

#define GPIO_OUTCLR_PIN24_Msk   (0x1UL << GPIO_OUTCLR_PIN24_Pos)

Bit mask of PIN24 field.

Definition at line 5209 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN24_Pos

#define GPIO_OUTCLR_PIN24_Pos   (24UL)

Position of PIN24 field.

Definition at line 5208 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN25_Clear

#define GPIO_OUTCLR_PIN25_Clear   (1UL)

Write: writing a '1' sets the pin low; writing a '0' has no effect

Definition at line 5205 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN25_High

#define GPIO_OUTCLR_PIN25_High   (1UL)

Read: pin driver is high

Definition at line 5204 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN25_Low

#define GPIO_OUTCLR_PIN25_Low   (0UL)

Read: pin driver is low

Definition at line 5203 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN25_Msk

#define GPIO_OUTCLR_PIN25_Msk   (0x1UL << GPIO_OUTCLR_PIN25_Pos)

Bit mask of PIN25 field.

Definition at line 5202 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN25_Pos

#define GPIO_OUTCLR_PIN25_Pos   (25UL)

Position of PIN25 field.

Definition at line 5201 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN26_Clear

#define GPIO_OUTCLR_PIN26_Clear   (1UL)

Write: writing a '1' sets the pin low; writing a '0' has no effect

Definition at line 5198 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN26_High

#define GPIO_OUTCLR_PIN26_High   (1UL)

Read: pin driver is high

Definition at line 5197 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN26_Low

#define GPIO_OUTCLR_PIN26_Low   (0UL)

Read: pin driver is low

Definition at line 5196 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN26_Msk

#define GPIO_OUTCLR_PIN26_Msk   (0x1UL << GPIO_OUTCLR_PIN26_Pos)

Bit mask of PIN26 field.

Definition at line 5195 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN26_Pos

#define GPIO_OUTCLR_PIN26_Pos   (26UL)

Position of PIN26 field.

Definition at line 5194 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN27_Clear

#define GPIO_OUTCLR_PIN27_Clear   (1UL)

Write: writing a '1' sets the pin low; writing a '0' has no effect

Definition at line 5191 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN27_High

#define GPIO_OUTCLR_PIN27_High   (1UL)

Read: pin driver is high

Definition at line 5190 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN27_Low

#define GPIO_OUTCLR_PIN27_Low   (0UL)

Read: pin driver is low

Definition at line 5189 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN27_Msk

#define GPIO_OUTCLR_PIN27_Msk   (0x1UL << GPIO_OUTCLR_PIN27_Pos)

Bit mask of PIN27 field.

Definition at line 5188 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN27_Pos

#define GPIO_OUTCLR_PIN27_Pos   (27UL)

Position of PIN27 field.

Definition at line 5187 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN28_Clear

#define GPIO_OUTCLR_PIN28_Clear   (1UL)

Write: writing a '1' sets the pin low; writing a '0' has no effect

Definition at line 5184 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN28_High

#define GPIO_OUTCLR_PIN28_High   (1UL)

Read: pin driver is high

Definition at line 5183 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN28_Low

#define GPIO_OUTCLR_PIN28_Low   (0UL)

Read: pin driver is low

Definition at line 5182 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN28_Msk

#define GPIO_OUTCLR_PIN28_Msk   (0x1UL << GPIO_OUTCLR_PIN28_Pos)

Bit mask of PIN28 field.

Definition at line 5181 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN28_Pos

#define GPIO_OUTCLR_PIN28_Pos   (28UL)

Position of PIN28 field.

Definition at line 5180 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN29_Clear

#define GPIO_OUTCLR_PIN29_Clear   (1UL)

Write: writing a '1' sets the pin low; writing a '0' has no effect

Definition at line 5177 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN29_High

#define GPIO_OUTCLR_PIN29_High   (1UL)

Read: pin driver is high

Definition at line 5176 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN29_Low

#define GPIO_OUTCLR_PIN29_Low   (0UL)

Read: pin driver is low

Definition at line 5175 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN29_Msk

#define GPIO_OUTCLR_PIN29_Msk   (0x1UL << GPIO_OUTCLR_PIN29_Pos)

Bit mask of PIN29 field.

Definition at line 5174 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN29_Pos

#define GPIO_OUTCLR_PIN29_Pos   (29UL)

Position of PIN29 field.

Definition at line 5173 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN2_Clear

#define GPIO_OUTCLR_PIN2_Clear   (1UL)

Write: writing a '1' sets the pin low; writing a '0' has no effect

Definition at line 5366 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN2_High

#define GPIO_OUTCLR_PIN2_High   (1UL)

Read: pin driver is high

Definition at line 5365 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN2_Low

#define GPIO_OUTCLR_PIN2_Low   (0UL)

Read: pin driver is low

Definition at line 5364 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN2_Msk

#define GPIO_OUTCLR_PIN2_Msk   (0x1UL << GPIO_OUTCLR_PIN2_Pos)

Bit mask of PIN2 field.

Definition at line 5363 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN2_Pos

#define GPIO_OUTCLR_PIN2_Pos   (2UL)

Position of PIN2 field.

Definition at line 5362 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN30_Clear

#define GPIO_OUTCLR_PIN30_Clear   (1UL)

Write: writing a '1' sets the pin low; writing a '0' has no effect

Definition at line 5170 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN30_High

#define GPIO_OUTCLR_PIN30_High   (1UL)

Read: pin driver is high

Definition at line 5169 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN30_Low

#define GPIO_OUTCLR_PIN30_Low   (0UL)

Read: pin driver is low

Definition at line 5168 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN30_Msk

#define GPIO_OUTCLR_PIN30_Msk   (0x1UL << GPIO_OUTCLR_PIN30_Pos)

Bit mask of PIN30 field.

Definition at line 5167 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN30_Pos

#define GPIO_OUTCLR_PIN30_Pos   (30UL)

Position of PIN30 field.

Definition at line 5166 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN31_Clear

#define GPIO_OUTCLR_PIN31_Clear   (1UL)

Write: writing a '1' sets the pin low; writing a '0' has no effect

Definition at line 5163 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN31_High

#define GPIO_OUTCLR_PIN31_High   (1UL)

Read: pin driver is high

Definition at line 5162 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN31_Low

#define GPIO_OUTCLR_PIN31_Low   (0UL)

Read: pin driver is low

Definition at line 5161 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN31_Msk

#define GPIO_OUTCLR_PIN31_Msk   (0x1UL << GPIO_OUTCLR_PIN31_Pos)

Bit mask of PIN31 field.

Definition at line 5160 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN31_Pos

#define GPIO_OUTCLR_PIN31_Pos   (31UL)

Position of PIN31 field.

Definition at line 5159 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN3_Clear

#define GPIO_OUTCLR_PIN3_Clear   (1UL)

Write: writing a '1' sets the pin low; writing a '0' has no effect

Definition at line 5359 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN3_High

#define GPIO_OUTCLR_PIN3_High   (1UL)

Read: pin driver is high

Definition at line 5358 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN3_Low

#define GPIO_OUTCLR_PIN3_Low   (0UL)

Read: pin driver is low

Definition at line 5357 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN3_Msk

#define GPIO_OUTCLR_PIN3_Msk   (0x1UL << GPIO_OUTCLR_PIN3_Pos)

Bit mask of PIN3 field.

Definition at line 5356 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN3_Pos

#define GPIO_OUTCLR_PIN3_Pos   (3UL)

Position of PIN3 field.

Definition at line 5355 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN4_Clear

#define GPIO_OUTCLR_PIN4_Clear   (1UL)

Write: writing a '1' sets the pin low; writing a '0' has no effect

Definition at line 5352 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN4_High

#define GPIO_OUTCLR_PIN4_High   (1UL)

Read: pin driver is high

Definition at line 5351 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN4_Low

#define GPIO_OUTCLR_PIN4_Low   (0UL)

Read: pin driver is low

Definition at line 5350 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN4_Msk

#define GPIO_OUTCLR_PIN4_Msk   (0x1UL << GPIO_OUTCLR_PIN4_Pos)

Bit mask of PIN4 field.

Definition at line 5349 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN4_Pos

#define GPIO_OUTCLR_PIN4_Pos   (4UL)

Position of PIN4 field.

Definition at line 5348 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN5_Clear

#define GPIO_OUTCLR_PIN5_Clear   (1UL)

Write: writing a '1' sets the pin low; writing a '0' has no effect

Definition at line 5345 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN5_High

#define GPIO_OUTCLR_PIN5_High   (1UL)

Read: pin driver is high

Definition at line 5344 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN5_Low

#define GPIO_OUTCLR_PIN5_Low   (0UL)

Read: pin driver is low

Definition at line 5343 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN5_Msk

#define GPIO_OUTCLR_PIN5_Msk   (0x1UL << GPIO_OUTCLR_PIN5_Pos)

Bit mask of PIN5 field.

Definition at line 5342 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN5_Pos

#define GPIO_OUTCLR_PIN5_Pos   (5UL)

Position of PIN5 field.

Definition at line 5341 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN6_Clear

#define GPIO_OUTCLR_PIN6_Clear   (1UL)

Write: writing a '1' sets the pin low; writing a '0' has no effect

Definition at line 5338 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN6_High

#define GPIO_OUTCLR_PIN6_High   (1UL)

Read: pin driver is high

Definition at line 5337 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN6_Low

#define GPIO_OUTCLR_PIN6_Low   (0UL)

Read: pin driver is low

Definition at line 5336 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN6_Msk

#define GPIO_OUTCLR_PIN6_Msk   (0x1UL << GPIO_OUTCLR_PIN6_Pos)

Bit mask of PIN6 field.

Definition at line 5335 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN6_Pos

#define GPIO_OUTCLR_PIN6_Pos   (6UL)

Position of PIN6 field.

Definition at line 5334 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN7_Clear

#define GPIO_OUTCLR_PIN7_Clear   (1UL)

Write: writing a '1' sets the pin low; writing a '0' has no effect

Definition at line 5331 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN7_High

#define GPIO_OUTCLR_PIN7_High   (1UL)

Read: pin driver is high

Definition at line 5330 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN7_Low

#define GPIO_OUTCLR_PIN7_Low   (0UL)

Read: pin driver is low

Definition at line 5329 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN7_Msk

#define GPIO_OUTCLR_PIN7_Msk   (0x1UL << GPIO_OUTCLR_PIN7_Pos)

Bit mask of PIN7 field.

Definition at line 5328 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN7_Pos

#define GPIO_OUTCLR_PIN7_Pos   (7UL)

Position of PIN7 field.

Definition at line 5327 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN8_Clear

#define GPIO_OUTCLR_PIN8_Clear   (1UL)

Write: writing a '1' sets the pin low; writing a '0' has no effect

Definition at line 5324 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN8_High

#define GPIO_OUTCLR_PIN8_High   (1UL)

Read: pin driver is high

Definition at line 5323 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN8_Low

#define GPIO_OUTCLR_PIN8_Low   (0UL)

Read: pin driver is low

Definition at line 5322 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN8_Msk

#define GPIO_OUTCLR_PIN8_Msk   (0x1UL << GPIO_OUTCLR_PIN8_Pos)

Bit mask of PIN8 field.

Definition at line 5321 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN8_Pos

#define GPIO_OUTCLR_PIN8_Pos   (8UL)

Position of PIN8 field.

Definition at line 5320 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN9_Clear

#define GPIO_OUTCLR_PIN9_Clear   (1UL)

Write: writing a '1' sets the pin low; writing a '0' has no effect

Definition at line 5317 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN9_High

#define GPIO_OUTCLR_PIN9_High   (1UL)

Read: pin driver is high

Definition at line 5316 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN9_Low

#define GPIO_OUTCLR_PIN9_Low   (0UL)

Read: pin driver is low

Definition at line 5315 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN9_Msk

#define GPIO_OUTCLR_PIN9_Msk   (0x1UL << GPIO_OUTCLR_PIN9_Pos)

Bit mask of PIN9 field.

Definition at line 5314 of file nrf52_bitfields.h.

◆ GPIO_OUTCLR_PIN9_Pos

#define GPIO_OUTCLR_PIN9_Pos   (9UL)

Position of PIN9 field.

Definition at line 5313 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN0_High

#define GPIO_OUTSET_PIN0_High   (1UL)

Read: pin driver is high

Definition at line 5152 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN0_Low

#define GPIO_OUTSET_PIN0_Low   (0UL)

Read: pin driver is low

Definition at line 5151 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN0_Msk

#define GPIO_OUTSET_PIN0_Msk   (0x1UL << GPIO_OUTSET_PIN0_Pos)

Bit mask of PIN0 field.

Definition at line 5150 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN0_Pos

#define GPIO_OUTSET_PIN0_Pos   (0UL)

Position of PIN0 field.

Definition at line 5149 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN0_Set

#define GPIO_OUTSET_PIN0_Set   (1UL)

Write: writing a '1' sets the pin high; writing a '0' has no effect

Definition at line 5153 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN10_High

#define GPIO_OUTSET_PIN10_High   (1UL)

Read: pin driver is high

Definition at line 5082 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN10_Low

#define GPIO_OUTSET_PIN10_Low   (0UL)

Read: pin driver is low

Definition at line 5081 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN10_Msk

#define GPIO_OUTSET_PIN10_Msk   (0x1UL << GPIO_OUTSET_PIN10_Pos)

Bit mask of PIN10 field.

Definition at line 5080 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN10_Pos

#define GPIO_OUTSET_PIN10_Pos   (10UL)

Position of PIN10 field.

Definition at line 5079 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN10_Set

#define GPIO_OUTSET_PIN10_Set   (1UL)

Write: writing a '1' sets the pin high; writing a '0' has no effect

Definition at line 5083 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN11_High

#define GPIO_OUTSET_PIN11_High   (1UL)

Read: pin driver is high

Definition at line 5075 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN11_Low

#define GPIO_OUTSET_PIN11_Low   (0UL)

Read: pin driver is low

Definition at line 5074 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN11_Msk

#define GPIO_OUTSET_PIN11_Msk   (0x1UL << GPIO_OUTSET_PIN11_Pos)

Bit mask of PIN11 field.

Definition at line 5073 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN11_Pos

#define GPIO_OUTSET_PIN11_Pos   (11UL)

Position of PIN11 field.

Definition at line 5072 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN11_Set

#define GPIO_OUTSET_PIN11_Set   (1UL)

Write: writing a '1' sets the pin high; writing a '0' has no effect

Definition at line 5076 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN12_High

#define GPIO_OUTSET_PIN12_High   (1UL)

Read: pin driver is high

Definition at line 5068 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN12_Low

#define GPIO_OUTSET_PIN12_Low   (0UL)

Read: pin driver is low

Definition at line 5067 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN12_Msk

#define GPIO_OUTSET_PIN12_Msk   (0x1UL << GPIO_OUTSET_PIN12_Pos)

Bit mask of PIN12 field.

Definition at line 5066 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN12_Pos

#define GPIO_OUTSET_PIN12_Pos   (12UL)

Position of PIN12 field.

Definition at line 5065 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN12_Set

#define GPIO_OUTSET_PIN12_Set   (1UL)

Write: writing a '1' sets the pin high; writing a '0' has no effect

Definition at line 5069 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN13_High

#define GPIO_OUTSET_PIN13_High   (1UL)

Read: pin driver is high

Definition at line 5061 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN13_Low

#define GPIO_OUTSET_PIN13_Low   (0UL)

Read: pin driver is low

Definition at line 5060 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN13_Msk

#define GPIO_OUTSET_PIN13_Msk   (0x1UL << GPIO_OUTSET_PIN13_Pos)

Bit mask of PIN13 field.

Definition at line 5059 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN13_Pos

#define GPIO_OUTSET_PIN13_Pos   (13UL)

Position of PIN13 field.

Definition at line 5058 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN13_Set

#define GPIO_OUTSET_PIN13_Set   (1UL)

Write: writing a '1' sets the pin high; writing a '0' has no effect

Definition at line 5062 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN14_High

#define GPIO_OUTSET_PIN14_High   (1UL)

Read: pin driver is high

Definition at line 5054 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN14_Low

#define GPIO_OUTSET_PIN14_Low   (0UL)

Read: pin driver is low

Definition at line 5053 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN14_Msk

#define GPIO_OUTSET_PIN14_Msk   (0x1UL << GPIO_OUTSET_PIN14_Pos)

Bit mask of PIN14 field.

Definition at line 5052 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN14_Pos

#define GPIO_OUTSET_PIN14_Pos   (14UL)

Position of PIN14 field.

Definition at line 5051 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN14_Set

#define GPIO_OUTSET_PIN14_Set   (1UL)

Write: writing a '1' sets the pin high; writing a '0' has no effect

Definition at line 5055 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN15_High

#define GPIO_OUTSET_PIN15_High   (1UL)

Read: pin driver is high

Definition at line 5047 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN15_Low

#define GPIO_OUTSET_PIN15_Low   (0UL)

Read: pin driver is low

Definition at line 5046 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN15_Msk

#define GPIO_OUTSET_PIN15_Msk   (0x1UL << GPIO_OUTSET_PIN15_Pos)

Bit mask of PIN15 field.

Definition at line 5045 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN15_Pos

#define GPIO_OUTSET_PIN15_Pos   (15UL)

Position of PIN15 field.

Definition at line 5044 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN15_Set

#define GPIO_OUTSET_PIN15_Set   (1UL)

Write: writing a '1' sets the pin high; writing a '0' has no effect

Definition at line 5048 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN16_High

#define GPIO_OUTSET_PIN16_High   (1UL)

Read: pin driver is high

Definition at line 5040 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN16_Low

#define GPIO_OUTSET_PIN16_Low   (0UL)

Read: pin driver is low

Definition at line 5039 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN16_Msk

#define GPIO_OUTSET_PIN16_Msk   (0x1UL << GPIO_OUTSET_PIN16_Pos)

Bit mask of PIN16 field.

Definition at line 5038 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN16_Pos

#define GPIO_OUTSET_PIN16_Pos   (16UL)

Position of PIN16 field.

Definition at line 5037 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN16_Set

#define GPIO_OUTSET_PIN16_Set   (1UL)

Write: writing a '1' sets the pin high; writing a '0' has no effect

Definition at line 5041 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN17_High

#define GPIO_OUTSET_PIN17_High   (1UL)

Read: pin driver is high

Definition at line 5033 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN17_Low

#define GPIO_OUTSET_PIN17_Low   (0UL)

Read: pin driver is low

Definition at line 5032 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN17_Msk

#define GPIO_OUTSET_PIN17_Msk   (0x1UL << GPIO_OUTSET_PIN17_Pos)

Bit mask of PIN17 field.

Definition at line 5031 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN17_Pos

#define GPIO_OUTSET_PIN17_Pos   (17UL)

Position of PIN17 field.

Definition at line 5030 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN17_Set

#define GPIO_OUTSET_PIN17_Set   (1UL)

Write: writing a '1' sets the pin high; writing a '0' has no effect

Definition at line 5034 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN18_High

#define GPIO_OUTSET_PIN18_High   (1UL)

Read: pin driver is high

Definition at line 5026 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN18_Low

#define GPIO_OUTSET_PIN18_Low   (0UL)

Read: pin driver is low

Definition at line 5025 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN18_Msk

#define GPIO_OUTSET_PIN18_Msk   (0x1UL << GPIO_OUTSET_PIN18_Pos)

Bit mask of PIN18 field.

Definition at line 5024 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN18_Pos

#define GPIO_OUTSET_PIN18_Pos   (18UL)

Position of PIN18 field.

Definition at line 5023 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN18_Set

#define GPIO_OUTSET_PIN18_Set   (1UL)

Write: writing a '1' sets the pin high; writing a '0' has no effect

Definition at line 5027 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN19_High

#define GPIO_OUTSET_PIN19_High   (1UL)

Read: pin driver is high

Definition at line 5019 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN19_Low

#define GPIO_OUTSET_PIN19_Low   (0UL)

Read: pin driver is low

Definition at line 5018 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN19_Msk

#define GPIO_OUTSET_PIN19_Msk   (0x1UL << GPIO_OUTSET_PIN19_Pos)

Bit mask of PIN19 field.

Definition at line 5017 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN19_Pos

#define GPIO_OUTSET_PIN19_Pos   (19UL)

Position of PIN19 field.

Definition at line 5016 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN19_Set

#define GPIO_OUTSET_PIN19_Set   (1UL)

Write: writing a '1' sets the pin high; writing a '0' has no effect

Definition at line 5020 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN1_High

#define GPIO_OUTSET_PIN1_High   (1UL)

Read: pin driver is high

Definition at line 5145 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN1_Low

#define GPIO_OUTSET_PIN1_Low   (0UL)

Read: pin driver is low

Definition at line 5144 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN1_Msk

#define GPIO_OUTSET_PIN1_Msk   (0x1UL << GPIO_OUTSET_PIN1_Pos)

Bit mask of PIN1 field.

Definition at line 5143 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN1_Pos

#define GPIO_OUTSET_PIN1_Pos   (1UL)

Position of PIN1 field.

Definition at line 5142 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN1_Set

#define GPIO_OUTSET_PIN1_Set   (1UL)

Write: writing a '1' sets the pin high; writing a '0' has no effect

Definition at line 5146 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN20_High

#define GPIO_OUTSET_PIN20_High   (1UL)

Read: pin driver is high

Definition at line 5012 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN20_Low

#define GPIO_OUTSET_PIN20_Low   (0UL)

Read: pin driver is low

Definition at line 5011 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN20_Msk

#define GPIO_OUTSET_PIN20_Msk   (0x1UL << GPIO_OUTSET_PIN20_Pos)

Bit mask of PIN20 field.

Definition at line 5010 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN20_Pos

#define GPIO_OUTSET_PIN20_Pos   (20UL)

Position of PIN20 field.

Definition at line 5009 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN20_Set

#define GPIO_OUTSET_PIN20_Set   (1UL)

Write: writing a '1' sets the pin high; writing a '0' has no effect

Definition at line 5013 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN21_High

#define GPIO_OUTSET_PIN21_High   (1UL)

Read: pin driver is high

Definition at line 5005 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN21_Low

#define GPIO_OUTSET_PIN21_Low   (0UL)

Read: pin driver is low

Definition at line 5004 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN21_Msk

#define GPIO_OUTSET_PIN21_Msk   (0x1UL << GPIO_OUTSET_PIN21_Pos)

Bit mask of PIN21 field.

Definition at line 5003 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN21_Pos

#define GPIO_OUTSET_PIN21_Pos   (21UL)

Position of PIN21 field.

Definition at line 5002 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN21_Set

#define GPIO_OUTSET_PIN21_Set   (1UL)

Write: writing a '1' sets the pin high; writing a '0' has no effect

Definition at line 5006 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN22_High

#define GPIO_OUTSET_PIN22_High   (1UL)

Read: pin driver is high

Definition at line 4998 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN22_Low

#define GPIO_OUTSET_PIN22_Low   (0UL)

Read: pin driver is low

Definition at line 4997 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN22_Msk

#define GPIO_OUTSET_PIN22_Msk   (0x1UL << GPIO_OUTSET_PIN22_Pos)

Bit mask of PIN22 field.

Definition at line 4996 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN22_Pos

#define GPIO_OUTSET_PIN22_Pos   (22UL)

Position of PIN22 field.

Definition at line 4995 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN22_Set

#define GPIO_OUTSET_PIN22_Set   (1UL)

Write: writing a '1' sets the pin high; writing a '0' has no effect

Definition at line 4999 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN23_High

#define GPIO_OUTSET_PIN23_High   (1UL)

Read: pin driver is high

Definition at line 4991 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN23_Low

#define GPIO_OUTSET_PIN23_Low   (0UL)

Read: pin driver is low

Definition at line 4990 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN23_Msk

#define GPIO_OUTSET_PIN23_Msk   (0x1UL << GPIO_OUTSET_PIN23_Pos)

Bit mask of PIN23 field.

Definition at line 4989 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN23_Pos

#define GPIO_OUTSET_PIN23_Pos   (23UL)

Position of PIN23 field.

Definition at line 4988 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN23_Set

#define GPIO_OUTSET_PIN23_Set   (1UL)

Write: writing a '1' sets the pin high; writing a '0' has no effect

Definition at line 4992 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN24_High

#define GPIO_OUTSET_PIN24_High   (1UL)

Read: pin driver is high

Definition at line 4984 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN24_Low

#define GPIO_OUTSET_PIN24_Low   (0UL)

Read: pin driver is low

Definition at line 4983 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN24_Msk

#define GPIO_OUTSET_PIN24_Msk   (0x1UL << GPIO_OUTSET_PIN24_Pos)

Bit mask of PIN24 field.

Definition at line 4982 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN24_Pos

#define GPIO_OUTSET_PIN24_Pos   (24UL)

Position of PIN24 field.

Definition at line 4981 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN24_Set

#define GPIO_OUTSET_PIN24_Set   (1UL)

Write: writing a '1' sets the pin high; writing a '0' has no effect

Definition at line 4985 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN25_High

#define GPIO_OUTSET_PIN25_High   (1UL)

Read: pin driver is high

Definition at line 4977 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN25_Low

#define GPIO_OUTSET_PIN25_Low   (0UL)

Read: pin driver is low

Definition at line 4976 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN25_Msk

#define GPIO_OUTSET_PIN25_Msk   (0x1UL << GPIO_OUTSET_PIN25_Pos)

Bit mask of PIN25 field.

Definition at line 4975 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN25_Pos

#define GPIO_OUTSET_PIN25_Pos   (25UL)

Position of PIN25 field.

Definition at line 4974 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN25_Set

#define GPIO_OUTSET_PIN25_Set   (1UL)

Write: writing a '1' sets the pin high; writing a '0' has no effect

Definition at line 4978 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN26_High

#define GPIO_OUTSET_PIN26_High   (1UL)

Read: pin driver is high

Definition at line 4970 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN26_Low

#define GPIO_OUTSET_PIN26_Low   (0UL)

Read: pin driver is low

Definition at line 4969 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN26_Msk

#define GPIO_OUTSET_PIN26_Msk   (0x1UL << GPIO_OUTSET_PIN26_Pos)

Bit mask of PIN26 field.

Definition at line 4968 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN26_Pos

#define GPIO_OUTSET_PIN26_Pos   (26UL)

Position of PIN26 field.

Definition at line 4967 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN26_Set

#define GPIO_OUTSET_PIN26_Set   (1UL)

Write: writing a '1' sets the pin high; writing a '0' has no effect

Definition at line 4971 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN27_High

#define GPIO_OUTSET_PIN27_High   (1UL)

Read: pin driver is high

Definition at line 4963 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN27_Low

#define GPIO_OUTSET_PIN27_Low   (0UL)

Read: pin driver is low

Definition at line 4962 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN27_Msk

#define GPIO_OUTSET_PIN27_Msk   (0x1UL << GPIO_OUTSET_PIN27_Pos)

Bit mask of PIN27 field.

Definition at line 4961 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN27_Pos

#define GPIO_OUTSET_PIN27_Pos   (27UL)

Position of PIN27 field.

Definition at line 4960 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN27_Set

#define GPIO_OUTSET_PIN27_Set   (1UL)

Write: writing a '1' sets the pin high; writing a '0' has no effect

Definition at line 4964 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN28_High

#define GPIO_OUTSET_PIN28_High   (1UL)

Read: pin driver is high

Definition at line 4956 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN28_Low

#define GPIO_OUTSET_PIN28_Low   (0UL)

Read: pin driver is low

Definition at line 4955 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN28_Msk

#define GPIO_OUTSET_PIN28_Msk   (0x1UL << GPIO_OUTSET_PIN28_Pos)

Bit mask of PIN28 field.

Definition at line 4954 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN28_Pos

#define GPIO_OUTSET_PIN28_Pos   (28UL)

Position of PIN28 field.

Definition at line 4953 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN28_Set

#define GPIO_OUTSET_PIN28_Set   (1UL)

Write: writing a '1' sets the pin high; writing a '0' has no effect

Definition at line 4957 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN29_High

#define GPIO_OUTSET_PIN29_High   (1UL)

Read: pin driver is high

Definition at line 4949 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN29_Low

#define GPIO_OUTSET_PIN29_Low   (0UL)

Read: pin driver is low

Definition at line 4948 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN29_Msk

#define GPIO_OUTSET_PIN29_Msk   (0x1UL << GPIO_OUTSET_PIN29_Pos)

Bit mask of PIN29 field.

Definition at line 4947 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN29_Pos

#define GPIO_OUTSET_PIN29_Pos   (29UL)

Position of PIN29 field.

Definition at line 4946 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN29_Set

#define GPIO_OUTSET_PIN29_Set   (1UL)

Write: writing a '1' sets the pin high; writing a '0' has no effect

Definition at line 4950 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN2_High

#define GPIO_OUTSET_PIN2_High   (1UL)

Read: pin driver is high

Definition at line 5138 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN2_Low

#define GPIO_OUTSET_PIN2_Low   (0UL)

Read: pin driver is low

Definition at line 5137 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN2_Msk

#define GPIO_OUTSET_PIN2_Msk   (0x1UL << GPIO_OUTSET_PIN2_Pos)

Bit mask of PIN2 field.

Definition at line 5136 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN2_Pos

#define GPIO_OUTSET_PIN2_Pos   (2UL)

Position of PIN2 field.

Definition at line 5135 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN2_Set

#define GPIO_OUTSET_PIN2_Set   (1UL)

Write: writing a '1' sets the pin high; writing a '0' has no effect

Definition at line 5139 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN30_High

#define GPIO_OUTSET_PIN30_High   (1UL)

Read: pin driver is high

Definition at line 4942 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN30_Low

#define GPIO_OUTSET_PIN30_Low   (0UL)

Read: pin driver is low

Definition at line 4941 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN30_Msk

#define GPIO_OUTSET_PIN30_Msk   (0x1UL << GPIO_OUTSET_PIN30_Pos)

Bit mask of PIN30 field.

Definition at line 4940 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN30_Pos

#define GPIO_OUTSET_PIN30_Pos   (30UL)

Position of PIN30 field.

Definition at line 4939 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN30_Set

#define GPIO_OUTSET_PIN30_Set   (1UL)

Write: writing a '1' sets the pin high; writing a '0' has no effect

Definition at line 4943 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN31_High

#define GPIO_OUTSET_PIN31_High   (1UL)

Read: pin driver is high

Definition at line 4935 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN31_Low

#define GPIO_OUTSET_PIN31_Low   (0UL)

Read: pin driver is low

Definition at line 4934 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN31_Msk

#define GPIO_OUTSET_PIN31_Msk   (0x1UL << GPIO_OUTSET_PIN31_Pos)

Bit mask of PIN31 field.

Definition at line 4933 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN31_Pos

#define GPIO_OUTSET_PIN31_Pos   (31UL)

Position of PIN31 field.

Definition at line 4932 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN31_Set

#define GPIO_OUTSET_PIN31_Set   (1UL)

Write: writing a '1' sets the pin high; writing a '0' has no effect

Definition at line 4936 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN3_High

#define GPIO_OUTSET_PIN3_High   (1UL)

Read: pin driver is high

Definition at line 5131 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN3_Low

#define GPIO_OUTSET_PIN3_Low   (0UL)

Read: pin driver is low

Definition at line 5130 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN3_Msk

#define GPIO_OUTSET_PIN3_Msk   (0x1UL << GPIO_OUTSET_PIN3_Pos)

Bit mask of PIN3 field.

Definition at line 5129 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN3_Pos

#define GPIO_OUTSET_PIN3_Pos   (3UL)

Position of PIN3 field.

Definition at line 5128 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN3_Set

#define GPIO_OUTSET_PIN3_Set   (1UL)

Write: writing a '1' sets the pin high; writing a '0' has no effect

Definition at line 5132 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN4_High

#define GPIO_OUTSET_PIN4_High   (1UL)

Read: pin driver is high

Definition at line 5124 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN4_Low

#define GPIO_OUTSET_PIN4_Low   (0UL)

Read: pin driver is low

Definition at line 5123 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN4_Msk

#define GPIO_OUTSET_PIN4_Msk   (0x1UL << GPIO_OUTSET_PIN4_Pos)

Bit mask of PIN4 field.

Definition at line 5122 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN4_Pos

#define GPIO_OUTSET_PIN4_Pos   (4UL)

Position of PIN4 field.

Definition at line 5121 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN4_Set

#define GPIO_OUTSET_PIN4_Set   (1UL)

Write: writing a '1' sets the pin high; writing a '0' has no effect

Definition at line 5125 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN5_High

#define GPIO_OUTSET_PIN5_High   (1UL)

Read: pin driver is high

Definition at line 5117 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN5_Low

#define GPIO_OUTSET_PIN5_Low   (0UL)

Read: pin driver is low

Definition at line 5116 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN5_Msk

#define GPIO_OUTSET_PIN5_Msk   (0x1UL << GPIO_OUTSET_PIN5_Pos)

Bit mask of PIN5 field.

Definition at line 5115 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN5_Pos

#define GPIO_OUTSET_PIN5_Pos   (5UL)

Position of PIN5 field.

Definition at line 5114 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN5_Set

#define GPIO_OUTSET_PIN5_Set   (1UL)

Write: writing a '1' sets the pin high; writing a '0' has no effect

Definition at line 5118 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN6_High

#define GPIO_OUTSET_PIN6_High   (1UL)

Read: pin driver is high

Definition at line 5110 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN6_Low

#define GPIO_OUTSET_PIN6_Low   (0UL)

Read: pin driver is low

Definition at line 5109 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN6_Msk

#define GPIO_OUTSET_PIN6_Msk   (0x1UL << GPIO_OUTSET_PIN6_Pos)

Bit mask of PIN6 field.

Definition at line 5108 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN6_Pos

#define GPIO_OUTSET_PIN6_Pos   (6UL)

Position of PIN6 field.

Definition at line 5107 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN6_Set

#define GPIO_OUTSET_PIN6_Set   (1UL)

Write: writing a '1' sets the pin high; writing a '0' has no effect

Definition at line 5111 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN7_High

#define GPIO_OUTSET_PIN7_High   (1UL)

Read: pin driver is high

Definition at line 5103 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN7_Low

#define GPIO_OUTSET_PIN7_Low   (0UL)

Read: pin driver is low

Definition at line 5102 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN7_Msk

#define GPIO_OUTSET_PIN7_Msk   (0x1UL << GPIO_OUTSET_PIN7_Pos)

Bit mask of PIN7 field.

Definition at line 5101 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN7_Pos

#define GPIO_OUTSET_PIN7_Pos   (7UL)

Position of PIN7 field.

Definition at line 5100 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN7_Set

#define GPIO_OUTSET_PIN7_Set   (1UL)

Write: writing a '1' sets the pin high; writing a '0' has no effect

Definition at line 5104 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN8_High

#define GPIO_OUTSET_PIN8_High   (1UL)

Read: pin driver is high

Definition at line 5096 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN8_Low

#define GPIO_OUTSET_PIN8_Low   (0UL)

Read: pin driver is low

Definition at line 5095 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN8_Msk

#define GPIO_OUTSET_PIN8_Msk   (0x1UL << GPIO_OUTSET_PIN8_Pos)

Bit mask of PIN8 field.

Definition at line 5094 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN8_Pos

#define GPIO_OUTSET_PIN8_Pos   (8UL)

Position of PIN8 field.

Definition at line 5093 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN8_Set

#define GPIO_OUTSET_PIN8_Set   (1UL)

Write: writing a '1' sets the pin high; writing a '0' has no effect

Definition at line 5097 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN9_High

#define GPIO_OUTSET_PIN9_High   (1UL)

Read: pin driver is high

Definition at line 5089 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN9_Low

#define GPIO_OUTSET_PIN9_Low   (0UL)

Read: pin driver is low

Definition at line 5088 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN9_Msk

#define GPIO_OUTSET_PIN9_Msk   (0x1UL << GPIO_OUTSET_PIN9_Pos)

Bit mask of PIN9 field.

Definition at line 5087 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN9_Pos

#define GPIO_OUTSET_PIN9_Pos   (9UL)

Position of PIN9 field.

Definition at line 5086 of file nrf52_bitfields.h.

◆ GPIO_OUTSET_PIN9_Set

#define GPIO_OUTSET_PIN9_Set   (1UL)

Write: writing a '1' sets the pin high; writing a '0' has no effect

Definition at line 5090 of file nrf52_bitfields.h.

◆ GPIO_PIN_CNF_DIR_Input

#define GPIO_PIN_CNF_DIR_Input   (0UL)

Configure pin as an input pin

Definition at line 6280 of file nrf52_bitfields.h.

◆ GPIO_PIN_CNF_DIR_Msk

#define GPIO_PIN_CNF_DIR_Msk   (0x1UL << GPIO_PIN_CNF_DIR_Pos)

Bit mask of DIR field.

Definition at line 6279 of file nrf52_bitfields.h.

◆ GPIO_PIN_CNF_DIR_Output

#define GPIO_PIN_CNF_DIR_Output   (1UL)

Configure pin as an output pin

Definition at line 6281 of file nrf52_bitfields.h.

◆ GPIO_PIN_CNF_DIR_Pos

#define GPIO_PIN_CNF_DIR_Pos   (0UL)

Position of DIR field.

Definition at line 6278 of file nrf52_bitfields.h.

◆ GPIO_PIN_CNF_DRIVE_D0H1

#define GPIO_PIN_CNF_DRIVE_D0H1   (5UL)

Disconnect '0', high drive '1'

Definition at line 6260 of file nrf52_bitfields.h.

◆ GPIO_PIN_CNF_DRIVE_D0S1

#define GPIO_PIN_CNF_DRIVE_D0S1   (4UL)

Disconnect '0' standard '1'

Definition at line 6259 of file nrf52_bitfields.h.

◆ GPIO_PIN_CNF_DRIVE_H0D1

#define GPIO_PIN_CNF_DRIVE_H0D1   (7UL)

High drive '0', disconnect '1'

Definition at line 6262 of file nrf52_bitfields.h.

◆ GPIO_PIN_CNF_DRIVE_H0H1

#define GPIO_PIN_CNF_DRIVE_H0H1   (3UL)

High drive '0', high 'drive '1''

Definition at line 6258 of file nrf52_bitfields.h.

◆ GPIO_PIN_CNF_DRIVE_H0S1

#define GPIO_PIN_CNF_DRIVE_H0S1   (1UL)

High drive '0', standard '1'

Definition at line 6256 of file nrf52_bitfields.h.

◆ GPIO_PIN_CNF_DRIVE_Msk

#define GPIO_PIN_CNF_DRIVE_Msk   (0x7UL << GPIO_PIN_CNF_DRIVE_Pos)

Bit mask of DRIVE field.

Definition at line 6254 of file nrf52_bitfields.h.

◆ GPIO_PIN_CNF_DRIVE_Pos

#define GPIO_PIN_CNF_DRIVE_Pos   (8UL)

Position of DRIVE field.

Definition at line 6253 of file nrf52_bitfields.h.

◆ GPIO_PIN_CNF_DRIVE_S0D1

#define GPIO_PIN_CNF_DRIVE_S0D1   (6UL)

Standard '0'. disconnect '1'

Definition at line 6261 of file nrf52_bitfields.h.

◆ GPIO_PIN_CNF_DRIVE_S0H1

#define GPIO_PIN_CNF_DRIVE_S0H1   (2UL)

Standard '0', high drive '1'

Definition at line 6257 of file nrf52_bitfields.h.

◆ GPIO_PIN_CNF_DRIVE_S0S1

#define GPIO_PIN_CNF_DRIVE_S0S1   (0UL)

Standard '0', standard '1'

Definition at line 6255 of file nrf52_bitfields.h.

◆ GPIO_PIN_CNF_INPUT_Connect

#define GPIO_PIN_CNF_INPUT_Connect   (0UL)

Connect input buffer

Definition at line 6274 of file nrf52_bitfields.h.

◆ GPIO_PIN_CNF_INPUT_Disconnect

#define GPIO_PIN_CNF_INPUT_Disconnect   (1UL)

Disconnect input buffer

Definition at line 6275 of file nrf52_bitfields.h.

◆ GPIO_PIN_CNF_INPUT_Msk

#define GPIO_PIN_CNF_INPUT_Msk   (0x1UL << GPIO_PIN_CNF_INPUT_Pos)

Bit mask of INPUT field.

Definition at line 6273 of file nrf52_bitfields.h.

◆ GPIO_PIN_CNF_INPUT_Pos

#define GPIO_PIN_CNF_INPUT_Pos   (1UL)

Position of INPUT field.

Definition at line 6272 of file nrf52_bitfields.h.

◆ GPIO_PIN_CNF_PULL_Disabled

#define GPIO_PIN_CNF_PULL_Disabled   (0UL)

No pull

Definition at line 6267 of file nrf52_bitfields.h.

◆ GPIO_PIN_CNF_PULL_Msk

#define GPIO_PIN_CNF_PULL_Msk   (0x3UL << GPIO_PIN_CNF_PULL_Pos)

Bit mask of PULL field.

Definition at line 6266 of file nrf52_bitfields.h.

◆ GPIO_PIN_CNF_PULL_Pos

#define GPIO_PIN_CNF_PULL_Pos   (2UL)

Position of PULL field.

Definition at line 6265 of file nrf52_bitfields.h.

◆ GPIO_PIN_CNF_PULL_Pulldown

#define GPIO_PIN_CNF_PULL_Pulldown   (1UL)

Pull down on pin

Definition at line 6268 of file nrf52_bitfields.h.

◆ GPIO_PIN_CNF_PULL_Pullup

#define GPIO_PIN_CNF_PULL_Pullup   (3UL)

Pull up on pin

Definition at line 6269 of file nrf52_bitfields.h.

◆ GPIO_PIN_CNF_SENSE_Disabled

#define GPIO_PIN_CNF_SENSE_Disabled   (0UL)

Disabled

Definition at line 6248 of file nrf52_bitfields.h.

◆ GPIO_PIN_CNF_SENSE_High

#define GPIO_PIN_CNF_SENSE_High   (2UL)

Sense for high level

Definition at line 6249 of file nrf52_bitfields.h.

◆ GPIO_PIN_CNF_SENSE_Low

#define GPIO_PIN_CNF_SENSE_Low   (3UL)

Sense for low level

Definition at line 6250 of file nrf52_bitfields.h.

◆ GPIO_PIN_CNF_SENSE_Msk

#define GPIO_PIN_CNF_SENSE_Msk   (0x3UL << GPIO_PIN_CNF_SENSE_Pos)

Bit mask of SENSE field.

Definition at line 6247 of file nrf52_bitfields.h.

◆ GPIO_PIN_CNF_SENSE_Pos

#define GPIO_PIN_CNF_SENSE_Pos   (16UL)

Position of SENSE field.

Definition at line 6246 of file nrf52_bitfields.h.

◆ GPIOTE_CONFIG_MODE_Disabled

#define GPIOTE_CONFIG_MODE_Disabled   (0UL)

Disabled. Pin specified by PSEL will not be acquired by the GPIOTE module.

Definition at line 2181 of file nrf52_bitfields.h.

◆ GPIOTE_CONFIG_MODE_Event

#define GPIOTE_CONFIG_MODE_Event   (1UL)

Event mode

Definition at line 2182 of file nrf52_bitfields.h.

◆ GPIOTE_CONFIG_MODE_Msk

#define GPIOTE_CONFIG_MODE_Msk   (0x3UL << GPIOTE_CONFIG_MODE_Pos)

Bit mask of MODE field.

Definition at line 2180 of file nrf52_bitfields.h.

◆ GPIOTE_CONFIG_MODE_Pos

#define GPIOTE_CONFIG_MODE_Pos   (0UL)

Position of MODE field.

Definition at line 2179 of file nrf52_bitfields.h.

◆ GPIOTE_CONFIG_MODE_Task

#define GPIOTE_CONFIG_MODE_Task   (3UL)

Task mode

Definition at line 2183 of file nrf52_bitfields.h.

◆ GPIOTE_CONFIG_OUTINIT_High

#define GPIOTE_CONFIG_OUTINIT_High   (1UL)

Task mode: Initial value of pin before task triggering is high

Definition at line 2164 of file nrf52_bitfields.h.

◆ GPIOTE_CONFIG_OUTINIT_Low

#define GPIOTE_CONFIG_OUTINIT_Low   (0UL)

Task mode: Initial value of pin before task triggering is low

Definition at line 2163 of file nrf52_bitfields.h.

◆ GPIOTE_CONFIG_OUTINIT_Msk

#define GPIOTE_CONFIG_OUTINIT_Msk   (0x1UL << GPIOTE_CONFIG_OUTINIT_Pos)

Bit mask of OUTINIT field.

Definition at line 2162 of file nrf52_bitfields.h.

◆ GPIOTE_CONFIG_OUTINIT_Pos

#define GPIOTE_CONFIG_OUTINIT_Pos   (20UL)

Position of OUTINIT field.

Definition at line 2161 of file nrf52_bitfields.h.

◆ GPIOTE_CONFIG_POLARITY_HiToLo

#define GPIOTE_CONFIG_POLARITY_HiToLo   (2UL)

Task mode: Clear pin from OUT[n] task. Event mode: Generate IN[n] event when falling edge on pin.

Definition at line 2171 of file nrf52_bitfields.h.

◆ GPIOTE_CONFIG_POLARITY_LoToHi

#define GPIOTE_CONFIG_POLARITY_LoToHi   (1UL)

Task mode: Set pin from OUT[n] task. Event mode: Generate IN[n] event when rising edge on pin.

Definition at line 2170 of file nrf52_bitfields.h.

◆ GPIOTE_CONFIG_POLARITY_Msk

#define GPIOTE_CONFIG_POLARITY_Msk   (0x3UL << GPIOTE_CONFIG_POLARITY_Pos)

Bit mask of POLARITY field.

Definition at line 2168 of file nrf52_bitfields.h.

◆ GPIOTE_CONFIG_POLARITY_None

#define GPIOTE_CONFIG_POLARITY_None   (0UL)

Task mode: No effect on pin from OUT[n] task. Event mode: no IN[n] event generated on pin activity.

Definition at line 2169 of file nrf52_bitfields.h.

◆ GPIOTE_CONFIG_POLARITY_Pos

#define GPIOTE_CONFIG_POLARITY_Pos   (16UL)

Position of POLARITY field.

Definition at line 2167 of file nrf52_bitfields.h.

◆ GPIOTE_CONFIG_POLARITY_Toggle

#define GPIOTE_CONFIG_POLARITY_Toggle   (3UL)

Task mode: Toggle pin from OUT[n]. Event mode: Generate IN[n] when any change on pin.

Definition at line 2172 of file nrf52_bitfields.h.

◆ GPIOTE_CONFIG_PSEL_Msk

#define GPIOTE_CONFIG_PSEL_Msk   (0x1FUL << GPIOTE_CONFIG_PSEL_Pos)

Bit mask of PSEL field.

Definition at line 2176 of file nrf52_bitfields.h.

◆ GPIOTE_CONFIG_PSEL_Pos

#define GPIOTE_CONFIG_PSEL_Pos   (8UL)

Position of PSEL field.

Definition at line 2175 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN0_Clear

#define GPIOTE_INTENCLR_IN0_Clear   (1UL)

Disable

Definition at line 2155 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN0_Disabled

#define GPIOTE_INTENCLR_IN0_Disabled   (0UL)

Read: Disabled

Definition at line 2153 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN0_Enabled

#define GPIOTE_INTENCLR_IN0_Enabled   (1UL)

Read: Enabled

Definition at line 2154 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN0_Msk

#define GPIOTE_INTENCLR_IN0_Msk   (0x1UL << GPIOTE_INTENCLR_IN0_Pos)

Bit mask of IN0 field.

Definition at line 2152 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN0_Pos

#define GPIOTE_INTENCLR_IN0_Pos   (0UL)

Position of IN0 field.

Definition at line 2151 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN1_Clear

#define GPIOTE_INTENCLR_IN1_Clear   (1UL)

Disable

Definition at line 2148 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN1_Disabled

#define GPIOTE_INTENCLR_IN1_Disabled   (0UL)

Read: Disabled

Definition at line 2146 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN1_Enabled

#define GPIOTE_INTENCLR_IN1_Enabled   (1UL)

Read: Enabled

Definition at line 2147 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN1_Msk

#define GPIOTE_INTENCLR_IN1_Msk   (0x1UL << GPIOTE_INTENCLR_IN1_Pos)

Bit mask of IN1 field.

Definition at line 2145 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN1_Pos

#define GPIOTE_INTENCLR_IN1_Pos   (1UL)

Position of IN1 field.

Definition at line 2144 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN2_Clear

#define GPIOTE_INTENCLR_IN2_Clear   (1UL)

Disable

Definition at line 2141 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN2_Disabled

#define GPIOTE_INTENCLR_IN2_Disabled   (0UL)

Read: Disabled

Definition at line 2139 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN2_Enabled

#define GPIOTE_INTENCLR_IN2_Enabled   (1UL)

Read: Enabled

Definition at line 2140 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN2_Msk

#define GPIOTE_INTENCLR_IN2_Msk   (0x1UL << GPIOTE_INTENCLR_IN2_Pos)

Bit mask of IN2 field.

Definition at line 2138 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN2_Pos

#define GPIOTE_INTENCLR_IN2_Pos   (2UL)

Position of IN2 field.

Definition at line 2137 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN3_Clear

#define GPIOTE_INTENCLR_IN3_Clear   (1UL)

Disable

Definition at line 2134 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN3_Disabled

#define GPIOTE_INTENCLR_IN3_Disabled   (0UL)

Read: Disabled

Definition at line 2132 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN3_Enabled

#define GPIOTE_INTENCLR_IN3_Enabled   (1UL)

Read: Enabled

Definition at line 2133 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN3_Msk

#define GPIOTE_INTENCLR_IN3_Msk   (0x1UL << GPIOTE_INTENCLR_IN3_Pos)

Bit mask of IN3 field.

Definition at line 2131 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN3_Pos

#define GPIOTE_INTENCLR_IN3_Pos   (3UL)

Position of IN3 field.

Definition at line 2130 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN4_Clear

#define GPIOTE_INTENCLR_IN4_Clear   (1UL)

Disable

Definition at line 2127 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN4_Disabled

#define GPIOTE_INTENCLR_IN4_Disabled   (0UL)

Read: Disabled

Definition at line 2125 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN4_Enabled

#define GPIOTE_INTENCLR_IN4_Enabled   (1UL)

Read: Enabled

Definition at line 2126 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN4_Msk

#define GPIOTE_INTENCLR_IN4_Msk   (0x1UL << GPIOTE_INTENCLR_IN4_Pos)

Bit mask of IN4 field.

Definition at line 2124 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN4_Pos

#define GPIOTE_INTENCLR_IN4_Pos   (4UL)

Position of IN4 field.

Definition at line 2123 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN5_Clear

#define GPIOTE_INTENCLR_IN5_Clear   (1UL)

Disable

Definition at line 2120 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN5_Disabled

#define GPIOTE_INTENCLR_IN5_Disabled   (0UL)

Read: Disabled

Definition at line 2118 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN5_Enabled

#define GPIOTE_INTENCLR_IN5_Enabled   (1UL)

Read: Enabled

Definition at line 2119 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN5_Msk

#define GPIOTE_INTENCLR_IN5_Msk   (0x1UL << GPIOTE_INTENCLR_IN5_Pos)

Bit mask of IN5 field.

Definition at line 2117 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN5_Pos

#define GPIOTE_INTENCLR_IN5_Pos   (5UL)

Position of IN5 field.

Definition at line 2116 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN6_Clear

#define GPIOTE_INTENCLR_IN6_Clear   (1UL)

Disable

Definition at line 2113 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN6_Disabled

#define GPIOTE_INTENCLR_IN6_Disabled   (0UL)

Read: Disabled

Definition at line 2111 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN6_Enabled

#define GPIOTE_INTENCLR_IN6_Enabled   (1UL)

Read: Enabled

Definition at line 2112 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN6_Msk

#define GPIOTE_INTENCLR_IN6_Msk   (0x1UL << GPIOTE_INTENCLR_IN6_Pos)

Bit mask of IN6 field.

Definition at line 2110 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN6_Pos

#define GPIOTE_INTENCLR_IN6_Pos   (6UL)

Position of IN6 field.

Definition at line 2109 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN7_Clear

#define GPIOTE_INTENCLR_IN7_Clear   (1UL)

Disable

Definition at line 2106 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN7_Disabled

#define GPIOTE_INTENCLR_IN7_Disabled   (0UL)

Read: Disabled

Definition at line 2104 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN7_Enabled

#define GPIOTE_INTENCLR_IN7_Enabled   (1UL)

Read: Enabled

Definition at line 2105 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN7_Msk

#define GPIOTE_INTENCLR_IN7_Msk   (0x1UL << GPIOTE_INTENCLR_IN7_Pos)

Bit mask of IN7 field.

Definition at line 2103 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_IN7_Pos

#define GPIOTE_INTENCLR_IN7_Pos   (7UL)

Position of IN7 field.

Definition at line 2102 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_PORT_Clear

#define GPIOTE_INTENCLR_PORT_Clear   (1UL)

Disable

Definition at line 2099 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_PORT_Disabled

#define GPIOTE_INTENCLR_PORT_Disabled   (0UL)

Read: Disabled

Definition at line 2097 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_PORT_Enabled

#define GPIOTE_INTENCLR_PORT_Enabled   (1UL)

Read: Enabled

Definition at line 2098 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_PORT_Msk

#define GPIOTE_INTENCLR_PORT_Msk   (0x1UL << GPIOTE_INTENCLR_PORT_Pos)

Bit mask of PORT field.

Definition at line 2096 of file nrf52_bitfields.h.

◆ GPIOTE_INTENCLR_PORT_Pos

#define GPIOTE_INTENCLR_PORT_Pos   (31UL)

Position of PORT field.

Definition at line 2095 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN0_Disabled

#define GPIOTE_INTENSET_IN0_Disabled   (0UL)

Read: Disabled

Definition at line 2087 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN0_Enabled

#define GPIOTE_INTENSET_IN0_Enabled   (1UL)

Read: Enabled

Definition at line 2088 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN0_Msk

#define GPIOTE_INTENSET_IN0_Msk   (0x1UL << GPIOTE_INTENSET_IN0_Pos)

Bit mask of IN0 field.

Definition at line 2086 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN0_Pos

#define GPIOTE_INTENSET_IN0_Pos   (0UL)

Position of IN0 field.

Definition at line 2085 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN0_Set

#define GPIOTE_INTENSET_IN0_Set   (1UL)

Enable

Definition at line 2089 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN1_Disabled

#define GPIOTE_INTENSET_IN1_Disabled   (0UL)

Read: Disabled

Definition at line 2080 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN1_Enabled

#define GPIOTE_INTENSET_IN1_Enabled   (1UL)

Read: Enabled

Definition at line 2081 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN1_Msk

#define GPIOTE_INTENSET_IN1_Msk   (0x1UL << GPIOTE_INTENSET_IN1_Pos)

Bit mask of IN1 field.

Definition at line 2079 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN1_Pos

#define GPIOTE_INTENSET_IN1_Pos   (1UL)

Position of IN1 field.

Definition at line 2078 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN1_Set

#define GPIOTE_INTENSET_IN1_Set   (1UL)

Enable

Definition at line 2082 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN2_Disabled

#define GPIOTE_INTENSET_IN2_Disabled   (0UL)

Read: Disabled

Definition at line 2073 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN2_Enabled

#define GPIOTE_INTENSET_IN2_Enabled   (1UL)

Read: Enabled

Definition at line 2074 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN2_Msk

#define GPIOTE_INTENSET_IN2_Msk   (0x1UL << GPIOTE_INTENSET_IN2_Pos)

Bit mask of IN2 field.

Definition at line 2072 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN2_Pos

#define GPIOTE_INTENSET_IN2_Pos   (2UL)

Position of IN2 field.

Definition at line 2071 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN2_Set

#define GPIOTE_INTENSET_IN2_Set   (1UL)

Enable

Definition at line 2075 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN3_Disabled

#define GPIOTE_INTENSET_IN3_Disabled   (0UL)

Read: Disabled

Definition at line 2066 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN3_Enabled

#define GPIOTE_INTENSET_IN3_Enabled   (1UL)

Read: Enabled

Definition at line 2067 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN3_Msk

#define GPIOTE_INTENSET_IN3_Msk   (0x1UL << GPIOTE_INTENSET_IN3_Pos)

Bit mask of IN3 field.

Definition at line 2065 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN3_Pos

#define GPIOTE_INTENSET_IN3_Pos   (3UL)

Position of IN3 field.

Definition at line 2064 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN3_Set

#define GPIOTE_INTENSET_IN3_Set   (1UL)

Enable

Definition at line 2068 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN4_Disabled

#define GPIOTE_INTENSET_IN4_Disabled   (0UL)

Read: Disabled

Definition at line 2059 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN4_Enabled

#define GPIOTE_INTENSET_IN4_Enabled   (1UL)

Read: Enabled

Definition at line 2060 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN4_Msk

#define GPIOTE_INTENSET_IN4_Msk   (0x1UL << GPIOTE_INTENSET_IN4_Pos)

Bit mask of IN4 field.

Definition at line 2058 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN4_Pos

#define GPIOTE_INTENSET_IN4_Pos   (4UL)

Position of IN4 field.

Definition at line 2057 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN4_Set

#define GPIOTE_INTENSET_IN4_Set   (1UL)

Enable

Definition at line 2061 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN5_Disabled

#define GPIOTE_INTENSET_IN5_Disabled   (0UL)

Read: Disabled

Definition at line 2052 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN5_Enabled

#define GPIOTE_INTENSET_IN5_Enabled   (1UL)

Read: Enabled

Definition at line 2053 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN5_Msk

#define GPIOTE_INTENSET_IN5_Msk   (0x1UL << GPIOTE_INTENSET_IN5_Pos)

Bit mask of IN5 field.

Definition at line 2051 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN5_Pos

#define GPIOTE_INTENSET_IN5_Pos   (5UL)

Position of IN5 field.

Definition at line 2050 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN5_Set

#define GPIOTE_INTENSET_IN5_Set   (1UL)

Enable

Definition at line 2054 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN6_Disabled

#define GPIOTE_INTENSET_IN6_Disabled   (0UL)

Read: Disabled

Definition at line 2045 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN6_Enabled

#define GPIOTE_INTENSET_IN6_Enabled   (1UL)

Read: Enabled

Definition at line 2046 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN6_Msk

#define GPIOTE_INTENSET_IN6_Msk   (0x1UL << GPIOTE_INTENSET_IN6_Pos)

Bit mask of IN6 field.

Definition at line 2044 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN6_Pos

#define GPIOTE_INTENSET_IN6_Pos   (6UL)

Position of IN6 field.

Definition at line 2043 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN6_Set

#define GPIOTE_INTENSET_IN6_Set   (1UL)

Enable

Definition at line 2047 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN7_Disabled

#define GPIOTE_INTENSET_IN7_Disabled   (0UL)

Read: Disabled

Definition at line 2038 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN7_Enabled

#define GPIOTE_INTENSET_IN7_Enabled   (1UL)

Read: Enabled

Definition at line 2039 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN7_Msk

#define GPIOTE_INTENSET_IN7_Msk   (0x1UL << GPIOTE_INTENSET_IN7_Pos)

Bit mask of IN7 field.

Definition at line 2037 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN7_Pos

#define GPIOTE_INTENSET_IN7_Pos   (7UL)

Position of IN7 field.

Definition at line 2036 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_IN7_Set

#define GPIOTE_INTENSET_IN7_Set   (1UL)

Enable

Definition at line 2040 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_PORT_Disabled

#define GPIOTE_INTENSET_PORT_Disabled   (0UL)

Read: Disabled

Definition at line 2031 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_PORT_Enabled

#define GPIOTE_INTENSET_PORT_Enabled   (1UL)

Read: Enabled

Definition at line 2032 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_PORT_Msk

#define GPIOTE_INTENSET_PORT_Msk   (0x1UL << GPIOTE_INTENSET_PORT_Pos)

Bit mask of PORT field.

Definition at line 2030 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_PORT_Pos

#define GPIOTE_INTENSET_PORT_Pos   (31UL)

Position of PORT field.

Definition at line 2029 of file nrf52_bitfields.h.

◆ GPIOTE_INTENSET_PORT_Set

#define GPIOTE_INTENSET_PORT_Set   (1UL)

Enable

Definition at line 2033 of file nrf52_bitfields.h.

◆ I2S_CONFIG_ALIGN_ALIGN_LEFT

#define I2S_CONFIG_ALIGN_ALIGN_LEFT   (0UL)

Left-aligned.

Definition at line 2358 of file nrf52_bitfields.h.

◆ I2S_CONFIG_ALIGN_ALIGN_Msk

#define I2S_CONFIG_ALIGN_ALIGN_Msk   (0x1UL << I2S_CONFIG_ALIGN_ALIGN_Pos)

Bit mask of ALIGN field.

Definition at line 2357 of file nrf52_bitfields.h.

◆ I2S_CONFIG_ALIGN_ALIGN_Pos

#define I2S_CONFIG_ALIGN_ALIGN_Pos   (0UL)

Position of ALIGN field.

Definition at line 2356 of file nrf52_bitfields.h.

◆ I2S_CONFIG_ALIGN_ALIGN_RIGHT

#define I2S_CONFIG_ALIGN_ALIGN_RIGHT   (1UL)

Right-aligned.

Definition at line 2359 of file nrf52_bitfields.h.

◆ I2S_CONFIG_CHANNELS_CHANNELS_LEFT

#define I2S_CONFIG_CHANNELS_CHANNELS_LEFT   (1UL)

Left only.

Definition at line 2377 of file nrf52_bitfields.h.

◆ I2S_CONFIG_CHANNELS_CHANNELS_Msk

#define I2S_CONFIG_CHANNELS_CHANNELS_Msk   (0x3UL << I2S_CONFIG_CHANNELS_CHANNELS_Pos)

Bit mask of CHANNELS field.

Definition at line 2375 of file nrf52_bitfields.h.

◆ I2S_CONFIG_CHANNELS_CHANNELS_Pos

#define I2S_CONFIG_CHANNELS_CHANNELS_Pos   (0UL)

Position of CHANNELS field.

Definition at line 2374 of file nrf52_bitfields.h.

◆ I2S_CONFIG_CHANNELS_CHANNELS_RIGHT

#define I2S_CONFIG_CHANNELS_CHANNELS_RIGHT   (2UL)

Right only.

Definition at line 2378 of file nrf52_bitfields.h.

◆ I2S_CONFIG_CHANNELS_CHANNELS_STEREO

#define I2S_CONFIG_CHANNELS_CHANNELS_STEREO   (0UL)

Stereo.

Definition at line 2376 of file nrf52_bitfields.h.

◆ I2S_CONFIG_FORMAT_FORMAT_DSP

#define I2S_CONFIG_FORMAT_FORMAT_DSP   (1UL)

Alternate (DSP) format.

Definition at line 2368 of file nrf52_bitfields.h.

◆ I2S_CONFIG_FORMAT_FORMAT_I2S

#define I2S_CONFIG_FORMAT_FORMAT_I2S   (0UL)

Original I2S format.

Definition at line 2367 of file nrf52_bitfields.h.

◆ I2S_CONFIG_FORMAT_FORMAT_Msk

#define I2S_CONFIG_FORMAT_FORMAT_Msk   (0x1UL << I2S_CONFIG_FORMAT_FORMAT_Pos)

Bit mask of FORMAT field.

Definition at line 2366 of file nrf52_bitfields.h.

◆ I2S_CONFIG_FORMAT_FORMAT_Pos

#define I2S_CONFIG_FORMAT_FORMAT_Pos   (0UL)

Position of FORMAT field.

Definition at line 2365 of file nrf52_bitfields.h.

◆ I2S_CONFIG_MCKEN_MCKEN_DISABLE

#define I2S_CONFIG_MCKEN_MCKEN_DISABLE   (0UL)

Master clock generator disabled and PSEL.MCK not connected(available as GPIO).

Definition at line 2300 of file nrf52_bitfields.h.

◆ I2S_CONFIG_MCKEN_MCKEN_ENABLE

#define I2S_CONFIG_MCKEN_MCKEN_ENABLE   (1UL)

Master clock generator running and MCK output on PSEL.MCK.

Definition at line 2301 of file nrf52_bitfields.h.

◆ I2S_CONFIG_MCKEN_MCKEN_Msk

#define I2S_CONFIG_MCKEN_MCKEN_Msk   (0x1UL << I2S_CONFIG_MCKEN_MCKEN_Pos)

Bit mask of MCKEN field.

Definition at line 2299 of file nrf52_bitfields.h.

◆ I2S_CONFIG_MCKEN_MCKEN_Pos

#define I2S_CONFIG_MCKEN_MCKEN_Pos   (0UL)

Position of MCKEN field.

Definition at line 2298 of file nrf52_bitfields.h.

◆ I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV10

#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV10   (0x18000000UL)

32 MHz / 10 = 3.2 MHz

Definition at line 2318 of file nrf52_bitfields.h.

◆ I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV11

#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV11   (0x16000000UL)

32 MHz / 11 = 2.9090909 MHz

Definition at line 2317 of file nrf52_bitfields.h.

◆ I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV125

#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV125   (0x020C0000UL)

32 MHz / 125 = 0.256 MHz

Definition at line 2309 of file nrf52_bitfields.h.

◆ I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV15

#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV15   (0x11000000UL)

32 MHz / 15 = 2.1333333 MHz

Definition at line 2316 of file nrf52_bitfields.h.

◆ I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV16

#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV16   (0x10000000UL)

32 MHz / 16 = 2.0 MHz

Definition at line 2315 of file nrf52_bitfields.h.

◆ I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV2

#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV2   (0x80000000UL)

32 MHz / 2 = 16.0 MHz

Definition at line 2324 of file nrf52_bitfields.h.

◆ I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV21

#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV21   (0x0C000000UL)

32 MHz / 21 = 1.5238095

Definition at line 2314 of file nrf52_bitfields.h.

◆ I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV23

#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV23   (0x0B000000UL)

32 MHz / 23 = 1.3913043 MHz

Definition at line 2313 of file nrf52_bitfields.h.

◆ I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV3

#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV3   (0x50000000UL)

32 MHz / 3 = 10.6666667 MHz

Definition at line 2323 of file nrf52_bitfields.h.

◆ I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV31

#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV31   (0x08200000UL)

32 MHz / 31 = 1.0322581 MHz

Definition at line 2312 of file nrf52_bitfields.h.

◆ I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV4

#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV4   (0x40000000UL)

32 MHz / 4 = 8.0 MHz

Definition at line 2322 of file nrf52_bitfields.h.

◆ I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV42

#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV42   (0x06000000UL)

32 MHz / 42 = 0.7619048 MHz

Definition at line 2311 of file nrf52_bitfields.h.

◆ I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV5

#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV5   (0x30000000UL)

32 MHz / 5 = 6.4 MHz

Definition at line 2321 of file nrf52_bitfields.h.

◆ I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV6

#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV6   (0x28000000UL)

32 MHz / 6 = 5.3333333 MHz

Definition at line 2320 of file nrf52_bitfields.h.

◆ I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV63

#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV63   (0x04100000UL)

32 MHz / 63 = 0.5079365 MHz

Definition at line 2310 of file nrf52_bitfields.h.

◆ I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV8

#define I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV8   (0x20000000UL)

32 MHz / 8 = 4.0 MHz

Definition at line 2319 of file nrf52_bitfields.h.

◆ I2S_CONFIG_MCKFREQ_MCKFREQ_Msk

#define I2S_CONFIG_MCKFREQ_MCKFREQ_Msk   (0xFFFFFFFFUL << I2S_CONFIG_MCKFREQ_MCKFREQ_Pos)

Bit mask of MCKFREQ field.

Definition at line 2308 of file nrf52_bitfields.h.

◆ I2S_CONFIG_MCKFREQ_MCKFREQ_Pos

#define I2S_CONFIG_MCKFREQ_MCKFREQ_Pos   (0UL)

Position of MCKFREQ field.

Definition at line 2307 of file nrf52_bitfields.h.

◆ I2S_CONFIG_MODE_MODE_MASTER

#define I2S_CONFIG_MODE_MODE_MASTER   (0UL)

Master mode. SCK and LRCK generated from internal master clcok (MCK) and output on pins defined by PSEL.xxx.

Definition at line 2273 of file nrf52_bitfields.h.

◆ I2S_CONFIG_MODE_MODE_Msk

#define I2S_CONFIG_MODE_MODE_Msk   (0x1UL << I2S_CONFIG_MODE_MODE_Pos)

Bit mask of MODE field.

Definition at line 2272 of file nrf52_bitfields.h.

◆ I2S_CONFIG_MODE_MODE_Pos

#define I2S_CONFIG_MODE_MODE_Pos   (0UL)

Position of MODE field.

Definition at line 2271 of file nrf52_bitfields.h.

◆ I2S_CONFIG_MODE_MODE_SLAVE

#define I2S_CONFIG_MODE_MODE_SLAVE   (1UL)

Slave mode. SCK and LRCK generated by external master and received on pins defined by PSEL.xxx

Definition at line 2274 of file nrf52_bitfields.h.

◆ I2S_CONFIG_RATIO_RATIO_128X

#define I2S_CONFIG_RATIO_RATIO_128X   (4UL)

LRCK = MCK / 128

Definition at line 2336 of file nrf52_bitfields.h.

◆ I2S_CONFIG_RATIO_RATIO_192X

#define I2S_CONFIG_RATIO_RATIO_192X   (5UL)

LRCK = MCK / 192

Definition at line 2337 of file nrf52_bitfields.h.

◆ I2S_CONFIG_RATIO_RATIO_256X

#define I2S_CONFIG_RATIO_RATIO_256X   (6UL)

LRCK = MCK / 256

Definition at line 2338 of file nrf52_bitfields.h.

◆ I2S_CONFIG_RATIO_RATIO_32X

#define I2S_CONFIG_RATIO_RATIO_32X   (0UL)

LRCK = MCK / 32

Definition at line 2332 of file nrf52_bitfields.h.

◆ I2S_CONFIG_RATIO_RATIO_384X

#define I2S_CONFIG_RATIO_RATIO_384X   (7UL)

LRCK = MCK / 384

Definition at line 2339 of file nrf52_bitfields.h.

◆ I2S_CONFIG_RATIO_RATIO_48X

#define I2S_CONFIG_RATIO_RATIO_48X   (1UL)

LRCK = MCK / 48

Definition at line 2333 of file nrf52_bitfields.h.

◆ I2S_CONFIG_RATIO_RATIO_512X

#define I2S_CONFIG_RATIO_RATIO_512X   (8UL)

LRCK = MCK / 512

Definition at line 2340 of file nrf52_bitfields.h.

◆ I2S_CONFIG_RATIO_RATIO_64X

#define I2S_CONFIG_RATIO_RATIO_64X   (2UL)

LRCK = MCK / 64

Definition at line 2334 of file nrf52_bitfields.h.

◆ I2S_CONFIG_RATIO_RATIO_96X

#define I2S_CONFIG_RATIO_RATIO_96X   (3UL)

LRCK = MCK / 96x

Definition at line 2335 of file nrf52_bitfields.h.

◆ I2S_CONFIG_RATIO_RATIO_Msk

#define I2S_CONFIG_RATIO_RATIO_Msk   (0xFUL << I2S_CONFIG_RATIO_RATIO_Pos)

Bit mask of RATIO field.

Definition at line 2331 of file nrf52_bitfields.h.

◆ I2S_CONFIG_RATIO_RATIO_Pos

#define I2S_CONFIG_RATIO_RATIO_Pos   (0UL)

Position of RATIO field.

Definition at line 2330 of file nrf52_bitfields.h.

◆ I2S_CONFIG_RXEN_RXEN_DISABLE

#define I2S_CONFIG_RXEN_RXEN_DISABLE   (0UL)

Reception disabled and now data will be written to the RXD.PTR address.

Definition at line 2282 of file nrf52_bitfields.h.

◆ I2S_CONFIG_RXEN_RXEN_ENABLE

#define I2S_CONFIG_RXEN_RXEN_ENABLE   (1UL)

Reception enabled.

Definition at line 2283 of file nrf52_bitfields.h.

◆ I2S_CONFIG_RXEN_RXEN_Msk

#define I2S_CONFIG_RXEN_RXEN_Msk   (0x1UL << I2S_CONFIG_RXEN_RXEN_Pos)

Bit mask of RXEN field.

Definition at line 2281 of file nrf52_bitfields.h.

◆ I2S_CONFIG_RXEN_RXEN_Pos

#define I2S_CONFIG_RXEN_RXEN_Pos   (0UL)

Position of RXEN field.

Definition at line 2280 of file nrf52_bitfields.h.

◆ I2S_CONFIG_SWIDTH_SWIDTH_16BIT

#define I2S_CONFIG_SWIDTH_SWIDTH_16BIT   (1UL)

16 bit.

Definition at line 2349 of file nrf52_bitfields.h.

◆ I2S_CONFIG_SWIDTH_SWIDTH_24BIT

#define I2S_CONFIG_SWIDTH_SWIDTH_24BIT   (2UL)

24 bit.

Definition at line 2350 of file nrf52_bitfields.h.

◆ I2S_CONFIG_SWIDTH_SWIDTH_8BIT

#define I2S_CONFIG_SWIDTH_SWIDTH_8BIT   (0UL)

8 bit.

Definition at line 2348 of file nrf52_bitfields.h.

◆ I2S_CONFIG_SWIDTH_SWIDTH_Msk

#define I2S_CONFIG_SWIDTH_SWIDTH_Msk   (0x3UL << I2S_CONFIG_SWIDTH_SWIDTH_Pos)

Bit mask of SWIDTH field.

Definition at line 2347 of file nrf52_bitfields.h.

◆ I2S_CONFIG_SWIDTH_SWIDTH_Pos

#define I2S_CONFIG_SWIDTH_SWIDTH_Pos   (0UL)

Position of SWIDTH field.

Definition at line 2346 of file nrf52_bitfields.h.

◆ I2S_CONFIG_TXEN_TXEN_DISABLE

#define I2S_CONFIG_TXEN_TXEN_DISABLE   (0UL)

Transmission disabled and now data will be read from the RXD.TXD address.

Definition at line 2291 of file nrf52_bitfields.h.

◆ I2S_CONFIG_TXEN_TXEN_ENABLE

#define I2S_CONFIG_TXEN_TXEN_ENABLE   (1UL)

Transmission enabled.

Definition at line 2292 of file nrf52_bitfields.h.

◆ I2S_CONFIG_TXEN_TXEN_Msk

#define I2S_CONFIG_TXEN_TXEN_Msk   (0x1UL << I2S_CONFIG_TXEN_TXEN_Pos)

Bit mask of TXEN field.

Definition at line 2290 of file nrf52_bitfields.h.

◆ I2S_CONFIG_TXEN_TXEN_Pos

#define I2S_CONFIG_TXEN_TXEN_Pos   (0UL)

Position of TXEN field.

Definition at line 2289 of file nrf52_bitfields.h.

◆ I2S_ENABLE_ENABLE_DISABLE

#define I2S_ENABLE_ENABLE_DISABLE   (0UL)

Disabl

Definition at line 2264 of file nrf52_bitfields.h.

◆ I2S_ENABLE_ENABLE_ENABLE

#define I2S_ENABLE_ENABLE_ENABLE   (1UL)

Enable

Definition at line 2265 of file nrf52_bitfields.h.

◆ I2S_ENABLE_ENABLE_Msk

#define I2S_ENABLE_ENABLE_Msk   (0x1UL << I2S_ENABLE_ENABLE_Pos)

Bit mask of ENABLE field.

Definition at line 2263 of file nrf52_bitfields.h.

◆ I2S_ENABLE_ENABLE_Pos

#define I2S_ENABLE_ENABLE_Pos   (0UL)

Position of ENABLE field.

Definition at line 2262 of file nrf52_bitfields.h.

◆ I2S_INTEN_RXPTRUPD_Disabled

#define I2S_INTEN_RXPTRUPD_Disabled   (0UL)

Disable

Definition at line 2207 of file nrf52_bitfields.h.

◆ I2S_INTEN_RXPTRUPD_Enabled

#define I2S_INTEN_RXPTRUPD_Enabled   (1UL)

Enable

Definition at line 2208 of file nrf52_bitfields.h.

◆ I2S_INTEN_RXPTRUPD_Msk

#define I2S_INTEN_RXPTRUPD_Msk   (0x1UL << I2S_INTEN_RXPTRUPD_Pos)

Bit mask of RXPTRUPD field.

Definition at line 2206 of file nrf52_bitfields.h.

◆ I2S_INTEN_RXPTRUPD_Pos

#define I2S_INTEN_RXPTRUPD_Pos   (1UL)

Position of RXPTRUPD field.

Definition at line 2205 of file nrf52_bitfields.h.

◆ I2S_INTEN_STOPPED_Disabled

#define I2S_INTEN_STOPPED_Disabled   (0UL)

Disable

Definition at line 2201 of file nrf52_bitfields.h.

◆ I2S_INTEN_STOPPED_Enabled

#define I2S_INTEN_STOPPED_Enabled   (1UL)

Enable

Definition at line 2202 of file nrf52_bitfields.h.

◆ I2S_INTEN_STOPPED_Msk

#define I2S_INTEN_STOPPED_Msk   (0x1UL << I2S_INTEN_STOPPED_Pos)

Bit mask of STOPPED field.

Definition at line 2200 of file nrf52_bitfields.h.

◆ I2S_INTEN_STOPPED_Pos

#define I2S_INTEN_STOPPED_Pos   (2UL)

Position of STOPPED field.

Definition at line 2199 of file nrf52_bitfields.h.

◆ I2S_INTEN_TXPTRUPD_Disabled

#define I2S_INTEN_TXPTRUPD_Disabled   (0UL)

Disable

Definition at line 2195 of file nrf52_bitfields.h.

◆ I2S_INTEN_TXPTRUPD_Enabled

#define I2S_INTEN_TXPTRUPD_Enabled   (1UL)

Enable

Definition at line 2196 of file nrf52_bitfields.h.

◆ I2S_INTEN_TXPTRUPD_Msk

#define I2S_INTEN_TXPTRUPD_Msk   (0x1UL << I2S_INTEN_TXPTRUPD_Pos)

Bit mask of TXPTRUPD field.

Definition at line 2194 of file nrf52_bitfields.h.

◆ I2S_INTEN_TXPTRUPD_Pos

#define I2S_INTEN_TXPTRUPD_Pos   (5UL)

Position of TXPTRUPD field.

Definition at line 2193 of file nrf52_bitfields.h.

◆ I2S_INTENCLR_RXPTRUPD_Clear

#define I2S_INTENCLR_RXPTRUPD_Clear   (1UL)

Disable

Definition at line 2256 of file nrf52_bitfields.h.

◆ I2S_INTENCLR_RXPTRUPD_Disabled

#define I2S_INTENCLR_RXPTRUPD_Disabled   (0UL)

Read: Disabled

Definition at line 2254 of file nrf52_bitfields.h.

◆ I2S_INTENCLR_RXPTRUPD_Enabled

#define I2S_INTENCLR_RXPTRUPD_Enabled   (1UL)

Read: Enabled

Definition at line 2255 of file nrf52_bitfields.h.

◆ I2S_INTENCLR_RXPTRUPD_Msk

#define I2S_INTENCLR_RXPTRUPD_Msk   (0x1UL << I2S_INTENCLR_RXPTRUPD_Pos)

Bit mask of RXPTRUPD field.

Definition at line 2253 of file nrf52_bitfields.h.

◆ I2S_INTENCLR_RXPTRUPD_Pos

#define I2S_INTENCLR_RXPTRUPD_Pos   (1UL)

Position of RXPTRUPD field.

Definition at line 2252 of file nrf52_bitfields.h.

◆ I2S_INTENCLR_STOPPED_Clear

#define I2S_INTENCLR_STOPPED_Clear   (1UL)

Disable

Definition at line 2249 of file nrf52_bitfields.h.

◆ I2S_INTENCLR_STOPPED_Disabled

#define I2S_INTENCLR_STOPPED_Disabled   (0UL)

Read: Disabled

Definition at line 2247 of file nrf52_bitfields.h.

◆ I2S_INTENCLR_STOPPED_Enabled

#define I2S_INTENCLR_STOPPED_Enabled   (1UL)

Read: Enabled

Definition at line 2248 of file nrf52_bitfields.h.

◆ I2S_INTENCLR_STOPPED_Msk

#define I2S_INTENCLR_STOPPED_Msk   (0x1UL << I2S_INTENCLR_STOPPED_Pos)

Bit mask of STOPPED field.

Definition at line 2246 of file nrf52_bitfields.h.

◆ I2S_INTENCLR_STOPPED_Pos

#define I2S_INTENCLR_STOPPED_Pos   (2UL)

Position of STOPPED field.

Definition at line 2245 of file nrf52_bitfields.h.

◆ I2S_INTENCLR_TXPTRUPD_Clear

#define I2S_INTENCLR_TXPTRUPD_Clear   (1UL)

Disable

Definition at line 2242 of file nrf52_bitfields.h.

◆ I2S_INTENCLR_TXPTRUPD_Disabled

#define I2S_INTENCLR_TXPTRUPD_Disabled   (0UL)

Read: Disabled

Definition at line 2240 of file nrf52_bitfields.h.

◆ I2S_INTENCLR_TXPTRUPD_Enabled

#define I2S_INTENCLR_TXPTRUPD_Enabled   (1UL)

Read: Enabled

Definition at line 2241 of file nrf52_bitfields.h.

◆ I2S_INTENCLR_TXPTRUPD_Msk

#define I2S_INTENCLR_TXPTRUPD_Msk   (0x1UL << I2S_INTENCLR_TXPTRUPD_Pos)

Bit mask of TXPTRUPD field.

Definition at line 2239 of file nrf52_bitfields.h.

◆ I2S_INTENCLR_TXPTRUPD_Pos

#define I2S_INTENCLR_TXPTRUPD_Pos   (5UL)

Position of TXPTRUPD field.

Definition at line 2238 of file nrf52_bitfields.h.

◆ I2S_INTENSET_RXPTRUPD_Disabled

#define I2S_INTENSET_RXPTRUPD_Disabled   (0UL)

Read: Disabled

Definition at line 2230 of file nrf52_bitfields.h.

◆ I2S_INTENSET_RXPTRUPD_Enabled

#define I2S_INTENSET_RXPTRUPD_Enabled   (1UL)

Read: Enabled

Definition at line 2231 of file nrf52_bitfields.h.

◆ I2S_INTENSET_RXPTRUPD_Msk

#define I2S_INTENSET_RXPTRUPD_Msk   (0x1UL << I2S_INTENSET_RXPTRUPD_Pos)

Bit mask of RXPTRUPD field.

Definition at line 2229 of file nrf52_bitfields.h.

◆ I2S_INTENSET_RXPTRUPD_Pos

#define I2S_INTENSET_RXPTRUPD_Pos   (1UL)

Position of RXPTRUPD field.

Definition at line 2228 of file nrf52_bitfields.h.

◆ I2S_INTENSET_RXPTRUPD_Set

#define I2S_INTENSET_RXPTRUPD_Set   (1UL)

Enable

Definition at line 2232 of file nrf52_bitfields.h.

◆ I2S_INTENSET_STOPPED_Disabled

#define I2S_INTENSET_STOPPED_Disabled   (0UL)

Read: Disabled

Definition at line 2223 of file nrf52_bitfields.h.

◆ I2S_INTENSET_STOPPED_Enabled

#define I2S_INTENSET_STOPPED_Enabled   (1UL)

Read: Enabled

Definition at line 2224 of file nrf52_bitfields.h.

◆ I2S_INTENSET_STOPPED_Msk

#define I2S_INTENSET_STOPPED_Msk   (0x1UL << I2S_INTENSET_STOPPED_Pos)

Bit mask of STOPPED field.

Definition at line 2222 of file nrf52_bitfields.h.

◆ I2S_INTENSET_STOPPED_Pos

#define I2S_INTENSET_STOPPED_Pos   (2UL)

Position of STOPPED field.

Definition at line 2221 of file nrf52_bitfields.h.

◆ I2S_INTENSET_STOPPED_Set

#define I2S_INTENSET_STOPPED_Set   (1UL)

Enable

Definition at line 2225 of file nrf52_bitfields.h.

◆ I2S_INTENSET_TXPTRUPD_Disabled

#define I2S_INTENSET_TXPTRUPD_Disabled   (0UL)

Read: Disabled

Definition at line 2216 of file nrf52_bitfields.h.

◆ I2S_INTENSET_TXPTRUPD_Enabled

#define I2S_INTENSET_TXPTRUPD_Enabled   (1UL)

Read: Enabled

Definition at line 2217 of file nrf52_bitfields.h.

◆ I2S_INTENSET_TXPTRUPD_Msk

#define I2S_INTENSET_TXPTRUPD_Msk   (0x1UL << I2S_INTENSET_TXPTRUPD_Pos)

Bit mask of TXPTRUPD field.

Definition at line 2215 of file nrf52_bitfields.h.

◆ I2S_INTENSET_TXPTRUPD_Pos

#define I2S_INTENSET_TXPTRUPD_Pos   (5UL)

Position of TXPTRUPD field.

Definition at line 2214 of file nrf52_bitfields.h.

◆ I2S_INTENSET_TXPTRUPD_Set

#define I2S_INTENSET_TXPTRUPD_Set   (1UL)

Enable

Definition at line 2218 of file nrf52_bitfields.h.

◆ I2S_PSEL_LRCK_CONNECT_Connected

#define I2S_PSEL_LRCK_CONNECT_Connected   (0UL)

Connect

Definition at line 2433 of file nrf52_bitfields.h.

◆ I2S_PSEL_LRCK_CONNECT_Disconnected

#define I2S_PSEL_LRCK_CONNECT_Disconnected   (1UL)

Disconnect

Definition at line 2434 of file nrf52_bitfields.h.

◆ I2S_PSEL_LRCK_CONNECT_Msk

#define I2S_PSEL_LRCK_CONNECT_Msk   (0x1UL << I2S_PSEL_LRCK_CONNECT_Pos)

Bit mask of CONNECT field.

Definition at line 2432 of file nrf52_bitfields.h.

◆ I2S_PSEL_LRCK_CONNECT_Pos

#define I2S_PSEL_LRCK_CONNECT_Pos   (31UL)

Position of CONNECT field.

Definition at line 2431 of file nrf52_bitfields.h.

◆ I2S_PSEL_LRCK_PIN_Msk

#define I2S_PSEL_LRCK_PIN_Msk   (0x1FUL << I2S_PSEL_LRCK_PIN_Pos)

Bit mask of PIN field.

Definition at line 2438 of file nrf52_bitfields.h.

◆ I2S_PSEL_LRCK_PIN_Pos

#define I2S_PSEL_LRCK_PIN_Pos   (0UL)

Position of PIN field.

Definition at line 2437 of file nrf52_bitfields.h.

◆ I2S_PSEL_MCK_CONNECT_Connected

#define I2S_PSEL_MCK_CONNECT_Connected   (0UL)

Connect

Definition at line 2407 of file nrf52_bitfields.h.

◆ I2S_PSEL_MCK_CONNECT_Disconnected

#define I2S_PSEL_MCK_CONNECT_Disconnected   (1UL)

Disconnect

Definition at line 2408 of file nrf52_bitfields.h.

◆ I2S_PSEL_MCK_CONNECT_Msk

#define I2S_PSEL_MCK_CONNECT_Msk   (0x1UL << I2S_PSEL_MCK_CONNECT_Pos)

Bit mask of CONNECT field.

Definition at line 2406 of file nrf52_bitfields.h.

◆ I2S_PSEL_MCK_CONNECT_Pos

#define I2S_PSEL_MCK_CONNECT_Pos   (31UL)

Position of CONNECT field.

Definition at line 2405 of file nrf52_bitfields.h.

◆ I2S_PSEL_MCK_PIN_Msk

#define I2S_PSEL_MCK_PIN_Msk   (0x1FUL << I2S_PSEL_MCK_PIN_Pos)

Bit mask of PIN field.

Definition at line 2412 of file nrf52_bitfields.h.

◆ I2S_PSEL_MCK_PIN_Pos

#define I2S_PSEL_MCK_PIN_Pos   (0UL)

Position of PIN field.

Definition at line 2411 of file nrf52_bitfields.h.

◆ I2S_PSEL_SCK_CONNECT_Connected

#define I2S_PSEL_SCK_CONNECT_Connected   (0UL)

Connect

Definition at line 2420 of file nrf52_bitfields.h.

◆ I2S_PSEL_SCK_CONNECT_Disconnected

#define I2S_PSEL_SCK_CONNECT_Disconnected   (1UL)

Disconnect

Definition at line 2421 of file nrf52_bitfields.h.

◆ I2S_PSEL_SCK_CONNECT_Msk

#define I2S_PSEL_SCK_CONNECT_Msk   (0x1UL << I2S_PSEL_SCK_CONNECT_Pos)

Bit mask of CONNECT field.

Definition at line 2419 of file nrf52_bitfields.h.

◆ I2S_PSEL_SCK_CONNECT_Pos

#define I2S_PSEL_SCK_CONNECT_Pos   (31UL)

Position of CONNECT field.

Definition at line 2418 of file nrf52_bitfields.h.

◆ I2S_PSEL_SCK_PIN_Msk

#define I2S_PSEL_SCK_PIN_Msk   (0x1FUL << I2S_PSEL_SCK_PIN_Pos)

Bit mask of PIN field.

Definition at line 2425 of file nrf52_bitfields.h.

◆ I2S_PSEL_SCK_PIN_Pos

#define I2S_PSEL_SCK_PIN_Pos   (0UL)

Position of PIN field.

Definition at line 2424 of file nrf52_bitfields.h.

◆ I2S_PSEL_SDIN_CONNECT_Connected

#define I2S_PSEL_SDIN_CONNECT_Connected   (0UL)

Connect

Definition at line 2446 of file nrf52_bitfields.h.

◆ I2S_PSEL_SDIN_CONNECT_Disconnected

#define I2S_PSEL_SDIN_CONNECT_Disconnected   (1UL)

Disconnect

Definition at line 2447 of file nrf52_bitfields.h.

◆ I2S_PSEL_SDIN_CONNECT_Msk

#define I2S_PSEL_SDIN_CONNECT_Msk   (0x1UL << I2S_PSEL_SDIN_CONNECT_Pos)

Bit mask of CONNECT field.

Definition at line 2445 of file nrf52_bitfields.h.

◆ I2S_PSEL_SDIN_CONNECT_Pos

#define I2S_PSEL_SDIN_CONNECT_Pos   (31UL)

Position of CONNECT field.

Definition at line 2444 of file nrf52_bitfields.h.

◆ I2S_PSEL_SDIN_PIN_Msk

#define I2S_PSEL_SDIN_PIN_Msk   (0x1FUL << I2S_PSEL_SDIN_PIN_Pos)

Bit mask of PIN field.

Definition at line 2451 of file nrf52_bitfields.h.

◆ I2S_PSEL_SDIN_PIN_Pos

#define I2S_PSEL_SDIN_PIN_Pos   (0UL)

Position of PIN field.

Definition at line 2450 of file nrf52_bitfields.h.

◆ I2S_PSEL_SDOUT_CONNECT_Connected

#define I2S_PSEL_SDOUT_CONNECT_Connected   (0UL)

Connect

Definition at line 2459 of file nrf52_bitfields.h.

◆ I2S_PSEL_SDOUT_CONNECT_Disconnected

#define I2S_PSEL_SDOUT_CONNECT_Disconnected   (1UL)

Disconnect

Definition at line 2460 of file nrf52_bitfields.h.

◆ I2S_PSEL_SDOUT_CONNECT_Msk

#define I2S_PSEL_SDOUT_CONNECT_Msk   (0x1UL << I2S_PSEL_SDOUT_CONNECT_Pos)

Bit mask of CONNECT field.

Definition at line 2458 of file nrf52_bitfields.h.

◆ I2S_PSEL_SDOUT_CONNECT_Pos

#define I2S_PSEL_SDOUT_CONNECT_Pos   (31UL)

Position of CONNECT field.

Definition at line 2457 of file nrf52_bitfields.h.

◆ I2S_PSEL_SDOUT_PIN_Msk

#define I2S_PSEL_SDOUT_PIN_Msk   (0x1FUL << I2S_PSEL_SDOUT_PIN_Pos)

Bit mask of PIN field.

Definition at line 2464 of file nrf52_bitfields.h.

◆ I2S_PSEL_SDOUT_PIN_Pos

#define I2S_PSEL_SDOUT_PIN_Pos   (0UL)

Position of PIN field.

Definition at line 2463 of file nrf52_bitfields.h.

◆ I2S_RXD_PTR_PTR_Msk

#define I2S_RXD_PTR_PTR_Msk   (0xFFFFFFFFUL << I2S_RXD_PTR_PTR_Pos)

Bit mask of PTR field.

Definition at line 2385 of file nrf52_bitfields.h.

◆ I2S_RXD_PTR_PTR_Pos

#define I2S_RXD_PTR_PTR_Pos   (0UL)

Position of PTR field.

Definition at line 2384 of file nrf52_bitfields.h.

◆ I2S_RXTXD_MAXCNT_MAXCNT_Msk

#define I2S_RXTXD_MAXCNT_MAXCNT_Msk   (0x3FFFUL << I2S_RXTXD_MAXCNT_MAXCNT_Pos)

Bit mask of MAXCNT field.

Definition at line 2399 of file nrf52_bitfields.h.

◆ I2S_RXTXD_MAXCNT_MAXCNT_Pos

#define I2S_RXTXD_MAXCNT_MAXCNT_Pos   (0UL)

Position of MAXCNT field.

Definition at line 2398 of file nrf52_bitfields.h.

◆ I2S_TXD_PTR_PTR_Msk

#define I2S_TXD_PTR_PTR_Msk   (0xFFFFFFFFUL << I2S_TXD_PTR_PTR_Pos)

Bit mask of PTR field.

Definition at line 2392 of file nrf52_bitfields.h.

◆ I2S_TXD_PTR_PTR_Pos

#define I2S_TXD_PTR_PTR_Pos   (0UL)

Position of PTR field.

Definition at line 2391 of file nrf52_bitfields.h.

◆ LPCOMP_ANADETECT_ANADETECT_Cross

#define LPCOMP_ANADETECT_ANADETECT_Cross   (0UL)

Generate ANADETECT on crossing, both upward crossing and downward crossing

Definition at line 2636 of file nrf52_bitfields.h.

◆ LPCOMP_ANADETECT_ANADETECT_Down

#define LPCOMP_ANADETECT_ANADETECT_Down   (2UL)

Generate ANADETECT on downward crossing only

Definition at line 2638 of file nrf52_bitfields.h.

◆ LPCOMP_ANADETECT_ANADETECT_Msk

#define LPCOMP_ANADETECT_ANADETECT_Msk   (0x3UL << LPCOMP_ANADETECT_ANADETECT_Pos)

Bit mask of ANADETECT field.

Definition at line 2635 of file nrf52_bitfields.h.

◆ LPCOMP_ANADETECT_ANADETECT_Pos

#define LPCOMP_ANADETECT_ANADETECT_Pos   (0UL)

Position of ANADETECT field.

Definition at line 2634 of file nrf52_bitfields.h.

◆ LPCOMP_ANADETECT_ANADETECT_Up

#define LPCOMP_ANADETECT_ANADETECT_Up   (1UL)

Generate ANADETECT on upward crossing only

Definition at line 2637 of file nrf52_bitfields.h.

◆ LPCOMP_ENABLE_ENABLE_Disabled

#define LPCOMP_ENABLE_ENABLE_Disabled   (0UL)

Disable

Definition at line 2580 of file nrf52_bitfields.h.

◆ LPCOMP_ENABLE_ENABLE_Enabled

#define LPCOMP_ENABLE_ENABLE_Enabled   (1UL)

Enable

Definition at line 2581 of file nrf52_bitfields.h.

◆ LPCOMP_ENABLE_ENABLE_Msk

#define LPCOMP_ENABLE_ENABLE_Msk   (0x3UL << LPCOMP_ENABLE_ENABLE_Pos)

Bit mask of ENABLE field.

Definition at line 2579 of file nrf52_bitfields.h.

◆ LPCOMP_ENABLE_ENABLE_Pos

#define LPCOMP_ENABLE_ENABLE_Pos   (0UL)

Position of ENABLE field.

Definition at line 2578 of file nrf52_bitfields.h.

◆ LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference0

#define LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference0   (0UL)

Use AIN0 as external analog reference

Definition at line 2627 of file nrf52_bitfields.h.

◆ LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference1

#define LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference1   (1UL)

Use AIN1 as external analog reference

Definition at line 2628 of file nrf52_bitfields.h.

◆ LPCOMP_EXTREFSEL_EXTREFSEL_Msk

#define LPCOMP_EXTREFSEL_EXTREFSEL_Msk   (0x1UL << LPCOMP_EXTREFSEL_EXTREFSEL_Pos)

Bit mask of EXTREFSEL field.

Definition at line 2626 of file nrf52_bitfields.h.

◆ LPCOMP_EXTREFSEL_EXTREFSEL_Pos

#define LPCOMP_EXTREFSEL_EXTREFSEL_Pos   (0UL)

Position of EXTREFSEL field.

Definition at line 2625 of file nrf52_bitfields.h.

◆ LPCOMP_HYST_HYST_Hyst50mV

#define LPCOMP_HYST_HYST_Hyst50mV   (1UL)

Comparator hysteresis disabled (typ. 50 mV)

Definition at line 2647 of file nrf52_bitfields.h.

◆ LPCOMP_HYST_HYST_Msk

#define LPCOMP_HYST_HYST_Msk   (0x1UL << LPCOMP_HYST_HYST_Pos)

Bit mask of HYST field.

Definition at line 2645 of file nrf52_bitfields.h.

◆ LPCOMP_HYST_HYST_NoHyst

#define LPCOMP_HYST_HYST_NoHyst   (0UL)

Comparator hysteresis disabled

Definition at line 2646 of file nrf52_bitfields.h.

◆ LPCOMP_HYST_HYST_Pos

#define LPCOMP_HYST_HYST_Pos   (0UL)

Position of HYST field.

Definition at line 2644 of file nrf52_bitfields.h.

◆ LPCOMP_INTENCLR_CROSS_Clear

#define LPCOMP_INTENCLR_CROSS_Clear   (1UL)

Disable

Definition at line 2542 of file nrf52_bitfields.h.

◆ LPCOMP_INTENCLR_CROSS_Disabled

#define LPCOMP_INTENCLR_CROSS_Disabled   (0UL)

Read: Disabled

Definition at line 2540 of file nrf52_bitfields.h.

◆ LPCOMP_INTENCLR_CROSS_Enabled

#define LPCOMP_INTENCLR_CROSS_Enabled   (1UL)

Read: Enabled

Definition at line 2541 of file nrf52_bitfields.h.

◆ LPCOMP_INTENCLR_CROSS_Msk

#define LPCOMP_INTENCLR_CROSS_Msk   (0x1UL << LPCOMP_INTENCLR_CROSS_Pos)

Bit mask of CROSS field.

Definition at line 2539 of file nrf52_bitfields.h.

◆ LPCOMP_INTENCLR_CROSS_Pos

#define LPCOMP_INTENCLR_CROSS_Pos   (3UL)

Position of CROSS field.

Definition at line 2538 of file nrf52_bitfields.h.

◆ LPCOMP_INTENCLR_DOWN_Clear

#define LPCOMP_INTENCLR_DOWN_Clear   (1UL)

Disable

Definition at line 2556 of file nrf52_bitfields.h.

◆ LPCOMP_INTENCLR_DOWN_Disabled

#define LPCOMP_INTENCLR_DOWN_Disabled   (0UL)

Read: Disabled

Definition at line 2554 of file nrf52_bitfields.h.

◆ LPCOMP_INTENCLR_DOWN_Enabled

#define LPCOMP_INTENCLR_DOWN_Enabled   (1UL)

Read: Enabled

Definition at line 2555 of file nrf52_bitfields.h.

◆ LPCOMP_INTENCLR_DOWN_Msk

#define LPCOMP_INTENCLR_DOWN_Msk   (0x1UL << LPCOMP_INTENCLR_DOWN_Pos)

Bit mask of DOWN field.

Definition at line 2553 of file nrf52_bitfields.h.

◆ LPCOMP_INTENCLR_DOWN_Pos

#define LPCOMP_INTENCLR_DOWN_Pos   (1UL)

Position of DOWN field.

Definition at line 2552 of file nrf52_bitfields.h.

◆ LPCOMP_INTENCLR_READY_Clear

#define LPCOMP_INTENCLR_READY_Clear   (1UL)

Disable

Definition at line 2563 of file nrf52_bitfields.h.

◆ LPCOMP_INTENCLR_READY_Disabled

#define LPCOMP_INTENCLR_READY_Disabled   (0UL)

Read: Disabled

Definition at line 2561 of file nrf52_bitfields.h.

◆ LPCOMP_INTENCLR_READY_Enabled

#define LPCOMP_INTENCLR_READY_Enabled   (1UL)

Read: Enabled

Definition at line 2562 of file nrf52_bitfields.h.

◆ LPCOMP_INTENCLR_READY_Msk

#define LPCOMP_INTENCLR_READY_Msk   (0x1UL << LPCOMP_INTENCLR_READY_Pos)

Bit mask of READY field.

Definition at line 2560 of file nrf52_bitfields.h.

◆ LPCOMP_INTENCLR_READY_Pos

#define LPCOMP_INTENCLR_READY_Pos   (0UL)

Position of READY field.

Definition at line 2559 of file nrf52_bitfields.h.

◆ LPCOMP_INTENCLR_UP_Clear

#define LPCOMP_INTENCLR_UP_Clear   (1UL)

Disable

Definition at line 2549 of file nrf52_bitfields.h.

◆ LPCOMP_INTENCLR_UP_Disabled

#define LPCOMP_INTENCLR_UP_Disabled   (0UL)

Read: Disabled

Definition at line 2547 of file nrf52_bitfields.h.

◆ LPCOMP_INTENCLR_UP_Enabled

#define LPCOMP_INTENCLR_UP_Enabled   (1UL)

Read: Enabled

Definition at line 2548 of file nrf52_bitfields.h.

◆ LPCOMP_INTENCLR_UP_Msk

#define LPCOMP_INTENCLR_UP_Msk   (0x1UL << LPCOMP_INTENCLR_UP_Pos)

Bit mask of UP field.

Definition at line 2546 of file nrf52_bitfields.h.

◆ LPCOMP_INTENCLR_UP_Pos

#define LPCOMP_INTENCLR_UP_Pos   (2UL)

Position of UP field.

Definition at line 2545 of file nrf52_bitfields.h.

◆ LPCOMP_INTENSET_CROSS_Disabled

#define LPCOMP_INTENSET_CROSS_Disabled   (0UL)

Read: Disabled

Definition at line 2509 of file nrf52_bitfields.h.

◆ LPCOMP_INTENSET_CROSS_Enabled

#define LPCOMP_INTENSET_CROSS_Enabled   (1UL)

Read: Enabled

Definition at line 2510 of file nrf52_bitfields.h.

◆ LPCOMP_INTENSET_CROSS_Msk

#define LPCOMP_INTENSET_CROSS_Msk   (0x1UL << LPCOMP_INTENSET_CROSS_Pos)

Bit mask of CROSS field.

Definition at line 2508 of file nrf52_bitfields.h.

◆ LPCOMP_INTENSET_CROSS_Pos

#define LPCOMP_INTENSET_CROSS_Pos   (3UL)

Position of CROSS field.

Definition at line 2507 of file nrf52_bitfields.h.

◆ LPCOMP_INTENSET_CROSS_Set

#define LPCOMP_INTENSET_CROSS_Set   (1UL)

Enable

Definition at line 2511 of file nrf52_bitfields.h.

◆ LPCOMP_INTENSET_DOWN_Disabled

#define LPCOMP_INTENSET_DOWN_Disabled   (0UL)

Read: Disabled

Definition at line 2523 of file nrf52_bitfields.h.

◆ LPCOMP_INTENSET_DOWN_Enabled

#define LPCOMP_INTENSET_DOWN_Enabled   (1UL)

Read: Enabled

Definition at line 2524 of file nrf52_bitfields.h.

◆ LPCOMP_INTENSET_DOWN_Msk

#define LPCOMP_INTENSET_DOWN_Msk   (0x1UL << LPCOMP_INTENSET_DOWN_Pos)

Bit mask of DOWN field.

Definition at line 2522 of file nrf52_bitfields.h.

◆ LPCOMP_INTENSET_DOWN_Pos

#define LPCOMP_INTENSET_DOWN_Pos   (1UL)

Position of DOWN field.

Definition at line 2521 of file nrf52_bitfields.h.

◆ LPCOMP_INTENSET_DOWN_Set

#define LPCOMP_INTENSET_DOWN_Set   (1UL)

Enable

Definition at line 2525 of file nrf52_bitfields.h.

◆ LPCOMP_INTENSET_READY_Disabled

#define LPCOMP_INTENSET_READY_Disabled   (0UL)

Read: Disabled

Definition at line 2530 of file nrf52_bitfields.h.

◆ LPCOMP_INTENSET_READY_Enabled

#define LPCOMP_INTENSET_READY_Enabled   (1UL)

Read: Enabled

Definition at line 2531 of file nrf52_bitfields.h.

◆ LPCOMP_INTENSET_READY_Msk

#define LPCOMP_INTENSET_READY_Msk   (0x1UL << LPCOMP_INTENSET_READY_Pos)

Bit mask of READY field.

Definition at line 2529 of file nrf52_bitfields.h.

◆ LPCOMP_INTENSET_READY_Pos

#define LPCOMP_INTENSET_READY_Pos   (0UL)

Position of READY field.

Definition at line 2528 of file nrf52_bitfields.h.

◆ LPCOMP_INTENSET_READY_Set

#define LPCOMP_INTENSET_READY_Set   (1UL)

Enable

Definition at line 2532 of file nrf52_bitfields.h.

◆ LPCOMP_INTENSET_UP_Disabled

#define LPCOMP_INTENSET_UP_Disabled   (0UL)

Read: Disabled

Definition at line 2516 of file nrf52_bitfields.h.

◆ LPCOMP_INTENSET_UP_Enabled

#define LPCOMP_INTENSET_UP_Enabled   (1UL)

Read: Enabled

Definition at line 2517 of file nrf52_bitfields.h.

◆ LPCOMP_INTENSET_UP_Msk

#define LPCOMP_INTENSET_UP_Msk   (0x1UL << LPCOMP_INTENSET_UP_Pos)

Bit mask of UP field.

Definition at line 2515 of file nrf52_bitfields.h.

◆ LPCOMP_INTENSET_UP_Pos

#define LPCOMP_INTENSET_UP_Pos   (2UL)

Position of UP field.

Definition at line 2514 of file nrf52_bitfields.h.

◆ LPCOMP_INTENSET_UP_Set

#define LPCOMP_INTENSET_UP_Set   (1UL)

Enable

Definition at line 2518 of file nrf52_bitfields.h.

◆ LPCOMP_PSEL_PSEL_AnalogInput0

#define LPCOMP_PSEL_PSEL_AnalogInput0   (0UL)

AIN0 selected as analog input

Definition at line 2589 of file nrf52_bitfields.h.

◆ LPCOMP_PSEL_PSEL_AnalogInput1

#define LPCOMP_PSEL_PSEL_AnalogInput1   (1UL)

AIN1 selected as analog input

Definition at line 2590 of file nrf52_bitfields.h.

◆ LPCOMP_PSEL_PSEL_AnalogInput2

#define LPCOMP_PSEL_PSEL_AnalogInput2   (2UL)

AIN2 selected as analog input

Definition at line 2591 of file nrf52_bitfields.h.

◆ LPCOMP_PSEL_PSEL_AnalogInput3

#define LPCOMP_PSEL_PSEL_AnalogInput3   (3UL)

AIN3 selected as analog input

Definition at line 2592 of file nrf52_bitfields.h.

◆ LPCOMP_PSEL_PSEL_AnalogInput4

#define LPCOMP_PSEL_PSEL_AnalogInput4   (4UL)

AIN4 selected as analog input

Definition at line 2593 of file nrf52_bitfields.h.

◆ LPCOMP_PSEL_PSEL_AnalogInput5

#define LPCOMP_PSEL_PSEL_AnalogInput5   (5UL)

AIN5 selected as analog input

Definition at line 2594 of file nrf52_bitfields.h.

◆ LPCOMP_PSEL_PSEL_AnalogInput6

#define LPCOMP_PSEL_PSEL_AnalogInput6   (6UL)

AIN6 selected as analog input

Definition at line 2595 of file nrf52_bitfields.h.

◆ LPCOMP_PSEL_PSEL_AnalogInput7

#define LPCOMP_PSEL_PSEL_AnalogInput7   (7UL)

AIN7 selected as analog input

Definition at line 2596 of file nrf52_bitfields.h.

◆ LPCOMP_PSEL_PSEL_Msk

#define LPCOMP_PSEL_PSEL_Msk   (0x7UL << LPCOMP_PSEL_PSEL_Pos)

Bit mask of PSEL field.

Definition at line 2588 of file nrf52_bitfields.h.

◆ LPCOMP_PSEL_PSEL_Pos

#define LPCOMP_PSEL_PSEL_Pos   (0UL)

Position of PSEL field.

Definition at line 2587 of file nrf52_bitfields.h.

◆ LPCOMP_REFSEL_REFSEL_ARef

#define LPCOMP_REFSEL_REFSEL_ARef   (7UL)

External analog reference selected

Definition at line 2611 of file nrf52_bitfields.h.

◆ LPCOMP_REFSEL_REFSEL_Msk

#define LPCOMP_REFSEL_REFSEL_Msk   (0xFUL << LPCOMP_REFSEL_REFSEL_Pos)

Bit mask of REFSEL field.

Definition at line 2603 of file nrf52_bitfields.h.

◆ LPCOMP_REFSEL_REFSEL_Pos

#define LPCOMP_REFSEL_REFSEL_Pos   (0UL)

Position of REFSEL field.

Definition at line 2602 of file nrf52_bitfields.h.

◆ LPCOMP_REFSEL_REFSEL_Ref11_16Vdd

#define LPCOMP_REFSEL_REFSEL_Ref11_16Vdd   (13UL)

VDD * 11/16 selected as reference

Definition at line 2617 of file nrf52_bitfields.h.

◆ LPCOMP_REFSEL_REFSEL_Ref13_16Vdd

#define LPCOMP_REFSEL_REFSEL_Ref13_16Vdd   (14UL)

VDD * 13/16 selected as reference

Definition at line 2618 of file nrf52_bitfields.h.

◆ LPCOMP_REFSEL_REFSEL_Ref15_16Vdd

#define LPCOMP_REFSEL_REFSEL_Ref15_16Vdd   (15UL)

VDD * 15/16 selected as reference

Definition at line 2619 of file nrf52_bitfields.h.

◆ LPCOMP_REFSEL_REFSEL_Ref1_16Vdd

#define LPCOMP_REFSEL_REFSEL_Ref1_16Vdd   (8UL)

VDD * 1/16 selected as reference

Definition at line 2612 of file nrf52_bitfields.h.

◆ LPCOMP_REFSEL_REFSEL_Ref1_8Vdd

#define LPCOMP_REFSEL_REFSEL_Ref1_8Vdd   (0UL)

VDD * 1/8 selected as reference

Definition at line 2604 of file nrf52_bitfields.h.

◆ LPCOMP_REFSEL_REFSEL_Ref2_8Vdd

#define LPCOMP_REFSEL_REFSEL_Ref2_8Vdd   (1UL)

VDD * 2/8 selected as reference

Definition at line 2605 of file nrf52_bitfields.h.

◆ LPCOMP_REFSEL_REFSEL_Ref3_16Vdd

#define LPCOMP_REFSEL_REFSEL_Ref3_16Vdd   (9UL)

VDD * 3/16 selected as reference

Definition at line 2613 of file nrf52_bitfields.h.

◆ LPCOMP_REFSEL_REFSEL_Ref3_8Vdd

#define LPCOMP_REFSEL_REFSEL_Ref3_8Vdd   (2UL)

VDD * 3/8 selected as reference

Definition at line 2606 of file nrf52_bitfields.h.

◆ LPCOMP_REFSEL_REFSEL_Ref4_8Vdd

#define LPCOMP_REFSEL_REFSEL_Ref4_8Vdd   (3UL)

VDD * 4/8 selected as reference

Definition at line 2607 of file nrf52_bitfields.h.

◆ LPCOMP_REFSEL_REFSEL_Ref5_16Vdd

#define LPCOMP_REFSEL_REFSEL_Ref5_16Vdd   (10UL)

VDD * 5/16 selected as reference

Definition at line 2614 of file nrf52_bitfields.h.

◆ LPCOMP_REFSEL_REFSEL_Ref5_8Vdd

#define LPCOMP_REFSEL_REFSEL_Ref5_8Vdd   (4UL)

VDD * 5/8 selected as reference

Definition at line 2608 of file nrf52_bitfields.h.

◆ LPCOMP_REFSEL_REFSEL_Ref6_8Vdd

#define LPCOMP_REFSEL_REFSEL_Ref6_8Vdd   (5UL)

VDD * 6/8 selected as reference

Definition at line 2609 of file nrf52_bitfields.h.

◆ LPCOMP_REFSEL_REFSEL_Ref7_16Vdd

#define LPCOMP_REFSEL_REFSEL_Ref7_16Vdd   (11UL)

VDD * 7/16 selected as reference

Definition at line 2615 of file nrf52_bitfields.h.

◆ LPCOMP_REFSEL_REFSEL_Ref7_8Vdd

#define LPCOMP_REFSEL_REFSEL_Ref7_8Vdd   (6UL)

VDD * 7/8 selected as reference

Definition at line 2610 of file nrf52_bitfields.h.

◆ LPCOMP_REFSEL_REFSEL_Ref9_16Vdd

#define LPCOMP_REFSEL_REFSEL_Ref9_16Vdd   (12UL)

VDD * 9/16 selected as reference

Definition at line 2616 of file nrf52_bitfields.h.

◆ LPCOMP_RESULT_RESULT_Above

#define LPCOMP_RESULT_RESULT_Above   (1UL)

Input voltage is above the reference threshold (VIN+ > VIN-).

Definition at line 2572 of file nrf52_bitfields.h.

◆ LPCOMP_RESULT_RESULT_Bellow

#define LPCOMP_RESULT_RESULT_Bellow   (0UL)

Input voltage is below the reference threshold (VIN+ < VIN-).

Definition at line 2571 of file nrf52_bitfields.h.

◆ LPCOMP_RESULT_RESULT_Msk

#define LPCOMP_RESULT_RESULT_Msk   (0x1UL << LPCOMP_RESULT_RESULT_Pos)

Bit mask of RESULT field.

Definition at line 2570 of file nrf52_bitfields.h.

◆ LPCOMP_RESULT_RESULT_Pos

#define LPCOMP_RESULT_RESULT_Pos   (0UL)

Position of RESULT field.

Definition at line 2569 of file nrf52_bitfields.h.

◆ LPCOMP_SHORTS_CROSS_STOP_Disabled

#define LPCOMP_SHORTS_CROSS_STOP_Disabled   (0UL)

Disable shortcut

Definition at line 2476 of file nrf52_bitfields.h.

◆ LPCOMP_SHORTS_CROSS_STOP_Enabled

#define LPCOMP_SHORTS_CROSS_STOP_Enabled   (1UL)

Enable shortcut

Definition at line 2477 of file nrf52_bitfields.h.

◆ LPCOMP_SHORTS_CROSS_STOP_Msk

#define LPCOMP_SHORTS_CROSS_STOP_Msk   (0x1UL << LPCOMP_SHORTS_CROSS_STOP_Pos)

Bit mask of CROSS_STOP field.

Definition at line 2475 of file nrf52_bitfields.h.

◆ LPCOMP_SHORTS_CROSS_STOP_Pos

#define LPCOMP_SHORTS_CROSS_STOP_Pos   (4UL)

Position of CROSS_STOP field.

Definition at line 2474 of file nrf52_bitfields.h.

◆ LPCOMP_SHORTS_DOWN_STOP_Disabled

#define LPCOMP_SHORTS_DOWN_STOP_Disabled   (0UL)

Disable shortcut

Definition at line 2488 of file nrf52_bitfields.h.

◆ LPCOMP_SHORTS_DOWN_STOP_Enabled

#define LPCOMP_SHORTS_DOWN_STOP_Enabled   (1UL)

Enable shortcut

Definition at line 2489 of file nrf52_bitfields.h.

◆ LPCOMP_SHORTS_DOWN_STOP_Msk

#define LPCOMP_SHORTS_DOWN_STOP_Msk   (0x1UL << LPCOMP_SHORTS_DOWN_STOP_Pos)

Bit mask of DOWN_STOP field.

Definition at line 2487 of file nrf52_bitfields.h.

◆ LPCOMP_SHORTS_DOWN_STOP_Pos

#define LPCOMP_SHORTS_DOWN_STOP_Pos   (2UL)

Position of DOWN_STOP field.

Definition at line 2486 of file nrf52_bitfields.h.

◆ LPCOMP_SHORTS_READY_SAMPLE_Disabled

#define LPCOMP_SHORTS_READY_SAMPLE_Disabled   (0UL)

Disable shortcut

Definition at line 2500 of file nrf52_bitfields.h.

◆ LPCOMP_SHORTS_READY_SAMPLE_Enabled

#define LPCOMP_SHORTS_READY_SAMPLE_Enabled   (1UL)

Enable shortcut

Definition at line 2501 of file nrf52_bitfields.h.

◆ LPCOMP_SHORTS_READY_SAMPLE_Msk

#define LPCOMP_SHORTS_READY_SAMPLE_Msk   (0x1UL << LPCOMP_SHORTS_READY_SAMPLE_Pos)

Bit mask of READY_SAMPLE field.

Definition at line 2499 of file nrf52_bitfields.h.

◆ LPCOMP_SHORTS_READY_SAMPLE_Pos

#define LPCOMP_SHORTS_READY_SAMPLE_Pos   (0UL)

Position of READY_SAMPLE field.

Definition at line 2498 of file nrf52_bitfields.h.

◆ LPCOMP_SHORTS_READY_STOP_Disabled

#define LPCOMP_SHORTS_READY_STOP_Disabled   (0UL)

Disable shortcut

Definition at line 2494 of file nrf52_bitfields.h.

◆ LPCOMP_SHORTS_READY_STOP_Enabled

#define LPCOMP_SHORTS_READY_STOP_Enabled   (1UL)

Enable shortcut

Definition at line 2495 of file nrf52_bitfields.h.

◆ LPCOMP_SHORTS_READY_STOP_Msk

#define LPCOMP_SHORTS_READY_STOP_Msk   (0x1UL << LPCOMP_SHORTS_READY_STOP_Pos)

Bit mask of READY_STOP field.

Definition at line 2493 of file nrf52_bitfields.h.

◆ LPCOMP_SHORTS_READY_STOP_Pos

#define LPCOMP_SHORTS_READY_STOP_Pos   (1UL)

Position of READY_STOP field.

Definition at line 2492 of file nrf52_bitfields.h.

◆ LPCOMP_SHORTS_UP_STOP_Disabled

#define LPCOMP_SHORTS_UP_STOP_Disabled   (0UL)

Disable shortcut

Definition at line 2482 of file nrf52_bitfields.h.

◆ LPCOMP_SHORTS_UP_STOP_Enabled

#define LPCOMP_SHORTS_UP_STOP_Enabled   (1UL)

Enable shortcut

Definition at line 2483 of file nrf52_bitfields.h.

◆ LPCOMP_SHORTS_UP_STOP_Msk

#define LPCOMP_SHORTS_UP_STOP_Msk   (0x1UL << LPCOMP_SHORTS_UP_STOP_Pos)

Bit mask of UP_STOP field.

Definition at line 2481 of file nrf52_bitfields.h.

◆ LPCOMP_SHORTS_UP_STOP_Pos

#define LPCOMP_SHORTS_UP_STOP_Pos   (3UL)

Position of UP_STOP field.

Definition at line 2480 of file nrf52_bitfields.h.

◆ MWU_INTEN_PREGION0RA_Disabled

#define MWU_INTEN_PREGION0RA_Disabled   (0UL)

Disable

Definition at line 2671 of file nrf52_bitfields.h.

◆ MWU_INTEN_PREGION0RA_Enabled

#define MWU_INTEN_PREGION0RA_Enabled   (1UL)

Enable

Definition at line 2672 of file nrf52_bitfields.h.

◆ MWU_INTEN_PREGION0RA_Msk

#define MWU_INTEN_PREGION0RA_Msk   (0x1UL << MWU_INTEN_PREGION0RA_Pos)

Bit mask of PREGION0RA field.

Definition at line 2670 of file nrf52_bitfields.h.

◆ MWU_INTEN_PREGION0RA_Pos

#define MWU_INTEN_PREGION0RA_Pos   (25UL)

Position of PREGION0RA field.

Definition at line 2669 of file nrf52_bitfields.h.

◆ MWU_INTEN_PREGION0WA_Disabled

#define MWU_INTEN_PREGION0WA_Disabled   (0UL)

Disable

Definition at line 2677 of file nrf52_bitfields.h.

◆ MWU_INTEN_PREGION0WA_Enabled

#define MWU_INTEN_PREGION0WA_Enabled   (1UL)

Enable

Definition at line 2678 of file nrf52_bitfields.h.

◆ MWU_INTEN_PREGION0WA_Msk

#define MWU_INTEN_PREGION0WA_Msk   (0x1UL << MWU_INTEN_PREGION0WA_Pos)

Bit mask of PREGION0WA field.

Definition at line 2676 of file nrf52_bitfields.h.

◆ MWU_INTEN_PREGION0WA_Pos

#define MWU_INTEN_PREGION0WA_Pos   (24UL)

Position of PREGION0WA field.

Definition at line 2675 of file nrf52_bitfields.h.

◆ MWU_INTEN_PREGION1RA_Disabled

#define MWU_INTEN_PREGION1RA_Disabled   (0UL)

Disable

Definition at line 2659 of file nrf52_bitfields.h.

◆ MWU_INTEN_PREGION1RA_Enabled

#define MWU_INTEN_PREGION1RA_Enabled   (1UL)

Enable

Definition at line 2660 of file nrf52_bitfields.h.

◆ MWU_INTEN_PREGION1RA_Msk

#define MWU_INTEN_PREGION1RA_Msk   (0x1UL << MWU_INTEN_PREGION1RA_Pos)

Bit mask of PREGION1RA field.

Definition at line 2658 of file nrf52_bitfields.h.

◆ MWU_INTEN_PREGION1RA_Pos

#define MWU_INTEN_PREGION1RA_Pos   (27UL)

Position of PREGION1RA field.

Definition at line 2657 of file nrf52_bitfields.h.

◆ MWU_INTEN_PREGION1WA_Disabled

#define MWU_INTEN_PREGION1WA_Disabled   (0UL)

Disable

Definition at line 2665 of file nrf52_bitfields.h.

◆ MWU_INTEN_PREGION1WA_Enabled

#define MWU_INTEN_PREGION1WA_Enabled   (1UL)

Enable

Definition at line 2666 of file nrf52_bitfields.h.

◆ MWU_INTEN_PREGION1WA_Msk

#define MWU_INTEN_PREGION1WA_Msk   (0x1UL << MWU_INTEN_PREGION1WA_Pos)

Bit mask of PREGION1WA field.

Definition at line 2664 of file nrf52_bitfields.h.

◆ MWU_INTEN_PREGION1WA_Pos

#define MWU_INTEN_PREGION1WA_Pos   (26UL)

Position of PREGION1WA field.

Definition at line 2663 of file nrf52_bitfields.h.

◆ MWU_INTEN_REGION0RA_Disabled

#define MWU_INTEN_REGION0RA_Disabled   (0UL)

Disable

Definition at line 2719 of file nrf52_bitfields.h.

◆ MWU_INTEN_REGION0RA_Enabled

#define MWU_INTEN_REGION0RA_Enabled   (1UL)

Enable

Definition at line 2720 of file nrf52_bitfields.h.

◆ MWU_INTEN_REGION0RA_Msk

#define MWU_INTEN_REGION0RA_Msk   (0x1UL << MWU_INTEN_REGION0RA_Pos)

Bit mask of REGION0RA field.

Definition at line 2718 of file nrf52_bitfields.h.

◆ MWU_INTEN_REGION0RA_Pos

#define MWU_INTEN_REGION0RA_Pos   (1UL)

Position of REGION0RA field.

Definition at line 2717 of file nrf52_bitfields.h.

◆ MWU_INTEN_REGION0WA_Disabled

#define MWU_INTEN_REGION0WA_Disabled   (0UL)

Disable

Definition at line 2725 of file nrf52_bitfields.h.

◆ MWU_INTEN_REGION0WA_Enabled

#define MWU_INTEN_REGION0WA_Enabled   (1UL)

Enable

Definition at line 2726 of file nrf52_bitfields.h.

◆ MWU_INTEN_REGION0WA_Msk

#define MWU_INTEN_REGION0WA_Msk   (0x1UL << MWU_INTEN_REGION0WA_Pos)

Bit mask of REGION0WA field.

Definition at line 2724 of file nrf52_bitfields.h.

◆ MWU_INTEN_REGION0WA_Pos

#define MWU_INTEN_REGION0WA_Pos   (0UL)

Position of REGION0WA field.

Definition at line 2723 of file nrf52_bitfields.h.

◆ MWU_INTEN_REGION1RA_Disabled

#define MWU_INTEN_REGION1RA_Disabled   (0UL)

Disable

Definition at line 2707 of file nrf52_bitfields.h.

◆ MWU_INTEN_REGION1RA_Enabled

#define MWU_INTEN_REGION1RA_Enabled   (1UL)

Enable

Definition at line 2708 of file nrf52_bitfields.h.

◆ MWU_INTEN_REGION1RA_Msk

#define MWU_INTEN_REGION1RA_Msk   (0x1UL << MWU_INTEN_REGION1RA_Pos)

Bit mask of REGION1RA field.

Definition at line 2706 of file nrf52_bitfields.h.

◆ MWU_INTEN_REGION1RA_Pos

#define MWU_INTEN_REGION1RA_Pos   (3UL)

Position of REGION1RA field.

Definition at line 2705 of file nrf52_bitfields.h.

◆ MWU_INTEN_REGION1WA_Disabled

#define MWU_INTEN_REGION1WA_Disabled   (0UL)

Disable

Definition at line 2713 of file nrf52_bitfields.h.

◆ MWU_INTEN_REGION1WA_Enabled

#define MWU_INTEN_REGION1WA_Enabled   (1UL)

Enable

Definition at line 2714 of file nrf52_bitfields.h.

◆ MWU_INTEN_REGION1WA_Msk

#define MWU_INTEN_REGION1WA_Msk   (0x1UL << MWU_INTEN_REGION1WA_Pos)

Bit mask of REGION1WA field.

Definition at line 2712 of file nrf52_bitfields.h.

◆ MWU_INTEN_REGION1WA_Pos

#define MWU_INTEN_REGION1WA_Pos   (2UL)

Position of REGION1WA field.

Definition at line 2711 of file nrf52_bitfields.h.

◆ MWU_INTEN_REGION2RA_Disabled

#define MWU_INTEN_REGION2RA_Disabled   (0UL)

Disable

Definition at line 2695 of file nrf52_bitfields.h.

◆ MWU_INTEN_REGION2RA_Enabled

#define MWU_INTEN_REGION2RA_Enabled   (1UL)

Enable

Definition at line 2696 of file nrf52_bitfields.h.

◆ MWU_INTEN_REGION2RA_Msk

#define MWU_INTEN_REGION2RA_Msk   (0x1UL << MWU_INTEN_REGION2RA_Pos)

Bit mask of REGION2RA field.

Definition at line 2694 of file nrf52_bitfields.h.

◆ MWU_INTEN_REGION2RA_Pos

#define MWU_INTEN_REGION2RA_Pos   (5UL)

Position of REGION2RA field.

Definition at line 2693 of file nrf52_bitfields.h.

◆ MWU_INTEN_REGION2WA_Disabled

#define MWU_INTEN_REGION2WA_Disabled   (0UL)

Disable

Definition at line 2701 of file nrf52_bitfields.h.

◆ MWU_INTEN_REGION2WA_Enabled

#define MWU_INTEN_REGION2WA_Enabled   (1UL)

Enable

Definition at line 2702 of file nrf52_bitfields.h.

◆ MWU_INTEN_REGION2WA_Msk

#define MWU_INTEN_REGION2WA_Msk   (0x1UL << MWU_INTEN_REGION2WA_Pos)

Bit mask of REGION2WA field.

Definition at line 2700 of file nrf52_bitfields.h.

◆ MWU_INTEN_REGION2WA_Pos

#define MWU_INTEN_REGION2WA_Pos   (4UL)

Position of REGION2WA field.

Definition at line 2699 of file nrf52_bitfields.h.

◆ MWU_INTEN_REGION3RA_Disabled

#define MWU_INTEN_REGION3RA_Disabled   (0UL)

Disable

Definition at line 2683 of file nrf52_bitfields.h.

◆ MWU_INTEN_REGION3RA_Enabled

#define MWU_INTEN_REGION3RA_Enabled   (1UL)

Enable

Definition at line 2684 of file nrf52_bitfields.h.

◆ MWU_INTEN_REGION3RA_Msk

#define MWU_INTEN_REGION3RA_Msk   (0x1UL << MWU_INTEN_REGION3RA_Pos)

Bit mask of REGION3RA field.

Definition at line 2682 of file nrf52_bitfields.h.

◆ MWU_INTEN_REGION3RA_Pos

#define MWU_INTEN_REGION3RA_Pos   (7UL)

Position of REGION3RA field.

Definition at line 2681 of file nrf52_bitfields.h.

◆ MWU_INTEN_REGION3WA_Disabled

#define MWU_INTEN_REGION3WA_Disabled   (0UL)

Disable

Definition at line 2689 of file nrf52_bitfields.h.

◆ MWU_INTEN_REGION3WA_Enabled

#define MWU_INTEN_REGION3WA_Enabled   (1UL)

Enable

Definition at line 2690 of file nrf52_bitfields.h.

◆ MWU_INTEN_REGION3WA_Msk

#define MWU_INTEN_REGION3WA_Msk   (0x1UL << MWU_INTEN_REGION3WA_Pos)

Bit mask of REGION3WA field.

Definition at line 2688 of file nrf52_bitfields.h.

◆ MWU_INTEN_REGION3WA_Pos

#define MWU_INTEN_REGION3WA_Pos   (6UL)

Position of REGION3WA field.

Definition at line 2687 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_PREGION0RA_Clear

#define MWU_INTENCLR_PREGION0RA_Clear   (1UL)

Disable

Definition at line 2837 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_PREGION0RA_Disabled

#define MWU_INTENCLR_PREGION0RA_Disabled   (0UL)

Read: Disabled

Definition at line 2835 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_PREGION0RA_Enabled

#define MWU_INTENCLR_PREGION0RA_Enabled   (1UL)

Read: Enabled

Definition at line 2836 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_PREGION0RA_Msk

#define MWU_INTENCLR_PREGION0RA_Msk   (0x1UL << MWU_INTENCLR_PREGION0RA_Pos)

Bit mask of PREGION0RA field.

Definition at line 2834 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_PREGION0RA_Pos

#define MWU_INTENCLR_PREGION0RA_Pos   (25UL)

Position of PREGION0RA field.

Definition at line 2833 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_PREGION0WA_Clear

#define MWU_INTENCLR_PREGION0WA_Clear   (1UL)

Disable

Definition at line 2844 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_PREGION0WA_Disabled

#define MWU_INTENCLR_PREGION0WA_Disabled   (0UL)

Read: Disabled

Definition at line 2842 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_PREGION0WA_Enabled

#define MWU_INTENCLR_PREGION0WA_Enabled   (1UL)

Read: Enabled

Definition at line 2843 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_PREGION0WA_Msk

#define MWU_INTENCLR_PREGION0WA_Msk   (0x1UL << MWU_INTENCLR_PREGION0WA_Pos)

Bit mask of PREGION0WA field.

Definition at line 2841 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_PREGION0WA_Pos

#define MWU_INTENCLR_PREGION0WA_Pos   (24UL)

Position of PREGION0WA field.

Definition at line 2840 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_PREGION1RA_Clear

#define MWU_INTENCLR_PREGION1RA_Clear   (1UL)

Disable

Definition at line 2823 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_PREGION1RA_Disabled

#define MWU_INTENCLR_PREGION1RA_Disabled   (0UL)

Read: Disabled

Definition at line 2821 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_PREGION1RA_Enabled

#define MWU_INTENCLR_PREGION1RA_Enabled   (1UL)

Read: Enabled

Definition at line 2822 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_PREGION1RA_Msk

#define MWU_INTENCLR_PREGION1RA_Msk   (0x1UL << MWU_INTENCLR_PREGION1RA_Pos)

Bit mask of PREGION1RA field.

Definition at line 2820 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_PREGION1RA_Pos

#define MWU_INTENCLR_PREGION1RA_Pos   (27UL)

Position of PREGION1RA field.

Definition at line 2819 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_PREGION1WA_Clear

#define MWU_INTENCLR_PREGION1WA_Clear   (1UL)

Disable

Definition at line 2830 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_PREGION1WA_Disabled

#define MWU_INTENCLR_PREGION1WA_Disabled   (0UL)

Read: Disabled

Definition at line 2828 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_PREGION1WA_Enabled

#define MWU_INTENCLR_PREGION1WA_Enabled   (1UL)

Read: Enabled

Definition at line 2829 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_PREGION1WA_Msk

#define MWU_INTENCLR_PREGION1WA_Msk   (0x1UL << MWU_INTENCLR_PREGION1WA_Pos)

Bit mask of PREGION1WA field.

Definition at line 2827 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_PREGION1WA_Pos

#define MWU_INTENCLR_PREGION1WA_Pos   (26UL)

Position of PREGION1WA field.

Definition at line 2826 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION0RA_Clear

#define MWU_INTENCLR_REGION0RA_Clear   (1UL)

Disable

Definition at line 2893 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION0RA_Disabled

#define MWU_INTENCLR_REGION0RA_Disabled   (0UL)

Read: Disabled

Definition at line 2891 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION0RA_Enabled

#define MWU_INTENCLR_REGION0RA_Enabled   (1UL)

Read: Enabled

Definition at line 2892 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION0RA_Msk

#define MWU_INTENCLR_REGION0RA_Msk   (0x1UL << MWU_INTENCLR_REGION0RA_Pos)

Bit mask of REGION0RA field.

Definition at line 2890 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION0RA_Pos

#define MWU_INTENCLR_REGION0RA_Pos   (1UL)

Position of REGION0RA field.

Definition at line 2889 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION0WA_Clear

#define MWU_INTENCLR_REGION0WA_Clear   (1UL)

Disable

Definition at line 2900 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION0WA_Disabled

#define MWU_INTENCLR_REGION0WA_Disabled   (0UL)

Read: Disabled

Definition at line 2898 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION0WA_Enabled

#define MWU_INTENCLR_REGION0WA_Enabled   (1UL)

Read: Enabled

Definition at line 2899 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION0WA_Msk

#define MWU_INTENCLR_REGION0WA_Msk   (0x1UL << MWU_INTENCLR_REGION0WA_Pos)

Bit mask of REGION0WA field.

Definition at line 2897 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION0WA_Pos

#define MWU_INTENCLR_REGION0WA_Pos   (0UL)

Position of REGION0WA field.

Definition at line 2896 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION1RA_Clear

#define MWU_INTENCLR_REGION1RA_Clear   (1UL)

Disable

Definition at line 2879 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION1RA_Disabled

#define MWU_INTENCLR_REGION1RA_Disabled   (0UL)

Read: Disabled

Definition at line 2877 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION1RA_Enabled

#define MWU_INTENCLR_REGION1RA_Enabled   (1UL)

Read: Enabled

Definition at line 2878 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION1RA_Msk

#define MWU_INTENCLR_REGION1RA_Msk   (0x1UL << MWU_INTENCLR_REGION1RA_Pos)

Bit mask of REGION1RA field.

Definition at line 2876 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION1RA_Pos

#define MWU_INTENCLR_REGION1RA_Pos   (3UL)

Position of REGION1RA field.

Definition at line 2875 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION1WA_Clear

#define MWU_INTENCLR_REGION1WA_Clear   (1UL)

Disable

Definition at line 2886 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION1WA_Disabled

#define MWU_INTENCLR_REGION1WA_Disabled   (0UL)

Read: Disabled

Definition at line 2884 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION1WA_Enabled

#define MWU_INTENCLR_REGION1WA_Enabled   (1UL)

Read: Enabled

Definition at line 2885 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION1WA_Msk

#define MWU_INTENCLR_REGION1WA_Msk   (0x1UL << MWU_INTENCLR_REGION1WA_Pos)

Bit mask of REGION1WA field.

Definition at line 2883 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION1WA_Pos

#define MWU_INTENCLR_REGION1WA_Pos   (2UL)

Position of REGION1WA field.

Definition at line 2882 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION2RA_Clear

#define MWU_INTENCLR_REGION2RA_Clear   (1UL)

Disable

Definition at line 2865 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION2RA_Disabled

#define MWU_INTENCLR_REGION2RA_Disabled   (0UL)

Read: Disabled

Definition at line 2863 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION2RA_Enabled

#define MWU_INTENCLR_REGION2RA_Enabled   (1UL)

Read: Enabled

Definition at line 2864 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION2RA_Msk

#define MWU_INTENCLR_REGION2RA_Msk   (0x1UL << MWU_INTENCLR_REGION2RA_Pos)

Bit mask of REGION2RA field.

Definition at line 2862 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION2RA_Pos

#define MWU_INTENCLR_REGION2RA_Pos   (5UL)

Position of REGION2RA field.

Definition at line 2861 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION2WA_Clear

#define MWU_INTENCLR_REGION2WA_Clear   (1UL)

Disable

Definition at line 2872 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION2WA_Disabled

#define MWU_INTENCLR_REGION2WA_Disabled   (0UL)

Read: Disabled

Definition at line 2870 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION2WA_Enabled

#define MWU_INTENCLR_REGION2WA_Enabled   (1UL)

Read: Enabled

Definition at line 2871 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION2WA_Msk

#define MWU_INTENCLR_REGION2WA_Msk   (0x1UL << MWU_INTENCLR_REGION2WA_Pos)

Bit mask of REGION2WA field.

Definition at line 2869 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION2WA_Pos

#define MWU_INTENCLR_REGION2WA_Pos   (4UL)

Position of REGION2WA field.

Definition at line 2868 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION3RA_Clear

#define MWU_INTENCLR_REGION3RA_Clear   (1UL)

Disable

Definition at line 2851 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION3RA_Disabled

#define MWU_INTENCLR_REGION3RA_Disabled   (0UL)

Read: Disabled

Definition at line 2849 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION3RA_Enabled

#define MWU_INTENCLR_REGION3RA_Enabled   (1UL)

Read: Enabled

Definition at line 2850 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION3RA_Msk

#define MWU_INTENCLR_REGION3RA_Msk   (0x1UL << MWU_INTENCLR_REGION3RA_Pos)

Bit mask of REGION3RA field.

Definition at line 2848 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION3RA_Pos

#define MWU_INTENCLR_REGION3RA_Pos   (7UL)

Position of REGION3RA field.

Definition at line 2847 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION3WA_Clear

#define MWU_INTENCLR_REGION3WA_Clear   (1UL)

Disable

Definition at line 2858 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION3WA_Disabled

#define MWU_INTENCLR_REGION3WA_Disabled   (0UL)

Read: Disabled

Definition at line 2856 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION3WA_Enabled

#define MWU_INTENCLR_REGION3WA_Enabled   (1UL)

Read: Enabled

Definition at line 2857 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION3WA_Msk

#define MWU_INTENCLR_REGION3WA_Msk   (0x1UL << MWU_INTENCLR_REGION3WA_Pos)

Bit mask of REGION3WA field.

Definition at line 2855 of file nrf52_bitfields.h.

◆ MWU_INTENCLR_REGION3WA_Pos

#define MWU_INTENCLR_REGION3WA_Pos   (6UL)

Position of REGION3WA field.

Definition at line 2854 of file nrf52_bitfields.h.

◆ MWU_INTENSET_PREGION0RA_Disabled

#define MWU_INTENSET_PREGION0RA_Disabled   (0UL)

Read: Disabled

Definition at line 2748 of file nrf52_bitfields.h.

◆ MWU_INTENSET_PREGION0RA_Enabled

#define MWU_INTENSET_PREGION0RA_Enabled   (1UL)

Read: Enabled

Definition at line 2749 of file nrf52_bitfields.h.

◆ MWU_INTENSET_PREGION0RA_Msk

#define MWU_INTENSET_PREGION0RA_Msk   (0x1UL << MWU_INTENSET_PREGION0RA_Pos)

Bit mask of PREGION0RA field.

Definition at line 2747 of file nrf52_bitfields.h.

◆ MWU_INTENSET_PREGION0RA_Pos

#define MWU_INTENSET_PREGION0RA_Pos   (25UL)

Position of PREGION0RA field.

Definition at line 2746 of file nrf52_bitfields.h.

◆ MWU_INTENSET_PREGION0RA_Set

#define MWU_INTENSET_PREGION0RA_Set   (1UL)

Enable

Definition at line 2750 of file nrf52_bitfields.h.

◆ MWU_INTENSET_PREGION0WA_Disabled

#define MWU_INTENSET_PREGION0WA_Disabled   (0UL)

Read: Disabled

Definition at line 2755 of file nrf52_bitfields.h.

◆ MWU_INTENSET_PREGION0WA_Enabled

#define MWU_INTENSET_PREGION0WA_Enabled   (1UL)

Read: Enabled

Definition at line 2756 of file nrf52_bitfields.h.

◆ MWU_INTENSET_PREGION0WA_Msk

#define MWU_INTENSET_PREGION0WA_Msk   (0x1UL << MWU_INTENSET_PREGION0WA_Pos)

Bit mask of PREGION0WA field.

Definition at line 2754 of file nrf52_bitfields.h.

◆ MWU_INTENSET_PREGION0WA_Pos

#define MWU_INTENSET_PREGION0WA_Pos   (24UL)

Position of PREGION0WA field.

Definition at line 2753 of file nrf52_bitfields.h.

◆ MWU_INTENSET_PREGION0WA_Set

#define MWU_INTENSET_PREGION0WA_Set   (1UL)

Enable

Definition at line 2757 of file nrf52_bitfields.h.

◆ MWU_INTENSET_PREGION1RA_Disabled

#define MWU_INTENSET_PREGION1RA_Disabled   (0UL)

Read: Disabled

Definition at line 2734 of file nrf52_bitfields.h.

◆ MWU_INTENSET_PREGION1RA_Enabled

#define MWU_INTENSET_PREGION1RA_Enabled   (1UL)

Read: Enabled

Definition at line 2735 of file nrf52_bitfields.h.

◆ MWU_INTENSET_PREGION1RA_Msk

#define MWU_INTENSET_PREGION1RA_Msk   (0x1UL << MWU_INTENSET_PREGION1RA_Pos)

Bit mask of PREGION1RA field.

Definition at line 2733 of file nrf52_bitfields.h.

◆ MWU_INTENSET_PREGION1RA_Pos

#define MWU_INTENSET_PREGION1RA_Pos   (27UL)

Position of PREGION1RA field.

Definition at line 2732 of file nrf52_bitfields.h.

◆ MWU_INTENSET_PREGION1RA_Set

#define MWU_INTENSET_PREGION1RA_Set   (1UL)

Enable

Definition at line 2736 of file nrf52_bitfields.h.

◆ MWU_INTENSET_PREGION1WA_Disabled

#define MWU_INTENSET_PREGION1WA_Disabled   (0UL)

Read: Disabled

Definition at line 2741 of file nrf52_bitfields.h.

◆ MWU_INTENSET_PREGION1WA_Enabled

#define MWU_INTENSET_PREGION1WA_Enabled   (1UL)

Read: Enabled

Definition at line 2742 of file nrf52_bitfields.h.

◆ MWU_INTENSET_PREGION1WA_Msk

#define MWU_INTENSET_PREGION1WA_Msk   (0x1UL << MWU_INTENSET_PREGION1WA_Pos)

Bit mask of PREGION1WA field.

Definition at line 2740 of file nrf52_bitfields.h.

◆ MWU_INTENSET_PREGION1WA_Pos

#define MWU_INTENSET_PREGION1WA_Pos   (26UL)

Position of PREGION1WA field.

Definition at line 2739 of file nrf52_bitfields.h.

◆ MWU_INTENSET_PREGION1WA_Set

#define MWU_INTENSET_PREGION1WA_Set   (1UL)

Enable

Definition at line 2743 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION0RA_Disabled

#define MWU_INTENSET_REGION0RA_Disabled   (0UL)

Read: Disabled

Definition at line 2804 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION0RA_Enabled

#define MWU_INTENSET_REGION0RA_Enabled   (1UL)

Read: Enabled

Definition at line 2805 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION0RA_Msk

#define MWU_INTENSET_REGION0RA_Msk   (0x1UL << MWU_INTENSET_REGION0RA_Pos)

Bit mask of REGION0RA field.

Definition at line 2803 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION0RA_Pos

#define MWU_INTENSET_REGION0RA_Pos   (1UL)

Position of REGION0RA field.

Definition at line 2802 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION0RA_Set

#define MWU_INTENSET_REGION0RA_Set   (1UL)

Enable

Definition at line 2806 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION0WA_Disabled

#define MWU_INTENSET_REGION0WA_Disabled   (0UL)

Read: Disabled

Definition at line 2811 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION0WA_Enabled

#define MWU_INTENSET_REGION0WA_Enabled   (1UL)

Read: Enabled

Definition at line 2812 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION0WA_Msk

#define MWU_INTENSET_REGION0WA_Msk   (0x1UL << MWU_INTENSET_REGION0WA_Pos)

Bit mask of REGION0WA field.

Definition at line 2810 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION0WA_Pos

#define MWU_INTENSET_REGION0WA_Pos   (0UL)

Position of REGION0WA field.

Definition at line 2809 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION0WA_Set

#define MWU_INTENSET_REGION0WA_Set   (1UL)

Enable

Definition at line 2813 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION1RA_Disabled

#define MWU_INTENSET_REGION1RA_Disabled   (0UL)

Read: Disabled

Definition at line 2790 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION1RA_Enabled

#define MWU_INTENSET_REGION1RA_Enabled   (1UL)

Read: Enabled

Definition at line 2791 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION1RA_Msk

#define MWU_INTENSET_REGION1RA_Msk   (0x1UL << MWU_INTENSET_REGION1RA_Pos)

Bit mask of REGION1RA field.

Definition at line 2789 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION1RA_Pos

#define MWU_INTENSET_REGION1RA_Pos   (3UL)

Position of REGION1RA field.

Definition at line 2788 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION1RA_Set

#define MWU_INTENSET_REGION1RA_Set   (1UL)

Enable

Definition at line 2792 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION1WA_Disabled

#define MWU_INTENSET_REGION1WA_Disabled   (0UL)

Read: Disabled

Definition at line 2797 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION1WA_Enabled

#define MWU_INTENSET_REGION1WA_Enabled   (1UL)

Read: Enabled

Definition at line 2798 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION1WA_Msk

#define MWU_INTENSET_REGION1WA_Msk   (0x1UL << MWU_INTENSET_REGION1WA_Pos)

Bit mask of REGION1WA field.

Definition at line 2796 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION1WA_Pos

#define MWU_INTENSET_REGION1WA_Pos   (2UL)

Position of REGION1WA field.

Definition at line 2795 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION1WA_Set

#define MWU_INTENSET_REGION1WA_Set   (1UL)

Enable

Definition at line 2799 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION2RA_Disabled

#define MWU_INTENSET_REGION2RA_Disabled   (0UL)

Read: Disabled

Definition at line 2776 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION2RA_Enabled

#define MWU_INTENSET_REGION2RA_Enabled   (1UL)

Read: Enabled

Definition at line 2777 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION2RA_Msk

#define MWU_INTENSET_REGION2RA_Msk   (0x1UL << MWU_INTENSET_REGION2RA_Pos)

Bit mask of REGION2RA field.

Definition at line 2775 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION2RA_Pos

#define MWU_INTENSET_REGION2RA_Pos   (5UL)

Position of REGION2RA field.

Definition at line 2774 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION2RA_Set

#define MWU_INTENSET_REGION2RA_Set   (1UL)

Enable

Definition at line 2778 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION2WA_Disabled

#define MWU_INTENSET_REGION2WA_Disabled   (0UL)

Read: Disabled

Definition at line 2783 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION2WA_Enabled

#define MWU_INTENSET_REGION2WA_Enabled   (1UL)

Read: Enabled

Definition at line 2784 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION2WA_Msk

#define MWU_INTENSET_REGION2WA_Msk   (0x1UL << MWU_INTENSET_REGION2WA_Pos)

Bit mask of REGION2WA field.

Definition at line 2782 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION2WA_Pos

#define MWU_INTENSET_REGION2WA_Pos   (4UL)

Position of REGION2WA field.

Definition at line 2781 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION2WA_Set

#define MWU_INTENSET_REGION2WA_Set   (1UL)

Enable

Definition at line 2785 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION3RA_Disabled

#define MWU_INTENSET_REGION3RA_Disabled   (0UL)

Read: Disabled

Definition at line 2762 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION3RA_Enabled

#define MWU_INTENSET_REGION3RA_Enabled   (1UL)

Read: Enabled

Definition at line 2763 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION3RA_Msk

#define MWU_INTENSET_REGION3RA_Msk   (0x1UL << MWU_INTENSET_REGION3RA_Pos)

Bit mask of REGION3RA field.

Definition at line 2761 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION3RA_Pos

#define MWU_INTENSET_REGION3RA_Pos   (7UL)

Position of REGION3RA field.

Definition at line 2760 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION3RA_Set

#define MWU_INTENSET_REGION3RA_Set   (1UL)

Enable

Definition at line 2764 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION3WA_Disabled

#define MWU_INTENSET_REGION3WA_Disabled   (0UL)

Read: Disabled

Definition at line 2769 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION3WA_Enabled

#define MWU_INTENSET_REGION3WA_Enabled   (1UL)

Read: Enabled

Definition at line 2770 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION3WA_Msk

#define MWU_INTENSET_REGION3WA_Msk   (0x1UL << MWU_INTENSET_REGION3WA_Pos)

Bit mask of REGION3WA field.

Definition at line 2768 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION3WA_Pos

#define MWU_INTENSET_REGION3WA_Pos   (6UL)

Position of REGION3WA field.

Definition at line 2767 of file nrf52_bitfields.h.

◆ MWU_INTENSET_REGION3WA_Set

#define MWU_INTENSET_REGION3WA_Set   (1UL)

Enable

Definition at line 2771 of file nrf52_bitfields.h.

◆ MWU_NMIEN_PREGION0RA_Disabled

#define MWU_NMIEN_PREGION0RA_Disabled   (0UL)

Disable

Definition at line 2920 of file nrf52_bitfields.h.

◆ MWU_NMIEN_PREGION0RA_Enabled

#define MWU_NMIEN_PREGION0RA_Enabled   (1UL)

Enable

Definition at line 2921 of file nrf52_bitfields.h.

◆ MWU_NMIEN_PREGION0RA_Msk

#define MWU_NMIEN_PREGION0RA_Msk   (0x1UL << MWU_NMIEN_PREGION0RA_Pos)

Bit mask of PREGION0RA field.

Definition at line 2919 of file nrf52_bitfields.h.

◆ MWU_NMIEN_PREGION0RA_Pos

#define MWU_NMIEN_PREGION0RA_Pos   (25UL)

Position of PREGION0RA field.

Definition at line 2918 of file nrf52_bitfields.h.

◆ MWU_NMIEN_PREGION0WA_Disabled

#define MWU_NMIEN_PREGION0WA_Disabled   (0UL)

Disable

Definition at line 2926 of file nrf52_bitfields.h.

◆ MWU_NMIEN_PREGION0WA_Enabled

#define MWU_NMIEN_PREGION0WA_Enabled   (1UL)

Enable

Definition at line 2927 of file nrf52_bitfields.h.

◆ MWU_NMIEN_PREGION0WA_Msk

#define MWU_NMIEN_PREGION0WA_Msk   (0x1UL << MWU_NMIEN_PREGION0WA_Pos)

Bit mask of PREGION0WA field.

Definition at line 2925 of file nrf52_bitfields.h.

◆ MWU_NMIEN_PREGION0WA_Pos

#define MWU_NMIEN_PREGION0WA_Pos   (24UL)

Position of PREGION0WA field.

Definition at line 2924 of file nrf52_bitfields.h.

◆ MWU_NMIEN_PREGION1RA_Disabled

#define MWU_NMIEN_PREGION1RA_Disabled   (0UL)

Disable

Definition at line 2908 of file nrf52_bitfields.h.

◆ MWU_NMIEN_PREGION1RA_Enabled

#define MWU_NMIEN_PREGION1RA_Enabled   (1UL)

Enable

Definition at line 2909 of file nrf52_bitfields.h.

◆ MWU_NMIEN_PREGION1RA_Msk

#define MWU_NMIEN_PREGION1RA_Msk   (0x1UL << MWU_NMIEN_PREGION1RA_Pos)

Bit mask of PREGION1RA field.

Definition at line 2907 of file nrf52_bitfields.h.

◆ MWU_NMIEN_PREGION1RA_Pos

#define MWU_NMIEN_PREGION1RA_Pos   (27UL)

Position of PREGION1RA field.

Definition at line 2906 of file nrf52_bitfields.h.

◆ MWU_NMIEN_PREGION1WA_Disabled

#define MWU_NMIEN_PREGION1WA_Disabled   (0UL)

Disable

Definition at line 2914 of file nrf52_bitfields.h.

◆ MWU_NMIEN_PREGION1WA_Enabled

#define MWU_NMIEN_PREGION1WA_Enabled   (1UL)

Enable

Definition at line 2915 of file nrf52_bitfields.h.

◆ MWU_NMIEN_PREGION1WA_Msk

#define MWU_NMIEN_PREGION1WA_Msk   (0x1UL << MWU_NMIEN_PREGION1WA_Pos)

Bit mask of PREGION1WA field.

Definition at line 2913 of file nrf52_bitfields.h.

◆ MWU_NMIEN_PREGION1WA_Pos

#define MWU_NMIEN_PREGION1WA_Pos   (26UL)

Position of PREGION1WA field.

Definition at line 2912 of file nrf52_bitfields.h.

◆ MWU_NMIEN_REGION0RA_Disabled

#define MWU_NMIEN_REGION0RA_Disabled   (0UL)

Disable

Definition at line 2968 of file nrf52_bitfields.h.

◆ MWU_NMIEN_REGION0RA_Enabled

#define MWU_NMIEN_REGION0RA_Enabled   (1UL)

Enable

Definition at line 2969 of file nrf52_bitfields.h.

◆ MWU_NMIEN_REGION0RA_Msk

#define MWU_NMIEN_REGION0RA_Msk   (0x1UL << MWU_NMIEN_REGION0RA_Pos)

Bit mask of REGION0RA field.

Definition at line 2967 of file nrf52_bitfields.h.

◆ MWU_NMIEN_REGION0RA_Pos

#define MWU_NMIEN_REGION0RA_Pos   (1UL)

Position of REGION0RA field.

Definition at line 2966 of file nrf52_bitfields.h.

◆ MWU_NMIEN_REGION0WA_Disabled

#define MWU_NMIEN_REGION0WA_Disabled   (0UL)

Disable

Definition at line 2974 of file nrf52_bitfields.h.

◆ MWU_NMIEN_REGION0WA_Enabled

#define MWU_NMIEN_REGION0WA_Enabled   (1UL)

Enable

Definition at line 2975 of file nrf52_bitfields.h.

◆ MWU_NMIEN_REGION0WA_Msk

#define MWU_NMIEN_REGION0WA_Msk   (0x1UL << MWU_NMIEN_REGION0WA_Pos)

Bit mask of REGION0WA field.

Definition at line 2973 of file nrf52_bitfields.h.

◆ MWU_NMIEN_REGION0WA_Pos

#define MWU_NMIEN_REGION0WA_Pos   (0UL)

Position of REGION0WA field.

Definition at line 2972 of file nrf52_bitfields.h.

◆ MWU_NMIEN_REGION1RA_Disabled

#define MWU_NMIEN_REGION1RA_Disabled   (0UL)

Disable

Definition at line 2956 of file nrf52_bitfields.h.

◆ MWU_NMIEN_REGION1RA_Enabled

#define MWU_NMIEN_REGION1RA_Enabled   (1UL)

Enable

Definition at line 2957 of file nrf52_bitfields.h.

◆ MWU_NMIEN_REGION1RA_Msk

#define MWU_NMIEN_REGION1RA_Msk   (0x1UL << MWU_NMIEN_REGION1RA_Pos)

Bit mask of REGION1RA field.

Definition at line 2955 of file nrf52_bitfields.h.

◆ MWU_NMIEN_REGION1RA_Pos

#define MWU_NMIEN_REGION1RA_Pos   (3UL)

Position of REGION1RA field.

Definition at line 2954 of file nrf52_bitfields.h.

◆ MWU_NMIEN_REGION1WA_Disabled

#define MWU_NMIEN_REGION1WA_Disabled   (0UL)

Disable

Definition at line 2962 of file nrf52_bitfields.h.

◆ MWU_NMIEN_REGION1WA_Enabled

#define MWU_NMIEN_REGION1WA_Enabled   (1UL)

Enable

Definition at line 2963 of file nrf52_bitfields.h.

◆ MWU_NMIEN_REGION1WA_Msk

#define MWU_NMIEN_REGION1WA_Msk   (0x1UL << MWU_NMIEN_REGION1WA_Pos)

Bit mask of REGION1WA field.

Definition at line 2961 of file nrf52_bitfields.h.

◆ MWU_NMIEN_REGION1WA_Pos

#define MWU_NMIEN_REGION1WA_Pos   (2UL)

Position of REGION1WA field.

Definition at line 2960 of file nrf52_bitfields.h.

◆ MWU_NMIEN_REGION2RA_Disabled

#define MWU_NMIEN_REGION2RA_Disabled   (0UL)

Disable

Definition at line 2944 of file nrf52_bitfields.h.

◆ MWU_NMIEN_REGION2RA_Enabled

#define MWU_NMIEN_REGION2RA_Enabled   (1UL)

Enable

Definition at line 2945 of file nrf52_bitfields.h.

◆ MWU_NMIEN_REGION2RA_Msk

#define MWU_NMIEN_REGION2RA_Msk   (0x1UL << MWU_NMIEN_REGION2RA_Pos)

Bit mask of REGION2RA field.

Definition at line 2943 of file nrf52_bitfields.h.

◆ MWU_NMIEN_REGION2RA_Pos

#define MWU_NMIEN_REGION2RA_Pos   (5UL)

Position of REGION2RA field.

Definition at line 2942 of file nrf52_bitfields.h.

◆ MWU_NMIEN_REGION2WA_Disabled

#define MWU_NMIEN_REGION2WA_Disabled   (0UL)

Disable

Definition at line 2950 of file nrf52_bitfields.h.

◆ MWU_NMIEN_REGION2WA_Enabled

#define MWU_NMIEN_REGION2WA_Enabled   (1UL)

Enable

Definition at line 2951 of file nrf52_bitfields.h.

◆ MWU_NMIEN_REGION2WA_Msk

#define MWU_NMIEN_REGION2WA_Msk   (0x1UL << MWU_NMIEN_REGION2WA_Pos)

Bit mask of REGION2WA field.

Definition at line 2949 of file nrf52_bitfields.h.

◆ MWU_NMIEN_REGION2WA_Pos

#define MWU_NMIEN_REGION2WA_Pos   (4UL)

Position of REGION2WA field.

Definition at line 2948 of file nrf52_bitfields.h.

◆ MWU_NMIEN_REGION3RA_Disabled

#define MWU_NMIEN_REGION3RA_Disabled   (0UL)

Disable

Definition at line 2932 of file nrf52_bitfields.h.

◆ MWU_NMIEN_REGION3RA_Enabled

#define MWU_NMIEN_REGION3RA_Enabled   (1UL)

Enable

Definition at line 2933 of file nrf52_bitfields.h.

◆ MWU_NMIEN_REGION3RA_Msk

#define MWU_NMIEN_REGION3RA_Msk   (0x1UL << MWU_NMIEN_REGION3RA_Pos)

Bit mask of REGION3RA field.

Definition at line 2931 of file nrf52_bitfields.h.

◆ MWU_NMIEN_REGION3RA_Pos

#define MWU_NMIEN_REGION3RA_Pos   (7UL)

Position of REGION3RA field.

Definition at line 2930 of file nrf52_bitfields.h.

◆ MWU_NMIEN_REGION3WA_Disabled

#define MWU_NMIEN_REGION3WA_Disabled   (0UL)

Disable

Definition at line 2938 of file nrf52_bitfields.h.

◆ MWU_NMIEN_REGION3WA_Enabled

#define MWU_NMIEN_REGION3WA_Enabled   (1UL)

Enable

Definition at line 2939 of file nrf52_bitfields.h.

◆ MWU_NMIEN_REGION3WA_Msk

#define MWU_NMIEN_REGION3WA_Msk   (0x1UL << MWU_NMIEN_REGION3WA_Pos)

Bit mask of REGION3WA field.

Definition at line 2937 of file nrf52_bitfields.h.

◆ MWU_NMIEN_REGION3WA_Pos

#define MWU_NMIEN_REGION3WA_Pos   (6UL)

Position of REGION3WA field.

Definition at line 2936 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_PREGION0RA_Clear

#define MWU_NMIENCLR_PREGION0RA_Clear   (1UL)

Disable

Definition at line 3086 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_PREGION0RA_Disabled

#define MWU_NMIENCLR_PREGION0RA_Disabled   (0UL)

Read: Disabled

Definition at line 3084 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_PREGION0RA_Enabled

#define MWU_NMIENCLR_PREGION0RA_Enabled   (1UL)

Read: Enabled

Definition at line 3085 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_PREGION0RA_Msk

#define MWU_NMIENCLR_PREGION0RA_Msk   (0x1UL << MWU_NMIENCLR_PREGION0RA_Pos)

Bit mask of PREGION0RA field.

Definition at line 3083 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_PREGION0RA_Pos

#define MWU_NMIENCLR_PREGION0RA_Pos   (25UL)

Position of PREGION0RA field.

Definition at line 3082 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_PREGION0WA_Clear

#define MWU_NMIENCLR_PREGION0WA_Clear   (1UL)

Disable

Definition at line 3093 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_PREGION0WA_Disabled

#define MWU_NMIENCLR_PREGION0WA_Disabled   (0UL)

Read: Disabled

Definition at line 3091 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_PREGION0WA_Enabled

#define MWU_NMIENCLR_PREGION0WA_Enabled   (1UL)

Read: Enabled

Definition at line 3092 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_PREGION0WA_Msk

#define MWU_NMIENCLR_PREGION0WA_Msk   (0x1UL << MWU_NMIENCLR_PREGION0WA_Pos)

Bit mask of PREGION0WA field.

Definition at line 3090 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_PREGION0WA_Pos

#define MWU_NMIENCLR_PREGION0WA_Pos   (24UL)

Position of PREGION0WA field.

Definition at line 3089 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_PREGION1RA_Clear

#define MWU_NMIENCLR_PREGION1RA_Clear   (1UL)

Disable

Definition at line 3072 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_PREGION1RA_Disabled

#define MWU_NMIENCLR_PREGION1RA_Disabled   (0UL)

Read: Disabled

Definition at line 3070 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_PREGION1RA_Enabled

#define MWU_NMIENCLR_PREGION1RA_Enabled   (1UL)

Read: Enabled

Definition at line 3071 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_PREGION1RA_Msk

#define MWU_NMIENCLR_PREGION1RA_Msk   (0x1UL << MWU_NMIENCLR_PREGION1RA_Pos)

Bit mask of PREGION1RA field.

Definition at line 3069 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_PREGION1RA_Pos

#define MWU_NMIENCLR_PREGION1RA_Pos   (27UL)

Position of PREGION1RA field.

Definition at line 3068 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_PREGION1WA_Clear

#define MWU_NMIENCLR_PREGION1WA_Clear   (1UL)

Disable

Definition at line 3079 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_PREGION1WA_Disabled

#define MWU_NMIENCLR_PREGION1WA_Disabled   (0UL)

Read: Disabled

Definition at line 3077 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_PREGION1WA_Enabled

#define MWU_NMIENCLR_PREGION1WA_Enabled   (1UL)

Read: Enabled

Definition at line 3078 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_PREGION1WA_Msk

#define MWU_NMIENCLR_PREGION1WA_Msk   (0x1UL << MWU_NMIENCLR_PREGION1WA_Pos)

Bit mask of PREGION1WA field.

Definition at line 3076 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_PREGION1WA_Pos

#define MWU_NMIENCLR_PREGION1WA_Pos   (26UL)

Position of PREGION1WA field.

Definition at line 3075 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION0RA_Clear

#define MWU_NMIENCLR_REGION0RA_Clear   (1UL)

Disable

Definition at line 3142 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION0RA_Disabled

#define MWU_NMIENCLR_REGION0RA_Disabled   (0UL)

Read: Disabled

Definition at line 3140 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION0RA_Enabled

#define MWU_NMIENCLR_REGION0RA_Enabled   (1UL)

Read: Enabled

Definition at line 3141 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION0RA_Msk

#define MWU_NMIENCLR_REGION0RA_Msk   (0x1UL << MWU_NMIENCLR_REGION0RA_Pos)

Bit mask of REGION0RA field.

Definition at line 3139 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION0RA_Pos

#define MWU_NMIENCLR_REGION0RA_Pos   (1UL)

Position of REGION0RA field.

Definition at line 3138 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION0WA_Clear

#define MWU_NMIENCLR_REGION0WA_Clear   (1UL)

Disable

Definition at line 3149 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION0WA_Disabled

#define MWU_NMIENCLR_REGION0WA_Disabled   (0UL)

Read: Disabled

Definition at line 3147 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION0WA_Enabled

#define MWU_NMIENCLR_REGION0WA_Enabled   (1UL)

Read: Enabled

Definition at line 3148 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION0WA_Msk

#define MWU_NMIENCLR_REGION0WA_Msk   (0x1UL << MWU_NMIENCLR_REGION0WA_Pos)

Bit mask of REGION0WA field.

Definition at line 3146 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION0WA_Pos

#define MWU_NMIENCLR_REGION0WA_Pos   (0UL)

Position of REGION0WA field.

Definition at line 3145 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION1RA_Clear

#define MWU_NMIENCLR_REGION1RA_Clear   (1UL)

Disable

Definition at line 3128 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION1RA_Disabled

#define MWU_NMIENCLR_REGION1RA_Disabled   (0UL)

Read: Disabled

Definition at line 3126 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION1RA_Enabled

#define MWU_NMIENCLR_REGION1RA_Enabled   (1UL)

Read: Enabled

Definition at line 3127 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION1RA_Msk

#define MWU_NMIENCLR_REGION1RA_Msk   (0x1UL << MWU_NMIENCLR_REGION1RA_Pos)

Bit mask of REGION1RA field.

Definition at line 3125 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION1RA_Pos

#define MWU_NMIENCLR_REGION1RA_Pos   (3UL)

Position of REGION1RA field.

Definition at line 3124 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION1WA_Clear

#define MWU_NMIENCLR_REGION1WA_Clear   (1UL)

Disable

Definition at line 3135 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION1WA_Disabled

#define MWU_NMIENCLR_REGION1WA_Disabled   (0UL)

Read: Disabled

Definition at line 3133 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION1WA_Enabled

#define MWU_NMIENCLR_REGION1WA_Enabled   (1UL)

Read: Enabled

Definition at line 3134 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION1WA_Msk

#define MWU_NMIENCLR_REGION1WA_Msk   (0x1UL << MWU_NMIENCLR_REGION1WA_Pos)

Bit mask of REGION1WA field.

Definition at line 3132 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION1WA_Pos

#define MWU_NMIENCLR_REGION1WA_Pos   (2UL)

Position of REGION1WA field.

Definition at line 3131 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION2RA_Clear

#define MWU_NMIENCLR_REGION2RA_Clear   (1UL)

Disable

Definition at line 3114 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION2RA_Disabled

#define MWU_NMIENCLR_REGION2RA_Disabled   (0UL)

Read: Disabled

Definition at line 3112 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION2RA_Enabled

#define MWU_NMIENCLR_REGION2RA_Enabled   (1UL)

Read: Enabled

Definition at line 3113 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION2RA_Msk

#define MWU_NMIENCLR_REGION2RA_Msk   (0x1UL << MWU_NMIENCLR_REGION2RA_Pos)

Bit mask of REGION2RA field.

Definition at line 3111 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION2RA_Pos

#define MWU_NMIENCLR_REGION2RA_Pos   (5UL)

Position of REGION2RA field.

Definition at line 3110 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION2WA_Clear

#define MWU_NMIENCLR_REGION2WA_Clear   (1UL)

Disable

Definition at line 3121 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION2WA_Disabled

#define MWU_NMIENCLR_REGION2WA_Disabled   (0UL)

Read: Disabled

Definition at line 3119 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION2WA_Enabled

#define MWU_NMIENCLR_REGION2WA_Enabled   (1UL)

Read: Enabled

Definition at line 3120 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION2WA_Msk

#define MWU_NMIENCLR_REGION2WA_Msk   (0x1UL << MWU_NMIENCLR_REGION2WA_Pos)

Bit mask of REGION2WA field.

Definition at line 3118 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION2WA_Pos

#define MWU_NMIENCLR_REGION2WA_Pos   (4UL)

Position of REGION2WA field.

Definition at line 3117 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION3RA_Clear

#define MWU_NMIENCLR_REGION3RA_Clear   (1UL)

Disable

Definition at line 3100 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION3RA_Disabled

#define MWU_NMIENCLR_REGION3RA_Disabled   (0UL)

Read: Disabled

Definition at line 3098 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION3RA_Enabled

#define MWU_NMIENCLR_REGION3RA_Enabled   (1UL)

Read: Enabled

Definition at line 3099 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION3RA_Msk

#define MWU_NMIENCLR_REGION3RA_Msk   (0x1UL << MWU_NMIENCLR_REGION3RA_Pos)

Bit mask of REGION3RA field.

Definition at line 3097 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION3RA_Pos

#define MWU_NMIENCLR_REGION3RA_Pos   (7UL)

Position of REGION3RA field.

Definition at line 3096 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION3WA_Clear

#define MWU_NMIENCLR_REGION3WA_Clear   (1UL)

Disable

Definition at line 3107 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION3WA_Disabled

#define MWU_NMIENCLR_REGION3WA_Disabled   (0UL)

Read: Disabled

Definition at line 3105 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION3WA_Enabled

#define MWU_NMIENCLR_REGION3WA_Enabled   (1UL)

Read: Enabled

Definition at line 3106 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION3WA_Msk

#define MWU_NMIENCLR_REGION3WA_Msk   (0x1UL << MWU_NMIENCLR_REGION3WA_Pos)

Bit mask of REGION3WA field.

Definition at line 3104 of file nrf52_bitfields.h.

◆ MWU_NMIENCLR_REGION3WA_Pos

#define MWU_NMIENCLR_REGION3WA_Pos   (6UL)

Position of REGION3WA field.

Definition at line 3103 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_PREGION0RA_Disabled

#define MWU_NMIENSET_PREGION0RA_Disabled   (0UL)

Read: Disabled

Definition at line 2997 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_PREGION0RA_Enabled

#define MWU_NMIENSET_PREGION0RA_Enabled   (1UL)

Read: Enabled

Definition at line 2998 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_PREGION0RA_Msk

#define MWU_NMIENSET_PREGION0RA_Msk   (0x1UL << MWU_NMIENSET_PREGION0RA_Pos)

Bit mask of PREGION0RA field.

Definition at line 2996 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_PREGION0RA_Pos

#define MWU_NMIENSET_PREGION0RA_Pos   (25UL)

Position of PREGION0RA field.

Definition at line 2995 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_PREGION0RA_Set

#define MWU_NMIENSET_PREGION0RA_Set   (1UL)

Enable

Definition at line 2999 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_PREGION0WA_Disabled

#define MWU_NMIENSET_PREGION0WA_Disabled   (0UL)

Read: Disabled

Definition at line 3004 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_PREGION0WA_Enabled

#define MWU_NMIENSET_PREGION0WA_Enabled   (1UL)

Read: Enabled

Definition at line 3005 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_PREGION0WA_Msk

#define MWU_NMIENSET_PREGION0WA_Msk   (0x1UL << MWU_NMIENSET_PREGION0WA_Pos)

Bit mask of PREGION0WA field.

Definition at line 3003 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_PREGION0WA_Pos

#define MWU_NMIENSET_PREGION0WA_Pos   (24UL)

Position of PREGION0WA field.

Definition at line 3002 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_PREGION0WA_Set

#define MWU_NMIENSET_PREGION0WA_Set   (1UL)

Enable

Definition at line 3006 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_PREGION1RA_Disabled

#define MWU_NMIENSET_PREGION1RA_Disabled   (0UL)

Read: Disabled

Definition at line 2983 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_PREGION1RA_Enabled

#define MWU_NMIENSET_PREGION1RA_Enabled   (1UL)

Read: Enabled

Definition at line 2984 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_PREGION1RA_Msk

#define MWU_NMIENSET_PREGION1RA_Msk   (0x1UL << MWU_NMIENSET_PREGION1RA_Pos)

Bit mask of PREGION1RA field.

Definition at line 2982 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_PREGION1RA_Pos

#define MWU_NMIENSET_PREGION1RA_Pos   (27UL)

Position of PREGION1RA field.

Definition at line 2981 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_PREGION1RA_Set

#define MWU_NMIENSET_PREGION1RA_Set   (1UL)

Enable

Definition at line 2985 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_PREGION1WA_Disabled

#define MWU_NMIENSET_PREGION1WA_Disabled   (0UL)

Read: Disabled

Definition at line 2990 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_PREGION1WA_Enabled

#define MWU_NMIENSET_PREGION1WA_Enabled   (1UL)

Read: Enabled

Definition at line 2991 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_PREGION1WA_Msk

#define MWU_NMIENSET_PREGION1WA_Msk   (0x1UL << MWU_NMIENSET_PREGION1WA_Pos)

Bit mask of PREGION1WA field.

Definition at line 2989 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_PREGION1WA_Pos

#define MWU_NMIENSET_PREGION1WA_Pos   (26UL)

Position of PREGION1WA field.

Definition at line 2988 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_PREGION1WA_Set

#define MWU_NMIENSET_PREGION1WA_Set   (1UL)

Enable

Definition at line 2992 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION0RA_Disabled

#define MWU_NMIENSET_REGION0RA_Disabled   (0UL)

Read: Disabled

Definition at line 3053 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION0RA_Enabled

#define MWU_NMIENSET_REGION0RA_Enabled   (1UL)

Read: Enabled

Definition at line 3054 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION0RA_Msk

#define MWU_NMIENSET_REGION0RA_Msk   (0x1UL << MWU_NMIENSET_REGION0RA_Pos)

Bit mask of REGION0RA field.

Definition at line 3052 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION0RA_Pos

#define MWU_NMIENSET_REGION0RA_Pos   (1UL)

Position of REGION0RA field.

Definition at line 3051 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION0RA_Set

#define MWU_NMIENSET_REGION0RA_Set   (1UL)

Enable

Definition at line 3055 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION0WA_Disabled

#define MWU_NMIENSET_REGION0WA_Disabled   (0UL)

Read: Disabled

Definition at line 3060 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION0WA_Enabled

#define MWU_NMIENSET_REGION0WA_Enabled   (1UL)

Read: Enabled

Definition at line 3061 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION0WA_Msk

#define MWU_NMIENSET_REGION0WA_Msk   (0x1UL << MWU_NMIENSET_REGION0WA_Pos)

Bit mask of REGION0WA field.

Definition at line 3059 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION0WA_Pos

#define MWU_NMIENSET_REGION0WA_Pos   (0UL)

Position of REGION0WA field.

Definition at line 3058 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION0WA_Set

#define MWU_NMIENSET_REGION0WA_Set   (1UL)

Enable

Definition at line 3062 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION1RA_Disabled

#define MWU_NMIENSET_REGION1RA_Disabled   (0UL)

Read: Disabled

Definition at line 3039 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION1RA_Enabled

#define MWU_NMIENSET_REGION1RA_Enabled   (1UL)

Read: Enabled

Definition at line 3040 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION1RA_Msk

#define MWU_NMIENSET_REGION1RA_Msk   (0x1UL << MWU_NMIENSET_REGION1RA_Pos)

Bit mask of REGION1RA field.

Definition at line 3038 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION1RA_Pos

#define MWU_NMIENSET_REGION1RA_Pos   (3UL)

Position of REGION1RA field.

Definition at line 3037 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION1RA_Set

#define MWU_NMIENSET_REGION1RA_Set   (1UL)

Enable

Definition at line 3041 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION1WA_Disabled

#define MWU_NMIENSET_REGION1WA_Disabled   (0UL)

Read: Disabled

Definition at line 3046 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION1WA_Enabled

#define MWU_NMIENSET_REGION1WA_Enabled   (1UL)

Read: Enabled

Definition at line 3047 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION1WA_Msk

#define MWU_NMIENSET_REGION1WA_Msk   (0x1UL << MWU_NMIENSET_REGION1WA_Pos)

Bit mask of REGION1WA field.

Definition at line 3045 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION1WA_Pos

#define MWU_NMIENSET_REGION1WA_Pos   (2UL)

Position of REGION1WA field.

Definition at line 3044 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION1WA_Set

#define MWU_NMIENSET_REGION1WA_Set   (1UL)

Enable

Definition at line 3048 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION2RA_Disabled

#define MWU_NMIENSET_REGION2RA_Disabled   (0UL)

Read: Disabled

Definition at line 3025 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION2RA_Enabled

#define MWU_NMIENSET_REGION2RA_Enabled   (1UL)

Read: Enabled

Definition at line 3026 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION2RA_Msk

#define MWU_NMIENSET_REGION2RA_Msk   (0x1UL << MWU_NMIENSET_REGION2RA_Pos)

Bit mask of REGION2RA field.

Definition at line 3024 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION2RA_Pos

#define MWU_NMIENSET_REGION2RA_Pos   (5UL)

Position of REGION2RA field.

Definition at line 3023 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION2RA_Set

#define MWU_NMIENSET_REGION2RA_Set   (1UL)

Enable

Definition at line 3027 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION2WA_Disabled

#define MWU_NMIENSET_REGION2WA_Disabled   (0UL)

Read: Disabled

Definition at line 3032 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION2WA_Enabled

#define MWU_NMIENSET_REGION2WA_Enabled   (1UL)

Read: Enabled

Definition at line 3033 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION2WA_Msk

#define MWU_NMIENSET_REGION2WA_Msk   (0x1UL << MWU_NMIENSET_REGION2WA_Pos)

Bit mask of REGION2WA field.

Definition at line 3031 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION2WA_Pos

#define MWU_NMIENSET_REGION2WA_Pos   (4UL)

Position of REGION2WA field.

Definition at line 3030 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION2WA_Set

#define MWU_NMIENSET_REGION2WA_Set   (1UL)

Enable

Definition at line 3034 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION3RA_Disabled

#define MWU_NMIENSET_REGION3RA_Disabled   (0UL)

Read: Disabled

Definition at line 3011 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION3RA_Enabled

#define MWU_NMIENSET_REGION3RA_Enabled   (1UL)

Read: Enabled

Definition at line 3012 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION3RA_Msk

#define MWU_NMIENSET_REGION3RA_Msk   (0x1UL << MWU_NMIENSET_REGION3RA_Pos)

Bit mask of REGION3RA field.

Definition at line 3010 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION3RA_Pos

#define MWU_NMIENSET_REGION3RA_Pos   (7UL)

Position of REGION3RA field.

Definition at line 3009 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION3RA_Set

#define MWU_NMIENSET_REGION3RA_Set   (1UL)

Enable

Definition at line 3013 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION3WA_Disabled

#define MWU_NMIENSET_REGION3WA_Disabled   (0UL)

Read: Disabled

Definition at line 3018 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION3WA_Enabled

#define MWU_NMIENSET_REGION3WA_Enabled   (1UL)

Read: Enabled

Definition at line 3019 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION3WA_Msk

#define MWU_NMIENSET_REGION3WA_Msk   (0x1UL << MWU_NMIENSET_REGION3WA_Pos)

Bit mask of REGION3WA field.

Definition at line 3017 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION3WA_Pos

#define MWU_NMIENSET_REGION3WA_Pos   (6UL)

Position of REGION3WA field.

Definition at line 3016 of file nrf52_bitfields.h.

◆ MWU_NMIENSET_REGION3WA_Set

#define MWU_NMIENSET_REGION3WA_Set   (1UL)

Enable

Definition at line 3020 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR0_Access

#define MWU_PERREGION_SUBSTATRA_SR0_Access   (1UL)

Read access(es) occurred in this subregion

Definition at line 3539 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR0_Msk

#define MWU_PERREGION_SUBSTATRA_SR0_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR0_Pos)

Bit mask of SR0 field.

Definition at line 3537 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR0_NoAccess

#define MWU_PERREGION_SUBSTATRA_SR0_NoAccess   (0UL)

No read access occurred in this subregion

Definition at line 3538 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR0_Pos

#define MWU_PERREGION_SUBSTATRA_SR0_Pos   (0UL)

Position of SR0 field.

Definition at line 3536 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR10_Access

#define MWU_PERREGION_SUBSTATRA_SR10_Access   (1UL)

Read access(es) occurred in this subregion

Definition at line 3479 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR10_Msk

#define MWU_PERREGION_SUBSTATRA_SR10_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR10_Pos)

Bit mask of SR10 field.

Definition at line 3477 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR10_NoAccess

#define MWU_PERREGION_SUBSTATRA_SR10_NoAccess   (0UL)

No read access occurred in this subregion

Definition at line 3478 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR10_Pos

#define MWU_PERREGION_SUBSTATRA_SR10_Pos   (10UL)

Position of SR10 field.

Definition at line 3476 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR11_Access

#define MWU_PERREGION_SUBSTATRA_SR11_Access   (1UL)

Read access(es) occurred in this subregion

Definition at line 3473 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR11_Msk

#define MWU_PERREGION_SUBSTATRA_SR11_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR11_Pos)

Bit mask of SR11 field.

Definition at line 3471 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR11_NoAccess

#define MWU_PERREGION_SUBSTATRA_SR11_NoAccess   (0UL)

No read access occurred in this subregion

Definition at line 3472 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR11_Pos

#define MWU_PERREGION_SUBSTATRA_SR11_Pos   (11UL)

Position of SR11 field.

Definition at line 3470 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR12_Access

#define MWU_PERREGION_SUBSTATRA_SR12_Access   (1UL)

Read access(es) occurred in this subregion

Definition at line 3467 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR12_Msk

#define MWU_PERREGION_SUBSTATRA_SR12_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR12_Pos)

Bit mask of SR12 field.

Definition at line 3465 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR12_NoAccess

#define MWU_PERREGION_SUBSTATRA_SR12_NoAccess   (0UL)

No read access occurred in this subregion

Definition at line 3466 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR12_Pos

#define MWU_PERREGION_SUBSTATRA_SR12_Pos   (12UL)

Position of SR12 field.

Definition at line 3464 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR13_Access

#define MWU_PERREGION_SUBSTATRA_SR13_Access   (1UL)

Read access(es) occurred in this subregion

Definition at line 3461 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR13_Msk

#define MWU_PERREGION_SUBSTATRA_SR13_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR13_Pos)

Bit mask of SR13 field.

Definition at line 3459 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR13_NoAccess

#define MWU_PERREGION_SUBSTATRA_SR13_NoAccess   (0UL)

No read access occurred in this subregion

Definition at line 3460 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR13_Pos

#define MWU_PERREGION_SUBSTATRA_SR13_Pos   (13UL)

Position of SR13 field.

Definition at line 3458 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR14_Access

#define MWU_PERREGION_SUBSTATRA_SR14_Access   (1UL)

Read access(es) occurred in this subregion

Definition at line 3455 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR14_Msk

#define MWU_PERREGION_SUBSTATRA_SR14_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR14_Pos)

Bit mask of SR14 field.

Definition at line 3453 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR14_NoAccess

#define MWU_PERREGION_SUBSTATRA_SR14_NoAccess   (0UL)

No read access occurred in this subregion

Definition at line 3454 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR14_Pos

#define MWU_PERREGION_SUBSTATRA_SR14_Pos   (14UL)

Position of SR14 field.

Definition at line 3452 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR15_Access

#define MWU_PERREGION_SUBSTATRA_SR15_Access   (1UL)

Read access(es) occurred in this subregion

Definition at line 3449 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR15_Msk

#define MWU_PERREGION_SUBSTATRA_SR15_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR15_Pos)

Bit mask of SR15 field.

Definition at line 3447 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR15_NoAccess

#define MWU_PERREGION_SUBSTATRA_SR15_NoAccess   (0UL)

No read access occurred in this subregion

Definition at line 3448 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR15_Pos

#define MWU_PERREGION_SUBSTATRA_SR15_Pos   (15UL)

Position of SR15 field.

Definition at line 3446 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR16_Access

#define MWU_PERREGION_SUBSTATRA_SR16_Access   (1UL)

Read access(es) occurred in this subregion

Definition at line 3443 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR16_Msk

#define MWU_PERREGION_SUBSTATRA_SR16_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR16_Pos)

Bit mask of SR16 field.

Definition at line 3441 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR16_NoAccess

#define MWU_PERREGION_SUBSTATRA_SR16_NoAccess   (0UL)

No read access occurred in this subregion

Definition at line 3442 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR16_Pos

#define MWU_PERREGION_SUBSTATRA_SR16_Pos   (16UL)

Position of SR16 field.

Definition at line 3440 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR17_Access

#define MWU_PERREGION_SUBSTATRA_SR17_Access   (1UL)

Read access(es) occurred in this subregion

Definition at line 3437 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR17_Msk

#define MWU_PERREGION_SUBSTATRA_SR17_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR17_Pos)

Bit mask of SR17 field.

Definition at line 3435 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR17_NoAccess

#define MWU_PERREGION_SUBSTATRA_SR17_NoAccess   (0UL)

No read access occurred in this subregion

Definition at line 3436 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR17_Pos

#define MWU_PERREGION_SUBSTATRA_SR17_Pos   (17UL)

Position of SR17 field.

Definition at line 3434 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR18_Access

#define MWU_PERREGION_SUBSTATRA_SR18_Access   (1UL)

Read access(es) occurred in this subregion

Definition at line 3431 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR18_Msk

#define MWU_PERREGION_SUBSTATRA_SR18_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR18_Pos)

Bit mask of SR18 field.

Definition at line 3429 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR18_NoAccess

#define MWU_PERREGION_SUBSTATRA_SR18_NoAccess   (0UL)

No read access occurred in this subregion

Definition at line 3430 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR18_Pos

#define MWU_PERREGION_SUBSTATRA_SR18_Pos   (18UL)

Position of SR18 field.

Definition at line 3428 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR19_Access

#define MWU_PERREGION_SUBSTATRA_SR19_Access   (1UL)

Read access(es) occurred in this subregion

Definition at line 3425 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR19_Msk

#define MWU_PERREGION_SUBSTATRA_SR19_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR19_Pos)

Bit mask of SR19 field.

Definition at line 3423 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR19_NoAccess

#define MWU_PERREGION_SUBSTATRA_SR19_NoAccess   (0UL)

No read access occurred in this subregion

Definition at line 3424 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR19_Pos

#define MWU_PERREGION_SUBSTATRA_SR19_Pos   (19UL)

Position of SR19 field.

Definition at line 3422 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR1_Access

#define MWU_PERREGION_SUBSTATRA_SR1_Access   (1UL)

Read access(es) occurred in this subregion

Definition at line 3533 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR1_Msk

#define MWU_PERREGION_SUBSTATRA_SR1_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR1_Pos)

Bit mask of SR1 field.

Definition at line 3531 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR1_NoAccess

#define MWU_PERREGION_SUBSTATRA_SR1_NoAccess   (0UL)

No read access occurred in this subregion

Definition at line 3532 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR1_Pos

#define MWU_PERREGION_SUBSTATRA_SR1_Pos   (1UL)

Position of SR1 field.

Definition at line 3530 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR20_Access

#define MWU_PERREGION_SUBSTATRA_SR20_Access   (1UL)

Read access(es) occurred in this subregion

Definition at line 3419 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR20_Msk

#define MWU_PERREGION_SUBSTATRA_SR20_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR20_Pos)

Bit mask of SR20 field.

Definition at line 3417 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR20_NoAccess

#define MWU_PERREGION_SUBSTATRA_SR20_NoAccess   (0UL)

No read access occurred in this subregion

Definition at line 3418 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR20_Pos

#define MWU_PERREGION_SUBSTATRA_SR20_Pos   (20UL)

Position of SR20 field.

Definition at line 3416 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR21_Access

#define MWU_PERREGION_SUBSTATRA_SR21_Access   (1UL)

Read access(es) occurred in this subregion

Definition at line 3413 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR21_Msk

#define MWU_PERREGION_SUBSTATRA_SR21_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR21_Pos)

Bit mask of SR21 field.

Definition at line 3411 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR21_NoAccess

#define MWU_PERREGION_SUBSTATRA_SR21_NoAccess   (0UL)

No read access occurred in this subregion

Definition at line 3412 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR21_Pos

#define MWU_PERREGION_SUBSTATRA_SR21_Pos   (21UL)

Position of SR21 field.

Definition at line 3410 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR22_Access

#define MWU_PERREGION_SUBSTATRA_SR22_Access   (1UL)

Read access(es) occurred in this subregion

Definition at line 3407 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR22_Msk

#define MWU_PERREGION_SUBSTATRA_SR22_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR22_Pos)

Bit mask of SR22 field.

Definition at line 3405 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR22_NoAccess

#define MWU_PERREGION_SUBSTATRA_SR22_NoAccess   (0UL)

No read access occurred in this subregion

Definition at line 3406 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR22_Pos

#define MWU_PERREGION_SUBSTATRA_SR22_Pos   (22UL)

Position of SR22 field.

Definition at line 3404 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR23_Access

#define MWU_PERREGION_SUBSTATRA_SR23_Access   (1UL)

Read access(es) occurred in this subregion

Definition at line 3401 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR23_Msk

#define MWU_PERREGION_SUBSTATRA_SR23_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR23_Pos)

Bit mask of SR23 field.

Definition at line 3399 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR23_NoAccess

#define MWU_PERREGION_SUBSTATRA_SR23_NoAccess   (0UL)

No read access occurred in this subregion

Definition at line 3400 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR23_Pos

#define MWU_PERREGION_SUBSTATRA_SR23_Pos   (23UL)

Position of SR23 field.

Definition at line 3398 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR24_Access

#define MWU_PERREGION_SUBSTATRA_SR24_Access   (1UL)

Read access(es) occurred in this subregion

Definition at line 3395 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR24_Msk

#define MWU_PERREGION_SUBSTATRA_SR24_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR24_Pos)

Bit mask of SR24 field.

Definition at line 3393 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR24_NoAccess

#define MWU_PERREGION_SUBSTATRA_SR24_NoAccess   (0UL)

No read access occurred in this subregion

Definition at line 3394 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR24_Pos

#define MWU_PERREGION_SUBSTATRA_SR24_Pos   (24UL)

Position of SR24 field.

Definition at line 3392 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR25_Access

#define MWU_PERREGION_SUBSTATRA_SR25_Access   (1UL)

Read access(es) occurred in this subregion

Definition at line 3389 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR25_Msk

#define MWU_PERREGION_SUBSTATRA_SR25_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR25_Pos)

Bit mask of SR25 field.

Definition at line 3387 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR25_NoAccess

#define MWU_PERREGION_SUBSTATRA_SR25_NoAccess   (0UL)

No read access occurred in this subregion

Definition at line 3388 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR25_Pos

#define MWU_PERREGION_SUBSTATRA_SR25_Pos   (25UL)

Position of SR25 field.

Definition at line 3386 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR26_Access

#define MWU_PERREGION_SUBSTATRA_SR26_Access   (1UL)

Read access(es) occurred in this subregion

Definition at line 3383 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR26_Msk

#define MWU_PERREGION_SUBSTATRA_SR26_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR26_Pos)

Bit mask of SR26 field.

Definition at line 3381 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR26_NoAccess

#define MWU_PERREGION_SUBSTATRA_SR26_NoAccess   (0UL)

No read access occurred in this subregion

Definition at line 3382 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR26_Pos

#define MWU_PERREGION_SUBSTATRA_SR26_Pos   (26UL)

Position of SR26 field.

Definition at line 3380 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR27_Access

#define MWU_PERREGION_SUBSTATRA_SR27_Access   (1UL)

Read access(es) occurred in this subregion

Definition at line 3377 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR27_Msk

#define MWU_PERREGION_SUBSTATRA_SR27_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR27_Pos)

Bit mask of SR27 field.

Definition at line 3375 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR27_NoAccess

#define MWU_PERREGION_SUBSTATRA_SR27_NoAccess   (0UL)

No read access occurred in this subregion

Definition at line 3376 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR27_Pos

#define MWU_PERREGION_SUBSTATRA_SR27_Pos   (27UL)

Position of SR27 field.

Definition at line 3374 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR28_Access

#define MWU_PERREGION_SUBSTATRA_SR28_Access   (1UL)

Read access(es) occurred in this subregion

Definition at line 3371 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR28_Msk

#define MWU_PERREGION_SUBSTATRA_SR28_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR28_Pos)

Bit mask of SR28 field.

Definition at line 3369 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR28_NoAccess

#define MWU_PERREGION_SUBSTATRA_SR28_NoAccess   (0UL)

No read access occurred in this subregion

Definition at line 3370 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR28_Pos

#define MWU_PERREGION_SUBSTATRA_SR28_Pos   (28UL)

Position of SR28 field.

Definition at line 3368 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR29_Access

#define MWU_PERREGION_SUBSTATRA_SR29_Access   (1UL)

Read access(es) occurred in this subregion

Definition at line 3365 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR29_Msk

#define MWU_PERREGION_SUBSTATRA_SR29_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR29_Pos)

Bit mask of SR29 field.

Definition at line 3363 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR29_NoAccess

#define MWU_PERREGION_SUBSTATRA_SR29_NoAccess   (0UL)

No read access occurred in this subregion

Definition at line 3364 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR29_Pos

#define MWU_PERREGION_SUBSTATRA_SR29_Pos   (29UL)

Position of SR29 field.

Definition at line 3362 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR2_Access

#define MWU_PERREGION_SUBSTATRA_SR2_Access   (1UL)

Read access(es) occurred in this subregion

Definition at line 3527 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR2_Msk

#define MWU_PERREGION_SUBSTATRA_SR2_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR2_Pos)

Bit mask of SR2 field.

Definition at line 3525 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR2_NoAccess

#define MWU_PERREGION_SUBSTATRA_SR2_NoAccess   (0UL)

No read access occurred in this subregion

Definition at line 3526 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR2_Pos

#define MWU_PERREGION_SUBSTATRA_SR2_Pos   (2UL)

Position of SR2 field.

Definition at line 3524 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR30_Access

#define MWU_PERREGION_SUBSTATRA_SR30_Access   (1UL)

Read access(es) occurred in this subregion

Definition at line 3359 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR30_Msk

#define MWU_PERREGION_SUBSTATRA_SR30_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR30_Pos)

Bit mask of SR30 field.

Definition at line 3357 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR30_NoAccess

#define MWU_PERREGION_SUBSTATRA_SR30_NoAccess   (0UL)

No read access occurred in this subregion

Definition at line 3358 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR30_Pos

#define MWU_PERREGION_SUBSTATRA_SR30_Pos   (30UL)

Position of SR30 field.

Definition at line 3356 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR31_Access

#define MWU_PERREGION_SUBSTATRA_SR31_Access   (1UL)

Read access(es) occurred in this subregion

Definition at line 3353 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR31_Msk

#define MWU_PERREGION_SUBSTATRA_SR31_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR31_Pos)

Bit mask of SR31 field.

Definition at line 3351 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR31_NoAccess

#define MWU_PERREGION_SUBSTATRA_SR31_NoAccess   (0UL)

No read access occurred in this subregion

Definition at line 3352 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR31_Pos

#define MWU_PERREGION_SUBSTATRA_SR31_Pos   (31UL)

Position of SR31 field.

Definition at line 3350 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR3_Access

#define MWU_PERREGION_SUBSTATRA_SR3_Access   (1UL)

Read access(es) occurred in this subregion

Definition at line 3521 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR3_Msk

#define MWU_PERREGION_SUBSTATRA_SR3_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR3_Pos)

Bit mask of SR3 field.

Definition at line 3519 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR3_NoAccess

#define MWU_PERREGION_SUBSTATRA_SR3_NoAccess   (0UL)

No read access occurred in this subregion

Definition at line 3520 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR3_Pos

#define MWU_PERREGION_SUBSTATRA_SR3_Pos   (3UL)

Position of SR3 field.

Definition at line 3518 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR4_Access

#define MWU_PERREGION_SUBSTATRA_SR4_Access   (1UL)

Read access(es) occurred in this subregion

Definition at line 3515 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR4_Msk

#define MWU_PERREGION_SUBSTATRA_SR4_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR4_Pos)

Bit mask of SR4 field.

Definition at line 3513 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR4_NoAccess

#define MWU_PERREGION_SUBSTATRA_SR4_NoAccess   (0UL)

No read access occurred in this subregion

Definition at line 3514 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR4_Pos

#define MWU_PERREGION_SUBSTATRA_SR4_Pos   (4UL)

Position of SR4 field.

Definition at line 3512 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR5_Access

#define MWU_PERREGION_SUBSTATRA_SR5_Access   (1UL)

Read access(es) occurred in this subregion

Definition at line 3509 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR5_Msk

#define MWU_PERREGION_SUBSTATRA_SR5_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR5_Pos)

Bit mask of SR5 field.

Definition at line 3507 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR5_NoAccess

#define MWU_PERREGION_SUBSTATRA_SR5_NoAccess   (0UL)

No read access occurred in this subregion

Definition at line 3508 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR5_Pos

#define MWU_PERREGION_SUBSTATRA_SR5_Pos   (5UL)

Position of SR5 field.

Definition at line 3506 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR6_Access

#define MWU_PERREGION_SUBSTATRA_SR6_Access   (1UL)

Read access(es) occurred in this subregion

Definition at line 3503 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR6_Msk

#define MWU_PERREGION_SUBSTATRA_SR6_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR6_Pos)

Bit mask of SR6 field.

Definition at line 3501 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR6_NoAccess

#define MWU_PERREGION_SUBSTATRA_SR6_NoAccess   (0UL)

No read access occurred in this subregion

Definition at line 3502 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR6_Pos

#define MWU_PERREGION_SUBSTATRA_SR6_Pos   (6UL)

Position of SR6 field.

Definition at line 3500 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR7_Access

#define MWU_PERREGION_SUBSTATRA_SR7_Access   (1UL)

Read access(es) occurred in this subregion

Definition at line 3497 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR7_Msk

#define MWU_PERREGION_SUBSTATRA_SR7_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR7_Pos)

Bit mask of SR7 field.

Definition at line 3495 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR7_NoAccess

#define MWU_PERREGION_SUBSTATRA_SR7_NoAccess   (0UL)

No read access occurred in this subregion

Definition at line 3496 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR7_Pos

#define MWU_PERREGION_SUBSTATRA_SR7_Pos   (7UL)

Position of SR7 field.

Definition at line 3494 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR8_Access

#define MWU_PERREGION_SUBSTATRA_SR8_Access   (1UL)

Read access(es) occurred in this subregion

Definition at line 3491 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR8_Msk

#define MWU_PERREGION_SUBSTATRA_SR8_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR8_Pos)

Bit mask of SR8 field.

Definition at line 3489 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR8_NoAccess

#define MWU_PERREGION_SUBSTATRA_SR8_NoAccess   (0UL)

No read access occurred in this subregion

Definition at line 3490 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR8_Pos

#define MWU_PERREGION_SUBSTATRA_SR8_Pos   (8UL)

Position of SR8 field.

Definition at line 3488 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR9_Access

#define MWU_PERREGION_SUBSTATRA_SR9_Access   (1UL)

Read access(es) occurred in this subregion

Definition at line 3485 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR9_Msk

#define MWU_PERREGION_SUBSTATRA_SR9_Msk   (0x1UL << MWU_PERREGION_SUBSTATRA_SR9_Pos)

Bit mask of SR9 field.

Definition at line 3483 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR9_NoAccess

#define MWU_PERREGION_SUBSTATRA_SR9_NoAccess   (0UL)

No read access occurred in this subregion

Definition at line 3484 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATRA_SR9_Pos

#define MWU_PERREGION_SUBSTATRA_SR9_Pos   (9UL)

Position of SR9 field.

Definition at line 3482 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR0_Access

#define MWU_PERREGION_SUBSTATWA_SR0_Access   (1UL)

Write access(es) occurred in this subregion

Definition at line 3344 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR0_Msk

#define MWU_PERREGION_SUBSTATWA_SR0_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR0_Pos)

Bit mask of SR0 field.

Definition at line 3342 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR0_NoAccess

#define MWU_PERREGION_SUBSTATWA_SR0_NoAccess   (0UL)

No write access occurred in this subregion

Definition at line 3343 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR0_Pos

#define MWU_PERREGION_SUBSTATWA_SR0_Pos   (0UL)

Position of SR0 field.

Definition at line 3341 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR10_Access

#define MWU_PERREGION_SUBSTATWA_SR10_Access   (1UL)

Write access(es) occurred in this subregion

Definition at line 3284 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR10_Msk

#define MWU_PERREGION_SUBSTATWA_SR10_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR10_Pos)

Bit mask of SR10 field.

Definition at line 3282 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR10_NoAccess

#define MWU_PERREGION_SUBSTATWA_SR10_NoAccess   (0UL)

No write access occurred in this subregion

Definition at line 3283 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR10_Pos

#define MWU_PERREGION_SUBSTATWA_SR10_Pos   (10UL)

Position of SR10 field.

Definition at line 3281 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR11_Access

#define MWU_PERREGION_SUBSTATWA_SR11_Access   (1UL)

Write access(es) occurred in this subregion

Definition at line 3278 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR11_Msk

#define MWU_PERREGION_SUBSTATWA_SR11_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR11_Pos)

Bit mask of SR11 field.

Definition at line 3276 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR11_NoAccess

#define MWU_PERREGION_SUBSTATWA_SR11_NoAccess   (0UL)

No write access occurred in this subregion

Definition at line 3277 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR11_Pos

#define MWU_PERREGION_SUBSTATWA_SR11_Pos   (11UL)

Position of SR11 field.

Definition at line 3275 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR12_Access

#define MWU_PERREGION_SUBSTATWA_SR12_Access   (1UL)

Write access(es) occurred in this subregion

Definition at line 3272 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR12_Msk

#define MWU_PERREGION_SUBSTATWA_SR12_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR12_Pos)

Bit mask of SR12 field.

Definition at line 3270 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR12_NoAccess

#define MWU_PERREGION_SUBSTATWA_SR12_NoAccess   (0UL)

No write access occurred in this subregion

Definition at line 3271 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR12_Pos

#define MWU_PERREGION_SUBSTATWA_SR12_Pos   (12UL)

Position of SR12 field.

Definition at line 3269 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR13_Access

#define MWU_PERREGION_SUBSTATWA_SR13_Access   (1UL)

Write access(es) occurred in this subregion

Definition at line 3266 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR13_Msk

#define MWU_PERREGION_SUBSTATWA_SR13_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR13_Pos)

Bit mask of SR13 field.

Definition at line 3264 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR13_NoAccess

#define MWU_PERREGION_SUBSTATWA_SR13_NoAccess   (0UL)

No write access occurred in this subregion

Definition at line 3265 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR13_Pos

#define MWU_PERREGION_SUBSTATWA_SR13_Pos   (13UL)

Position of SR13 field.

Definition at line 3263 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR14_Access

#define MWU_PERREGION_SUBSTATWA_SR14_Access   (1UL)

Write access(es) occurred in this subregion

Definition at line 3260 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR14_Msk

#define MWU_PERREGION_SUBSTATWA_SR14_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR14_Pos)

Bit mask of SR14 field.

Definition at line 3258 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR14_NoAccess

#define MWU_PERREGION_SUBSTATWA_SR14_NoAccess   (0UL)

No write access occurred in this subregion

Definition at line 3259 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR14_Pos

#define MWU_PERREGION_SUBSTATWA_SR14_Pos   (14UL)

Position of SR14 field.

Definition at line 3257 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR15_Access

#define MWU_PERREGION_SUBSTATWA_SR15_Access   (1UL)

Write access(es) occurred in this subregion

Definition at line 3254 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR15_Msk

#define MWU_PERREGION_SUBSTATWA_SR15_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR15_Pos)

Bit mask of SR15 field.

Definition at line 3252 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR15_NoAccess

#define MWU_PERREGION_SUBSTATWA_SR15_NoAccess   (0UL)

No write access occurred in this subregion

Definition at line 3253 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR15_Pos

#define MWU_PERREGION_SUBSTATWA_SR15_Pos   (15UL)

Position of SR15 field.

Definition at line 3251 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR16_Access

#define MWU_PERREGION_SUBSTATWA_SR16_Access   (1UL)

Write access(es) occurred in this subregion

Definition at line 3248 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR16_Msk

#define MWU_PERREGION_SUBSTATWA_SR16_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR16_Pos)

Bit mask of SR16 field.

Definition at line 3246 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR16_NoAccess

#define MWU_PERREGION_SUBSTATWA_SR16_NoAccess   (0UL)

No write access occurred in this subregion

Definition at line 3247 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR16_Pos

#define MWU_PERREGION_SUBSTATWA_SR16_Pos   (16UL)

Position of SR16 field.

Definition at line 3245 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR17_Access

#define MWU_PERREGION_SUBSTATWA_SR17_Access   (1UL)

Write access(es) occurred in this subregion

Definition at line 3242 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR17_Msk

#define MWU_PERREGION_SUBSTATWA_SR17_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR17_Pos)

Bit mask of SR17 field.

Definition at line 3240 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR17_NoAccess

#define MWU_PERREGION_SUBSTATWA_SR17_NoAccess   (0UL)

No write access occurred in this subregion

Definition at line 3241 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR17_Pos

#define MWU_PERREGION_SUBSTATWA_SR17_Pos   (17UL)

Position of SR17 field.

Definition at line 3239 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR18_Access

#define MWU_PERREGION_SUBSTATWA_SR18_Access   (1UL)

Write access(es) occurred in this subregion

Definition at line 3236 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR18_Msk

#define MWU_PERREGION_SUBSTATWA_SR18_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR18_Pos)

Bit mask of SR18 field.

Definition at line 3234 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR18_NoAccess

#define MWU_PERREGION_SUBSTATWA_SR18_NoAccess   (0UL)

No write access occurred in this subregion

Definition at line 3235 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR18_Pos

#define MWU_PERREGION_SUBSTATWA_SR18_Pos   (18UL)

Position of SR18 field.

Definition at line 3233 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR19_Access

#define MWU_PERREGION_SUBSTATWA_SR19_Access   (1UL)

Write access(es) occurred in this subregion

Definition at line 3230 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR19_Msk

#define MWU_PERREGION_SUBSTATWA_SR19_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR19_Pos)

Bit mask of SR19 field.

Definition at line 3228 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR19_NoAccess

#define MWU_PERREGION_SUBSTATWA_SR19_NoAccess   (0UL)

No write access occurred in this subregion

Definition at line 3229 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR19_Pos

#define MWU_PERREGION_SUBSTATWA_SR19_Pos   (19UL)

Position of SR19 field.

Definition at line 3227 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR1_Access

#define MWU_PERREGION_SUBSTATWA_SR1_Access   (1UL)

Write access(es) occurred in this subregion

Definition at line 3338 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR1_Msk

#define MWU_PERREGION_SUBSTATWA_SR1_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR1_Pos)

Bit mask of SR1 field.

Definition at line 3336 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR1_NoAccess

#define MWU_PERREGION_SUBSTATWA_SR1_NoAccess   (0UL)

No write access occurred in this subregion

Definition at line 3337 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR1_Pos

#define MWU_PERREGION_SUBSTATWA_SR1_Pos   (1UL)

Position of SR1 field.

Definition at line 3335 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR20_Access

#define MWU_PERREGION_SUBSTATWA_SR20_Access   (1UL)

Write access(es) occurred in this subregion

Definition at line 3224 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR20_Msk

#define MWU_PERREGION_SUBSTATWA_SR20_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR20_Pos)

Bit mask of SR20 field.

Definition at line 3222 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR20_NoAccess

#define MWU_PERREGION_SUBSTATWA_SR20_NoAccess   (0UL)

No write access occurred in this subregion

Definition at line 3223 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR20_Pos

#define MWU_PERREGION_SUBSTATWA_SR20_Pos   (20UL)

Position of SR20 field.

Definition at line 3221 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR21_Access

#define MWU_PERREGION_SUBSTATWA_SR21_Access   (1UL)

Write access(es) occurred in this subregion

Definition at line 3218 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR21_Msk

#define MWU_PERREGION_SUBSTATWA_SR21_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR21_Pos)

Bit mask of SR21 field.

Definition at line 3216 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR21_NoAccess

#define MWU_PERREGION_SUBSTATWA_SR21_NoAccess   (0UL)

No write access occurred in this subregion

Definition at line 3217 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR21_Pos

#define MWU_PERREGION_SUBSTATWA_SR21_Pos   (21UL)

Position of SR21 field.

Definition at line 3215 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR22_Access

#define MWU_PERREGION_SUBSTATWA_SR22_Access   (1UL)

Write access(es) occurred in this subregion

Definition at line 3212 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR22_Msk

#define MWU_PERREGION_SUBSTATWA_SR22_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR22_Pos)

Bit mask of SR22 field.

Definition at line 3210 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR22_NoAccess

#define MWU_PERREGION_SUBSTATWA_SR22_NoAccess   (0UL)

No write access occurred in this subregion

Definition at line 3211 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR22_Pos

#define MWU_PERREGION_SUBSTATWA_SR22_Pos   (22UL)

Position of SR22 field.

Definition at line 3209 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR23_Access

#define MWU_PERREGION_SUBSTATWA_SR23_Access   (1UL)

Write access(es) occurred in this subregion

Definition at line 3206 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR23_Msk

#define MWU_PERREGION_SUBSTATWA_SR23_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR23_Pos)

Bit mask of SR23 field.

Definition at line 3204 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR23_NoAccess

#define MWU_PERREGION_SUBSTATWA_SR23_NoAccess   (0UL)

No write access occurred in this subregion

Definition at line 3205 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR23_Pos

#define MWU_PERREGION_SUBSTATWA_SR23_Pos   (23UL)

Position of SR23 field.

Definition at line 3203 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR24_Access

#define MWU_PERREGION_SUBSTATWA_SR24_Access   (1UL)

Write access(es) occurred in this subregion

Definition at line 3200 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR24_Msk

#define MWU_PERREGION_SUBSTATWA_SR24_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR24_Pos)

Bit mask of SR24 field.

Definition at line 3198 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR24_NoAccess

#define MWU_PERREGION_SUBSTATWA_SR24_NoAccess   (0UL)

No write access occurred in this subregion

Definition at line 3199 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR24_Pos

#define MWU_PERREGION_SUBSTATWA_SR24_Pos   (24UL)

Position of SR24 field.

Definition at line 3197 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR25_Access

#define MWU_PERREGION_SUBSTATWA_SR25_Access   (1UL)

Write access(es) occurred in this subregion

Definition at line 3194 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR25_Msk

#define MWU_PERREGION_SUBSTATWA_SR25_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR25_Pos)

Bit mask of SR25 field.

Definition at line 3192 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR25_NoAccess

#define MWU_PERREGION_SUBSTATWA_SR25_NoAccess   (0UL)

No write access occurred in this subregion

Definition at line 3193 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR25_Pos

#define MWU_PERREGION_SUBSTATWA_SR25_Pos   (25UL)

Position of SR25 field.

Definition at line 3191 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR26_Access

#define MWU_PERREGION_SUBSTATWA_SR26_Access   (1UL)

Write access(es) occurred in this subregion

Definition at line 3188 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR26_Msk

#define MWU_PERREGION_SUBSTATWA_SR26_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR26_Pos)

Bit mask of SR26 field.

Definition at line 3186 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR26_NoAccess

#define MWU_PERREGION_SUBSTATWA_SR26_NoAccess   (0UL)

No write access occurred in this subregion

Definition at line 3187 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR26_Pos

#define MWU_PERREGION_SUBSTATWA_SR26_Pos   (26UL)

Position of SR26 field.

Definition at line 3185 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR27_Access

#define MWU_PERREGION_SUBSTATWA_SR27_Access   (1UL)

Write access(es) occurred in this subregion

Definition at line 3182 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR27_Msk

#define MWU_PERREGION_SUBSTATWA_SR27_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR27_Pos)

Bit mask of SR27 field.

Definition at line 3180 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR27_NoAccess

#define MWU_PERREGION_SUBSTATWA_SR27_NoAccess   (0UL)

No write access occurred in this subregion

Definition at line 3181 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR27_Pos

#define MWU_PERREGION_SUBSTATWA_SR27_Pos   (27UL)

Position of SR27 field.

Definition at line 3179 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR28_Access

#define MWU_PERREGION_SUBSTATWA_SR28_Access   (1UL)

Write access(es) occurred in this subregion

Definition at line 3176 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR28_Msk

#define MWU_PERREGION_SUBSTATWA_SR28_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR28_Pos)

Bit mask of SR28 field.

Definition at line 3174 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR28_NoAccess

#define MWU_PERREGION_SUBSTATWA_SR28_NoAccess   (0UL)

No write access occurred in this subregion

Definition at line 3175 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR28_Pos

#define MWU_PERREGION_SUBSTATWA_SR28_Pos   (28UL)

Position of SR28 field.

Definition at line 3173 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR29_Access

#define MWU_PERREGION_SUBSTATWA_SR29_Access   (1UL)

Write access(es) occurred in this subregion

Definition at line 3170 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR29_Msk

#define MWU_PERREGION_SUBSTATWA_SR29_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR29_Pos)

Bit mask of SR29 field.

Definition at line 3168 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR29_NoAccess

#define MWU_PERREGION_SUBSTATWA_SR29_NoAccess   (0UL)

No write access occurred in this subregion

Definition at line 3169 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR29_Pos

#define MWU_PERREGION_SUBSTATWA_SR29_Pos   (29UL)

Position of SR29 field.

Definition at line 3167 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR2_Access

#define MWU_PERREGION_SUBSTATWA_SR2_Access   (1UL)

Write access(es) occurred in this subregion

Definition at line 3332 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR2_Msk

#define MWU_PERREGION_SUBSTATWA_SR2_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR2_Pos)

Bit mask of SR2 field.

Definition at line 3330 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR2_NoAccess

#define MWU_PERREGION_SUBSTATWA_SR2_NoAccess   (0UL)

No write access occurred in this subregion

Definition at line 3331 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR2_Pos

#define MWU_PERREGION_SUBSTATWA_SR2_Pos   (2UL)

Position of SR2 field.

Definition at line 3329 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR30_Access

#define MWU_PERREGION_SUBSTATWA_SR30_Access   (1UL)

Write access(es) occurred in this subregion

Definition at line 3164 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR30_Msk

#define MWU_PERREGION_SUBSTATWA_SR30_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR30_Pos)

Bit mask of SR30 field.

Definition at line 3162 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR30_NoAccess

#define MWU_PERREGION_SUBSTATWA_SR30_NoAccess   (0UL)

No write access occurred in this subregion

Definition at line 3163 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR30_Pos

#define MWU_PERREGION_SUBSTATWA_SR30_Pos   (30UL)

Position of SR30 field.

Definition at line 3161 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR31_Access

#define MWU_PERREGION_SUBSTATWA_SR31_Access   (1UL)

Write access(es) occurred in this subregion

Definition at line 3158 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR31_Msk

#define MWU_PERREGION_SUBSTATWA_SR31_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR31_Pos)

Bit mask of SR31 field.

Definition at line 3156 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR31_NoAccess

#define MWU_PERREGION_SUBSTATWA_SR31_NoAccess   (0UL)

No write access occurred in this subregion

Definition at line 3157 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR31_Pos

#define MWU_PERREGION_SUBSTATWA_SR31_Pos   (31UL)

Position of SR31 field.

Definition at line 3155 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR3_Access

#define MWU_PERREGION_SUBSTATWA_SR3_Access   (1UL)

Write access(es) occurred in this subregion

Definition at line 3326 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR3_Msk

#define MWU_PERREGION_SUBSTATWA_SR3_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR3_Pos)

Bit mask of SR3 field.

Definition at line 3324 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR3_NoAccess

#define MWU_PERREGION_SUBSTATWA_SR3_NoAccess   (0UL)

No write access occurred in this subregion

Definition at line 3325 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR3_Pos

#define MWU_PERREGION_SUBSTATWA_SR3_Pos   (3UL)

Position of SR3 field.

Definition at line 3323 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR4_Access

#define MWU_PERREGION_SUBSTATWA_SR4_Access   (1UL)

Write access(es) occurred in this subregion

Definition at line 3320 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR4_Msk

#define MWU_PERREGION_SUBSTATWA_SR4_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR4_Pos)

Bit mask of SR4 field.

Definition at line 3318 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR4_NoAccess

#define MWU_PERREGION_SUBSTATWA_SR4_NoAccess   (0UL)

No write access occurred in this subregion

Definition at line 3319 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR4_Pos

#define MWU_PERREGION_SUBSTATWA_SR4_Pos   (4UL)

Position of SR4 field.

Definition at line 3317 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR5_Access

#define MWU_PERREGION_SUBSTATWA_SR5_Access   (1UL)

Write access(es) occurred in this subregion

Definition at line 3314 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR5_Msk

#define MWU_PERREGION_SUBSTATWA_SR5_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR5_Pos)

Bit mask of SR5 field.

Definition at line 3312 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR5_NoAccess

#define MWU_PERREGION_SUBSTATWA_SR5_NoAccess   (0UL)

No write access occurred in this subregion

Definition at line 3313 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR5_Pos

#define MWU_PERREGION_SUBSTATWA_SR5_Pos   (5UL)

Position of SR5 field.

Definition at line 3311 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR6_Access

#define MWU_PERREGION_SUBSTATWA_SR6_Access   (1UL)

Write access(es) occurred in this subregion

Definition at line 3308 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR6_Msk

#define MWU_PERREGION_SUBSTATWA_SR6_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR6_Pos)

Bit mask of SR6 field.

Definition at line 3306 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR6_NoAccess

#define MWU_PERREGION_SUBSTATWA_SR6_NoAccess   (0UL)

No write access occurred in this subregion

Definition at line 3307 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR6_Pos

#define MWU_PERREGION_SUBSTATWA_SR6_Pos   (6UL)

Position of SR6 field.

Definition at line 3305 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR7_Access

#define MWU_PERREGION_SUBSTATWA_SR7_Access   (1UL)

Write access(es) occurred in this subregion

Definition at line 3302 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR7_Msk

#define MWU_PERREGION_SUBSTATWA_SR7_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR7_Pos)

Bit mask of SR7 field.

Definition at line 3300 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR7_NoAccess

#define MWU_PERREGION_SUBSTATWA_SR7_NoAccess   (0UL)

No write access occurred in this subregion

Definition at line 3301 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR7_Pos

#define MWU_PERREGION_SUBSTATWA_SR7_Pos   (7UL)

Position of SR7 field.

Definition at line 3299 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR8_Access

#define MWU_PERREGION_SUBSTATWA_SR8_Access   (1UL)

Write access(es) occurred in this subregion

Definition at line 3296 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR8_Msk

#define MWU_PERREGION_SUBSTATWA_SR8_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR8_Pos)

Bit mask of SR8 field.

Definition at line 3294 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR8_NoAccess

#define MWU_PERREGION_SUBSTATWA_SR8_NoAccess   (0UL)

No write access occurred in this subregion

Definition at line 3295 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR8_Pos

#define MWU_PERREGION_SUBSTATWA_SR8_Pos   (8UL)

Position of SR8 field.

Definition at line 3293 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR9_Access

#define MWU_PERREGION_SUBSTATWA_SR9_Access   (1UL)

Write access(es) occurred in this subregion

Definition at line 3290 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR9_Msk

#define MWU_PERREGION_SUBSTATWA_SR9_Msk   (0x1UL << MWU_PERREGION_SUBSTATWA_SR9_Pos)

Bit mask of SR9 field.

Definition at line 3288 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR9_NoAccess

#define MWU_PERREGION_SUBSTATWA_SR9_NoAccess   (0UL)

No write access occurred in this subregion

Definition at line 3289 of file nrf52_bitfields.h.

◆ MWU_PERREGION_SUBSTATWA_SR9_Pos

#define MWU_PERREGION_SUBSTATWA_SR9_Pos   (9UL)

Position of SR9 field.

Definition at line 3287 of file nrf52_bitfields.h.

◆ MWU_PREGION_END_END_Msk

#define MWU_PREGION_END_END_Msk   (0xFFFFFFFFUL << MWU_PREGION_END_END_Pos)

Bit mask of END field.

Definition at line 3817 of file nrf52_bitfields.h.

◆ MWU_PREGION_END_END_Pos

#define MWU_PREGION_END_END_Pos   (0UL)

Position of END field.

Definition at line 3816 of file nrf52_bitfields.h.

◆ MWU_PREGION_START_START_Msk

#define MWU_PREGION_START_START_Msk   (0xFFFFFFFFUL << MWU_PREGION_START_START_Pos)

Bit mask of START field.

Definition at line 3810 of file nrf52_bitfields.h.

◆ MWU_PREGION_START_START_Pos

#define MWU_PREGION_START_START_Pos   (0UL)

Position of START field.

Definition at line 3809 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR0_Exclude

#define MWU_PREGION_SUBS_SR0_Exclude   (0UL)

Exclude

Definition at line 4011 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR0_Include

#define MWU_PREGION_SUBS_SR0_Include   (1UL)

Include

Definition at line 4012 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR0_Msk

#define MWU_PREGION_SUBS_SR0_Msk   (0x1UL << MWU_PREGION_SUBS_SR0_Pos)

Bit mask of SR0 field.

Definition at line 4010 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR0_Pos

#define MWU_PREGION_SUBS_SR0_Pos   (0UL)

Position of SR0 field.

Definition at line 4009 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR10_Exclude

#define MWU_PREGION_SUBS_SR10_Exclude   (0UL)

Exclude

Definition at line 3951 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR10_Include

#define MWU_PREGION_SUBS_SR10_Include   (1UL)

Include

Definition at line 3952 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR10_Msk

#define MWU_PREGION_SUBS_SR10_Msk   (0x1UL << MWU_PREGION_SUBS_SR10_Pos)

Bit mask of SR10 field.

Definition at line 3950 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR10_Pos

#define MWU_PREGION_SUBS_SR10_Pos   (10UL)

Position of SR10 field.

Definition at line 3949 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR11_Exclude

#define MWU_PREGION_SUBS_SR11_Exclude   (0UL)

Exclude

Definition at line 3945 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR11_Include

#define MWU_PREGION_SUBS_SR11_Include   (1UL)

Include

Definition at line 3946 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR11_Msk

#define MWU_PREGION_SUBS_SR11_Msk   (0x1UL << MWU_PREGION_SUBS_SR11_Pos)

Bit mask of SR11 field.

Definition at line 3944 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR11_Pos

#define MWU_PREGION_SUBS_SR11_Pos   (11UL)

Position of SR11 field.

Definition at line 3943 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR12_Exclude

#define MWU_PREGION_SUBS_SR12_Exclude   (0UL)

Exclude

Definition at line 3939 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR12_Include

#define MWU_PREGION_SUBS_SR12_Include   (1UL)

Include

Definition at line 3940 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR12_Msk

#define MWU_PREGION_SUBS_SR12_Msk   (0x1UL << MWU_PREGION_SUBS_SR12_Pos)

Bit mask of SR12 field.

Definition at line 3938 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR12_Pos

#define MWU_PREGION_SUBS_SR12_Pos   (12UL)

Position of SR12 field.

Definition at line 3937 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR13_Exclude

#define MWU_PREGION_SUBS_SR13_Exclude   (0UL)

Exclude

Definition at line 3933 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR13_Include

#define MWU_PREGION_SUBS_SR13_Include   (1UL)

Include

Definition at line 3934 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR13_Msk

#define MWU_PREGION_SUBS_SR13_Msk   (0x1UL << MWU_PREGION_SUBS_SR13_Pos)

Bit mask of SR13 field.

Definition at line 3932 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR13_Pos

#define MWU_PREGION_SUBS_SR13_Pos   (13UL)

Position of SR13 field.

Definition at line 3931 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR14_Exclude

#define MWU_PREGION_SUBS_SR14_Exclude   (0UL)

Exclude

Definition at line 3927 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR14_Include

#define MWU_PREGION_SUBS_SR14_Include   (1UL)

Include

Definition at line 3928 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR14_Msk

#define MWU_PREGION_SUBS_SR14_Msk   (0x1UL << MWU_PREGION_SUBS_SR14_Pos)

Bit mask of SR14 field.

Definition at line 3926 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR14_Pos

#define MWU_PREGION_SUBS_SR14_Pos   (14UL)

Position of SR14 field.

Definition at line 3925 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR15_Exclude

#define MWU_PREGION_SUBS_SR15_Exclude   (0UL)

Exclude

Definition at line 3921 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR15_Include

#define MWU_PREGION_SUBS_SR15_Include   (1UL)

Include

Definition at line 3922 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR15_Msk

#define MWU_PREGION_SUBS_SR15_Msk   (0x1UL << MWU_PREGION_SUBS_SR15_Pos)

Bit mask of SR15 field.

Definition at line 3920 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR15_Pos

#define MWU_PREGION_SUBS_SR15_Pos   (15UL)

Position of SR15 field.

Definition at line 3919 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR16_Exclude

#define MWU_PREGION_SUBS_SR16_Exclude   (0UL)

Exclude

Definition at line 3915 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR16_Include

#define MWU_PREGION_SUBS_SR16_Include   (1UL)

Include

Definition at line 3916 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR16_Msk

#define MWU_PREGION_SUBS_SR16_Msk   (0x1UL << MWU_PREGION_SUBS_SR16_Pos)

Bit mask of SR16 field.

Definition at line 3914 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR16_Pos

#define MWU_PREGION_SUBS_SR16_Pos   (16UL)

Position of SR16 field.

Definition at line 3913 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR17_Exclude

#define MWU_PREGION_SUBS_SR17_Exclude   (0UL)

Exclude

Definition at line 3909 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR17_Include

#define MWU_PREGION_SUBS_SR17_Include   (1UL)

Include

Definition at line 3910 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR17_Msk

#define MWU_PREGION_SUBS_SR17_Msk   (0x1UL << MWU_PREGION_SUBS_SR17_Pos)

Bit mask of SR17 field.

Definition at line 3908 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR17_Pos

#define MWU_PREGION_SUBS_SR17_Pos   (17UL)

Position of SR17 field.

Definition at line 3907 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR18_Exclude

#define MWU_PREGION_SUBS_SR18_Exclude   (0UL)

Exclude

Definition at line 3903 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR18_Include

#define MWU_PREGION_SUBS_SR18_Include   (1UL)

Include

Definition at line 3904 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR18_Msk

#define MWU_PREGION_SUBS_SR18_Msk   (0x1UL << MWU_PREGION_SUBS_SR18_Pos)

Bit mask of SR18 field.

Definition at line 3902 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR18_Pos

#define MWU_PREGION_SUBS_SR18_Pos   (18UL)

Position of SR18 field.

Definition at line 3901 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR19_Exclude

#define MWU_PREGION_SUBS_SR19_Exclude   (0UL)

Exclude

Definition at line 3897 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR19_Include

#define MWU_PREGION_SUBS_SR19_Include   (1UL)

Include

Definition at line 3898 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR19_Msk

#define MWU_PREGION_SUBS_SR19_Msk   (0x1UL << MWU_PREGION_SUBS_SR19_Pos)

Bit mask of SR19 field.

Definition at line 3896 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR19_Pos

#define MWU_PREGION_SUBS_SR19_Pos   (19UL)

Position of SR19 field.

Definition at line 3895 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR1_Exclude

#define MWU_PREGION_SUBS_SR1_Exclude   (0UL)

Exclude

Definition at line 4005 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR1_Include

#define MWU_PREGION_SUBS_SR1_Include   (1UL)

Include

Definition at line 4006 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR1_Msk

#define MWU_PREGION_SUBS_SR1_Msk   (0x1UL << MWU_PREGION_SUBS_SR1_Pos)

Bit mask of SR1 field.

Definition at line 4004 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR1_Pos

#define MWU_PREGION_SUBS_SR1_Pos   (1UL)

Position of SR1 field.

Definition at line 4003 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR20_Exclude

#define MWU_PREGION_SUBS_SR20_Exclude   (0UL)

Exclude

Definition at line 3891 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR20_Include

#define MWU_PREGION_SUBS_SR20_Include   (1UL)

Include

Definition at line 3892 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR20_Msk

#define MWU_PREGION_SUBS_SR20_Msk   (0x1UL << MWU_PREGION_SUBS_SR20_Pos)

Bit mask of SR20 field.

Definition at line 3890 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR20_Pos

#define MWU_PREGION_SUBS_SR20_Pos   (20UL)

Position of SR20 field.

Definition at line 3889 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR21_Exclude

#define MWU_PREGION_SUBS_SR21_Exclude   (0UL)

Exclude

Definition at line 3885 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR21_Include

#define MWU_PREGION_SUBS_SR21_Include   (1UL)

Include

Definition at line 3886 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR21_Msk

#define MWU_PREGION_SUBS_SR21_Msk   (0x1UL << MWU_PREGION_SUBS_SR21_Pos)

Bit mask of SR21 field.

Definition at line 3884 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR21_Pos

#define MWU_PREGION_SUBS_SR21_Pos   (21UL)

Position of SR21 field.

Definition at line 3883 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR22_Exclude

#define MWU_PREGION_SUBS_SR22_Exclude   (0UL)

Exclude

Definition at line 3879 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR22_Include

#define MWU_PREGION_SUBS_SR22_Include   (1UL)

Include

Definition at line 3880 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR22_Msk

#define MWU_PREGION_SUBS_SR22_Msk   (0x1UL << MWU_PREGION_SUBS_SR22_Pos)

Bit mask of SR22 field.

Definition at line 3878 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR22_Pos

#define MWU_PREGION_SUBS_SR22_Pos   (22UL)

Position of SR22 field.

Definition at line 3877 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR23_Exclude

#define MWU_PREGION_SUBS_SR23_Exclude   (0UL)

Exclude

Definition at line 3873 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR23_Include

#define MWU_PREGION_SUBS_SR23_Include   (1UL)

Include

Definition at line 3874 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR23_Msk

#define MWU_PREGION_SUBS_SR23_Msk   (0x1UL << MWU_PREGION_SUBS_SR23_Pos)

Bit mask of SR23 field.

Definition at line 3872 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR23_Pos

#define MWU_PREGION_SUBS_SR23_Pos   (23UL)

Position of SR23 field.

Definition at line 3871 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR24_Exclude

#define MWU_PREGION_SUBS_SR24_Exclude   (0UL)

Exclude

Definition at line 3867 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR24_Include

#define MWU_PREGION_SUBS_SR24_Include   (1UL)

Include

Definition at line 3868 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR24_Msk

#define MWU_PREGION_SUBS_SR24_Msk   (0x1UL << MWU_PREGION_SUBS_SR24_Pos)

Bit mask of SR24 field.

Definition at line 3866 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR24_Pos

#define MWU_PREGION_SUBS_SR24_Pos   (24UL)

Position of SR24 field.

Definition at line 3865 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR25_Exclude

#define MWU_PREGION_SUBS_SR25_Exclude   (0UL)

Exclude

Definition at line 3861 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR25_Include

#define MWU_PREGION_SUBS_SR25_Include   (1UL)

Include

Definition at line 3862 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR25_Msk

#define MWU_PREGION_SUBS_SR25_Msk   (0x1UL << MWU_PREGION_SUBS_SR25_Pos)

Bit mask of SR25 field.

Definition at line 3860 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR25_Pos

#define MWU_PREGION_SUBS_SR25_Pos   (25UL)

Position of SR25 field.

Definition at line 3859 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR26_Exclude

#define MWU_PREGION_SUBS_SR26_Exclude   (0UL)

Exclude

Definition at line 3855 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR26_Include

#define MWU_PREGION_SUBS_SR26_Include   (1UL)

Include

Definition at line 3856 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR26_Msk

#define MWU_PREGION_SUBS_SR26_Msk   (0x1UL << MWU_PREGION_SUBS_SR26_Pos)

Bit mask of SR26 field.

Definition at line 3854 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR26_Pos

#define MWU_PREGION_SUBS_SR26_Pos   (26UL)

Position of SR26 field.

Definition at line 3853 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR27_Exclude

#define MWU_PREGION_SUBS_SR27_Exclude   (0UL)

Exclude

Definition at line 3849 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR27_Include

#define MWU_PREGION_SUBS_SR27_Include   (1UL)

Include

Definition at line 3850 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR27_Msk

#define MWU_PREGION_SUBS_SR27_Msk   (0x1UL << MWU_PREGION_SUBS_SR27_Pos)

Bit mask of SR27 field.

Definition at line 3848 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR27_Pos

#define MWU_PREGION_SUBS_SR27_Pos   (27UL)

Position of SR27 field.

Definition at line 3847 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR28_Exclude

#define MWU_PREGION_SUBS_SR28_Exclude   (0UL)

Exclude

Definition at line 3843 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR28_Include

#define MWU_PREGION_SUBS_SR28_Include   (1UL)

Include

Definition at line 3844 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR28_Msk

#define MWU_PREGION_SUBS_SR28_Msk   (0x1UL << MWU_PREGION_SUBS_SR28_Pos)

Bit mask of SR28 field.

Definition at line 3842 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR28_Pos

#define MWU_PREGION_SUBS_SR28_Pos   (28UL)

Position of SR28 field.

Definition at line 3841 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR29_Exclude

#define MWU_PREGION_SUBS_SR29_Exclude   (0UL)

Exclude

Definition at line 3837 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR29_Include

#define MWU_PREGION_SUBS_SR29_Include   (1UL)

Include

Definition at line 3838 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR29_Msk

#define MWU_PREGION_SUBS_SR29_Msk   (0x1UL << MWU_PREGION_SUBS_SR29_Pos)

Bit mask of SR29 field.

Definition at line 3836 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR29_Pos

#define MWU_PREGION_SUBS_SR29_Pos   (29UL)

Position of SR29 field.

Definition at line 3835 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR2_Exclude

#define MWU_PREGION_SUBS_SR2_Exclude   (0UL)

Exclude

Definition at line 3999 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR2_Include

#define MWU_PREGION_SUBS_SR2_Include   (1UL)

Include

Definition at line 4000 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR2_Msk

#define MWU_PREGION_SUBS_SR2_Msk   (0x1UL << MWU_PREGION_SUBS_SR2_Pos)

Bit mask of SR2 field.

Definition at line 3998 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR2_Pos

#define MWU_PREGION_SUBS_SR2_Pos   (2UL)

Position of SR2 field.

Definition at line 3997 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR30_Exclude

#define MWU_PREGION_SUBS_SR30_Exclude   (0UL)

Exclude

Definition at line 3831 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR30_Include

#define MWU_PREGION_SUBS_SR30_Include   (1UL)

Include

Definition at line 3832 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR30_Msk

#define MWU_PREGION_SUBS_SR30_Msk   (0x1UL << MWU_PREGION_SUBS_SR30_Pos)

Bit mask of SR30 field.

Definition at line 3830 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR30_Pos

#define MWU_PREGION_SUBS_SR30_Pos   (30UL)

Position of SR30 field.

Definition at line 3829 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR31_Exclude

#define MWU_PREGION_SUBS_SR31_Exclude   (0UL)

Exclude

Definition at line 3825 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR31_Include

#define MWU_PREGION_SUBS_SR31_Include   (1UL)

Include

Definition at line 3826 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR31_Msk

#define MWU_PREGION_SUBS_SR31_Msk   (0x1UL << MWU_PREGION_SUBS_SR31_Pos)

Bit mask of SR31 field.

Definition at line 3824 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR31_Pos

#define MWU_PREGION_SUBS_SR31_Pos   (31UL)

Position of SR31 field.

Definition at line 3823 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR3_Exclude

#define MWU_PREGION_SUBS_SR3_Exclude   (0UL)

Exclude

Definition at line 3993 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR3_Include

#define MWU_PREGION_SUBS_SR3_Include   (1UL)

Include

Definition at line 3994 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR3_Msk

#define MWU_PREGION_SUBS_SR3_Msk   (0x1UL << MWU_PREGION_SUBS_SR3_Pos)

Bit mask of SR3 field.

Definition at line 3992 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR3_Pos

#define MWU_PREGION_SUBS_SR3_Pos   (3UL)

Position of SR3 field.

Definition at line 3991 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR4_Exclude

#define MWU_PREGION_SUBS_SR4_Exclude   (0UL)

Exclude

Definition at line 3987 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR4_Include

#define MWU_PREGION_SUBS_SR4_Include   (1UL)

Include

Definition at line 3988 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR4_Msk

#define MWU_PREGION_SUBS_SR4_Msk   (0x1UL << MWU_PREGION_SUBS_SR4_Pos)

Bit mask of SR4 field.

Definition at line 3986 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR4_Pos

#define MWU_PREGION_SUBS_SR4_Pos   (4UL)

Position of SR4 field.

Definition at line 3985 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR5_Exclude

#define MWU_PREGION_SUBS_SR5_Exclude   (0UL)

Exclude

Definition at line 3981 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR5_Include

#define MWU_PREGION_SUBS_SR5_Include   (1UL)

Include

Definition at line 3982 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR5_Msk

#define MWU_PREGION_SUBS_SR5_Msk   (0x1UL << MWU_PREGION_SUBS_SR5_Pos)

Bit mask of SR5 field.

Definition at line 3980 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR5_Pos

#define MWU_PREGION_SUBS_SR5_Pos   (5UL)

Position of SR5 field.

Definition at line 3979 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR6_Exclude

#define MWU_PREGION_SUBS_SR6_Exclude   (0UL)

Exclude

Definition at line 3975 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR6_Include

#define MWU_PREGION_SUBS_SR6_Include   (1UL)

Include

Definition at line 3976 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR6_Msk

#define MWU_PREGION_SUBS_SR6_Msk   (0x1UL << MWU_PREGION_SUBS_SR6_Pos)

Bit mask of SR6 field.

Definition at line 3974 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR6_Pos

#define MWU_PREGION_SUBS_SR6_Pos   (6UL)

Position of SR6 field.

Definition at line 3973 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR7_Exclude

#define MWU_PREGION_SUBS_SR7_Exclude   (0UL)

Exclude

Definition at line 3969 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR7_Include

#define MWU_PREGION_SUBS_SR7_Include   (1UL)

Include

Definition at line 3970 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR7_Msk

#define MWU_PREGION_SUBS_SR7_Msk   (0x1UL << MWU_PREGION_SUBS_SR7_Pos)

Bit mask of SR7 field.

Definition at line 3968 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR7_Pos

#define MWU_PREGION_SUBS_SR7_Pos   (7UL)

Position of SR7 field.

Definition at line 3967 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR8_Exclude

#define MWU_PREGION_SUBS_SR8_Exclude   (0UL)

Exclude

Definition at line 3963 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR8_Include

#define MWU_PREGION_SUBS_SR8_Include   (1UL)

Include

Definition at line 3964 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR8_Msk

#define MWU_PREGION_SUBS_SR8_Msk   (0x1UL << MWU_PREGION_SUBS_SR8_Pos)

Bit mask of SR8 field.

Definition at line 3962 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR8_Pos

#define MWU_PREGION_SUBS_SR8_Pos   (8UL)

Position of SR8 field.

Definition at line 3961 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR9_Exclude

#define MWU_PREGION_SUBS_SR9_Exclude   (0UL)

Exclude

Definition at line 3957 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR9_Include

#define MWU_PREGION_SUBS_SR9_Include   (1UL)

Include

Definition at line 3958 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR9_Msk

#define MWU_PREGION_SUBS_SR9_Msk   (0x1UL << MWU_PREGION_SUBS_SR9_Pos)

Bit mask of SR9 field.

Definition at line 3956 of file nrf52_bitfields.h.

◆ MWU_PREGION_SUBS_SR9_Pos

#define MWU_PREGION_SUBS_SR9_Pos   (9UL)

Position of SR9 field.

Definition at line 3955 of file nrf52_bitfields.h.

◆ MWU_REGION_END_END_Msk

#define MWU_REGION_END_END_Msk   (0xFFFFFFFFUL << MWU_REGION_END_END_Pos)

Bit mask of END field.

Definition at line 3802 of file nrf52_bitfields.h.

◆ MWU_REGION_END_END_OneByte

#define MWU_REGION_END_END_OneByte   (0UL)

Region is 1 byte long (End address = Start address)

Definition at line 3803 of file nrf52_bitfields.h.

◆ MWU_REGION_END_END_Pos

#define MWU_REGION_END_END_Pos   (0UL)

Position of END field.

Definition at line 3801 of file nrf52_bitfields.h.

◆ MWU_REGION_START_START_Msk

#define MWU_REGION_START_START_Msk   (0xFFFFFFFFUL << MWU_REGION_START_START_Pos)

Bit mask of START field.

Definition at line 3795 of file nrf52_bitfields.h.

◆ MWU_REGION_START_START_Pos

#define MWU_REGION_START_START_Pos   (0UL)

Position of START field.

Definition at line 3794 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_PRGN0RA_Disable

#define MWU_REGIONEN_PRGN0RA_Disable   (0UL)

Disable read access watch in this PREGION

Definition at line 3559 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_PRGN0RA_Enable

#define MWU_REGIONEN_PRGN0RA_Enable   (1UL)

Enable read access watch in this PREGION

Definition at line 3560 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_PRGN0RA_Msk

#define MWU_REGIONEN_PRGN0RA_Msk   (0x1UL << MWU_REGIONEN_PRGN0RA_Pos)

Bit mask of PRGN0RA field.

Definition at line 3558 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_PRGN0RA_Pos

#define MWU_REGIONEN_PRGN0RA_Pos   (25UL)

Position of PRGN0RA field.

Definition at line 3557 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_PRGN0WA_Disable

#define MWU_REGIONEN_PRGN0WA_Disable   (0UL)

Disable write access watch in this PREGION

Definition at line 3565 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_PRGN0WA_Enable

#define MWU_REGIONEN_PRGN0WA_Enable   (1UL)

Enable write access watch in this PREGION

Definition at line 3566 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_PRGN0WA_Msk

#define MWU_REGIONEN_PRGN0WA_Msk   (0x1UL << MWU_REGIONEN_PRGN0WA_Pos)

Bit mask of PRGN0WA field.

Definition at line 3564 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_PRGN0WA_Pos

#define MWU_REGIONEN_PRGN0WA_Pos   (24UL)

Position of PRGN0WA field.

Definition at line 3563 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_PRGN1RA_Disable

#define MWU_REGIONEN_PRGN1RA_Disable   (0UL)

Disable read access watch in this PREGION

Definition at line 3547 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_PRGN1RA_Enable

#define MWU_REGIONEN_PRGN1RA_Enable   (1UL)

Enable read access watch in this PREGION

Definition at line 3548 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_PRGN1RA_Msk

#define MWU_REGIONEN_PRGN1RA_Msk   (0x1UL << MWU_REGIONEN_PRGN1RA_Pos)

Bit mask of PRGN1RA field.

Definition at line 3546 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_PRGN1RA_Pos

#define MWU_REGIONEN_PRGN1RA_Pos   (27UL)

Position of PRGN1RA field.

Definition at line 3545 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_PRGN1WA_Disable

#define MWU_REGIONEN_PRGN1WA_Disable   (0UL)

Disable write access watch in this PREGION

Definition at line 3553 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_PRGN1WA_Enable

#define MWU_REGIONEN_PRGN1WA_Enable   (1UL)

Enable write access watch in this PREGION

Definition at line 3554 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_PRGN1WA_Msk

#define MWU_REGIONEN_PRGN1WA_Msk   (0x1UL << MWU_REGIONEN_PRGN1WA_Pos)

Bit mask of PRGN1WA field.

Definition at line 3552 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_PRGN1WA_Pos

#define MWU_REGIONEN_PRGN1WA_Pos   (26UL)

Position of PRGN1WA field.

Definition at line 3551 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_RGN0RA_Disable

#define MWU_REGIONEN_RGN0RA_Disable   (0UL)

Disable read access watch in this region

Definition at line 3607 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_RGN0RA_Enable

#define MWU_REGIONEN_RGN0RA_Enable   (1UL)

Enable read access watch in this region

Definition at line 3608 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_RGN0RA_Msk

#define MWU_REGIONEN_RGN0RA_Msk   (0x1UL << MWU_REGIONEN_RGN0RA_Pos)

Bit mask of RGN0RA field.

Definition at line 3606 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_RGN0RA_Pos

#define MWU_REGIONEN_RGN0RA_Pos   (1UL)

Position of RGN0RA field.

Definition at line 3605 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_RGN0WA_Disable

#define MWU_REGIONEN_RGN0WA_Disable   (0UL)

Disable write access watch in this region

Definition at line 3613 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_RGN0WA_Enable

#define MWU_REGIONEN_RGN0WA_Enable   (1UL)

Enable write access watch in this region

Definition at line 3614 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_RGN0WA_Msk

#define MWU_REGIONEN_RGN0WA_Msk   (0x1UL << MWU_REGIONEN_RGN0WA_Pos)

Bit mask of RGN0WA field.

Definition at line 3612 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_RGN0WA_Pos

#define MWU_REGIONEN_RGN0WA_Pos   (0UL)

Position of RGN0WA field.

Definition at line 3611 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_RGN1RA_Disable

#define MWU_REGIONEN_RGN1RA_Disable   (0UL)

Disable read access watch in this region

Definition at line 3595 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_RGN1RA_Enable

#define MWU_REGIONEN_RGN1RA_Enable   (1UL)

Enable read access watch in this region

Definition at line 3596 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_RGN1RA_Msk

#define MWU_REGIONEN_RGN1RA_Msk   (0x1UL << MWU_REGIONEN_RGN1RA_Pos)

Bit mask of RGN1RA field.

Definition at line 3594 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_RGN1RA_Pos

#define MWU_REGIONEN_RGN1RA_Pos   (3UL)

Position of RGN1RA field.

Definition at line 3593 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_RGN1WA_Disable

#define MWU_REGIONEN_RGN1WA_Disable   (0UL)

Disable write access watch in this region

Definition at line 3601 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_RGN1WA_Enable

#define MWU_REGIONEN_RGN1WA_Enable   (1UL)

Enable write access watch in this region

Definition at line 3602 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_RGN1WA_Msk

#define MWU_REGIONEN_RGN1WA_Msk   (0x1UL << MWU_REGIONEN_RGN1WA_Pos)

Bit mask of RGN1WA field.

Definition at line 3600 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_RGN1WA_Pos

#define MWU_REGIONEN_RGN1WA_Pos   (2UL)

Position of RGN1WA field.

Definition at line 3599 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_RGN2RA_Disable

#define MWU_REGIONEN_RGN2RA_Disable   (0UL)

Disable read access watch in this region

Definition at line 3583 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_RGN2RA_Enable

#define MWU_REGIONEN_RGN2RA_Enable   (1UL)

Enable read access watch in this region

Definition at line 3584 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_RGN2RA_Msk

#define MWU_REGIONEN_RGN2RA_Msk   (0x1UL << MWU_REGIONEN_RGN2RA_Pos)

Bit mask of RGN2RA field.

Definition at line 3582 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_RGN2RA_Pos

#define MWU_REGIONEN_RGN2RA_Pos   (5UL)

Position of RGN2RA field.

Definition at line 3581 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_RGN2WA_Disable

#define MWU_REGIONEN_RGN2WA_Disable   (0UL)

Disable write access watch in this region

Definition at line 3589 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_RGN2WA_Enable

#define MWU_REGIONEN_RGN2WA_Enable   (1UL)

Enable write access watch in this region

Definition at line 3590 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_RGN2WA_Msk

#define MWU_REGIONEN_RGN2WA_Msk   (0x1UL << MWU_REGIONEN_RGN2WA_Pos)

Bit mask of RGN2WA field.

Definition at line 3588 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_RGN2WA_Pos

#define MWU_REGIONEN_RGN2WA_Pos   (4UL)

Position of RGN2WA field.

Definition at line 3587 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_RGN3RA_Disable

#define MWU_REGIONEN_RGN3RA_Disable   (0UL)

Disable read access watch in this region

Definition at line 3571 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_RGN3RA_Enable

#define MWU_REGIONEN_RGN3RA_Enable   (1UL)

Enable read access watch in this region

Definition at line 3572 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_RGN3RA_Msk

#define MWU_REGIONEN_RGN3RA_Msk   (0x1UL << MWU_REGIONEN_RGN3RA_Pos)

Bit mask of RGN3RA field.

Definition at line 3570 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_RGN3RA_Pos

#define MWU_REGIONEN_RGN3RA_Pos   (7UL)

Position of RGN3RA field.

Definition at line 3569 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_RGN3WA_Disable

#define MWU_REGIONEN_RGN3WA_Disable   (0UL)

Disable write access watch in this region

Definition at line 3577 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_RGN3WA_Enable

#define MWU_REGIONEN_RGN3WA_Enable   (1UL)

Enable write access watch in this region

Definition at line 3578 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_RGN3WA_Msk

#define MWU_REGIONEN_RGN3WA_Msk   (0x1UL << MWU_REGIONEN_RGN3WA_Pos)

Bit mask of RGN3WA field.

Definition at line 3576 of file nrf52_bitfields.h.

◆ MWU_REGIONEN_RGN3WA_Pos

#define MWU_REGIONEN_RGN3WA_Pos   (6UL)

Position of RGN3WA field.

Definition at line 3575 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_PRGN0RA_Clear

#define MWU_REGIONENCLR_PRGN0RA_Clear   (1UL)

Disable read access watch in this PREGION

Definition at line 3725 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_PRGN0RA_Disabled

#define MWU_REGIONENCLR_PRGN0RA_Disabled   (0UL)

Read access watch in this PREGION is disabled

Definition at line 3723 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_PRGN0RA_Enabled

#define MWU_REGIONENCLR_PRGN0RA_Enabled   (1UL)

Read access watch in this PREGION is enabled

Definition at line 3724 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_PRGN0RA_Msk

#define MWU_REGIONENCLR_PRGN0RA_Msk   (0x1UL << MWU_REGIONENCLR_PRGN0RA_Pos)

Bit mask of PRGN0RA field.

Definition at line 3722 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_PRGN0RA_Pos

#define MWU_REGIONENCLR_PRGN0RA_Pos   (25UL)

Position of PRGN0RA field.

Definition at line 3721 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_PRGN0WA_Clear

#define MWU_REGIONENCLR_PRGN0WA_Clear   (1UL)

Disable write access watch in this PREGION

Definition at line 3732 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_PRGN0WA_Disabled

#define MWU_REGIONENCLR_PRGN0WA_Disabled   (0UL)

Write access watch in this PREGION is disabled

Definition at line 3730 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_PRGN0WA_Enabled

#define MWU_REGIONENCLR_PRGN0WA_Enabled   (1UL)

Write access watch in this PREGION is enabled

Definition at line 3731 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_PRGN0WA_Msk

#define MWU_REGIONENCLR_PRGN0WA_Msk   (0x1UL << MWU_REGIONENCLR_PRGN0WA_Pos)

Bit mask of PRGN0WA field.

Definition at line 3729 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_PRGN0WA_Pos

#define MWU_REGIONENCLR_PRGN0WA_Pos   (24UL)

Position of PRGN0WA field.

Definition at line 3728 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_PRGN1RA_Clear

#define MWU_REGIONENCLR_PRGN1RA_Clear   (1UL)

Disable read access watch in this PREGION

Definition at line 3711 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_PRGN1RA_Disabled

#define MWU_REGIONENCLR_PRGN1RA_Disabled   (0UL)

Read access watch in this PREGION is disabled

Definition at line 3709 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_PRGN1RA_Enabled

#define MWU_REGIONENCLR_PRGN1RA_Enabled   (1UL)

Read access watch in this PREGION is enabled

Definition at line 3710 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_PRGN1RA_Msk

#define MWU_REGIONENCLR_PRGN1RA_Msk   (0x1UL << MWU_REGIONENCLR_PRGN1RA_Pos)

Bit mask of PRGN1RA field.

Definition at line 3708 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_PRGN1RA_Pos

#define MWU_REGIONENCLR_PRGN1RA_Pos   (27UL)

Position of PRGN1RA field.

Definition at line 3707 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_PRGN1WA_Clear

#define MWU_REGIONENCLR_PRGN1WA_Clear   (1UL)

Disable write access watch in this PREGION

Definition at line 3718 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_PRGN1WA_Disabled

#define MWU_REGIONENCLR_PRGN1WA_Disabled   (0UL)

Write access watch in this PREGION is disabled

Definition at line 3716 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_PRGN1WA_Enabled

#define MWU_REGIONENCLR_PRGN1WA_Enabled   (1UL)

Write access watch in this PREGION is enabled

Definition at line 3717 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_PRGN1WA_Msk

#define MWU_REGIONENCLR_PRGN1WA_Msk   (0x1UL << MWU_REGIONENCLR_PRGN1WA_Pos)

Bit mask of PRGN1WA field.

Definition at line 3715 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_PRGN1WA_Pos

#define MWU_REGIONENCLR_PRGN1WA_Pos   (26UL)

Position of PRGN1WA field.

Definition at line 3714 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN0RA_Clear

#define MWU_REGIONENCLR_RGN0RA_Clear   (1UL)

Disable read access watch in this region

Definition at line 3781 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN0RA_Disabled

#define MWU_REGIONENCLR_RGN0RA_Disabled   (0UL)

Read access watch in this region is disabled

Definition at line 3779 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN0RA_Enabled

#define MWU_REGIONENCLR_RGN0RA_Enabled   (1UL)

Read access watch in this region is enabled

Definition at line 3780 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN0RA_Msk

#define MWU_REGIONENCLR_RGN0RA_Msk   (0x1UL << MWU_REGIONENCLR_RGN0RA_Pos)

Bit mask of RGN0RA field.

Definition at line 3778 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN0RA_Pos

#define MWU_REGIONENCLR_RGN0RA_Pos   (1UL)

Position of RGN0RA field.

Definition at line 3777 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN0WA_Clear

#define MWU_REGIONENCLR_RGN0WA_Clear   (1UL)

Disable write access watch in this region

Definition at line 3788 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN0WA_Disabled

#define MWU_REGIONENCLR_RGN0WA_Disabled   (0UL)

Write access watch in this region is disabled

Definition at line 3786 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN0WA_Enabled

#define MWU_REGIONENCLR_RGN0WA_Enabled   (1UL)

Write access watch in this region is enabled

Definition at line 3787 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN0WA_Msk

#define MWU_REGIONENCLR_RGN0WA_Msk   (0x1UL << MWU_REGIONENCLR_RGN0WA_Pos)

Bit mask of RGN0WA field.

Definition at line 3785 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN0WA_Pos

#define MWU_REGIONENCLR_RGN0WA_Pos   (0UL)

Position of RGN0WA field.

Definition at line 3784 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN1RA_Clear

#define MWU_REGIONENCLR_RGN1RA_Clear   (1UL)

Disable read access watch in this region

Definition at line 3767 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN1RA_Disabled

#define MWU_REGIONENCLR_RGN1RA_Disabled   (0UL)

Read access watch in this region is disabled

Definition at line 3765 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN1RA_Enabled

#define MWU_REGIONENCLR_RGN1RA_Enabled   (1UL)

Read access watch in this region is enabled

Definition at line 3766 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN1RA_Msk

#define MWU_REGIONENCLR_RGN1RA_Msk   (0x1UL << MWU_REGIONENCLR_RGN1RA_Pos)

Bit mask of RGN1RA field.

Definition at line 3764 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN1RA_Pos

#define MWU_REGIONENCLR_RGN1RA_Pos   (3UL)

Position of RGN1RA field.

Definition at line 3763 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN1WA_Clear

#define MWU_REGIONENCLR_RGN1WA_Clear   (1UL)

Disable write access watch in this region

Definition at line 3774 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN1WA_Disabled

#define MWU_REGIONENCLR_RGN1WA_Disabled   (0UL)

Write access watch in this region is disabled

Definition at line 3772 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN1WA_Enabled

#define MWU_REGIONENCLR_RGN1WA_Enabled   (1UL)

Write access watch in this region is enabled

Definition at line 3773 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN1WA_Msk

#define MWU_REGIONENCLR_RGN1WA_Msk   (0x1UL << MWU_REGIONENCLR_RGN1WA_Pos)

Bit mask of RGN1WA field.

Definition at line 3771 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN1WA_Pos

#define MWU_REGIONENCLR_RGN1WA_Pos   (2UL)

Position of RGN1WA field.

Definition at line 3770 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN2RA_Clear

#define MWU_REGIONENCLR_RGN2RA_Clear   (1UL)

Disable read access watch in this region

Definition at line 3753 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN2RA_Disabled

#define MWU_REGIONENCLR_RGN2RA_Disabled   (0UL)

Read access watch in this region is disabled

Definition at line 3751 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN2RA_Enabled

#define MWU_REGIONENCLR_RGN2RA_Enabled   (1UL)

Read access watch in this region is enabled

Definition at line 3752 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN2RA_Msk

#define MWU_REGIONENCLR_RGN2RA_Msk   (0x1UL << MWU_REGIONENCLR_RGN2RA_Pos)

Bit mask of RGN2RA field.

Definition at line 3750 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN2RA_Pos

#define MWU_REGIONENCLR_RGN2RA_Pos   (5UL)

Position of RGN2RA field.

Definition at line 3749 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN2WA_Clear

#define MWU_REGIONENCLR_RGN2WA_Clear   (1UL)

Disable write access watch in this region

Definition at line 3760 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN2WA_Disabled

#define MWU_REGIONENCLR_RGN2WA_Disabled   (0UL)

Write access watch in this region is disabled

Definition at line 3758 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN2WA_Enabled

#define MWU_REGIONENCLR_RGN2WA_Enabled   (1UL)

Write access watch in this region is enabled

Definition at line 3759 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN2WA_Msk

#define MWU_REGIONENCLR_RGN2WA_Msk   (0x1UL << MWU_REGIONENCLR_RGN2WA_Pos)

Bit mask of RGN2WA field.

Definition at line 3757 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN2WA_Pos

#define MWU_REGIONENCLR_RGN2WA_Pos   (4UL)

Position of RGN2WA field.

Definition at line 3756 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN3RA_Clear

#define MWU_REGIONENCLR_RGN3RA_Clear   (1UL)

Disable read access watch in this region

Definition at line 3739 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN3RA_Disabled

#define MWU_REGIONENCLR_RGN3RA_Disabled   (0UL)

Read access watch in this region is disabled

Definition at line 3737 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN3RA_Enabled

#define MWU_REGIONENCLR_RGN3RA_Enabled   (1UL)

Read access watch in this region is enabled

Definition at line 3738 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN3RA_Msk

#define MWU_REGIONENCLR_RGN3RA_Msk   (0x1UL << MWU_REGIONENCLR_RGN3RA_Pos)

Bit mask of RGN3RA field.

Definition at line 3736 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN3RA_Pos

#define MWU_REGIONENCLR_RGN3RA_Pos   (7UL)

Position of RGN3RA field.

Definition at line 3735 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN3WA_Clear

#define MWU_REGIONENCLR_RGN3WA_Clear   (1UL)

Disable write access watch in this region

Definition at line 3746 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN3WA_Disabled

#define MWU_REGIONENCLR_RGN3WA_Disabled   (0UL)

Write access watch in this region is disabled

Definition at line 3744 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN3WA_Enabled

#define MWU_REGIONENCLR_RGN3WA_Enabled   (1UL)

Write access watch in this region is enabled

Definition at line 3745 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN3WA_Msk

#define MWU_REGIONENCLR_RGN3WA_Msk   (0x1UL << MWU_REGIONENCLR_RGN3WA_Pos)

Bit mask of RGN3WA field.

Definition at line 3743 of file nrf52_bitfields.h.

◆ MWU_REGIONENCLR_RGN3WA_Pos

#define MWU_REGIONENCLR_RGN3WA_Pos   (6UL)

Position of RGN3WA field.

Definition at line 3742 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_PRGN0RA_Disabled

#define MWU_REGIONENSET_PRGN0RA_Disabled   (0UL)

Read access watch in this PREGION is disabled

Definition at line 3636 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_PRGN0RA_Enabled

#define MWU_REGIONENSET_PRGN0RA_Enabled   (1UL)

Read access watch in this PREGION is enabled

Definition at line 3637 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_PRGN0RA_Msk

#define MWU_REGIONENSET_PRGN0RA_Msk   (0x1UL << MWU_REGIONENSET_PRGN0RA_Pos)

Bit mask of PRGN0RA field.

Definition at line 3635 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_PRGN0RA_Pos

#define MWU_REGIONENSET_PRGN0RA_Pos   (25UL)

Position of PRGN0RA field.

Definition at line 3634 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_PRGN0RA_Set

#define MWU_REGIONENSET_PRGN0RA_Set   (1UL)

Enable read access watch in this PREGION

Definition at line 3638 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_PRGN0WA_Disabled

#define MWU_REGIONENSET_PRGN0WA_Disabled   (0UL)

Write access watch in this PREGION is disabled

Definition at line 3643 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_PRGN0WA_Enabled

#define MWU_REGIONENSET_PRGN0WA_Enabled   (1UL)

Write access watch in this PREGION is enabled

Definition at line 3644 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_PRGN0WA_Msk

#define MWU_REGIONENSET_PRGN0WA_Msk   (0x1UL << MWU_REGIONENSET_PRGN0WA_Pos)

Bit mask of PRGN0WA field.

Definition at line 3642 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_PRGN0WA_Pos

#define MWU_REGIONENSET_PRGN0WA_Pos   (24UL)

Position of PRGN0WA field.

Definition at line 3641 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_PRGN0WA_Set

#define MWU_REGIONENSET_PRGN0WA_Set   (1UL)

Enable write access watch in this PREGION

Definition at line 3645 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_PRGN1RA_Disabled

#define MWU_REGIONENSET_PRGN1RA_Disabled   (0UL)

Read access watch in this PREGION is disabled

Definition at line 3622 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_PRGN1RA_Enabled

#define MWU_REGIONENSET_PRGN1RA_Enabled   (1UL)

Read access watch in this PREGION is enabled

Definition at line 3623 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_PRGN1RA_Msk

#define MWU_REGIONENSET_PRGN1RA_Msk   (0x1UL << MWU_REGIONENSET_PRGN1RA_Pos)

Bit mask of PRGN1RA field.

Definition at line 3621 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_PRGN1RA_Pos

#define MWU_REGIONENSET_PRGN1RA_Pos   (27UL)

Position of PRGN1RA field.

Definition at line 3620 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_PRGN1RA_Set

#define MWU_REGIONENSET_PRGN1RA_Set   (1UL)

Enable read access watch in this PREGION

Definition at line 3624 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_PRGN1WA_Disabled

#define MWU_REGIONENSET_PRGN1WA_Disabled   (0UL)

Write access watch in this PREGION is disabled

Definition at line 3629 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_PRGN1WA_Enabled

#define MWU_REGIONENSET_PRGN1WA_Enabled   (1UL)

Write access watch in this PREGION is enabled

Definition at line 3630 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_PRGN1WA_Msk

#define MWU_REGIONENSET_PRGN1WA_Msk   (0x1UL << MWU_REGIONENSET_PRGN1WA_Pos)

Bit mask of PRGN1WA field.

Definition at line 3628 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_PRGN1WA_Pos

#define MWU_REGIONENSET_PRGN1WA_Pos   (26UL)

Position of PRGN1WA field.

Definition at line 3627 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_PRGN1WA_Set

#define MWU_REGIONENSET_PRGN1WA_Set   (1UL)

Enable write access watch in this PREGION

Definition at line 3631 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN0RA_Disabled

#define MWU_REGIONENSET_RGN0RA_Disabled   (0UL)

Read access watch in this region is disabled

Definition at line 3692 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN0RA_Enabled

#define MWU_REGIONENSET_RGN0RA_Enabled   (1UL)

Read access watch in this region is enabled

Definition at line 3693 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN0RA_Msk

#define MWU_REGIONENSET_RGN0RA_Msk   (0x1UL << MWU_REGIONENSET_RGN0RA_Pos)

Bit mask of RGN0RA field.

Definition at line 3691 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN0RA_Pos

#define MWU_REGIONENSET_RGN0RA_Pos   (1UL)

Position of RGN0RA field.

Definition at line 3690 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN0RA_Set

#define MWU_REGIONENSET_RGN0RA_Set   (1UL)

Enable read access watch in this region

Definition at line 3694 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN0WA_Disabled

#define MWU_REGIONENSET_RGN0WA_Disabled   (0UL)

Write access watch in this region is disabled

Definition at line 3699 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN0WA_Enabled

#define MWU_REGIONENSET_RGN0WA_Enabled   (1UL)

Write access watch in this region is enabled

Definition at line 3700 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN0WA_Msk

#define MWU_REGIONENSET_RGN0WA_Msk   (0x1UL << MWU_REGIONENSET_RGN0WA_Pos)

Bit mask of RGN0WA field.

Definition at line 3698 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN0WA_Pos

#define MWU_REGIONENSET_RGN0WA_Pos   (0UL)

Position of RGN0WA field.

Definition at line 3697 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN0WA_Set

#define MWU_REGIONENSET_RGN0WA_Set   (1UL)

Enable write access watch in this region

Definition at line 3701 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN1RA_Disabled

#define MWU_REGIONENSET_RGN1RA_Disabled   (0UL)

Read access watch in this region is disabled

Definition at line 3678 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN1RA_Enabled

#define MWU_REGIONENSET_RGN1RA_Enabled   (1UL)

Read access watch in this region is enabled

Definition at line 3679 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN1RA_Msk

#define MWU_REGIONENSET_RGN1RA_Msk   (0x1UL << MWU_REGIONENSET_RGN1RA_Pos)

Bit mask of RGN1RA field.

Definition at line 3677 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN1RA_Pos

#define MWU_REGIONENSET_RGN1RA_Pos   (3UL)

Position of RGN1RA field.

Definition at line 3676 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN1RA_Set

#define MWU_REGIONENSET_RGN1RA_Set   (1UL)

Enable read access watch in this region

Definition at line 3680 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN1WA_Disabled

#define MWU_REGIONENSET_RGN1WA_Disabled   (0UL)

Write access watch in this region is disabled

Definition at line 3685 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN1WA_Enabled

#define MWU_REGIONENSET_RGN1WA_Enabled   (1UL)

Write access watch in this region is enabled

Definition at line 3686 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN1WA_Msk

#define MWU_REGIONENSET_RGN1WA_Msk   (0x1UL << MWU_REGIONENSET_RGN1WA_Pos)

Bit mask of RGN1WA field.

Definition at line 3684 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN1WA_Pos

#define MWU_REGIONENSET_RGN1WA_Pos   (2UL)

Position of RGN1WA field.

Definition at line 3683 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN1WA_Set

#define MWU_REGIONENSET_RGN1WA_Set   (1UL)

Enable write access watch in this region

Definition at line 3687 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN2RA_Disabled

#define MWU_REGIONENSET_RGN2RA_Disabled   (0UL)

Read access watch in this region is disabled

Definition at line 3664 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN2RA_Enabled

#define MWU_REGIONENSET_RGN2RA_Enabled   (1UL)

Read access watch in this region is enabled

Definition at line 3665 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN2RA_Msk

#define MWU_REGIONENSET_RGN2RA_Msk   (0x1UL << MWU_REGIONENSET_RGN2RA_Pos)

Bit mask of RGN2RA field.

Definition at line 3663 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN2RA_Pos

#define MWU_REGIONENSET_RGN2RA_Pos   (5UL)

Position of RGN2RA field.

Definition at line 3662 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN2RA_Set

#define MWU_REGIONENSET_RGN2RA_Set   (1UL)

Enable read access watch in this region

Definition at line 3666 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN2WA_Disabled

#define MWU_REGIONENSET_RGN2WA_Disabled   (0UL)

Write access watch in this region is disabled

Definition at line 3671 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN2WA_Enabled

#define MWU_REGIONENSET_RGN2WA_Enabled   (1UL)

Write access watch in this region is enabled

Definition at line 3672 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN2WA_Msk

#define MWU_REGIONENSET_RGN2WA_Msk   (0x1UL << MWU_REGIONENSET_RGN2WA_Pos)

Bit mask of RGN2WA field.

Definition at line 3670 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN2WA_Pos

#define MWU_REGIONENSET_RGN2WA_Pos   (4UL)

Position of RGN2WA field.

Definition at line 3669 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN2WA_Set

#define MWU_REGIONENSET_RGN2WA_Set   (1UL)

Enable write access watch in this region

Definition at line 3673 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN3RA_Disabled

#define MWU_REGIONENSET_RGN3RA_Disabled   (0UL)

Read access watch in this region is disabled

Definition at line 3650 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN3RA_Enabled

#define MWU_REGIONENSET_RGN3RA_Enabled   (1UL)

Read access watch in this region is enabled

Definition at line 3651 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN3RA_Msk

#define MWU_REGIONENSET_RGN3RA_Msk   (0x1UL << MWU_REGIONENSET_RGN3RA_Pos)

Bit mask of RGN3RA field.

Definition at line 3649 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN3RA_Pos

#define MWU_REGIONENSET_RGN3RA_Pos   (7UL)

Position of RGN3RA field.

Definition at line 3648 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN3RA_Set

#define MWU_REGIONENSET_RGN3RA_Set   (1UL)

Enable read access watch in this region

Definition at line 3652 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN3WA_Disabled

#define MWU_REGIONENSET_RGN3WA_Disabled   (0UL)

Write access watch in this region is disabled

Definition at line 3657 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN3WA_Enabled

#define MWU_REGIONENSET_RGN3WA_Enabled   (1UL)

Write access watch in this region is enabled

Definition at line 3658 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN3WA_Msk

#define MWU_REGIONENSET_RGN3WA_Msk   (0x1UL << MWU_REGIONENSET_RGN3WA_Pos)

Bit mask of RGN3WA field.

Definition at line 3656 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN3WA_Pos

#define MWU_REGIONENSET_RGN3WA_Pos   (6UL)

Position of RGN3WA field.

Definition at line 3655 of file nrf52_bitfields.h.

◆ MWU_REGIONENSET_RGN3WA_Set

#define MWU_REGIONENSET_RGN3WA_Set   (1UL)

Enable write access watch in this region

Definition at line 3659 of file nrf52_bitfields.h.

◆ NFCT_AUTOCOLRESCONFIG_FILTER_Msk

#define NFCT_AUTOCOLRESCONFIG_FILTER_Msk   (0x1UL << NFCT_AUTOCOLRESCONFIG_FILTER_Pos)

Bit mask of FILTER field.

Definition at line 4571 of file nrf52_bitfields.h.

◆ NFCT_AUTOCOLRESCONFIG_FILTER_Off

#define NFCT_AUTOCOLRESCONFIG_FILTER_Off   (0UL)

Auto collision resolution short frame noise filter disabled

Definition at line 4572 of file nrf52_bitfields.h.

◆ NFCT_AUTOCOLRESCONFIG_FILTER_On

#define NFCT_AUTOCOLRESCONFIG_FILTER_On   (1UL)

Auto collision resolution ignores any frames less than 7 bits

Definition at line 4573 of file nrf52_bitfields.h.

◆ NFCT_AUTOCOLRESCONFIG_FILTER_Pos

#define NFCT_AUTOCOLRESCONFIG_FILTER_Pos   (1UL)

Position of FILTER field.

Definition at line 4570 of file nrf52_bitfields.h.

◆ NFCT_AUTOCOLRESCONFIG_MODE_Disabled

#define NFCT_AUTOCOLRESCONFIG_MODE_Disabled   (1UL)

Auto collision resolution disabled

Definition at line 4579 of file nrf52_bitfields.h.

◆ NFCT_AUTOCOLRESCONFIG_MODE_Enabled

#define NFCT_AUTOCOLRESCONFIG_MODE_Enabled   (0UL)

Auto collision resolution enabled

Definition at line 4578 of file nrf52_bitfields.h.

◆ NFCT_AUTOCOLRESCONFIG_MODE_Msk

#define NFCT_AUTOCOLRESCONFIG_MODE_Msk   (0x1UL << NFCT_AUTOCOLRESCONFIG_MODE_Pos)

Bit mask of MODE field.

Definition at line 4577 of file nrf52_bitfields.h.

◆ NFCT_AUTOCOLRESCONFIG_MODE_Pos

#define NFCT_AUTOCOLRESCONFIG_MODE_Pos   (0UL)

Position of MODE field.

Definition at line 4576 of file nrf52_bitfields.h.

◆ NFCT_CURRENTLOADCTRL_CURRENTLOADCTRL_Msk

#define NFCT_CURRENTLOADCTRL_CURRENTLOADCTRL_Msk   (0x3FUL << NFCT_CURRENTLOADCTRL_CURRENTLOADCTRL_Pos)

Bit mask of CURRENTLOADCTRL field.

Definition at line 4391 of file nrf52_bitfields.h.

◆ NFCT_CURRENTLOADCTRL_CURRENTLOADCTRL_Pos

#define NFCT_CURRENTLOADCTRL_CURRENTLOADCTRL_Pos   (0UL)

Position of CURRENTLOADCTRL field.

Definition at line 4390 of file nrf52_bitfields.h.

◆ NFCT_ERRORSTATUS_EOFERROR_Msk

#define NFCT_ERRORSTATUS_EOFERROR_Msk   (0x1UL << NFCT_ERRORSTATUS_EOFERROR_Pos)

Bit mask of EOFERROR field.

Definition at line 4347 of file nrf52_bitfields.h.

◆ NFCT_ERRORSTATUS_EOFERROR_Pos

#define NFCT_ERRORSTATUS_EOFERROR_Pos   (6UL)

Position of EOFERROR field.

Definition at line 4346 of file nrf52_bitfields.h.

◆ NFCT_ERRORSTATUS_FRAMEDELAYTIMEOUT_Msk

#define NFCT_ERRORSTATUS_FRAMEDELAYTIMEOUT_Msk   (0x1UL << NFCT_ERRORSTATUS_FRAMEDELAYTIMEOUT_Pos)

Bit mask of FRAMEDELAYTIMEOUT field.

Definition at line 4363 of file nrf52_bitfields.h.

◆ NFCT_ERRORSTATUS_FRAMEDELAYTIMEOUT_Pos

#define NFCT_ERRORSTATUS_FRAMEDELAYTIMEOUT_Pos   (0UL)

Position of FRAMEDELAYTIMEOUT field.

Definition at line 4362 of file nrf52_bitfields.h.

◆ NFCT_ERRORSTATUS_INVALIDNFCSYMBOL_Msk

#define NFCT_ERRORSTATUS_INVALIDNFCSYMBOL_Msk   (0x1UL << NFCT_ERRORSTATUS_INVALIDNFCSYMBOL_Pos)

Bit mask of INVALIDNFCSYMBOL field.

Definition at line 4359 of file nrf52_bitfields.h.

◆ NFCT_ERRORSTATUS_INVALIDNFCSYMBOL_Pos

#define NFCT_ERRORSTATUS_INVALIDNFCSYMBOL_Pos   (1UL)

Position of INVALIDNFCSYMBOL field.

Definition at line 4358 of file nrf52_bitfields.h.

◆ NFCT_ERRORSTATUS_NFCFIELDTOOSTRONG_Msk

#define NFCT_ERRORSTATUS_NFCFIELDTOOSTRONG_Msk   (0x1UL << NFCT_ERRORSTATUS_NFCFIELDTOOSTRONG_Pos)

Bit mask of NFCFIELDTOOSTRONG field.

Definition at line 4355 of file nrf52_bitfields.h.

◆ NFCT_ERRORSTATUS_NFCFIELDTOOSTRONG_Pos

#define NFCT_ERRORSTATUS_NFCFIELDTOOSTRONG_Pos   (2UL)

Position of NFCFIELDTOOSTRONG field.

Definition at line 4354 of file nrf52_bitfields.h.

◆ NFCT_ERRORSTATUS_NFCFIELDTOOWEAK_Msk

#define NFCT_ERRORSTATUS_NFCFIELDTOOWEAK_Msk   (0x1UL << NFCT_ERRORSTATUS_NFCFIELDTOOWEAK_Pos)

Bit mask of NFCFIELDTOOWEAK field.

Definition at line 4351 of file nrf52_bitfields.h.

◆ NFCT_ERRORSTATUS_NFCFIELDTOOWEAK_Pos

#define NFCT_ERRORSTATUS_NFCFIELDTOOWEAK_Pos   (3UL)

Position of NFCFIELDTOOWEAK field.

Definition at line 4350 of file nrf52_bitfields.h.

◆ NFCT_FIELDPRESENT_FIELDPRESENT_FieldPresent

#define NFCT_FIELDPRESENT_FIELDPRESENT_FieldPresent   (1UL)

Valid field detected

Definition at line 4406 of file nrf52_bitfields.h.

◆ NFCT_FIELDPRESENT_FIELDPRESENT_Msk

#define NFCT_FIELDPRESENT_FIELDPRESENT_Msk   (0x1UL << NFCT_FIELDPRESENT_FIELDPRESENT_Pos)

Bit mask of FIELDPRESENT field.

Definition at line 4404 of file nrf52_bitfields.h.

◆ NFCT_FIELDPRESENT_FIELDPRESENT_NoField

#define NFCT_FIELDPRESENT_FIELDPRESENT_NoField   (0UL)

No valid field detected

Definition at line 4405 of file nrf52_bitfields.h.

◆ NFCT_FIELDPRESENT_FIELDPRESENT_Pos

#define NFCT_FIELDPRESENT_FIELDPRESENT_Pos   (0UL)

Position of FIELDPRESENT field.

Definition at line 4403 of file nrf52_bitfields.h.

◆ NFCT_FIELDPRESENT_LOCKDETECT_Locked

#define NFCT_FIELDPRESENT_LOCKDETECT_Locked   (1UL)

Locked to field

Definition at line 4400 of file nrf52_bitfields.h.

◆ NFCT_FIELDPRESENT_LOCKDETECT_Msk

#define NFCT_FIELDPRESENT_LOCKDETECT_Msk   (0x1UL << NFCT_FIELDPRESENT_LOCKDETECT_Pos)

Bit mask of LOCKDETECT field.

Definition at line 4398 of file nrf52_bitfields.h.

◆ NFCT_FIELDPRESENT_LOCKDETECT_NotLocked

#define NFCT_FIELDPRESENT_LOCKDETECT_NotLocked   (0UL)

Not locked to field

Definition at line 4399 of file nrf52_bitfields.h.

◆ NFCT_FIELDPRESENT_LOCKDETECT_Pos

#define NFCT_FIELDPRESENT_LOCKDETECT_Pos   (1UL)

Position of LOCKDETECT field.

Definition at line 4397 of file nrf52_bitfields.h.

◆ NFCT_FRAMEDELAYMAX_FRAMEDELAYMAX_Msk

#define NFCT_FRAMEDELAYMAX_FRAMEDELAYMAX_Msk   (0xFFFFUL << NFCT_FRAMEDELAYMAX_FRAMEDELAYMAX_Pos)

Bit mask of FRAMEDELAYMAX field.

Definition at line 4420 of file nrf52_bitfields.h.

◆ NFCT_FRAMEDELAYMAX_FRAMEDELAYMAX_Pos

#define NFCT_FRAMEDELAYMAX_FRAMEDELAYMAX_Pos   (0UL)

Position of FRAMEDELAYMAX field.

Definition at line 4419 of file nrf52_bitfields.h.

◆ NFCT_FRAMEDELAYMIN_FRAMEDELAYMIN_Msk

#define NFCT_FRAMEDELAYMIN_FRAMEDELAYMIN_Msk   (0xFFFFUL << NFCT_FRAMEDELAYMIN_FRAMEDELAYMIN_Pos)

Bit mask of FRAMEDELAYMIN field.

Definition at line 4413 of file nrf52_bitfields.h.

◆ NFCT_FRAMEDELAYMIN_FRAMEDELAYMIN_Pos

#define NFCT_FRAMEDELAYMIN_FRAMEDELAYMIN_Pos   (0UL)

Position of FRAMEDELAYMIN field.

Definition at line 4412 of file nrf52_bitfields.h.

◆ NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_ExactVal

#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_ExactVal   (2UL)

Frame is transmitted exactly at FRAMEDELAYMAX

Definition at line 4430 of file nrf52_bitfields.h.

◆ NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_FreeRun

#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_FreeRun   (0UL)

Transmission is independent of frame timer and will start when the STARTTX task is triggered. No timeout.

Definition at line 4428 of file nrf52_bitfields.h.

◆ NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_Msk

#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_Msk   (0x3UL << NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_Pos)

Bit mask of FRAMEDELAYMODE field.

Definition at line 4427 of file nrf52_bitfields.h.

◆ NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_Pos

#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_Pos   (0UL)

Position of FRAMEDELAYMODE field.

Definition at line 4426 of file nrf52_bitfields.h.

◆ NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_Window

#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_Window   (1UL)

Frame is transmitted between FRAMEDELAYMIN and FRAMEDELAYMAX

Definition at line 4429 of file nrf52_bitfields.h.

◆ NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_WindowGrid

#define NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_WindowGrid   (3UL)

Frame is transmitted on a bit grid between FRAMEDELAYMIN and FRAMEDELAYMAX

Definition at line 4431 of file nrf52_bitfields.h.

◆ NFCT_FRAMESTATUS_RX_CRCERROR_CRCCorrect

#define NFCT_FRAMESTATUS_RX_CRCERROR_CRCCorrect   (0UL)

Valid CRC detected

Definition at line 4383 of file nrf52_bitfields.h.

◆ NFCT_FRAMESTATUS_RX_CRCERROR_CRCError

#define NFCT_FRAMESTATUS_RX_CRCERROR_CRCError   (1UL)

CRC received does not match local check

Definition at line 4384 of file nrf52_bitfields.h.

◆ NFCT_FRAMESTATUS_RX_CRCERROR_Msk

#define NFCT_FRAMESTATUS_RX_CRCERROR_Msk   (0x1UL << NFCT_FRAMESTATUS_RX_CRCERROR_Pos)

Bit mask of CRCERROR field.

Definition at line 4382 of file nrf52_bitfields.h.

◆ NFCT_FRAMESTATUS_RX_CRCERROR_Pos

#define NFCT_FRAMESTATUS_RX_CRCERROR_Pos   (0UL)

Position of CRCERROR field.

Definition at line 4381 of file nrf52_bitfields.h.

◆ NFCT_FRAMESTATUS_RX_OVERRUN_Msk

#define NFCT_FRAMESTATUS_RX_OVERRUN_Msk   (0x1UL << NFCT_FRAMESTATUS_RX_OVERRUN_Pos)

Bit mask of OVERRUN field.

Definition at line 4370 of file nrf52_bitfields.h.

◆ NFCT_FRAMESTATUS_RX_OVERRUN_NoOverrun

#define NFCT_FRAMESTATUS_RX_OVERRUN_NoOverrun   (0UL)

No overrun detected

Definition at line 4371 of file nrf52_bitfields.h.

◆ NFCT_FRAMESTATUS_RX_OVERRUN_Overrun

#define NFCT_FRAMESTATUS_RX_OVERRUN_Overrun   (1UL)

Overrun error

Definition at line 4372 of file nrf52_bitfields.h.

◆ NFCT_FRAMESTATUS_RX_OVERRUN_Pos

#define NFCT_FRAMESTATUS_RX_OVERRUN_Pos   (3UL)

Position of OVERRUN field.

Definition at line 4369 of file nrf52_bitfields.h.

◆ NFCT_FRAMESTATUS_RX_PARITYSTATUS_Msk

#define NFCT_FRAMESTATUS_RX_PARITYSTATUS_Msk   (0x1UL << NFCT_FRAMESTATUS_RX_PARITYSTATUS_Pos)

Bit mask of PARITYSTATUS field.

Definition at line 4376 of file nrf52_bitfields.h.

◆ NFCT_FRAMESTATUS_RX_PARITYSTATUS_ParityError

#define NFCT_FRAMESTATUS_RX_PARITYSTATUS_ParityError   (1UL)

Frame received with parity error

Definition at line 4378 of file nrf52_bitfields.h.

◆ NFCT_FRAMESTATUS_RX_PARITYSTATUS_ParityOK

#define NFCT_FRAMESTATUS_RX_PARITYSTATUS_ParityOK   (0UL)

Frame received with parity OK

Definition at line 4377 of file nrf52_bitfields.h.

◆ NFCT_FRAMESTATUS_RX_PARITYSTATUS_Pos

#define NFCT_FRAMESTATUS_RX_PARITYSTATUS_Pos   (2UL)

Position of PARITYSTATUS field.

Definition at line 4375 of file nrf52_bitfields.h.

◆ NFCT_INTEN_AUTOCOLRESSTARTED_Disabled

#define NFCT_INTEN_AUTOCOLRESSTARTED_Disabled   (0UL)

Disable

Definition at line 4057 of file nrf52_bitfields.h.

◆ NFCT_INTEN_AUTOCOLRESSTARTED_Enabled

#define NFCT_INTEN_AUTOCOLRESSTARTED_Enabled   (1UL)

Enable

Definition at line 4058 of file nrf52_bitfields.h.

◆ NFCT_INTEN_AUTOCOLRESSTARTED_Msk

#define NFCT_INTEN_AUTOCOLRESSTARTED_Msk   (0x1UL << NFCT_INTEN_AUTOCOLRESSTARTED_Pos)

Bit mask of AUTOCOLRESSTARTED field.

Definition at line 4056 of file nrf52_bitfields.h.

◆ NFCT_INTEN_AUTOCOLRESSTARTED_Pos

#define NFCT_INTEN_AUTOCOLRESSTARTED_Pos   (14UL)

Position of AUTOCOLRESSTARTED field.

Definition at line 4055 of file nrf52_bitfields.h.

◆ NFCT_INTEN_COLLISION_Disabled

#define NFCT_INTEN_COLLISION_Disabled   (0UL)

Disable

Definition at line 4051 of file nrf52_bitfields.h.

◆ NFCT_INTEN_COLLISION_Enabled

#define NFCT_INTEN_COLLISION_Enabled   (1UL)

Enable

Definition at line 4052 of file nrf52_bitfields.h.

◆ NFCT_INTEN_COLLISION_Msk

#define NFCT_INTEN_COLLISION_Msk   (0x1UL << NFCT_INTEN_COLLISION_Pos)

Bit mask of COLLISION field.

Definition at line 4050 of file nrf52_bitfields.h.

◆ NFCT_INTEN_COLLISION_Pos

#define NFCT_INTEN_COLLISION_Pos   (18UL)

Position of COLLISION field.

Definition at line 4049 of file nrf52_bitfields.h.

◆ NFCT_INTEN_ENDRX_Disabled

#define NFCT_INTEN_ENDRX_Disabled   (0UL)

Disable

Definition at line 4069 of file nrf52_bitfields.h.

◆ NFCT_INTEN_ENDRX_Enabled

#define NFCT_INTEN_ENDRX_Enabled   (1UL)

Enable

Definition at line 4070 of file nrf52_bitfields.h.

◆ NFCT_INTEN_ENDRX_Msk

#define NFCT_INTEN_ENDRX_Msk   (0x1UL << NFCT_INTEN_ENDRX_Pos)

Bit mask of ENDRX field.

Definition at line 4068 of file nrf52_bitfields.h.

◆ NFCT_INTEN_ENDRX_Pos

#define NFCT_INTEN_ENDRX_Pos   (11UL)

Position of ENDRX field.

Definition at line 4067 of file nrf52_bitfields.h.

◆ NFCT_INTEN_ENDTX_Disabled

#define NFCT_INTEN_ENDTX_Disabled   (0UL)

Disable

Definition at line 4063 of file nrf52_bitfields.h.

◆ NFCT_INTEN_ENDTX_Enabled

#define NFCT_INTEN_ENDTX_Enabled   (1UL)

Enable

Definition at line 4064 of file nrf52_bitfields.h.

◆ NFCT_INTEN_ENDTX_Msk

#define NFCT_INTEN_ENDTX_Msk   (0x1UL << NFCT_INTEN_ENDTX_Pos)

Bit mask of ENDTX field.

Definition at line 4062 of file nrf52_bitfields.h.

◆ NFCT_INTEN_ENDTX_Pos

#define NFCT_INTEN_ENDTX_Pos   (12UL)

Position of ENDTX field.

Definition at line 4061 of file nrf52_bitfields.h.

◆ NFCT_INTEN_ERROR_Disabled

#define NFCT_INTEN_ERROR_Disabled   (0UL)

Disable

Definition at line 4081 of file nrf52_bitfields.h.

◆ NFCT_INTEN_ERROR_Enabled

#define NFCT_INTEN_ERROR_Enabled   (1UL)

Enable

Definition at line 4082 of file nrf52_bitfields.h.

◆ NFCT_INTEN_ERROR_Msk

#define NFCT_INTEN_ERROR_Msk   (0x1UL << NFCT_INTEN_ERROR_Pos)

Bit mask of ERROR field.

Definition at line 4080 of file nrf52_bitfields.h.

◆ NFCT_INTEN_ERROR_Pos

#define NFCT_INTEN_ERROR_Pos   (7UL)

Position of ERROR field.

Definition at line 4079 of file nrf52_bitfields.h.

◆ NFCT_INTEN_FIELDDETECTED_Disabled

#define NFCT_INTEN_FIELDDETECTED_Disabled   (0UL)

Disable

Definition at line 4117 of file nrf52_bitfields.h.

◆ NFCT_INTEN_FIELDDETECTED_Enabled

#define NFCT_INTEN_FIELDDETECTED_Enabled   (1UL)

Enable

Definition at line 4118 of file nrf52_bitfields.h.

◆ NFCT_INTEN_FIELDDETECTED_Msk

#define NFCT_INTEN_FIELDDETECTED_Msk   (0x1UL << NFCT_INTEN_FIELDDETECTED_Pos)

Bit mask of FIELDDETECTED field.

Definition at line 4116 of file nrf52_bitfields.h.

◆ NFCT_INTEN_FIELDDETECTED_Pos

#define NFCT_INTEN_FIELDDETECTED_Pos   (1UL)

Position of FIELDDETECTED field.

Definition at line 4115 of file nrf52_bitfields.h.

◆ NFCT_INTEN_FIELDLOST_Disabled

#define NFCT_INTEN_FIELDLOST_Disabled   (0UL)

Disable

Definition at line 4111 of file nrf52_bitfields.h.

◆ NFCT_INTEN_FIELDLOST_Enabled

#define NFCT_INTEN_FIELDLOST_Enabled   (1UL)

Enable

Definition at line 4112 of file nrf52_bitfields.h.

◆ NFCT_INTEN_FIELDLOST_Msk

#define NFCT_INTEN_FIELDLOST_Msk   (0x1UL << NFCT_INTEN_FIELDLOST_Pos)

Bit mask of FIELDLOST field.

Definition at line 4110 of file nrf52_bitfields.h.

◆ NFCT_INTEN_FIELDLOST_Pos

#define NFCT_INTEN_FIELDLOST_Pos   (2UL)

Position of FIELDLOST field.

Definition at line 4109 of file nrf52_bitfields.h.

◆ NFCT_INTEN_READY_Disabled

#define NFCT_INTEN_READY_Disabled   (0UL)

Disable

Definition at line 4123 of file nrf52_bitfields.h.

◆ NFCT_INTEN_READY_Enabled

#define NFCT_INTEN_READY_Enabled   (1UL)

Enable

Definition at line 4124 of file nrf52_bitfields.h.

◆ NFCT_INTEN_READY_Msk

#define NFCT_INTEN_READY_Msk   (0x1UL << NFCT_INTEN_READY_Pos)

Bit mask of READY field.

Definition at line 4122 of file nrf52_bitfields.h.

◆ NFCT_INTEN_READY_Pos

#define NFCT_INTEN_READY_Pos   (0UL)

Position of READY field.

Definition at line 4121 of file nrf52_bitfields.h.

◆ NFCT_INTEN_RXERROR_Disabled

#define NFCT_INTEN_RXERROR_Disabled   (0UL)

Disable

Definition at line 4075 of file nrf52_bitfields.h.

◆ NFCT_INTEN_RXERROR_Enabled

#define NFCT_INTEN_RXERROR_Enabled   (1UL)

Enable

Definition at line 4076 of file nrf52_bitfields.h.

◆ NFCT_INTEN_RXERROR_Msk

#define NFCT_INTEN_RXERROR_Msk   (0x1UL << NFCT_INTEN_RXERROR_Pos)

Bit mask of RXERROR field.

Definition at line 4074 of file nrf52_bitfields.h.

◆ NFCT_INTEN_RXERROR_Pos

#define NFCT_INTEN_RXERROR_Pos   (10UL)

Position of RXERROR field.

Definition at line 4073 of file nrf52_bitfields.h.

◆ NFCT_INTEN_RXFRAMEEND_Disabled

#define NFCT_INTEN_RXFRAMEEND_Disabled   (0UL)

Disable

Definition at line 4087 of file nrf52_bitfields.h.

◆ NFCT_INTEN_RXFRAMEEND_Enabled

#define NFCT_INTEN_RXFRAMEEND_Enabled   (1UL)

Enable

Definition at line 4088 of file nrf52_bitfields.h.

◆ NFCT_INTEN_RXFRAMEEND_Msk

#define NFCT_INTEN_RXFRAMEEND_Msk   (0x1UL << NFCT_INTEN_RXFRAMEEND_Pos)

Bit mask of RXFRAMEEND field.

Definition at line 4086 of file nrf52_bitfields.h.

◆ NFCT_INTEN_RXFRAMEEND_Pos

#define NFCT_INTEN_RXFRAMEEND_Pos   (6UL)

Position of RXFRAMEEND field.

Definition at line 4085 of file nrf52_bitfields.h.

◆ NFCT_INTEN_RXFRAMESTART_Disabled

#define NFCT_INTEN_RXFRAMESTART_Disabled   (0UL)

Disable

Definition at line 4093 of file nrf52_bitfields.h.

◆ NFCT_INTEN_RXFRAMESTART_Enabled

#define NFCT_INTEN_RXFRAMESTART_Enabled   (1UL)

Enable

Definition at line 4094 of file nrf52_bitfields.h.

◆ NFCT_INTEN_RXFRAMESTART_Msk

#define NFCT_INTEN_RXFRAMESTART_Msk   (0x1UL << NFCT_INTEN_RXFRAMESTART_Pos)

Bit mask of RXFRAMESTART field.

Definition at line 4092 of file nrf52_bitfields.h.

◆ NFCT_INTEN_RXFRAMESTART_Pos

#define NFCT_INTEN_RXFRAMESTART_Pos   (5UL)

Position of RXFRAMESTART field.

Definition at line 4091 of file nrf52_bitfields.h.

◆ NFCT_INTEN_SELECTED_Disabled

#define NFCT_INTEN_SELECTED_Disabled   (0UL)

Disable

Definition at line 4045 of file nrf52_bitfields.h.

◆ NFCT_INTEN_SELECTED_Enabled

#define NFCT_INTEN_SELECTED_Enabled   (1UL)

Enable

Definition at line 4046 of file nrf52_bitfields.h.

◆ NFCT_INTEN_SELECTED_Msk

#define NFCT_INTEN_SELECTED_Msk   (0x1UL << NFCT_INTEN_SELECTED_Pos)

Bit mask of SELECTED field.

Definition at line 4044 of file nrf52_bitfields.h.

◆ NFCT_INTEN_SELECTED_Pos

#define NFCT_INTEN_SELECTED_Pos   (19UL)

Position of SELECTED field.

Definition at line 4043 of file nrf52_bitfields.h.

◆ NFCT_INTEN_STARTED_Disabled

#define NFCT_INTEN_STARTED_Disabled   (0UL)

Disable

Definition at line 4039 of file nrf52_bitfields.h.

◆ NFCT_INTEN_STARTED_Enabled

#define NFCT_INTEN_STARTED_Enabled   (1UL)

Enable

Definition at line 4040 of file nrf52_bitfields.h.

◆ NFCT_INTEN_STARTED_Msk

#define NFCT_INTEN_STARTED_Msk   (0x1UL << NFCT_INTEN_STARTED_Pos)

Bit mask of STARTED field.

Definition at line 4038 of file nrf52_bitfields.h.

◆ NFCT_INTEN_STARTED_Pos

#define NFCT_INTEN_STARTED_Pos   (20UL)

Position of STARTED field.

Definition at line 4037 of file nrf52_bitfields.h.

◆ NFCT_INTEN_TXFRAMEEND_Disabled

#define NFCT_INTEN_TXFRAMEEND_Disabled   (0UL)

Disable

Definition at line 4099 of file nrf52_bitfields.h.

◆ NFCT_INTEN_TXFRAMEEND_Enabled

#define NFCT_INTEN_TXFRAMEEND_Enabled   (1UL)

Enable

Definition at line 4100 of file nrf52_bitfields.h.

◆ NFCT_INTEN_TXFRAMEEND_Msk

#define NFCT_INTEN_TXFRAMEEND_Msk   (0x1UL << NFCT_INTEN_TXFRAMEEND_Pos)

Bit mask of TXFRAMEEND field.

Definition at line 4098 of file nrf52_bitfields.h.

◆ NFCT_INTEN_TXFRAMEEND_Pos

#define NFCT_INTEN_TXFRAMEEND_Pos   (4UL)

Position of TXFRAMEEND field.

Definition at line 4097 of file nrf52_bitfields.h.

◆ NFCT_INTEN_TXFRAMESTART_Disabled

#define NFCT_INTEN_TXFRAMESTART_Disabled   (0UL)

Disable

Definition at line 4105 of file nrf52_bitfields.h.

◆ NFCT_INTEN_TXFRAMESTART_Enabled

#define NFCT_INTEN_TXFRAMESTART_Enabled   (1UL)

Enable

Definition at line 4106 of file nrf52_bitfields.h.

◆ NFCT_INTEN_TXFRAMESTART_Msk

#define NFCT_INTEN_TXFRAMESTART_Msk   (0x1UL << NFCT_INTEN_TXFRAMESTART_Pos)

Bit mask of TXFRAMESTART field.

Definition at line 4104 of file nrf52_bitfields.h.

◆ NFCT_INTEN_TXFRAMESTART_Pos

#define NFCT_INTEN_TXFRAMESTART_Pos   (3UL)

Position of TXFRAMESTART field.

Definition at line 4103 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_AUTOCOLRESSTARTED_Clear

#define NFCT_INTENCLR_AUTOCOLRESSTARTED_Clear   (1UL)

Disable

Definition at line 4263 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_AUTOCOLRESSTARTED_Disabled

#define NFCT_INTENCLR_AUTOCOLRESSTARTED_Disabled   (0UL)

Read: Disabled

Definition at line 4261 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_AUTOCOLRESSTARTED_Enabled

#define NFCT_INTENCLR_AUTOCOLRESSTARTED_Enabled   (1UL)

Read: Enabled

Definition at line 4262 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_AUTOCOLRESSTARTED_Msk

#define NFCT_INTENCLR_AUTOCOLRESSTARTED_Msk   (0x1UL << NFCT_INTENCLR_AUTOCOLRESSTARTED_Pos)

Bit mask of AUTOCOLRESSTARTED field.

Definition at line 4260 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_AUTOCOLRESSTARTED_Pos

#define NFCT_INTENCLR_AUTOCOLRESSTARTED_Pos   (14UL)

Position of AUTOCOLRESSTARTED field.

Definition at line 4259 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_COLLISION_Clear

#define NFCT_INTENCLR_COLLISION_Clear   (1UL)

Disable

Definition at line 4256 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_COLLISION_Disabled

#define NFCT_INTENCLR_COLLISION_Disabled   (0UL)

Read: Disabled

Definition at line 4254 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_COLLISION_Enabled

#define NFCT_INTENCLR_COLLISION_Enabled   (1UL)

Read: Enabled

Definition at line 4255 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_COLLISION_Msk

#define NFCT_INTENCLR_COLLISION_Msk   (0x1UL << NFCT_INTENCLR_COLLISION_Pos)

Bit mask of COLLISION field.

Definition at line 4253 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_COLLISION_Pos

#define NFCT_INTENCLR_COLLISION_Pos   (18UL)

Position of COLLISION field.

Definition at line 4252 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_ENDRX_Clear

#define NFCT_INTENCLR_ENDRX_Clear   (1UL)

Disable

Definition at line 4277 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_ENDRX_Disabled

#define NFCT_INTENCLR_ENDRX_Disabled   (0UL)

Read: Disabled

Definition at line 4275 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_ENDRX_Enabled

#define NFCT_INTENCLR_ENDRX_Enabled   (1UL)

Read: Enabled

Definition at line 4276 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_ENDRX_Msk

#define NFCT_INTENCLR_ENDRX_Msk   (0x1UL << NFCT_INTENCLR_ENDRX_Pos)

Bit mask of ENDRX field.

Definition at line 4274 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_ENDRX_Pos

#define NFCT_INTENCLR_ENDRX_Pos   (11UL)

Position of ENDRX field.

Definition at line 4273 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_ENDTX_Clear

#define NFCT_INTENCLR_ENDTX_Clear   (1UL)

Disable

Definition at line 4270 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_ENDTX_Disabled

#define NFCT_INTENCLR_ENDTX_Disabled   (0UL)

Read: Disabled

Definition at line 4268 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_ENDTX_Enabled

#define NFCT_INTENCLR_ENDTX_Enabled   (1UL)

Read: Enabled

Definition at line 4269 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_ENDTX_Msk

#define NFCT_INTENCLR_ENDTX_Msk   (0x1UL << NFCT_INTENCLR_ENDTX_Pos)

Bit mask of ENDTX field.

Definition at line 4267 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_ENDTX_Pos

#define NFCT_INTENCLR_ENDTX_Pos   (12UL)

Position of ENDTX field.

Definition at line 4266 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_ERROR_Clear

#define NFCT_INTENCLR_ERROR_Clear   (1UL)

Disable

Definition at line 4291 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_ERROR_Disabled

#define NFCT_INTENCLR_ERROR_Disabled   (0UL)

Read: Disabled

Definition at line 4289 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_ERROR_Enabled

#define NFCT_INTENCLR_ERROR_Enabled   (1UL)

Read: Enabled

Definition at line 4290 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_ERROR_Msk

#define NFCT_INTENCLR_ERROR_Msk   (0x1UL << NFCT_INTENCLR_ERROR_Pos)

Bit mask of ERROR field.

Definition at line 4288 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_ERROR_Pos

#define NFCT_INTENCLR_ERROR_Pos   (7UL)

Position of ERROR field.

Definition at line 4287 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_FIELDDETECTED_Clear

#define NFCT_INTENCLR_FIELDDETECTED_Clear   (1UL)

Disable

Definition at line 4333 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_FIELDDETECTED_Disabled

#define NFCT_INTENCLR_FIELDDETECTED_Disabled   (0UL)

Read: Disabled

Definition at line 4331 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_FIELDDETECTED_Enabled

#define NFCT_INTENCLR_FIELDDETECTED_Enabled   (1UL)

Read: Enabled

Definition at line 4332 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_FIELDDETECTED_Msk

#define NFCT_INTENCLR_FIELDDETECTED_Msk   (0x1UL << NFCT_INTENCLR_FIELDDETECTED_Pos)

Bit mask of FIELDDETECTED field.

Definition at line 4330 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_FIELDDETECTED_Pos

#define NFCT_INTENCLR_FIELDDETECTED_Pos   (1UL)

Position of FIELDDETECTED field.

Definition at line 4329 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_FIELDLOST_Clear

#define NFCT_INTENCLR_FIELDLOST_Clear   (1UL)

Disable

Definition at line 4326 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_FIELDLOST_Disabled

#define NFCT_INTENCLR_FIELDLOST_Disabled   (0UL)

Read: Disabled

Definition at line 4324 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_FIELDLOST_Enabled

#define NFCT_INTENCLR_FIELDLOST_Enabled   (1UL)

Read: Enabled

Definition at line 4325 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_FIELDLOST_Msk

#define NFCT_INTENCLR_FIELDLOST_Msk   (0x1UL << NFCT_INTENCLR_FIELDLOST_Pos)

Bit mask of FIELDLOST field.

Definition at line 4323 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_FIELDLOST_Pos

#define NFCT_INTENCLR_FIELDLOST_Pos   (2UL)

Position of FIELDLOST field.

Definition at line 4322 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_READY_Clear

#define NFCT_INTENCLR_READY_Clear   (1UL)

Disable

Definition at line 4340 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_READY_Disabled

#define NFCT_INTENCLR_READY_Disabled   (0UL)

Read: Disabled

Definition at line 4338 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_READY_Enabled

#define NFCT_INTENCLR_READY_Enabled   (1UL)

Read: Enabled

Definition at line 4339 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_READY_Msk

#define NFCT_INTENCLR_READY_Msk   (0x1UL << NFCT_INTENCLR_READY_Pos)

Bit mask of READY field.

Definition at line 4337 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_READY_Pos

#define NFCT_INTENCLR_READY_Pos   (0UL)

Position of READY field.

Definition at line 4336 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_RXERROR_Clear

#define NFCT_INTENCLR_RXERROR_Clear   (1UL)

Disable

Definition at line 4284 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_RXERROR_Disabled

#define NFCT_INTENCLR_RXERROR_Disabled   (0UL)

Read: Disabled

Definition at line 4282 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_RXERROR_Enabled

#define NFCT_INTENCLR_RXERROR_Enabled   (1UL)

Read: Enabled

Definition at line 4283 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_RXERROR_Msk

#define NFCT_INTENCLR_RXERROR_Msk   (0x1UL << NFCT_INTENCLR_RXERROR_Pos)

Bit mask of RXERROR field.

Definition at line 4281 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_RXERROR_Pos

#define NFCT_INTENCLR_RXERROR_Pos   (10UL)

Position of RXERROR field.

Definition at line 4280 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_RXFRAMEEND_Clear

#define NFCT_INTENCLR_RXFRAMEEND_Clear   (1UL)

Disable

Definition at line 4298 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_RXFRAMEEND_Disabled

#define NFCT_INTENCLR_RXFRAMEEND_Disabled   (0UL)

Read: Disabled

Definition at line 4296 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_RXFRAMEEND_Enabled

#define NFCT_INTENCLR_RXFRAMEEND_Enabled   (1UL)

Read: Enabled

Definition at line 4297 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_RXFRAMEEND_Msk

#define NFCT_INTENCLR_RXFRAMEEND_Msk   (0x1UL << NFCT_INTENCLR_RXFRAMEEND_Pos)

Bit mask of RXFRAMEEND field.

Definition at line 4295 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_RXFRAMEEND_Pos

#define NFCT_INTENCLR_RXFRAMEEND_Pos   (6UL)

Position of RXFRAMEEND field.

Definition at line 4294 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_RXFRAMESTART_Clear

#define NFCT_INTENCLR_RXFRAMESTART_Clear   (1UL)

Disable

Definition at line 4305 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_RXFRAMESTART_Disabled

#define NFCT_INTENCLR_RXFRAMESTART_Disabled   (0UL)

Read: Disabled

Definition at line 4303 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_RXFRAMESTART_Enabled

#define NFCT_INTENCLR_RXFRAMESTART_Enabled   (1UL)

Read: Enabled

Definition at line 4304 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_RXFRAMESTART_Msk

#define NFCT_INTENCLR_RXFRAMESTART_Msk   (0x1UL << NFCT_INTENCLR_RXFRAMESTART_Pos)

Bit mask of RXFRAMESTART field.

Definition at line 4302 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_RXFRAMESTART_Pos

#define NFCT_INTENCLR_RXFRAMESTART_Pos   (5UL)

Position of RXFRAMESTART field.

Definition at line 4301 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_SELECTED_Clear

#define NFCT_INTENCLR_SELECTED_Clear   (1UL)

Disable

Definition at line 4249 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_SELECTED_Disabled

#define NFCT_INTENCLR_SELECTED_Disabled   (0UL)

Read: Disabled

Definition at line 4247 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_SELECTED_Enabled

#define NFCT_INTENCLR_SELECTED_Enabled   (1UL)

Read: Enabled

Definition at line 4248 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_SELECTED_Msk

#define NFCT_INTENCLR_SELECTED_Msk   (0x1UL << NFCT_INTENCLR_SELECTED_Pos)

Bit mask of SELECTED field.

Definition at line 4246 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_SELECTED_Pos

#define NFCT_INTENCLR_SELECTED_Pos   (19UL)

Position of SELECTED field.

Definition at line 4245 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_STARTED_Clear

#define NFCT_INTENCLR_STARTED_Clear   (1UL)

Disable

Definition at line 4242 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_STARTED_Disabled

#define NFCT_INTENCLR_STARTED_Disabled   (0UL)

Read: Disabled

Definition at line 4240 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_STARTED_Enabled

#define NFCT_INTENCLR_STARTED_Enabled   (1UL)

Read: Enabled

Definition at line 4241 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_STARTED_Msk

#define NFCT_INTENCLR_STARTED_Msk   (0x1UL << NFCT_INTENCLR_STARTED_Pos)

Bit mask of STARTED field.

Definition at line 4239 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_STARTED_Pos

#define NFCT_INTENCLR_STARTED_Pos   (20UL)

Position of STARTED field.

Definition at line 4238 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_TXFRAMEEND_Clear

#define NFCT_INTENCLR_TXFRAMEEND_Clear   (1UL)

Disable

Definition at line 4312 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_TXFRAMEEND_Disabled

#define NFCT_INTENCLR_TXFRAMEEND_Disabled   (0UL)

Read: Disabled

Definition at line 4310 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_TXFRAMEEND_Enabled

#define NFCT_INTENCLR_TXFRAMEEND_Enabled   (1UL)

Read: Enabled

Definition at line 4311 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_TXFRAMEEND_Msk

#define NFCT_INTENCLR_TXFRAMEEND_Msk   (0x1UL << NFCT_INTENCLR_TXFRAMEEND_Pos)

Bit mask of TXFRAMEEND field.

Definition at line 4309 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_TXFRAMEEND_Pos

#define NFCT_INTENCLR_TXFRAMEEND_Pos   (4UL)

Position of TXFRAMEEND field.

Definition at line 4308 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_TXFRAMESTART_Clear

#define NFCT_INTENCLR_TXFRAMESTART_Clear   (1UL)

Disable

Definition at line 4319 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_TXFRAMESTART_Disabled

#define NFCT_INTENCLR_TXFRAMESTART_Disabled   (0UL)

Read: Disabled

Definition at line 4317 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_TXFRAMESTART_Enabled

#define NFCT_INTENCLR_TXFRAMESTART_Enabled   (1UL)

Read: Enabled

Definition at line 4318 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_TXFRAMESTART_Msk

#define NFCT_INTENCLR_TXFRAMESTART_Msk   (0x1UL << NFCT_INTENCLR_TXFRAMESTART_Pos)

Bit mask of TXFRAMESTART field.

Definition at line 4316 of file nrf52_bitfields.h.

◆ NFCT_INTENCLR_TXFRAMESTART_Pos

#define NFCT_INTENCLR_TXFRAMESTART_Pos   (3UL)

Position of TXFRAMESTART field.

Definition at line 4315 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_AUTOCOLRESSTARTED_Disabled

#define NFCT_INTENSET_AUTOCOLRESSTARTED_Disabled   (0UL)

Read: Disabled

Definition at line 4153 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_AUTOCOLRESSTARTED_Enabled

#define NFCT_INTENSET_AUTOCOLRESSTARTED_Enabled   (1UL)

Read: Enabled

Definition at line 4154 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_AUTOCOLRESSTARTED_Msk

#define NFCT_INTENSET_AUTOCOLRESSTARTED_Msk   (0x1UL << NFCT_INTENSET_AUTOCOLRESSTARTED_Pos)

Bit mask of AUTOCOLRESSTARTED field.

Definition at line 4152 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_AUTOCOLRESSTARTED_Pos

#define NFCT_INTENSET_AUTOCOLRESSTARTED_Pos   (14UL)

Position of AUTOCOLRESSTARTED field.

Definition at line 4151 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_AUTOCOLRESSTARTED_Set

#define NFCT_INTENSET_AUTOCOLRESSTARTED_Set   (1UL)

Enable

Definition at line 4155 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_COLLISION_Disabled

#define NFCT_INTENSET_COLLISION_Disabled   (0UL)

Read: Disabled

Definition at line 4146 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_COLLISION_Enabled

#define NFCT_INTENSET_COLLISION_Enabled   (1UL)

Read: Enabled

Definition at line 4147 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_COLLISION_Msk

#define NFCT_INTENSET_COLLISION_Msk   (0x1UL << NFCT_INTENSET_COLLISION_Pos)

Bit mask of COLLISION field.

Definition at line 4145 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_COLLISION_Pos

#define NFCT_INTENSET_COLLISION_Pos   (18UL)

Position of COLLISION field.

Definition at line 4144 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_COLLISION_Set

#define NFCT_INTENSET_COLLISION_Set   (1UL)

Enable

Definition at line 4148 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_ENDRX_Disabled

#define NFCT_INTENSET_ENDRX_Disabled   (0UL)

Read: Disabled

Definition at line 4167 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_ENDRX_Enabled

#define NFCT_INTENSET_ENDRX_Enabled   (1UL)

Read: Enabled

Definition at line 4168 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_ENDRX_Msk

#define NFCT_INTENSET_ENDRX_Msk   (0x1UL << NFCT_INTENSET_ENDRX_Pos)

Bit mask of ENDRX field.

Definition at line 4166 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_ENDRX_Pos

#define NFCT_INTENSET_ENDRX_Pos   (11UL)

Position of ENDRX field.

Definition at line 4165 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_ENDRX_Set

#define NFCT_INTENSET_ENDRX_Set   (1UL)

Enable

Definition at line 4169 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_ENDTX_Disabled

#define NFCT_INTENSET_ENDTX_Disabled   (0UL)

Read: Disabled

Definition at line 4160 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_ENDTX_Enabled

#define NFCT_INTENSET_ENDTX_Enabled   (1UL)

Read: Enabled

Definition at line 4161 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_ENDTX_Msk

#define NFCT_INTENSET_ENDTX_Msk   (0x1UL << NFCT_INTENSET_ENDTX_Pos)

Bit mask of ENDTX field.

Definition at line 4159 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_ENDTX_Pos

#define NFCT_INTENSET_ENDTX_Pos   (12UL)

Position of ENDTX field.

Definition at line 4158 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_ENDTX_Set

#define NFCT_INTENSET_ENDTX_Set   (1UL)

Enable

Definition at line 4162 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_ERROR_Disabled

#define NFCT_INTENSET_ERROR_Disabled   (0UL)

Read: Disabled

Definition at line 4181 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_ERROR_Enabled

#define NFCT_INTENSET_ERROR_Enabled   (1UL)

Read: Enabled

Definition at line 4182 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_ERROR_Msk

#define NFCT_INTENSET_ERROR_Msk   (0x1UL << NFCT_INTENSET_ERROR_Pos)

Bit mask of ERROR field.

Definition at line 4180 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_ERROR_Pos

#define NFCT_INTENSET_ERROR_Pos   (7UL)

Position of ERROR field.

Definition at line 4179 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_ERROR_Set

#define NFCT_INTENSET_ERROR_Set   (1UL)

Enable

Definition at line 4183 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_FIELDDETECTED_Disabled

#define NFCT_INTENSET_FIELDDETECTED_Disabled   (0UL)

Read: Disabled

Definition at line 4223 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_FIELDDETECTED_Enabled

#define NFCT_INTENSET_FIELDDETECTED_Enabled   (1UL)

Read: Enabled

Definition at line 4224 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_FIELDDETECTED_Msk

#define NFCT_INTENSET_FIELDDETECTED_Msk   (0x1UL << NFCT_INTENSET_FIELDDETECTED_Pos)

Bit mask of FIELDDETECTED field.

Definition at line 4222 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_FIELDDETECTED_Pos

#define NFCT_INTENSET_FIELDDETECTED_Pos   (1UL)

Position of FIELDDETECTED field.

Definition at line 4221 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_FIELDDETECTED_Set

#define NFCT_INTENSET_FIELDDETECTED_Set   (1UL)

Enable

Definition at line 4225 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_FIELDLOST_Disabled

#define NFCT_INTENSET_FIELDLOST_Disabled   (0UL)

Read: Disabled

Definition at line 4216 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_FIELDLOST_Enabled

#define NFCT_INTENSET_FIELDLOST_Enabled   (1UL)

Read: Enabled

Definition at line 4217 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_FIELDLOST_Msk

#define NFCT_INTENSET_FIELDLOST_Msk   (0x1UL << NFCT_INTENSET_FIELDLOST_Pos)

Bit mask of FIELDLOST field.

Definition at line 4215 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_FIELDLOST_Pos

#define NFCT_INTENSET_FIELDLOST_Pos   (2UL)

Position of FIELDLOST field.

Definition at line 4214 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_FIELDLOST_Set

#define NFCT_INTENSET_FIELDLOST_Set   (1UL)

Enable

Definition at line 4218 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_READY_Disabled

#define NFCT_INTENSET_READY_Disabled   (0UL)

Read: Disabled

Definition at line 4230 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_READY_Enabled

#define NFCT_INTENSET_READY_Enabled   (1UL)

Read: Enabled

Definition at line 4231 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_READY_Msk

#define NFCT_INTENSET_READY_Msk   (0x1UL << NFCT_INTENSET_READY_Pos)

Bit mask of READY field.

Definition at line 4229 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_READY_Pos

#define NFCT_INTENSET_READY_Pos   (0UL)

Position of READY field.

Definition at line 4228 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_READY_Set

#define NFCT_INTENSET_READY_Set   (1UL)

Enable

Definition at line 4232 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_RXERROR_Disabled

#define NFCT_INTENSET_RXERROR_Disabled   (0UL)

Read: Disabled

Definition at line 4174 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_RXERROR_Enabled

#define NFCT_INTENSET_RXERROR_Enabled   (1UL)

Read: Enabled

Definition at line 4175 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_RXERROR_Msk

#define NFCT_INTENSET_RXERROR_Msk   (0x1UL << NFCT_INTENSET_RXERROR_Pos)

Bit mask of RXERROR field.

Definition at line 4173 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_RXERROR_Pos

#define NFCT_INTENSET_RXERROR_Pos   (10UL)

Position of RXERROR field.

Definition at line 4172 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_RXERROR_Set

#define NFCT_INTENSET_RXERROR_Set   (1UL)

Enable

Definition at line 4176 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_RXFRAMEEND_Disabled

#define NFCT_INTENSET_RXFRAMEEND_Disabled   (0UL)

Read: Disabled

Definition at line 4188 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_RXFRAMEEND_Enabled

#define NFCT_INTENSET_RXFRAMEEND_Enabled   (1UL)

Read: Enabled

Definition at line 4189 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_RXFRAMEEND_Msk

#define NFCT_INTENSET_RXFRAMEEND_Msk   (0x1UL << NFCT_INTENSET_RXFRAMEEND_Pos)

Bit mask of RXFRAMEEND field.

Definition at line 4187 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_RXFRAMEEND_Pos

#define NFCT_INTENSET_RXFRAMEEND_Pos   (6UL)

Position of RXFRAMEEND field.

Definition at line 4186 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_RXFRAMEEND_Set

#define NFCT_INTENSET_RXFRAMEEND_Set   (1UL)

Enable

Definition at line 4190 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_RXFRAMESTART_Disabled

#define NFCT_INTENSET_RXFRAMESTART_Disabled   (0UL)

Read: Disabled

Definition at line 4195 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_RXFRAMESTART_Enabled

#define NFCT_INTENSET_RXFRAMESTART_Enabled   (1UL)

Read: Enabled

Definition at line 4196 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_RXFRAMESTART_Msk

#define NFCT_INTENSET_RXFRAMESTART_Msk   (0x1UL << NFCT_INTENSET_RXFRAMESTART_Pos)

Bit mask of RXFRAMESTART field.

Definition at line 4194 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_RXFRAMESTART_Pos

#define NFCT_INTENSET_RXFRAMESTART_Pos   (5UL)

Position of RXFRAMESTART field.

Definition at line 4193 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_RXFRAMESTART_Set

#define NFCT_INTENSET_RXFRAMESTART_Set   (1UL)

Enable

Definition at line 4197 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_SELECTED_Disabled

#define NFCT_INTENSET_SELECTED_Disabled   (0UL)

Read: Disabled

Definition at line 4139 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_SELECTED_Enabled

#define NFCT_INTENSET_SELECTED_Enabled   (1UL)

Read: Enabled

Definition at line 4140 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_SELECTED_Msk

#define NFCT_INTENSET_SELECTED_Msk   (0x1UL << NFCT_INTENSET_SELECTED_Pos)

Bit mask of SELECTED field.

Definition at line 4138 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_SELECTED_Pos

#define NFCT_INTENSET_SELECTED_Pos   (19UL)

Position of SELECTED field.

Definition at line 4137 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_SELECTED_Set

#define NFCT_INTENSET_SELECTED_Set   (1UL)

Enable

Definition at line 4141 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_STARTED_Disabled

#define NFCT_INTENSET_STARTED_Disabled   (0UL)

Read: Disabled

Definition at line 4132 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_STARTED_Enabled

#define NFCT_INTENSET_STARTED_Enabled   (1UL)

Read: Enabled

Definition at line 4133 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_STARTED_Msk

#define NFCT_INTENSET_STARTED_Msk   (0x1UL << NFCT_INTENSET_STARTED_Pos)

Bit mask of STARTED field.

Definition at line 4131 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_STARTED_Pos

#define NFCT_INTENSET_STARTED_Pos   (20UL)

Position of STARTED field.

Definition at line 4130 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_STARTED_Set

#define NFCT_INTENSET_STARTED_Set   (1UL)

Enable

Definition at line 4134 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_TXFRAMEEND_Disabled

#define NFCT_INTENSET_TXFRAMEEND_Disabled   (0UL)

Read: Disabled

Definition at line 4202 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_TXFRAMEEND_Enabled

#define NFCT_INTENSET_TXFRAMEEND_Enabled   (1UL)

Read: Enabled

Definition at line 4203 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_TXFRAMEEND_Msk

#define NFCT_INTENSET_TXFRAMEEND_Msk   (0x1UL << NFCT_INTENSET_TXFRAMEEND_Pos)

Bit mask of TXFRAMEEND field.

Definition at line 4201 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_TXFRAMEEND_Pos

#define NFCT_INTENSET_TXFRAMEEND_Pos   (4UL)

Position of TXFRAMEEND field.

Definition at line 4200 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_TXFRAMEEND_Set

#define NFCT_INTENSET_TXFRAMEEND_Set   (1UL)

Enable

Definition at line 4204 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_TXFRAMESTART_Disabled

#define NFCT_INTENSET_TXFRAMESTART_Disabled   (0UL)

Read: Disabled

Definition at line 4209 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_TXFRAMESTART_Enabled

#define NFCT_INTENSET_TXFRAMESTART_Enabled   (1UL)

Read: Enabled

Definition at line 4210 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_TXFRAMESTART_Msk

#define NFCT_INTENSET_TXFRAMESTART_Msk   (0x1UL << NFCT_INTENSET_TXFRAMESTART_Pos)

Bit mask of TXFRAMESTART field.

Definition at line 4208 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_TXFRAMESTART_Pos

#define NFCT_INTENSET_TXFRAMESTART_Pos   (3UL)

Position of TXFRAMESTART field.

Definition at line 4207 of file nrf52_bitfields.h.

◆ NFCT_INTENSET_TXFRAMESTART_Set

#define NFCT_INTENSET_TXFRAMESTART_Set   (1UL)

Enable

Definition at line 4211 of file nrf52_bitfields.h.

◆ NFCT_MAXLEN_MAXLEN_Msk

#define NFCT_MAXLEN_MAXLEN_Msk   (0x1FFUL << NFCT_MAXLEN_MAXLEN_Pos)

Bit mask of MAXLEN field.

Definition at line 4445 of file nrf52_bitfields.h.

◆ NFCT_MAXLEN_MAXLEN_Pos

#define NFCT_MAXLEN_MAXLEN_Pos   (0UL)

Position of MAXLEN field.

Definition at line 4444 of file nrf52_bitfields.h.

◆ NFCT_NFCID1_2ND_LAST_NFCID1_T_Msk

#define NFCT_NFCID1_2ND_LAST_NFCID1_T_Msk   (0xFFUL << NFCT_NFCID1_2ND_LAST_NFCID1_T_Pos)

Bit mask of NFCID1_T field.

Definition at line 4541 of file nrf52_bitfields.h.

◆ NFCT_NFCID1_2ND_LAST_NFCID1_T_Pos

#define NFCT_NFCID1_2ND_LAST_NFCID1_T_Pos   (16UL)

Position of NFCID1_T field.

Definition at line 4540 of file nrf52_bitfields.h.

◆ NFCT_NFCID1_2ND_LAST_NFCID1_U_Msk

#define NFCT_NFCID1_2ND_LAST_NFCID1_U_Msk   (0xFFUL << NFCT_NFCID1_2ND_LAST_NFCID1_U_Pos)

Bit mask of NFCID1_U field.

Definition at line 4545 of file nrf52_bitfields.h.

◆ NFCT_NFCID1_2ND_LAST_NFCID1_U_Pos

#define NFCT_NFCID1_2ND_LAST_NFCID1_U_Pos   (8UL)

Position of NFCID1_U field.

Definition at line 4544 of file nrf52_bitfields.h.

◆ NFCT_NFCID1_2ND_LAST_NFCID1_V_Msk

#define NFCT_NFCID1_2ND_LAST_NFCID1_V_Msk   (0xFFUL << NFCT_NFCID1_2ND_LAST_NFCID1_V_Pos)

Bit mask of NFCID1_V field.

Definition at line 4549 of file nrf52_bitfields.h.

◆ NFCT_NFCID1_2ND_LAST_NFCID1_V_Pos

#define NFCT_NFCID1_2ND_LAST_NFCID1_V_Pos   (0UL)

Position of NFCID1_V field.

Definition at line 4548 of file nrf52_bitfields.h.

◆ NFCT_NFCID1_3RD_LAST_NFCID1_Q_Msk

#define NFCT_NFCID1_3RD_LAST_NFCID1_Q_Msk   (0xFFUL << NFCT_NFCID1_3RD_LAST_NFCID1_Q_Pos)

Bit mask of NFCID1_Q field.

Definition at line 4556 of file nrf52_bitfields.h.

◆ NFCT_NFCID1_3RD_LAST_NFCID1_Q_Pos

#define NFCT_NFCID1_3RD_LAST_NFCID1_Q_Pos   (16UL)

Position of NFCID1_Q field.

Definition at line 4555 of file nrf52_bitfields.h.

◆ NFCT_NFCID1_3RD_LAST_NFCID1_R_Msk

#define NFCT_NFCID1_3RD_LAST_NFCID1_R_Msk   (0xFFUL << NFCT_NFCID1_3RD_LAST_NFCID1_R_Pos)

Bit mask of NFCID1_R field.

Definition at line 4560 of file nrf52_bitfields.h.

◆ NFCT_NFCID1_3RD_LAST_NFCID1_R_Pos

#define NFCT_NFCID1_3RD_LAST_NFCID1_R_Pos   (8UL)

Position of NFCID1_R field.

Definition at line 4559 of file nrf52_bitfields.h.

◆ NFCT_NFCID1_3RD_LAST_NFCID1_S_Msk

#define NFCT_NFCID1_3RD_LAST_NFCID1_S_Msk   (0xFFUL << NFCT_NFCID1_3RD_LAST_NFCID1_S_Pos)

Bit mask of NFCID1_S field.

Definition at line 4564 of file nrf52_bitfields.h.

◆ NFCT_NFCID1_3RD_LAST_NFCID1_S_Pos

#define NFCT_NFCID1_3RD_LAST_NFCID1_S_Pos   (0UL)

Position of NFCID1_S field.

Definition at line 4563 of file nrf52_bitfields.h.

◆ NFCT_NFCID1_LAST_NFCID1_W_Msk

#define NFCT_NFCID1_LAST_NFCID1_W_Msk   (0xFFUL << NFCT_NFCID1_LAST_NFCID1_W_Pos)

Bit mask of NFCID1_W field.

Definition at line 4522 of file nrf52_bitfields.h.

◆ NFCT_NFCID1_LAST_NFCID1_W_Pos

#define NFCT_NFCID1_LAST_NFCID1_W_Pos   (24UL)

Position of NFCID1_W field.

Definition at line 4521 of file nrf52_bitfields.h.

◆ NFCT_NFCID1_LAST_NFCID1_X_Msk

#define NFCT_NFCID1_LAST_NFCID1_X_Msk   (0xFFUL << NFCT_NFCID1_LAST_NFCID1_X_Pos)

Bit mask of NFCID1_X field.

Definition at line 4526 of file nrf52_bitfields.h.

◆ NFCT_NFCID1_LAST_NFCID1_X_Pos

#define NFCT_NFCID1_LAST_NFCID1_X_Pos   (16UL)

Position of NFCID1_X field.

Definition at line 4525 of file nrf52_bitfields.h.

◆ NFCT_NFCID1_LAST_NFCID1_Y_Msk

#define NFCT_NFCID1_LAST_NFCID1_Y_Msk   (0xFFUL << NFCT_NFCID1_LAST_NFCID1_Y_Pos)

Bit mask of NFCID1_Y field.

Definition at line 4530 of file nrf52_bitfields.h.

◆ NFCT_NFCID1_LAST_NFCID1_Y_Pos

#define NFCT_NFCID1_LAST_NFCID1_Y_Pos   (8UL)

Position of NFCID1_Y field.

Definition at line 4529 of file nrf52_bitfields.h.

◆ NFCT_NFCID1_LAST_NFCID1_Z_Msk

#define NFCT_NFCID1_LAST_NFCID1_Z_Msk   (0xFFUL << NFCT_NFCID1_LAST_NFCID1_Z_Pos)

Bit mask of NFCID1_Z field.

Definition at line 4534 of file nrf52_bitfields.h.

◆ NFCT_NFCID1_LAST_NFCID1_Z_Pos

#define NFCT_NFCID1_LAST_NFCID1_Z_Pos   (0UL)

Position of NFCID1_Z field.

Definition at line 4533 of file nrf52_bitfields.h.

◆ NFCT_PACKETPTR_PTR_Msk

#define NFCT_PACKETPTR_PTR_Msk   (0xFFFFFFFFUL << NFCT_PACKETPTR_PTR_Pos)

Bit mask of PTR field.

Definition at line 4438 of file nrf52_bitfields.h.

◆ NFCT_PACKETPTR_PTR_Pos

#define NFCT_PACKETPTR_PTR_Pos   (0UL)

Position of PTR field.

Definition at line 4437 of file nrf52_bitfields.h.

◆ NFCT_RXD_AMOUNT_RXDATABITS_Msk

#define NFCT_RXD_AMOUNT_RXDATABITS_Msk   (0x7UL << NFCT_RXD_AMOUNT_RXDATABITS_Pos)

Bit mask of RXDATABITS field.

Definition at line 4515 of file nrf52_bitfields.h.

◆ NFCT_RXD_AMOUNT_RXDATABITS_Pos

#define NFCT_RXD_AMOUNT_RXDATABITS_Pos   (0UL)

Position of RXDATABITS field.

Definition at line 4514 of file nrf52_bitfields.h.

◆ NFCT_RXD_AMOUNT_RXDATABYTES_Msk

#define NFCT_RXD_AMOUNT_RXDATABYTES_Msk   (0x1FFUL << NFCT_RXD_AMOUNT_RXDATABYTES_Pos)

Bit mask of RXDATABYTES field.

Definition at line 4511 of file nrf52_bitfields.h.

◆ NFCT_RXD_AMOUNT_RXDATABYTES_Pos

#define NFCT_RXD_AMOUNT_RXDATABYTES_Pos   (3UL)

Position of RXDATABYTES field.

Definition at line 4510 of file nrf52_bitfields.h.

◆ NFCT_RXD_FRAMECONFIG_CRCMODERX_CRC16RX

#define NFCT_RXD_FRAMECONFIG_CRCMODERX_CRC16RX   (1UL)

Last 16 bits in RX frame is CRC, CRC is checked and CRCSTATUS updated

Definition at line 4492 of file nrf52_bitfields.h.

◆ NFCT_RXD_FRAMECONFIG_CRCMODERX_Msk

#define NFCT_RXD_FRAMECONFIG_CRCMODERX_Msk   (0x1UL << NFCT_RXD_FRAMECONFIG_CRCMODERX_Pos)

Bit mask of CRCMODERX field.

Definition at line 4490 of file nrf52_bitfields.h.

◆ NFCT_RXD_FRAMECONFIG_CRCMODERX_NoCRCRX

#define NFCT_RXD_FRAMECONFIG_CRCMODERX_NoCRCRX   (0UL)

CRC is not expected in RX frames

Definition at line 4491 of file nrf52_bitfields.h.

◆ NFCT_RXD_FRAMECONFIG_CRCMODERX_Pos

#define NFCT_RXD_FRAMECONFIG_CRCMODERX_Pos   (4UL)

Position of CRCMODERX field.

Definition at line 4489 of file nrf52_bitfields.h.

◆ NFCT_RXD_FRAMECONFIG_PARITY_Msk

#define NFCT_RXD_FRAMECONFIG_PARITY_Msk   (0x1UL << NFCT_RXD_FRAMECONFIG_PARITY_Pos)

Bit mask of PARITY field.

Definition at line 4502 of file nrf52_bitfields.h.

◆ NFCT_RXD_FRAMECONFIG_PARITY_NoParity

#define NFCT_RXD_FRAMECONFIG_PARITY_NoParity   (0UL)

Parity is not expected in RX frames

Definition at line 4503 of file nrf52_bitfields.h.

◆ NFCT_RXD_FRAMECONFIG_PARITY_Parity

#define NFCT_RXD_FRAMECONFIG_PARITY_Parity   (1UL)

Parity is expected in RX frames

Definition at line 4504 of file nrf52_bitfields.h.

◆ NFCT_RXD_FRAMECONFIG_PARITY_Pos

#define NFCT_RXD_FRAMECONFIG_PARITY_Pos   (0UL)

Position of PARITY field.

Definition at line 4501 of file nrf52_bitfields.h.

◆ NFCT_RXD_FRAMECONFIG_SOF_Msk

#define NFCT_RXD_FRAMECONFIG_SOF_Msk   (0x1UL << NFCT_RXD_FRAMECONFIG_SOF_Pos)

Bit mask of SOF field.

Definition at line 4496 of file nrf52_bitfields.h.

◆ NFCT_RXD_FRAMECONFIG_SOF_NoSoF

#define NFCT_RXD_FRAMECONFIG_SOF_NoSoF   (0UL)

Start of Frame symbol is not expected in RX frames

Definition at line 4497 of file nrf52_bitfields.h.

◆ NFCT_RXD_FRAMECONFIG_SOF_Pos

#define NFCT_RXD_FRAMECONFIG_SOF_Pos   (2UL)

Position of SOF field.

Definition at line 4495 of file nrf52_bitfields.h.

◆ NFCT_RXD_FRAMECONFIG_SOF_SoF

#define NFCT_RXD_FRAMECONFIG_SOF_SoF   (1UL)

Start of Frame symbol is expected in RX frames

Definition at line 4498 of file nrf52_bitfields.h.

◆ NFCT_SELRES_CASCADE_Complete

#define NFCT_SELRES_CASCADE_Complete   (0UL)

NFCID1 complete

Definition at line 4631 of file nrf52_bitfields.h.

◆ NFCT_SELRES_CASCADE_Msk

#define NFCT_SELRES_CASCADE_Msk   (0x1UL << NFCT_SELRES_CASCADE_Pos)

Bit mask of CASCADE field.

Definition at line 4630 of file nrf52_bitfields.h.

◆ NFCT_SELRES_CASCADE_NotComplete

#define NFCT_SELRES_CASCADE_NotComplete   (1UL)

NFCID1 not complete

Definition at line 4632 of file nrf52_bitfields.h.

◆ NFCT_SELRES_CASCADE_Pos

#define NFCT_SELRES_CASCADE_Pos   (2UL)

Position of CASCADE field.

Definition at line 4629 of file nrf52_bitfields.h.

◆ NFCT_SELRES_PROTOCOL_Msk

#define NFCT_SELRES_PROTOCOL_Msk   (0x3UL << NFCT_SELRES_PROTOCOL_Pos)

Bit mask of PROTOCOL field.

Definition at line 4622 of file nrf52_bitfields.h.

◆ NFCT_SELRES_PROTOCOL_Pos

#define NFCT_SELRES_PROTOCOL_Pos   (5UL)

Position of PROTOCOL field.

Definition at line 4621 of file nrf52_bitfields.h.

◆ NFCT_SELRES_RFU10_Msk

#define NFCT_SELRES_RFU10_Msk   (0x3UL << NFCT_SELRES_RFU10_Pos)

Bit mask of RFU10 field.

Definition at line 4636 of file nrf52_bitfields.h.

◆ NFCT_SELRES_RFU10_Pos

#define NFCT_SELRES_RFU10_Pos   (0UL)

Position of RFU10 field.

Definition at line 4635 of file nrf52_bitfields.h.

◆ NFCT_SELRES_RFU43_Msk

#define NFCT_SELRES_RFU43_Msk   (0x3UL << NFCT_SELRES_RFU43_Pos)

Bit mask of RFU43 field.

Definition at line 4626 of file nrf52_bitfields.h.

◆ NFCT_SELRES_RFU43_Pos

#define NFCT_SELRES_RFU43_Pos   (3UL)

Position of RFU43 field.

Definition at line 4625 of file nrf52_bitfields.h.

◆ NFCT_SELRES_RFU7_Msk

#define NFCT_SELRES_RFU7_Msk   (0x1UL << NFCT_SELRES_RFU7_Pos)

Bit mask of RFU7 field.

Definition at line 4618 of file nrf52_bitfields.h.

◆ NFCT_SELRES_RFU7_Pos

#define NFCT_SELRES_RFU7_Pos   (7UL)

Position of RFU7 field.

Definition at line 4617 of file nrf52_bitfields.h.

◆ NFCT_SENSRES_BITFRAMESDD_Msk

#define NFCT_SENSRES_BITFRAMESDD_Msk   (0x1FUL << NFCT_SENSRES_BITFRAMESDD_Pos)

Bit mask of BITFRAMESDD field.

Definition at line 4605 of file nrf52_bitfields.h.

◆ NFCT_SENSRES_BITFRAMESDD_Pos

#define NFCT_SENSRES_BITFRAMESDD_Pos   (0UL)

Position of BITFRAMESDD field.

Definition at line 4604 of file nrf52_bitfields.h.

◆ NFCT_SENSRES_BITFRAMESDD_SDD00000

#define NFCT_SENSRES_BITFRAMESDD_SDD00000   (0UL)

SDD pattern 00000

Definition at line 4606 of file nrf52_bitfields.h.

◆ NFCT_SENSRES_BITFRAMESDD_SDD00001

#define NFCT_SENSRES_BITFRAMESDD_SDD00001   (1UL)

SDD pattern 00001

Definition at line 4607 of file nrf52_bitfields.h.

◆ NFCT_SENSRES_BITFRAMESDD_SDD00010

#define NFCT_SENSRES_BITFRAMESDD_SDD00010   (2UL)

SDD pattern 00010

Definition at line 4608 of file nrf52_bitfields.h.

◆ NFCT_SENSRES_BITFRAMESDD_SDD00100

#define NFCT_SENSRES_BITFRAMESDD_SDD00100   (4UL)

SDD pattern 00100

Definition at line 4609 of file nrf52_bitfields.h.

◆ NFCT_SENSRES_BITFRAMESDD_SDD01000

#define NFCT_SENSRES_BITFRAMESDD_SDD01000   (8UL)

SDD pattern 01000

Definition at line 4610 of file nrf52_bitfields.h.

◆ NFCT_SENSRES_BITFRAMESDD_SDD10000

#define NFCT_SENSRES_BITFRAMESDD_SDD10000   (16UL)

SDD pattern 10000

Definition at line 4611 of file nrf52_bitfields.h.

◆ NFCT_SENSRES_NFCIDSIZE_Msk

#define NFCT_SENSRES_NFCIDSIZE_Msk   (0x3UL << NFCT_SENSRES_NFCIDSIZE_Pos)

Bit mask of NFCIDSIZE field.

Definition at line 4594 of file nrf52_bitfields.h.

◆ NFCT_SENSRES_NFCIDSIZE_NFCID1Double

#define NFCT_SENSRES_NFCIDSIZE_NFCID1Double   (1UL)

NFCID1 size: double (7 bytes)

Definition at line 4596 of file nrf52_bitfields.h.

◆ NFCT_SENSRES_NFCIDSIZE_NFCID1Single

#define NFCT_SENSRES_NFCIDSIZE_NFCID1Single   (0UL)

NFCID1 size: single (4 bytes)

Definition at line 4595 of file nrf52_bitfields.h.

◆ NFCT_SENSRES_NFCIDSIZE_NFCID1Triple

#define NFCT_SENSRES_NFCIDSIZE_NFCID1Triple   (2UL)

NFCID1 size: triple (10 bytes)

Definition at line 4597 of file nrf52_bitfields.h.

◆ NFCT_SENSRES_NFCIDSIZE_Pos

#define NFCT_SENSRES_NFCIDSIZE_Pos   (6UL)

Position of NFCIDSIZE field.

Definition at line 4593 of file nrf52_bitfields.h.

◆ NFCT_SENSRES_PLATFCONFIG_Msk

#define NFCT_SENSRES_PLATFCONFIG_Msk   (0xFUL << NFCT_SENSRES_PLATFCONFIG_Pos)

Bit mask of PLATFCONFIG field.

Definition at line 4590 of file nrf52_bitfields.h.

◆ NFCT_SENSRES_PLATFCONFIG_Pos

#define NFCT_SENSRES_PLATFCONFIG_Pos   (8UL)

Position of PLATFCONFIG field.

Definition at line 4589 of file nrf52_bitfields.h.

◆ NFCT_SENSRES_RFU5_Msk

#define NFCT_SENSRES_RFU5_Msk   (0x1UL << NFCT_SENSRES_RFU5_Pos)

Bit mask of RFU5 field.

Definition at line 4601 of file nrf52_bitfields.h.

◆ NFCT_SENSRES_RFU5_Pos

#define NFCT_SENSRES_RFU5_Pos   (5UL)

Position of RFU5 field.

Definition at line 4600 of file nrf52_bitfields.h.

◆ NFCT_SENSRES_RFU74_Msk

#define NFCT_SENSRES_RFU74_Msk   (0xFUL << NFCT_SENSRES_RFU74_Pos)

Bit mask of RFU74 field.

Definition at line 4586 of file nrf52_bitfields.h.

◆ NFCT_SENSRES_RFU74_Pos

#define NFCT_SENSRES_RFU74_Pos   (12UL)

Position of RFU74 field.

Definition at line 4585 of file nrf52_bitfields.h.

◆ NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Disabled

#define NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Disabled   (0UL)

Disable shortcut

Definition at line 4030 of file nrf52_bitfields.h.

◆ NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Enabled

#define NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Enabled   (1UL)

Enable shortcut

Definition at line 4031 of file nrf52_bitfields.h.

◆ NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Msk

#define NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Msk   (0x1UL << NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Pos)

Bit mask of FIELDDETECTED_ACTIVATE field.

Definition at line 4029 of file nrf52_bitfields.h.

◆ NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Pos

#define NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Pos   (0UL)

Position of FIELDDETECTED_ACTIVATE field.

Definition at line 4028 of file nrf52_bitfields.h.

◆ NFCT_SHORTS_FIELDLOST_SENSE_Disabled

#define NFCT_SHORTS_FIELDLOST_SENSE_Disabled   (0UL)

Disable shortcut

Definition at line 4024 of file nrf52_bitfields.h.

◆ NFCT_SHORTS_FIELDLOST_SENSE_Enabled

#define NFCT_SHORTS_FIELDLOST_SENSE_Enabled   (1UL)

Enable shortcut

Definition at line 4025 of file nrf52_bitfields.h.

◆ NFCT_SHORTS_FIELDLOST_SENSE_Msk

#define NFCT_SHORTS_FIELDLOST_SENSE_Msk   (0x1UL << NFCT_SHORTS_FIELDLOST_SENSE_Pos)

Bit mask of FIELDLOST_SENSE field.

Definition at line 4023 of file nrf52_bitfields.h.

◆ NFCT_SHORTS_FIELDLOST_SENSE_Pos

#define NFCT_SHORTS_FIELDLOST_SENSE_Pos   (1UL)

Position of FIELDLOST_SENSE field.

Definition at line 4022 of file nrf52_bitfields.h.

◆ NFCT_TXD_AMOUNT_TXDATABITS_Msk

#define NFCT_TXD_AMOUNT_TXDATABITS_Msk   (0x7UL << NFCT_TXD_AMOUNT_TXDATABITS_Pos)

Bit mask of TXDATABITS field.

Definition at line 4483 of file nrf52_bitfields.h.

◆ NFCT_TXD_AMOUNT_TXDATABITS_Pos

#define NFCT_TXD_AMOUNT_TXDATABITS_Pos   (0UL)

Position of TXDATABITS field.

Definition at line 4482 of file nrf52_bitfields.h.

◆ NFCT_TXD_AMOUNT_TXDATABYTES_Msk

#define NFCT_TXD_AMOUNT_TXDATABYTES_Msk   (0x1FFUL << NFCT_TXD_AMOUNT_TXDATABYTES_Pos)

Bit mask of TXDATABYTES field.

Definition at line 4479 of file nrf52_bitfields.h.

◆ NFCT_TXD_AMOUNT_TXDATABYTES_Pos

#define NFCT_TXD_AMOUNT_TXDATABYTES_Pos   (3UL)

Position of TXDATABYTES field.

Definition at line 4478 of file nrf52_bitfields.h.

◆ NFCT_TXD_FRAMECONFIG_CRCMODETX_CRC16TX

#define NFCT_TXD_FRAMECONFIG_CRCMODETX_CRC16TX   (1UL)

16 bit CRC added to the frame based on all the data read from RAM that is used in the frame

Definition at line 4454 of file nrf52_bitfields.h.

◆ NFCT_TXD_FRAMECONFIG_CRCMODETX_Msk

#define NFCT_TXD_FRAMECONFIG_CRCMODETX_Msk   (0x1UL << NFCT_TXD_FRAMECONFIG_CRCMODETX_Pos)

Bit mask of CRCMODETX field.

Definition at line 4452 of file nrf52_bitfields.h.

◆ NFCT_TXD_FRAMECONFIG_CRCMODETX_NoCRCTX

#define NFCT_TXD_FRAMECONFIG_CRCMODETX_NoCRCTX   (0UL)

CRC is not added to the frame

Definition at line 4453 of file nrf52_bitfields.h.

◆ NFCT_TXD_FRAMECONFIG_CRCMODETX_Pos

#define NFCT_TXD_FRAMECONFIG_CRCMODETX_Pos   (4UL)

Position of CRCMODETX field.

Definition at line 4451 of file nrf52_bitfields.h.

◆ NFCT_TXD_FRAMECONFIG_DISCARDMODE_DiscardEnd

#define NFCT_TXD_FRAMECONFIG_DISCARDMODE_DiscardEnd   (0UL)

Unused bits is discarded at end of frame

Definition at line 4465 of file nrf52_bitfields.h.

◆ NFCT_TXD_FRAMECONFIG_DISCARDMODE_DiscardStart

#define NFCT_TXD_FRAMECONFIG_DISCARDMODE_DiscardStart   (1UL)

Unused bits is discarded at start of frame

Definition at line 4466 of file nrf52_bitfields.h.

◆ NFCT_TXD_FRAMECONFIG_DISCARDMODE_Msk

#define NFCT_TXD_FRAMECONFIG_DISCARDMODE_Msk   (0x1UL << NFCT_TXD_FRAMECONFIG_DISCARDMODE_Pos)

Bit mask of DISCARDMODE field.

Definition at line 4464 of file nrf52_bitfields.h.

◆ NFCT_TXD_FRAMECONFIG_DISCARDMODE_Pos

#define NFCT_TXD_FRAMECONFIG_DISCARDMODE_Pos   (1UL)

Position of DISCARDMODE field.

Definition at line 4463 of file nrf52_bitfields.h.

◆ NFCT_TXD_FRAMECONFIG_PARITY_Msk

#define NFCT_TXD_FRAMECONFIG_PARITY_Msk   (0x1UL << NFCT_TXD_FRAMECONFIG_PARITY_Pos)

Bit mask of PARITY field.

Definition at line 4470 of file nrf52_bitfields.h.

◆ NFCT_TXD_FRAMECONFIG_PARITY_NoParity

#define NFCT_TXD_FRAMECONFIG_PARITY_NoParity   (0UL)

Parity is not added in TX frames

Definition at line 4471 of file nrf52_bitfields.h.

◆ NFCT_TXD_FRAMECONFIG_PARITY_Parity

#define NFCT_TXD_FRAMECONFIG_PARITY_Parity   (1UL)

Parity is added TX frames

Definition at line 4472 of file nrf52_bitfields.h.

◆ NFCT_TXD_FRAMECONFIG_PARITY_Pos

#define NFCT_TXD_FRAMECONFIG_PARITY_Pos   (0UL)

Position of PARITY field.

Definition at line 4469 of file nrf52_bitfields.h.

◆ NFCT_TXD_FRAMECONFIG_SOF_Msk

#define NFCT_TXD_FRAMECONFIG_SOF_Msk   (0x1UL << NFCT_TXD_FRAMECONFIG_SOF_Pos)

Bit mask of SOF field.

Definition at line 4458 of file nrf52_bitfields.h.

◆ NFCT_TXD_FRAMECONFIG_SOF_NoSoF

#define NFCT_TXD_FRAMECONFIG_SOF_NoSoF   (0UL)

Start of Frame symbol not added

Definition at line 4459 of file nrf52_bitfields.h.

◆ NFCT_TXD_FRAMECONFIG_SOF_Pos

#define NFCT_TXD_FRAMECONFIG_SOF_Pos   (2UL)

Position of SOF field.

Definition at line 4457 of file nrf52_bitfields.h.

◆ NFCT_TXD_FRAMECONFIG_SOF_SoF

#define NFCT_TXD_FRAMECONFIG_SOF_SoF   (1UL)

Start of Frame symbol added

Definition at line 4460 of file nrf52_bitfields.h.

◆ NVMC_CONFIG_WEN_Een

#define NVMC_CONFIG_WEN_Een   (2UL)

Erase enabled

Definition at line 4659 of file nrf52_bitfields.h.

◆ NVMC_CONFIG_WEN_Msk

#define NVMC_CONFIG_WEN_Msk   (0x3UL << NVMC_CONFIG_WEN_Pos)

Bit mask of WEN field.

Definition at line 4656 of file nrf52_bitfields.h.

◆ NVMC_CONFIG_WEN_Pos

#define NVMC_CONFIG_WEN_Pos   (0UL)

Position of WEN field.

Definition at line 4655 of file nrf52_bitfields.h.

◆ NVMC_CONFIG_WEN_Ren

#define NVMC_CONFIG_WEN_Ren   (0UL)

Read only access

Definition at line 4657 of file nrf52_bitfields.h.

◆ NVMC_CONFIG_WEN_Wen

#define NVMC_CONFIG_WEN_Wen   (1UL)

Write Enabled

Definition at line 4658 of file nrf52_bitfields.h.

◆ NVMC_ERASEALL_ERASEALL_Erase

#define NVMC_ERASEALL_ERASEALL_Erase   (1UL)

Start chip erase

Definition at line 4682 of file nrf52_bitfields.h.

◆ NVMC_ERASEALL_ERASEALL_Msk

#define NVMC_ERASEALL_ERASEALL_Msk   (0x1UL << NVMC_ERASEALL_ERASEALL_Pos)

Bit mask of ERASEALL field.

Definition at line 4680 of file nrf52_bitfields.h.

◆ NVMC_ERASEALL_ERASEALL_NoOperation

#define NVMC_ERASEALL_ERASEALL_NoOperation   (0UL)

No operation

Definition at line 4681 of file nrf52_bitfields.h.

◆ NVMC_ERASEALL_ERASEALL_Pos

#define NVMC_ERASEALL_ERASEALL_Pos   (0UL)

Position of ERASEALL field.

Definition at line 4679 of file nrf52_bitfields.h.

◆ NVMC_ERASEPAGE_ERASEPAGE_Msk

#define NVMC_ERASEPAGE_ERASEPAGE_Msk   (0xFFFFFFFFUL << NVMC_ERASEPAGE_ERASEPAGE_Pos)

Bit mask of ERASEPAGE field.

Definition at line 4666 of file nrf52_bitfields.h.

◆ NVMC_ERASEPAGE_ERASEPAGE_Pos

#define NVMC_ERASEPAGE_ERASEPAGE_Pos   (0UL)

Position of ERASEPAGE field.

Definition at line 4665 of file nrf52_bitfields.h.

◆ NVMC_ERASEPCR0_ERASEPCR0_Msk

#define NVMC_ERASEPCR0_ERASEPCR0_Msk   (0xFFFFFFFFUL << NVMC_ERASEPCR0_ERASEPCR0_Pos)

Bit mask of ERASEPCR0 field.

Definition at line 4689 of file nrf52_bitfields.h.

◆ NVMC_ERASEPCR0_ERASEPCR0_Pos

#define NVMC_ERASEPCR0_ERASEPCR0_Pos   (0UL)

Position of ERASEPCR0 field.

Definition at line 4688 of file nrf52_bitfields.h.

◆ NVMC_ERASEPCR1_ERASEPCR1_Msk

#define NVMC_ERASEPCR1_ERASEPCR1_Msk   (0xFFFFFFFFUL << NVMC_ERASEPCR1_ERASEPCR1_Pos)

Bit mask of ERASEPCR1 field.

Definition at line 4673 of file nrf52_bitfields.h.

◆ NVMC_ERASEPCR1_ERASEPCR1_Pos

#define NVMC_ERASEPCR1_ERASEPCR1_Pos   (0UL)

Position of ERASEPCR1 field.

Definition at line 4672 of file nrf52_bitfields.h.

◆ NVMC_ERASEUICR_ERASEUICR_Erase

#define NVMC_ERASEUICR_ERASEUICR_Erase   (1UL)

Start erase of UICR

Definition at line 4698 of file nrf52_bitfields.h.

◆ NVMC_ERASEUICR_ERASEUICR_Msk

#define NVMC_ERASEUICR_ERASEUICR_Msk   (0x1UL << NVMC_ERASEUICR_ERASEUICR_Pos)

Bit mask of ERASEUICR field.

Definition at line 4696 of file nrf52_bitfields.h.

◆ NVMC_ERASEUICR_ERASEUICR_NoOperation

#define NVMC_ERASEUICR_ERASEUICR_NoOperation   (0UL)

No operation

Definition at line 4697 of file nrf52_bitfields.h.

◆ NVMC_ERASEUICR_ERASEUICR_Pos

#define NVMC_ERASEUICR_ERASEUICR_Pos   (0UL)

Position of ERASEUICR field.

Definition at line 4695 of file nrf52_bitfields.h.

◆ NVMC_ICACHECNF_CACHEEN_Disabled

#define NVMC_ICACHECNF_CACHEEN_Disabled   (0UL)

Disable cache. Invalidates all cache entries.

Definition at line 4712 of file nrf52_bitfields.h.

◆ NVMC_ICACHECNF_CACHEEN_Enabled

#define NVMC_ICACHECNF_CACHEEN_Enabled   (1UL)

Enable cache

Definition at line 4713 of file nrf52_bitfields.h.

◆ NVMC_ICACHECNF_CACHEEN_Msk

#define NVMC_ICACHECNF_CACHEEN_Msk   (0x1UL << NVMC_ICACHECNF_CACHEEN_Pos)

Bit mask of CACHEEN field.

Definition at line 4711 of file nrf52_bitfields.h.

◆ NVMC_ICACHECNF_CACHEEN_Pos

#define NVMC_ICACHECNF_CACHEEN_Pos   (0UL)

Position of CACHEEN field.

Definition at line 4710 of file nrf52_bitfields.h.

◆ NVMC_ICACHECNF_CACHEPROFEN_Disabled

#define NVMC_ICACHECNF_CACHEPROFEN_Disabled   (0UL)

Disable cache profiling

Definition at line 4706 of file nrf52_bitfields.h.

◆ NVMC_ICACHECNF_CACHEPROFEN_Enabled

#define NVMC_ICACHECNF_CACHEPROFEN_Enabled   (1UL)

Enable cache profiling

Definition at line 4707 of file nrf52_bitfields.h.

◆ NVMC_ICACHECNF_CACHEPROFEN_Msk

#define NVMC_ICACHECNF_CACHEPROFEN_Msk   (0x1UL << NVMC_ICACHECNF_CACHEPROFEN_Pos)

Bit mask of CACHEPROFEN field.

Definition at line 4705 of file nrf52_bitfields.h.

◆ NVMC_ICACHECNF_CACHEPROFEN_Pos

#define NVMC_ICACHECNF_CACHEPROFEN_Pos   (8UL)

Position of CACHEPROFEN field.

Definition at line 4704 of file nrf52_bitfields.h.

◆ NVMC_IHIT_HITS_Msk

#define NVMC_IHIT_HITS_Msk   (0xFFFFFFFFUL << NVMC_IHIT_HITS_Pos)

Bit mask of HITS field.

Definition at line 4720 of file nrf52_bitfields.h.

◆ NVMC_IHIT_HITS_Pos

#define NVMC_IHIT_HITS_Pos   (0UL)

Position of HITS field.

Definition at line 4719 of file nrf52_bitfields.h.

◆ NVMC_IMISS_MISSES_Msk

#define NVMC_IMISS_MISSES_Msk   (0xFFFFFFFFUL << NVMC_IMISS_MISSES_Pos)

Bit mask of MISSES field.

Definition at line 4727 of file nrf52_bitfields.h.

◆ NVMC_IMISS_MISSES_Pos

#define NVMC_IMISS_MISSES_Pos   (0UL)

Position of MISSES field.

Definition at line 4726 of file nrf52_bitfields.h.

◆ NVMC_READY_READY_Busy

#define NVMC_READY_READY_Busy   (0UL)

NVMC is busy (on-going write or erase operation)

Definition at line 4648 of file nrf52_bitfields.h.

◆ NVMC_READY_READY_Msk

#define NVMC_READY_READY_Msk   (0x1UL << NVMC_READY_READY_Pos)

Bit mask of READY field.

Definition at line 4647 of file nrf52_bitfields.h.

◆ NVMC_READY_READY_Pos

#define NVMC_READY_READY_Pos   (0UL)

Position of READY field.

Definition at line 4646 of file nrf52_bitfields.h.

◆ NVMC_READY_READY_Ready

#define NVMC_READY_READY_Ready   (1UL)

NVMC is ready

Definition at line 4649 of file nrf52_bitfields.h.

◆ PDM_ENABLE_ENABLE_Disabled

#define PDM_ENABLE_ENABLE_Disabled   (0UL)

Disable

Definition at line 6362 of file nrf52_bitfields.h.

◆ PDM_ENABLE_ENABLE_Enabled

#define PDM_ENABLE_ENABLE_Enabled   (1UL)

Enable

Definition at line 6363 of file nrf52_bitfields.h.

◆ PDM_ENABLE_ENABLE_Msk

#define PDM_ENABLE_ENABLE_Msk   (0x1UL << PDM_ENABLE_ENABLE_Pos)

Bit mask of ENABLE field.

Definition at line 6361 of file nrf52_bitfields.h.

◆ PDM_ENABLE_ENABLE_Pos

#define PDM_ENABLE_ENABLE_Pos   (0UL)

Position of ENABLE field.

Definition at line 6360 of file nrf52_bitfields.h.

◆ PDM_GAINL_GAINL_DefaultGain

#define PDM_GAINL_GAINL_DefaultGain   (0x28UL)

0dB gain adjustment ('2500 RMS' requirement)

Definition at line 6397 of file nrf52_bitfields.h.

◆ PDM_GAINL_GAINL_MaxGain

#define PDM_GAINL_GAINL_MaxGain   (0x50UL)

+20dB gain adjustment (maximum)

Definition at line 6398 of file nrf52_bitfields.h.

◆ PDM_GAINL_GAINL_MinGain

#define PDM_GAINL_GAINL_MinGain   (0x00UL)

-20dB gain adjustment (minimum)

Definition at line 6396 of file nrf52_bitfields.h.

◆ PDM_GAINL_GAINL_Msk

#define PDM_GAINL_GAINL_Msk   (0x7FUL << PDM_GAINL_GAINL_Pos)

Bit mask of GAINL field.

Definition at line 6395 of file nrf52_bitfields.h.

◆ PDM_GAINL_GAINL_Pos

#define PDM_GAINL_GAINL_Pos   (0UL)

Position of GAINL field.

Definition at line 6394 of file nrf52_bitfields.h.

◆ PDM_GAINR_GAINR_DefaultGain

#define PDM_GAINR_GAINR_DefaultGain   (0x28UL)

0dB gain adjustment ('2500 RMS' requirement)

Definition at line 6407 of file nrf52_bitfields.h.

◆ PDM_GAINR_GAINR_MaxGain

#define PDM_GAINR_GAINR_MaxGain   (0x50UL)

+20dB gain adjustment (maximum)

Definition at line 6408 of file nrf52_bitfields.h.

◆ PDM_GAINR_GAINR_MinGain

#define PDM_GAINR_GAINR_MinGain   (0x00UL)

-20dB gain adjustment (minimum)

Definition at line 6406 of file nrf52_bitfields.h.

◆ PDM_GAINR_GAINR_Msk

#define PDM_GAINR_GAINR_Msk   (0xFFUL << PDM_GAINR_GAINR_Pos)

Bit mask of GAINR field.

Definition at line 6405 of file nrf52_bitfields.h.

◆ PDM_GAINR_GAINR_Pos

#define PDM_GAINR_GAINR_Pos   (0UL)

Position of GAINR field.

Definition at line 6404 of file nrf52_bitfields.h.

◆ PDM_INTEN_END_Disabled

#define PDM_INTEN_END_Disabled   (0UL)

Disable

Definition at line 6293 of file nrf52_bitfields.h.

◆ PDM_INTEN_END_Enabled

#define PDM_INTEN_END_Enabled   (1UL)

Enable

Definition at line 6294 of file nrf52_bitfields.h.

◆ PDM_INTEN_END_Msk

#define PDM_INTEN_END_Msk   (0x1UL << PDM_INTEN_END_Pos)

Bit mask of END field.

Definition at line 6292 of file nrf52_bitfields.h.

◆ PDM_INTEN_END_Pos

#define PDM_INTEN_END_Pos   (2UL)

Position of END field.

Definition at line 6291 of file nrf52_bitfields.h.

◆ PDM_INTEN_STARTED_Disabled

#define PDM_INTEN_STARTED_Disabled   (0UL)

Disable

Definition at line 6305 of file nrf52_bitfields.h.

◆ PDM_INTEN_STARTED_Enabled

#define PDM_INTEN_STARTED_Enabled   (1UL)

Enable

Definition at line 6306 of file nrf52_bitfields.h.

◆ PDM_INTEN_STARTED_Msk

#define PDM_INTEN_STARTED_Msk   (0x1UL << PDM_INTEN_STARTED_Pos)

Bit mask of STARTED field.

Definition at line 6304 of file nrf52_bitfields.h.

◆ PDM_INTEN_STARTED_Pos

#define PDM_INTEN_STARTED_Pos   (0UL)

Position of STARTED field.

Definition at line 6303 of file nrf52_bitfields.h.

◆ PDM_INTEN_STOPPED_Disabled

#define PDM_INTEN_STOPPED_Disabled   (0UL)

Disable

Definition at line 6299 of file nrf52_bitfields.h.

◆ PDM_INTEN_STOPPED_Enabled

#define PDM_INTEN_STOPPED_Enabled   (1UL)

Enable

Definition at line 6300 of file nrf52_bitfields.h.

◆ PDM_INTEN_STOPPED_Msk

#define PDM_INTEN_STOPPED_Msk   (0x1UL << PDM_INTEN_STOPPED_Pos)

Bit mask of STOPPED field.

Definition at line 6298 of file nrf52_bitfields.h.

◆ PDM_INTEN_STOPPED_Pos

#define PDM_INTEN_STOPPED_Pos   (1UL)

Position of STOPPED field.

Definition at line 6297 of file nrf52_bitfields.h.

◆ PDM_INTENCLR_END_Clear

#define PDM_INTENCLR_END_Clear   (1UL)

Disable

Definition at line 6340 of file nrf52_bitfields.h.

◆ PDM_INTENCLR_END_Disabled

#define PDM_INTENCLR_END_Disabled   (0UL)

Read: Disabled

Definition at line 6338 of file nrf52_bitfields.h.

◆ PDM_INTENCLR_END_Enabled

#define PDM_INTENCLR_END_Enabled   (1UL)

Read: Enabled

Definition at line 6339 of file nrf52_bitfields.h.

◆ PDM_INTENCLR_END_Msk

#define PDM_INTENCLR_END_Msk   (0x1UL << PDM_INTENCLR_END_Pos)

Bit mask of END field.

Definition at line 6337 of file nrf52_bitfields.h.

◆ PDM_INTENCLR_END_Pos

#define PDM_INTENCLR_END_Pos   (2UL)

Position of END field.

Definition at line 6336 of file nrf52_bitfields.h.

◆ PDM_INTENCLR_STARTED_Clear

#define PDM_INTENCLR_STARTED_Clear   (1UL)

Disable

Definition at line 6354 of file nrf52_bitfields.h.

◆ PDM_INTENCLR_STARTED_Disabled

#define PDM_INTENCLR_STARTED_Disabled   (0UL)

Read: Disabled

Definition at line 6352 of file nrf52_bitfields.h.

◆ PDM_INTENCLR_STARTED_Enabled

#define PDM_INTENCLR_STARTED_Enabled   (1UL)

Read: Enabled

Definition at line 6353 of file nrf52_bitfields.h.

◆ PDM_INTENCLR_STARTED_Msk

#define PDM_INTENCLR_STARTED_Msk   (0x1UL << PDM_INTENCLR_STARTED_Pos)

Bit mask of STARTED field.

Definition at line 6351 of file nrf52_bitfields.h.

◆ PDM_INTENCLR_STARTED_Pos

#define PDM_INTENCLR_STARTED_Pos   (0UL)

Position of STARTED field.

Definition at line 6350 of file nrf52_bitfields.h.

◆ PDM_INTENCLR_STOPPED_Clear

#define PDM_INTENCLR_STOPPED_Clear   (1UL)

Disable

Definition at line 6347 of file nrf52_bitfields.h.

◆ PDM_INTENCLR_STOPPED_Disabled

#define PDM_INTENCLR_STOPPED_Disabled   (0UL)

Read: Disabled

Definition at line 6345 of file nrf52_bitfields.h.

◆ PDM_INTENCLR_STOPPED_Enabled

#define PDM_INTENCLR_STOPPED_Enabled   (1UL)

Read: Enabled

Definition at line 6346 of file nrf52_bitfields.h.

◆ PDM_INTENCLR_STOPPED_Msk

#define PDM_INTENCLR_STOPPED_Msk   (0x1UL << PDM_INTENCLR_STOPPED_Pos)

Bit mask of STOPPED field.

Definition at line 6344 of file nrf52_bitfields.h.

◆ PDM_INTENCLR_STOPPED_Pos

#define PDM_INTENCLR_STOPPED_Pos   (1UL)

Position of STOPPED field.

Definition at line 6343 of file nrf52_bitfields.h.

◆ PDM_INTENSET_END_Disabled

#define PDM_INTENSET_END_Disabled   (0UL)

Read: Disabled

Definition at line 6314 of file nrf52_bitfields.h.

◆ PDM_INTENSET_END_Enabled

#define PDM_INTENSET_END_Enabled   (1UL)

Read: Enabled

Definition at line 6315 of file nrf52_bitfields.h.

◆ PDM_INTENSET_END_Msk

#define PDM_INTENSET_END_Msk   (0x1UL << PDM_INTENSET_END_Pos)

Bit mask of END field.

Definition at line 6313 of file nrf52_bitfields.h.

◆ PDM_INTENSET_END_Pos

#define PDM_INTENSET_END_Pos   (2UL)

Position of END field.

Definition at line 6312 of file nrf52_bitfields.h.

◆ PDM_INTENSET_END_Set

#define PDM_INTENSET_END_Set   (1UL)

Enable

Definition at line 6316 of file nrf52_bitfields.h.

◆ PDM_INTENSET_STARTED_Disabled

#define PDM_INTENSET_STARTED_Disabled   (0UL)

Read: Disabled

Definition at line 6328 of file nrf52_bitfields.h.

◆ PDM_INTENSET_STARTED_Enabled

#define PDM_INTENSET_STARTED_Enabled   (1UL)

Read: Enabled

Definition at line 6329 of file nrf52_bitfields.h.

◆ PDM_INTENSET_STARTED_Msk

#define PDM_INTENSET_STARTED_Msk   (0x1UL << PDM_INTENSET_STARTED_Pos)

Bit mask of STARTED field.

Definition at line 6327 of file nrf52_bitfields.h.

◆ PDM_INTENSET_STARTED_Pos

#define PDM_INTENSET_STARTED_Pos   (0UL)

Position of STARTED field.

Definition at line 6326 of file nrf52_bitfields.h.

◆ PDM_INTENSET_STARTED_Set

#define PDM_INTENSET_STARTED_Set   (1UL)

Enable

Definition at line 6330 of file nrf52_bitfields.h.

◆ PDM_INTENSET_STOPPED_Disabled

#define PDM_INTENSET_STOPPED_Disabled   (0UL)

Read: Disabled

Definition at line 6321 of file nrf52_bitfields.h.

◆ PDM_INTENSET_STOPPED_Enabled

#define PDM_INTENSET_STOPPED_Enabled   (1UL)

Read: Enabled

Definition at line 6322 of file nrf52_bitfields.h.

◆ PDM_INTENSET_STOPPED_Msk

#define PDM_INTENSET_STOPPED_Msk   (0x1UL << PDM_INTENSET_STOPPED_Pos)

Bit mask of STOPPED field.

Definition at line 6320 of file nrf52_bitfields.h.

◆ PDM_INTENSET_STOPPED_Pos

#define PDM_INTENSET_STOPPED_Pos   (1UL)

Position of STOPPED field.

Definition at line 6319 of file nrf52_bitfields.h.

◆ PDM_INTENSET_STOPPED_Set

#define PDM_INTENSET_STOPPED_Set   (1UL)

Enable

Definition at line 6323 of file nrf52_bitfields.h.

◆ PDM_MODE_EDGE_LeftFalling

#define PDM_MODE_EDGE_LeftFalling   (0UL)

Left (or mono) is sampled on falling edge of PDM_CLK

Definition at line 6381 of file nrf52_bitfields.h.

◆ PDM_MODE_EDGE_LeftRising

#define PDM_MODE_EDGE_LeftRising   (1UL)

Left (or mono) is sampled on rising edge of PDM_CLK

Definition at line 6382 of file nrf52_bitfields.h.

◆ PDM_MODE_EDGE_Msk

#define PDM_MODE_EDGE_Msk   (0x1UL << PDM_MODE_EDGE_Pos)

Bit mask of EDGE field.

Definition at line 6380 of file nrf52_bitfields.h.

◆ PDM_MODE_EDGE_Pos

#define PDM_MODE_EDGE_Pos   (1UL)

Position of EDGE field.

Definition at line 6379 of file nrf52_bitfields.h.

◆ PDM_MODE_MONO_Mono

#define PDM_MODE_MONO_Mono   (1UL)

Sample and store two successive Left samples (16 bit each) per RAM word L1=[31:16]; L0=[15:0]

Definition at line 6388 of file nrf52_bitfields.h.

◆ PDM_MODE_MONO_Msk

#define PDM_MODE_MONO_Msk   (0x1UL << PDM_MODE_MONO_Pos)

Bit mask of MONO field.

Definition at line 6386 of file nrf52_bitfields.h.

◆ PDM_MODE_MONO_Pos

#define PDM_MODE_MONO_Pos   (0UL)

Position of MONO field.

Definition at line 6385 of file nrf52_bitfields.h.

◆ PDM_MODE_MONO_Stereo

#define PDM_MODE_MONO_Stereo   (0UL)

Sample and store one pair (Left + Right) of 16bit samples per RAM word R=[31:16]; L=[15:0]

Definition at line 6387 of file nrf52_bitfields.h.

◆ PDM_PDMCLKCTRL_FREQ_1000K

#define PDM_PDMCLKCTRL_FREQ_1000K   (0x08000000UL)

PDM_CLK = 1.000 MHz

Definition at line 6371 of file nrf52_bitfields.h.

◆ PDM_PDMCLKCTRL_FREQ_1024K

#define PDM_PDMCLKCTRL_FREQ_1024K   (0x08400000UL)

PDM_CLK = 1.024 MHz

Definition at line 6372 of file nrf52_bitfields.h.

◆ PDM_PDMCLKCTRL_FREQ_1067K

#define PDM_PDMCLKCTRL_FREQ_1067K   (0x08800000UL)

PDM_CLK = 1.067 MHz

Definition at line 6373 of file nrf52_bitfields.h.

◆ PDM_PDMCLKCTRL_FREQ_Msk

#define PDM_PDMCLKCTRL_FREQ_Msk   (0xFFFFFFFFUL << PDM_PDMCLKCTRL_FREQ_Pos)

Bit mask of FREQ field.

Definition at line 6370 of file nrf52_bitfields.h.

◆ PDM_PDMCLKCTRL_FREQ_Pos

#define PDM_PDMCLKCTRL_FREQ_Pos   (0UL)

Position of FREQ field.

Definition at line 6369 of file nrf52_bitfields.h.

◆ PDM_PSEL_CLK_CONNECT_Connected

#define PDM_PSEL_CLK_CONNECT_Connected   (0UL)

Connect

Definition at line 6416 of file nrf52_bitfields.h.

◆ PDM_PSEL_CLK_CONNECT_Disconnected

#define PDM_PSEL_CLK_CONNECT_Disconnected   (1UL)

Disconnect

Definition at line 6417 of file nrf52_bitfields.h.

◆ PDM_PSEL_CLK_CONNECT_Msk

#define PDM_PSEL_CLK_CONNECT_Msk   (0x1UL << PDM_PSEL_CLK_CONNECT_Pos)

Bit mask of CONNECT field.

Definition at line 6415 of file nrf52_bitfields.h.

◆ PDM_PSEL_CLK_CONNECT_Pos

#define PDM_PSEL_CLK_CONNECT_Pos   (31UL)

Position of CONNECT field.

Definition at line 6414 of file nrf52_bitfields.h.

◆ PDM_PSEL_CLK_PIN_Msk

#define PDM_PSEL_CLK_PIN_Msk   (0x1FUL << PDM_PSEL_CLK_PIN_Pos)

Bit mask of PIN field.

Definition at line 6421 of file nrf52_bitfields.h.

◆ PDM_PSEL_CLK_PIN_Pos

#define PDM_PSEL_CLK_PIN_Pos   (0UL)

Position of PIN field.

Definition at line 6420 of file nrf52_bitfields.h.

◆ PDM_PSEL_DIN_CONNECT_Connected

#define PDM_PSEL_DIN_CONNECT_Connected   (0UL)

Connect

Definition at line 6429 of file nrf52_bitfields.h.

◆ PDM_PSEL_DIN_CONNECT_Disconnected

#define PDM_PSEL_DIN_CONNECT_Disconnected   (1UL)

Disconnect

Definition at line 6430 of file nrf52_bitfields.h.

◆ PDM_PSEL_DIN_CONNECT_Msk

#define PDM_PSEL_DIN_CONNECT_Msk   (0x1UL << PDM_PSEL_DIN_CONNECT_Pos)

Bit mask of CONNECT field.

Definition at line 6428 of file nrf52_bitfields.h.

◆ PDM_PSEL_DIN_CONNECT_Pos

#define PDM_PSEL_DIN_CONNECT_Pos   (31UL)

Position of CONNECT field.

Definition at line 6427 of file nrf52_bitfields.h.

◆ PDM_PSEL_DIN_PIN_Msk

#define PDM_PSEL_DIN_PIN_Msk   (0x1FUL << PDM_PSEL_DIN_PIN_Pos)

Bit mask of PIN field.

Definition at line 6434 of file nrf52_bitfields.h.

◆ PDM_PSEL_DIN_PIN_Pos

#define PDM_PSEL_DIN_PIN_Pos   (0UL)

Position of PIN field.

Definition at line 6433 of file nrf52_bitfields.h.

◆ PDM_SAMPLE_MAXCNT_BUFFSIZE_Msk

#define PDM_SAMPLE_MAXCNT_BUFFSIZE_Msk   (0x7FFFUL << PDM_SAMPLE_MAXCNT_BUFFSIZE_Pos)

Bit mask of BUFFSIZE field.

Definition at line 6448 of file nrf52_bitfields.h.

◆ PDM_SAMPLE_MAXCNT_BUFFSIZE_Pos

#define PDM_SAMPLE_MAXCNT_BUFFSIZE_Pos   (0UL)

Position of BUFFSIZE field.

Definition at line 6447 of file nrf52_bitfields.h.

◆ PDM_SAMPLE_PTR_SAMPLEPTR_Msk

#define PDM_SAMPLE_PTR_SAMPLEPTR_Msk   (0xFFFFFFFFUL << PDM_SAMPLE_PTR_SAMPLEPTR_Pos)

Bit mask of SAMPLEPTR field.

Definition at line 6441 of file nrf52_bitfields.h.

◆ PDM_SAMPLE_PTR_SAMPLEPTR_Pos

#define PDM_SAMPLE_PTR_SAMPLEPTR_Pos   (0UL)

Position of SAMPLEPTR field.

Definition at line 6440 of file nrf52_bitfields.h.

◆ POWER_DCDCEN_DCDCEN_Disabled

#define POWER_DCDCEN_DCDCEN_Disabled   (0UL)

Disable

Definition at line 6683 of file nrf52_bitfields.h.

◆ POWER_DCDCEN_DCDCEN_Enabled

#define POWER_DCDCEN_DCDCEN_Enabled   (1UL)

Enable

Definition at line 6684 of file nrf52_bitfields.h.

◆ POWER_DCDCEN_DCDCEN_Msk

#define POWER_DCDCEN_DCDCEN_Msk   (0x1UL << POWER_DCDCEN_DCDCEN_Pos)

Bit mask of DCDCEN field.

Definition at line 6682 of file nrf52_bitfields.h.

◆ POWER_DCDCEN_DCDCEN_Pos

#define POWER_DCDCEN_DCDCEN_Pos   (0UL)

Position of DCDCEN field.

Definition at line 6681 of file nrf52_bitfields.h.

◆ POWER_GPREGRET2_GPREGRET_Msk

#define POWER_GPREGRET2_GPREGRET_Msk   (0xFFUL << POWER_GPREGRET2_GPREGRET_Pos)

Bit mask of GPREGRET field.

Definition at line 6621 of file nrf52_bitfields.h.

◆ POWER_GPREGRET2_GPREGRET_Pos

#define POWER_GPREGRET2_GPREGRET_Pos   (0UL)

Position of GPREGRET field.

Definition at line 6620 of file nrf52_bitfields.h.

◆ POWER_GPREGRET_GPREGRET_Msk

#define POWER_GPREGRET_GPREGRET_Msk   (0xFFUL << POWER_GPREGRET_GPREGRET_Pos)

Bit mask of GPREGRET field.

Definition at line 6614 of file nrf52_bitfields.h.

◆ POWER_GPREGRET_GPREGRET_Pos

#define POWER_GPREGRET_GPREGRET_Pos   (0UL)

Position of GPREGRET field.

Definition at line 6613 of file nrf52_bitfields.h.

◆ POWER_INTENCLR_POFWARN_Clear

#define POWER_INTENCLR_POFWARN_Clear   (1UL)

Disable

Definition at line 6500 of file nrf52_bitfields.h.

◆ POWER_INTENCLR_POFWARN_Disabled

#define POWER_INTENCLR_POFWARN_Disabled   (0UL)

Read: Disabled

Definition at line 6498 of file nrf52_bitfields.h.

◆ POWER_INTENCLR_POFWARN_Enabled

#define POWER_INTENCLR_POFWARN_Enabled   (1UL)

Read: Enabled

Definition at line 6499 of file nrf52_bitfields.h.

◆ POWER_INTENCLR_POFWARN_Msk

#define POWER_INTENCLR_POFWARN_Msk   (0x1UL << POWER_INTENCLR_POFWARN_Pos)

Bit mask of POFWARN field.

Definition at line 6497 of file nrf52_bitfields.h.

◆ POWER_INTENCLR_POFWARN_Pos

#define POWER_INTENCLR_POFWARN_Pos   (2UL)

Position of POFWARN field.

Definition at line 6496 of file nrf52_bitfields.h.

◆ POWER_INTENCLR_SLEEPENTER_Clear

#define POWER_INTENCLR_SLEEPENTER_Clear   (1UL)

Disable

Definition at line 6493 of file nrf52_bitfields.h.

◆ POWER_INTENCLR_SLEEPENTER_Disabled

#define POWER_INTENCLR_SLEEPENTER_Disabled   (0UL)

Read: Disabled

Definition at line 6491 of file nrf52_bitfields.h.

◆ POWER_INTENCLR_SLEEPENTER_Enabled

#define POWER_INTENCLR_SLEEPENTER_Enabled   (1UL)

Read: Enabled

Definition at line 6492 of file nrf52_bitfields.h.

◆ POWER_INTENCLR_SLEEPENTER_Msk

#define POWER_INTENCLR_SLEEPENTER_Msk   (0x1UL << POWER_INTENCLR_SLEEPENTER_Pos)

Bit mask of SLEEPENTER field.

Definition at line 6490 of file nrf52_bitfields.h.

◆ POWER_INTENCLR_SLEEPENTER_Pos

#define POWER_INTENCLR_SLEEPENTER_Pos   (5UL)

Position of SLEEPENTER field.

Definition at line 6489 of file nrf52_bitfields.h.

◆ POWER_INTENCLR_SLEEPEXIT_Clear

#define POWER_INTENCLR_SLEEPEXIT_Clear   (1UL)

Disable

Definition at line 6486 of file nrf52_bitfields.h.

◆ POWER_INTENCLR_SLEEPEXIT_Disabled

#define POWER_INTENCLR_SLEEPEXIT_Disabled   (0UL)

Read: Disabled

Definition at line 6484 of file nrf52_bitfields.h.

◆ POWER_INTENCLR_SLEEPEXIT_Enabled

#define POWER_INTENCLR_SLEEPEXIT_Enabled   (1UL)

Read: Enabled

Definition at line 6485 of file nrf52_bitfields.h.

◆ POWER_INTENCLR_SLEEPEXIT_Msk

#define POWER_INTENCLR_SLEEPEXIT_Msk   (0x1UL << POWER_INTENCLR_SLEEPEXIT_Pos)

Bit mask of SLEEPEXIT field.

Definition at line 6483 of file nrf52_bitfields.h.

◆ POWER_INTENCLR_SLEEPEXIT_Pos

#define POWER_INTENCLR_SLEEPEXIT_Pos   (6UL)

Position of SLEEPEXIT field.

Definition at line 6482 of file nrf52_bitfields.h.

◆ POWER_INTENSET_POFWARN_Disabled

#define POWER_INTENSET_POFWARN_Disabled   (0UL)

Read: Disabled

Definition at line 6474 of file nrf52_bitfields.h.

◆ POWER_INTENSET_POFWARN_Enabled

#define POWER_INTENSET_POFWARN_Enabled   (1UL)

Read: Enabled

Definition at line 6475 of file nrf52_bitfields.h.

◆ POWER_INTENSET_POFWARN_Msk

#define POWER_INTENSET_POFWARN_Msk   (0x1UL << POWER_INTENSET_POFWARN_Pos)

Bit mask of POFWARN field.

Definition at line 6473 of file nrf52_bitfields.h.

◆ POWER_INTENSET_POFWARN_Pos

#define POWER_INTENSET_POFWARN_Pos   (2UL)

Position of POFWARN field.

Definition at line 6472 of file nrf52_bitfields.h.

◆ POWER_INTENSET_POFWARN_Set

#define POWER_INTENSET_POFWARN_Set   (1UL)

Enable

Definition at line 6476 of file nrf52_bitfields.h.

◆ POWER_INTENSET_SLEEPENTER_Disabled

#define POWER_INTENSET_SLEEPENTER_Disabled   (0UL)

Read: Disabled

Definition at line 6467 of file nrf52_bitfields.h.

◆ POWER_INTENSET_SLEEPENTER_Enabled

#define POWER_INTENSET_SLEEPENTER_Enabled   (1UL)

Read: Enabled

Definition at line 6468 of file nrf52_bitfields.h.

◆ POWER_INTENSET_SLEEPENTER_Msk

#define POWER_INTENSET_SLEEPENTER_Msk   (0x1UL << POWER_INTENSET_SLEEPENTER_Pos)

Bit mask of SLEEPENTER field.

Definition at line 6466 of file nrf52_bitfields.h.

◆ POWER_INTENSET_SLEEPENTER_Pos

#define POWER_INTENSET_SLEEPENTER_Pos   (5UL)

Position of SLEEPENTER field.

Definition at line 6465 of file nrf52_bitfields.h.

◆ POWER_INTENSET_SLEEPENTER_Set

#define POWER_INTENSET_SLEEPENTER_Set   (1UL)

Enable

Definition at line 6469 of file nrf52_bitfields.h.

◆ POWER_INTENSET_SLEEPEXIT_Disabled

#define POWER_INTENSET_SLEEPEXIT_Disabled   (0UL)

Read: Disabled

Definition at line 6460 of file nrf52_bitfields.h.

◆ POWER_INTENSET_SLEEPEXIT_Enabled

#define POWER_INTENSET_SLEEPEXIT_Enabled   (1UL)

Read: Enabled

Definition at line 6461 of file nrf52_bitfields.h.

◆ POWER_INTENSET_SLEEPEXIT_Msk

#define POWER_INTENSET_SLEEPEXIT_Msk   (0x1UL << POWER_INTENSET_SLEEPEXIT_Pos)

Bit mask of SLEEPEXIT field.

Definition at line 6459 of file nrf52_bitfields.h.

◆ POWER_INTENSET_SLEEPEXIT_Pos

#define POWER_INTENSET_SLEEPEXIT_Pos   (6UL)

Position of SLEEPEXIT field.

Definition at line 6458 of file nrf52_bitfields.h.

◆ POWER_INTENSET_SLEEPEXIT_Set

#define POWER_INTENSET_SLEEPEXIT_Set   (1UL)

Enable

Definition at line 6462 of file nrf52_bitfields.h.

◆ POWER_POFCON_POF_Disabled

#define POWER_POFCON_POF_Disabled   (0UL)

Disable

Definition at line 6606 of file nrf52_bitfields.h.

◆ POWER_POFCON_POF_Enabled

#define POWER_POFCON_POF_Enabled   (1UL)

Enable

Definition at line 6607 of file nrf52_bitfields.h.

◆ POWER_POFCON_POF_Msk

#define POWER_POFCON_POF_Msk   (0x1UL << POWER_POFCON_POF_Pos)

Bit mask of POF field.

Definition at line 6605 of file nrf52_bitfields.h.

◆ POWER_POFCON_POF_Pos

#define POWER_POFCON_POF_Pos   (0UL)

Position of POF field.

Definition at line 6604 of file nrf52_bitfields.h.

◆ POWER_POFCON_THRESHOLD_Msk

#define POWER_POFCON_THRESHOLD_Msk   (0xFUL << POWER_POFCON_THRESHOLD_Pos)

Bit mask of THRESHOLD field.

Definition at line 6593 of file nrf52_bitfields.h.

◆ POWER_POFCON_THRESHOLD_Pos

#define POWER_POFCON_THRESHOLD_Pos   (1UL)

Position of THRESHOLD field.

Definition at line 6592 of file nrf52_bitfields.h.

◆ POWER_POFCON_THRESHOLD_V19

#define POWER_POFCON_THRESHOLD_V19   (6UL)

Set threshold to 1.9 V

Definition at line 6594 of file nrf52_bitfields.h.

◆ POWER_POFCON_THRESHOLD_V20

#define POWER_POFCON_THRESHOLD_V20   (7UL)

Set threshold to 2.0 V

Definition at line 6595 of file nrf52_bitfields.h.

◆ POWER_POFCON_THRESHOLD_V21

#define POWER_POFCON_THRESHOLD_V21   (8UL)

Set threshold to 2.1 V

Definition at line 6596 of file nrf52_bitfields.h.

◆ POWER_POFCON_THRESHOLD_V22

#define POWER_POFCON_THRESHOLD_V22   (9UL)

Set threshold to 2.2 V

Definition at line 6597 of file nrf52_bitfields.h.

◆ POWER_POFCON_THRESHOLD_V23

#define POWER_POFCON_THRESHOLD_V23   (10UL)

Set threshold to 2.3 V

Definition at line 6598 of file nrf52_bitfields.h.

◆ POWER_POFCON_THRESHOLD_V24

#define POWER_POFCON_THRESHOLD_V24   (11UL)

Set threshold to 2.4 V

Definition at line 6599 of file nrf52_bitfields.h.

◆ POWER_POFCON_THRESHOLD_V27

#define POWER_POFCON_THRESHOLD_V27   (14UL)

Set threshold to 2.7 V

Definition at line 6600 of file nrf52_bitfields.h.

◆ POWER_POFCON_THRESHOLD_V28

#define POWER_POFCON_THRESHOLD_V28   (15UL)

Set threshold to 2.8 V

Definition at line 6601 of file nrf52_bitfields.h.

◆ POWER_RAM_POWER_S0POWER_Msk

#define POWER_RAM_POWER_S0POWER_Msk   (0x1UL << POWER_RAM_POWER_S0POWER_Pos)

Bit mask of S0POWER field.

Definition at line 6709 of file nrf52_bitfields.h.

◆ POWER_RAM_POWER_S0POWER_Off

#define POWER_RAM_POWER_S0POWER_Off   (0UL)

Off

Definition at line 6710 of file nrf52_bitfields.h.

◆ POWER_RAM_POWER_S0POWER_On

#define POWER_RAM_POWER_S0POWER_On   (1UL)

On

Definition at line 6711 of file nrf52_bitfields.h.

◆ POWER_RAM_POWER_S0POWER_Pos

#define POWER_RAM_POWER_S0POWER_Pos   (0UL)

Position of S0POWER field.

Definition at line 6708 of file nrf52_bitfields.h.

◆ POWER_RAM_POWER_S0RETENTION_Msk

#define POWER_RAM_POWER_S0RETENTION_Msk   (0x1UL << POWER_RAM_POWER_S0RETENTION_Pos)

Bit mask of S0RETENTION field.

Definition at line 6697 of file nrf52_bitfields.h.

◆ POWER_RAM_POWER_S0RETENTION_Off

#define POWER_RAM_POWER_S0RETENTION_Off   (0UL)

Off

Definition at line 6698 of file nrf52_bitfields.h.

◆ POWER_RAM_POWER_S0RETENTION_On

#define POWER_RAM_POWER_S0RETENTION_On   (1UL)

On

Definition at line 6699 of file nrf52_bitfields.h.

◆ POWER_RAM_POWER_S0RETENTION_Pos

#define POWER_RAM_POWER_S0RETENTION_Pos   (16UL)

Position of S0RETENTION field.

Definition at line 6696 of file nrf52_bitfields.h.

◆ POWER_RAM_POWER_S1POWER_Msk

#define POWER_RAM_POWER_S1POWER_Msk   (0x1UL << POWER_RAM_POWER_S1POWER_Pos)

Bit mask of S1POWER field.

Definition at line 6703 of file nrf52_bitfields.h.

◆ POWER_RAM_POWER_S1POWER_Off

#define POWER_RAM_POWER_S1POWER_Off   (0UL)

Off

Definition at line 6704 of file nrf52_bitfields.h.

◆ POWER_RAM_POWER_S1POWER_On

#define POWER_RAM_POWER_S1POWER_On   (1UL)

On

Definition at line 6705 of file nrf52_bitfields.h.

◆ POWER_RAM_POWER_S1POWER_Pos

#define POWER_RAM_POWER_S1POWER_Pos   (1UL)

Position of S1POWER field.

Definition at line 6702 of file nrf52_bitfields.h.

◆ POWER_RAM_POWER_S1RETENTION_Msk

#define POWER_RAM_POWER_S1RETENTION_Msk   (0x1UL << POWER_RAM_POWER_S1RETENTION_Pos)

Bit mask of S1RETENTION field.

Definition at line 6691 of file nrf52_bitfields.h.

◆ POWER_RAM_POWER_S1RETENTION_Off

#define POWER_RAM_POWER_S1RETENTION_Off   (0UL)

Off

Definition at line 6692 of file nrf52_bitfields.h.

◆ POWER_RAM_POWER_S1RETENTION_On

#define POWER_RAM_POWER_S1RETENTION_On   (1UL)

On

Definition at line 6693 of file nrf52_bitfields.h.

◆ POWER_RAM_POWER_S1RETENTION_Pos

#define POWER_RAM_POWER_S1RETENTION_Pos   (17UL)

Position of S1RETENTION field.

Definition at line 6690 of file nrf52_bitfields.h.

◆ POWER_RAM_POWERCLR_S0POWER_Msk

#define POWER_RAM_POWERCLR_S0POWER_Msk   (0x1UL << POWER_RAM_POWERCLR_S0POWER_Pos)

Bit mask of S0POWER field.

Definition at line 6756 of file nrf52_bitfields.h.

◆ POWER_RAM_POWERCLR_S0POWER_Off

#define POWER_RAM_POWERCLR_S0POWER_Off   (1UL)

Off

Definition at line 6757 of file nrf52_bitfields.h.

◆ POWER_RAM_POWERCLR_S0POWER_Pos

#define POWER_RAM_POWERCLR_S0POWER_Pos   (0UL)

Position of S0POWER field.

Definition at line 6755 of file nrf52_bitfields.h.

◆ POWER_RAM_POWERCLR_S0RETENTION_Msk

#define POWER_RAM_POWERCLR_S0RETENTION_Msk   (0x1UL << POWER_RAM_POWERCLR_S0RETENTION_Pos)

Bit mask of S0RETENTION field.

Definition at line 6746 of file nrf52_bitfields.h.

◆ POWER_RAM_POWERCLR_S0RETENTION_Off

#define POWER_RAM_POWERCLR_S0RETENTION_Off   (1UL)

Off

Definition at line 6747 of file nrf52_bitfields.h.

◆ POWER_RAM_POWERCLR_S0RETENTION_Pos

#define POWER_RAM_POWERCLR_S0RETENTION_Pos   (16UL)

Position of S0RETENTION field.

Definition at line 6745 of file nrf52_bitfields.h.

◆ POWER_RAM_POWERCLR_S1POWER_Msk

#define POWER_RAM_POWERCLR_S1POWER_Msk   (0x1UL << POWER_RAM_POWERCLR_S1POWER_Pos)

Bit mask of S1POWER field.

Definition at line 6751 of file nrf52_bitfields.h.

◆ POWER_RAM_POWERCLR_S1POWER_Off

#define POWER_RAM_POWERCLR_S1POWER_Off   (1UL)

Off

Definition at line 6752 of file nrf52_bitfields.h.

◆ POWER_RAM_POWERCLR_S1POWER_Pos

#define POWER_RAM_POWERCLR_S1POWER_Pos   (1UL)

Position of S1POWER field.

Definition at line 6750 of file nrf52_bitfields.h.

◆ POWER_RAM_POWERCLR_S1RETENTION_Msk

#define POWER_RAM_POWERCLR_S1RETENTION_Msk   (0x1UL << POWER_RAM_POWERCLR_S1RETENTION_Pos)

Bit mask of S1RETENTION field.

Definition at line 6741 of file nrf52_bitfields.h.

◆ POWER_RAM_POWERCLR_S1RETENTION_Off

#define POWER_RAM_POWERCLR_S1RETENTION_Off   (1UL)

Off

Definition at line 6742 of file nrf52_bitfields.h.

◆ POWER_RAM_POWERCLR_S1RETENTION_Pos

#define POWER_RAM_POWERCLR_S1RETENTION_Pos   (17UL)

Position of S1RETENTION field.

Definition at line 6740 of file nrf52_bitfields.h.

◆ POWER_RAM_POWERSET_S0POWER_Msk

#define POWER_RAM_POWERSET_S0POWER_Msk   (0x1UL << POWER_RAM_POWERSET_S0POWER_Pos)

Bit mask of S0POWER field.

Definition at line 6733 of file nrf52_bitfields.h.

◆ POWER_RAM_POWERSET_S0POWER_On

#define POWER_RAM_POWERSET_S0POWER_On   (1UL)

On

Definition at line 6734 of file nrf52_bitfields.h.

◆ POWER_RAM_POWERSET_S0POWER_Pos

#define POWER_RAM_POWERSET_S0POWER_Pos   (0UL)

Position of S0POWER field.

Definition at line 6732 of file nrf52_bitfields.h.

◆ POWER_RAM_POWERSET_S0RETENTION_Msk

#define POWER_RAM_POWERSET_S0RETENTION_Msk   (0x1UL << POWER_RAM_POWERSET_S0RETENTION_Pos)

Bit mask of S0RETENTION field.

Definition at line 6723 of file nrf52_bitfields.h.

◆ POWER_RAM_POWERSET_S0RETENTION_On

#define POWER_RAM_POWERSET_S0RETENTION_On   (1UL)

On

Definition at line 6724 of file nrf52_bitfields.h.

◆ POWER_RAM_POWERSET_S0RETENTION_Pos

#define POWER_RAM_POWERSET_S0RETENTION_Pos   (16UL)

Position of S0RETENTION field.

Definition at line 6722 of file nrf52_bitfields.h.

◆ POWER_RAM_POWERSET_S1POWER_Msk

#define POWER_RAM_POWERSET_S1POWER_Msk   (0x1UL << POWER_RAM_POWERSET_S1POWER_Pos)

Bit mask of S1POWER field.

Definition at line 6728 of file nrf52_bitfields.h.

◆ POWER_RAM_POWERSET_S1POWER_On

#define POWER_RAM_POWERSET_S1POWER_On   (1UL)

On

Definition at line 6729 of file nrf52_bitfields.h.

◆ POWER_RAM_POWERSET_S1POWER_Pos

#define POWER_RAM_POWERSET_S1POWER_Pos   (1UL)

Position of S1POWER field.

Definition at line 6727 of file nrf52_bitfields.h.

◆ POWER_RAM_POWERSET_S1RETENTION_Msk

#define POWER_RAM_POWERSET_S1RETENTION_Msk   (0x1UL << POWER_RAM_POWERSET_S1RETENTION_Pos)

Bit mask of S1RETENTION field.

Definition at line 6718 of file nrf52_bitfields.h.

◆ POWER_RAM_POWERSET_S1RETENTION_On

#define POWER_RAM_POWERSET_S1RETENTION_On   (1UL)

On

Definition at line 6719 of file nrf52_bitfields.h.

◆ POWER_RAM_POWERSET_S1RETENTION_Pos

#define POWER_RAM_POWERSET_S1RETENTION_Pos   (17UL)

Position of S1RETENTION field.

Definition at line 6717 of file nrf52_bitfields.h.

◆ POWER_RAMON_OFFRAM0_Msk

#define POWER_RAMON_OFFRAM0_Msk   (0x1UL << POWER_RAMON_OFFRAM0_Pos)

Bit mask of OFFRAM0 field.

Definition at line 6634 of file nrf52_bitfields.h.

◆ POWER_RAMON_OFFRAM0_Pos

#define POWER_RAMON_OFFRAM0_Pos   (16UL)

Position of OFFRAM0 field.

Definition at line 6633 of file nrf52_bitfields.h.

◆ POWER_RAMON_OFFRAM0_RAM0Off

#define POWER_RAMON_OFFRAM0_RAM0Off   (0UL)

Off

Definition at line 6635 of file nrf52_bitfields.h.

◆ POWER_RAMON_OFFRAM0_RAM0On

#define POWER_RAMON_OFFRAM0_RAM0On   (1UL)

On

Definition at line 6636 of file nrf52_bitfields.h.

◆ POWER_RAMON_OFFRAM1_Msk

#define POWER_RAMON_OFFRAM1_Msk   (0x1UL << POWER_RAMON_OFFRAM1_Pos)

Bit mask of OFFRAM1 field.

Definition at line 6628 of file nrf52_bitfields.h.

◆ POWER_RAMON_OFFRAM1_Pos

#define POWER_RAMON_OFFRAM1_Pos   (17UL)

Position of OFFRAM1 field.

Definition at line 6627 of file nrf52_bitfields.h.

◆ POWER_RAMON_OFFRAM1_RAM1Off

#define POWER_RAMON_OFFRAM1_RAM1Off   (0UL)

Off

Definition at line 6629 of file nrf52_bitfields.h.

◆ POWER_RAMON_OFFRAM1_RAM1On

#define POWER_RAMON_OFFRAM1_RAM1On   (1UL)

On

Definition at line 6630 of file nrf52_bitfields.h.

◆ POWER_RAMON_ONRAM0_Msk

#define POWER_RAMON_ONRAM0_Msk   (0x1UL << POWER_RAMON_ONRAM0_Pos)

Bit mask of ONRAM0 field.

Definition at line 6646 of file nrf52_bitfields.h.

◆ POWER_RAMON_ONRAM0_Pos

#define POWER_RAMON_ONRAM0_Pos   (0UL)

Position of ONRAM0 field.

Definition at line 6645 of file nrf52_bitfields.h.

◆ POWER_RAMON_ONRAM0_RAM0Off

#define POWER_RAMON_ONRAM0_RAM0Off   (0UL)

Off

Definition at line 6647 of file nrf52_bitfields.h.

◆ POWER_RAMON_ONRAM0_RAM0On

#define POWER_RAMON_ONRAM0_RAM0On   (1UL)

On

Definition at line 6648 of file nrf52_bitfields.h.

◆ POWER_RAMON_ONRAM1_Msk

#define POWER_RAMON_ONRAM1_Msk   (0x1UL << POWER_RAMON_ONRAM1_Pos)

Bit mask of ONRAM1 field.

Definition at line 6640 of file nrf52_bitfields.h.

◆ POWER_RAMON_ONRAM1_Pos

#define POWER_RAMON_ONRAM1_Pos   (1UL)

Position of ONRAM1 field.

Definition at line 6639 of file nrf52_bitfields.h.

◆ POWER_RAMON_ONRAM1_RAM1Off

#define POWER_RAMON_ONRAM1_RAM1Off   (0UL)

Off

Definition at line 6641 of file nrf52_bitfields.h.

◆ POWER_RAMON_ONRAM1_RAM1On

#define POWER_RAMON_ONRAM1_RAM1On   (1UL)

On

Definition at line 6642 of file nrf52_bitfields.h.

◆ POWER_RAMONB_OFFRAM2_Msk

#define POWER_RAMONB_OFFRAM2_Msk   (0x1UL << POWER_RAMONB_OFFRAM2_Pos)

Bit mask of OFFRAM2 field.

Definition at line 6661 of file nrf52_bitfields.h.

◆ POWER_RAMONB_OFFRAM2_Pos

#define POWER_RAMONB_OFFRAM2_Pos   (16UL)

Position of OFFRAM2 field.

Definition at line 6660 of file nrf52_bitfields.h.

◆ POWER_RAMONB_OFFRAM2_RAM2Off

#define POWER_RAMONB_OFFRAM2_RAM2Off   (0UL)

Off

Definition at line 6662 of file nrf52_bitfields.h.

◆ POWER_RAMONB_OFFRAM2_RAM2On

#define POWER_RAMONB_OFFRAM2_RAM2On   (1UL)

On

Definition at line 6663 of file nrf52_bitfields.h.

◆ POWER_RAMONB_OFFRAM3_Msk

#define POWER_RAMONB_OFFRAM3_Msk   (0x1UL << POWER_RAMONB_OFFRAM3_Pos)

Bit mask of OFFRAM3 field.

Definition at line 6655 of file nrf52_bitfields.h.

◆ POWER_RAMONB_OFFRAM3_Pos

#define POWER_RAMONB_OFFRAM3_Pos   (17UL)

Position of OFFRAM3 field.

Definition at line 6654 of file nrf52_bitfields.h.

◆ POWER_RAMONB_OFFRAM3_RAM3Off

#define POWER_RAMONB_OFFRAM3_RAM3Off   (0UL)

Off

Definition at line 6656 of file nrf52_bitfields.h.

◆ POWER_RAMONB_OFFRAM3_RAM3On

#define POWER_RAMONB_OFFRAM3_RAM3On   (1UL)

On

Definition at line 6657 of file nrf52_bitfields.h.

◆ POWER_RAMONB_ONRAM2_Msk

#define POWER_RAMONB_ONRAM2_Msk   (0x1UL << POWER_RAMONB_ONRAM2_Pos)

Bit mask of ONRAM2 field.

Definition at line 6673 of file nrf52_bitfields.h.

◆ POWER_RAMONB_ONRAM2_Pos

#define POWER_RAMONB_ONRAM2_Pos   (0UL)

Position of ONRAM2 field.

Definition at line 6672 of file nrf52_bitfields.h.

◆ POWER_RAMONB_ONRAM2_RAM2Off

#define POWER_RAMONB_ONRAM2_RAM2Off   (0UL)

Off

Definition at line 6674 of file nrf52_bitfields.h.

◆ POWER_RAMONB_ONRAM2_RAM2On

#define POWER_RAMONB_ONRAM2_RAM2On   (1UL)

On

Definition at line 6675 of file nrf52_bitfields.h.

◆ POWER_RAMONB_ONRAM3_Msk

#define POWER_RAMONB_ONRAM3_Msk   (0x1UL << POWER_RAMONB_ONRAM3_Pos)

Bit mask of ONRAM3 field.

Definition at line 6667 of file nrf52_bitfields.h.

◆ POWER_RAMONB_ONRAM3_Pos

#define POWER_RAMONB_ONRAM3_Pos   (1UL)

Position of ONRAM3 field.

Definition at line 6666 of file nrf52_bitfields.h.

◆ POWER_RAMONB_ONRAM3_RAM3Off

#define POWER_RAMONB_ONRAM3_RAM3Off   (0UL)

Off

Definition at line 6668 of file nrf52_bitfields.h.

◆ POWER_RAMONB_ONRAM3_RAM3On

#define POWER_RAMONB_ONRAM3_RAM3On   (1UL)

On

Definition at line 6669 of file nrf52_bitfields.h.

◆ POWER_RAMSTATUS_RAMBLOCK0_Msk

#define POWER_RAMSTATUS_RAMBLOCK0_Msk   (0x1UL << POWER_RAMSTATUS_RAMBLOCK0_Pos)

Bit mask of RAMBLOCK0 field.

Definition at line 6576 of file nrf52_bitfields.h.

◆ POWER_RAMSTATUS_RAMBLOCK0_Off

#define POWER_RAMSTATUS_RAMBLOCK0_Off   (0UL)

Off

Definition at line 6577 of file nrf52_bitfields.h.

◆ POWER_RAMSTATUS_RAMBLOCK0_On

#define POWER_RAMSTATUS_RAMBLOCK0_On   (1UL)

On

Definition at line 6578 of file nrf52_bitfields.h.

◆ POWER_RAMSTATUS_RAMBLOCK0_Pos

#define POWER_RAMSTATUS_RAMBLOCK0_Pos   (0UL)

Position of RAMBLOCK0 field.

Definition at line 6575 of file nrf52_bitfields.h.

◆ POWER_RAMSTATUS_RAMBLOCK1_Msk

#define POWER_RAMSTATUS_RAMBLOCK1_Msk   (0x1UL << POWER_RAMSTATUS_RAMBLOCK1_Pos)

Bit mask of RAMBLOCK1 field.

Definition at line 6570 of file nrf52_bitfields.h.

◆ POWER_RAMSTATUS_RAMBLOCK1_Off

#define POWER_RAMSTATUS_RAMBLOCK1_Off   (0UL)

Off

Definition at line 6571 of file nrf52_bitfields.h.

◆ POWER_RAMSTATUS_RAMBLOCK1_On

#define POWER_RAMSTATUS_RAMBLOCK1_On   (1UL)

On

Definition at line 6572 of file nrf52_bitfields.h.

◆ POWER_RAMSTATUS_RAMBLOCK1_Pos

#define POWER_RAMSTATUS_RAMBLOCK1_Pos   (1UL)

Position of RAMBLOCK1 field.

Definition at line 6569 of file nrf52_bitfields.h.

◆ POWER_RAMSTATUS_RAMBLOCK2_Msk

#define POWER_RAMSTATUS_RAMBLOCK2_Msk   (0x1UL << POWER_RAMSTATUS_RAMBLOCK2_Pos)

Bit mask of RAMBLOCK2 field.

Definition at line 6564 of file nrf52_bitfields.h.

◆ POWER_RAMSTATUS_RAMBLOCK2_Off

#define POWER_RAMSTATUS_RAMBLOCK2_Off   (0UL)

Off

Definition at line 6565 of file nrf52_bitfields.h.

◆ POWER_RAMSTATUS_RAMBLOCK2_On

#define POWER_RAMSTATUS_RAMBLOCK2_On   (1UL)

On

Definition at line 6566 of file nrf52_bitfields.h.

◆ POWER_RAMSTATUS_RAMBLOCK2_Pos

#define POWER_RAMSTATUS_RAMBLOCK2_Pos   (2UL)

Position of RAMBLOCK2 field.

Definition at line 6563 of file nrf52_bitfields.h.

◆ POWER_RAMSTATUS_RAMBLOCK3_Msk

#define POWER_RAMSTATUS_RAMBLOCK3_Msk   (0x1UL << POWER_RAMSTATUS_RAMBLOCK3_Pos)

Bit mask of RAMBLOCK3 field.

Definition at line 6558 of file nrf52_bitfields.h.

◆ POWER_RAMSTATUS_RAMBLOCK3_Off

#define POWER_RAMSTATUS_RAMBLOCK3_Off   (0UL)

Off

Definition at line 6559 of file nrf52_bitfields.h.

◆ POWER_RAMSTATUS_RAMBLOCK3_On

#define POWER_RAMSTATUS_RAMBLOCK3_On   (1UL)

On

Definition at line 6560 of file nrf52_bitfields.h.

◆ POWER_RAMSTATUS_RAMBLOCK3_Pos

#define POWER_RAMSTATUS_RAMBLOCK3_Pos   (3UL)

Position of RAMBLOCK3 field.

Definition at line 6557 of file nrf52_bitfields.h.

◆ POWER_RESETREAS_DIF_Detected

#define POWER_RESETREAS_DIF_Detected   (1UL)

Detected

Definition at line 6515 of file nrf52_bitfields.h.

◆ POWER_RESETREAS_DIF_Msk

#define POWER_RESETREAS_DIF_Msk   (0x1UL << POWER_RESETREAS_DIF_Pos)

Bit mask of DIF field.

Definition at line 6513 of file nrf52_bitfields.h.

◆ POWER_RESETREAS_DIF_NotDetected

#define POWER_RESETREAS_DIF_NotDetected   (0UL)

Not detected

Definition at line 6514 of file nrf52_bitfields.h.

◆ POWER_RESETREAS_DIF_Pos

#define POWER_RESETREAS_DIF_Pos   (18UL)

Position of DIF field.

Definition at line 6512 of file nrf52_bitfields.h.

◆ POWER_RESETREAS_DOG_Detected

#define POWER_RESETREAS_DOG_Detected   (1UL)

Detected

Definition at line 6545 of file nrf52_bitfields.h.

◆ POWER_RESETREAS_DOG_Msk

#define POWER_RESETREAS_DOG_Msk   (0x1UL << POWER_RESETREAS_DOG_Pos)

Bit mask of DOG field.

Definition at line 6543 of file nrf52_bitfields.h.

◆ POWER_RESETREAS_DOG_NotDetected

#define POWER_RESETREAS_DOG_NotDetected   (0UL)

Not detected

Definition at line 6544 of file nrf52_bitfields.h.

◆ POWER_RESETREAS_DOG_Pos

#define POWER_RESETREAS_DOG_Pos   (1UL)

Position of DOG field.

Definition at line 6542 of file nrf52_bitfields.h.

◆ POWER_RESETREAS_LOCKUP_Detected

#define POWER_RESETREAS_LOCKUP_Detected   (1UL)

Detected

Definition at line 6533 of file nrf52_bitfields.h.

◆ POWER_RESETREAS_LOCKUP_Msk

#define POWER_RESETREAS_LOCKUP_Msk   (0x1UL << POWER_RESETREAS_LOCKUP_Pos)

Bit mask of LOCKUP field.

Definition at line 6531 of file nrf52_bitfields.h.

◆ POWER_RESETREAS_LOCKUP_NotDetected

#define POWER_RESETREAS_LOCKUP_NotDetected   (0UL)

Not detected

Definition at line 6532 of file nrf52_bitfields.h.

◆ POWER_RESETREAS_LOCKUP_Pos

#define POWER_RESETREAS_LOCKUP_Pos   (3UL)

Position of LOCKUP field.

Definition at line 6530 of file nrf52_bitfields.h.

◆ POWER_RESETREAS_LPCOMP_Detected

#define POWER_RESETREAS_LPCOMP_Detected   (1UL)

Detected

Definition at line 6521 of file nrf52_bitfields.h.

◆ POWER_RESETREAS_LPCOMP_Msk

#define POWER_RESETREAS_LPCOMP_Msk   (0x1UL << POWER_RESETREAS_LPCOMP_Pos)

Bit mask of LPCOMP field.

Definition at line 6519 of file nrf52_bitfields.h.

◆ POWER_RESETREAS_LPCOMP_NotDetected

#define POWER_RESETREAS_LPCOMP_NotDetected   (0UL)

Not detected

Definition at line 6520 of file nrf52_bitfields.h.

◆ POWER_RESETREAS_LPCOMP_Pos

#define POWER_RESETREAS_LPCOMP_Pos   (17UL)

Position of LPCOMP field.

Definition at line 6518 of file nrf52_bitfields.h.

◆ POWER_RESETREAS_NFC_Detected

#define POWER_RESETREAS_NFC_Detected   (1UL)

Detected

Definition at line 6509 of file nrf52_bitfields.h.

◆ POWER_RESETREAS_NFC_Msk

#define POWER_RESETREAS_NFC_Msk   (0x1UL << POWER_RESETREAS_NFC_Pos)

Bit mask of NFC field.

Definition at line 6507 of file nrf52_bitfields.h.

◆ POWER_RESETREAS_NFC_NotDetected

#define POWER_RESETREAS_NFC_NotDetected   (0UL)

Not detected

Definition at line 6508 of file nrf52_bitfields.h.

◆ POWER_RESETREAS_NFC_Pos

#define POWER_RESETREAS_NFC_Pos   (19UL)

Position of NFC field.

Definition at line 6506 of file nrf52_bitfields.h.

◆ POWER_RESETREAS_OFF_Detected

#define POWER_RESETREAS_OFF_Detected   (1UL)

Detected

Definition at line 6527 of file nrf52_bitfields.h.

◆ POWER_RESETREAS_OFF_Msk

#define POWER_RESETREAS_OFF_Msk   (0x1UL << POWER_RESETREAS_OFF_Pos)

Bit mask of OFF field.

Definition at line 6525 of file nrf52_bitfields.h.

◆ POWER_RESETREAS_OFF_NotDetected

#define POWER_RESETREAS_OFF_NotDetected   (0UL)

Not detected

Definition at line 6526 of file nrf52_bitfields.h.

◆ POWER_RESETREAS_OFF_Pos

#define POWER_RESETREAS_OFF_Pos   (16UL)

Position of OFF field.

Definition at line 6524 of file nrf52_bitfields.h.

◆ POWER_RESETREAS_RESETPIN_Detected

#define POWER_RESETREAS_RESETPIN_Detected   (1UL)

Detected

Definition at line 6551 of file nrf52_bitfields.h.

◆ POWER_RESETREAS_RESETPIN_Msk

#define POWER_RESETREAS_RESETPIN_Msk   (0x1UL << POWER_RESETREAS_RESETPIN_Pos)

Bit mask of RESETPIN field.

Definition at line 6549 of file nrf52_bitfields.h.

◆ POWER_RESETREAS_RESETPIN_NotDetected

#define POWER_RESETREAS_RESETPIN_NotDetected   (0UL)

Not detected

Definition at line 6550 of file nrf52_bitfields.h.

◆ POWER_RESETREAS_RESETPIN_Pos

#define POWER_RESETREAS_RESETPIN_Pos   (0UL)

Position of RESETPIN field.

Definition at line 6548 of file nrf52_bitfields.h.

◆ POWER_RESETREAS_SREQ_Detected

#define POWER_RESETREAS_SREQ_Detected   (1UL)

Detected

Definition at line 6539 of file nrf52_bitfields.h.

◆ POWER_RESETREAS_SREQ_Msk

#define POWER_RESETREAS_SREQ_Msk   (0x1UL << POWER_RESETREAS_SREQ_Pos)

Bit mask of SREQ field.

Definition at line 6537 of file nrf52_bitfields.h.

◆ POWER_RESETREAS_SREQ_NotDetected

#define POWER_RESETREAS_SREQ_NotDetected   (0UL)

Not detected

Definition at line 6538 of file nrf52_bitfields.h.

◆ POWER_RESETREAS_SREQ_Pos

#define POWER_RESETREAS_SREQ_Pos   (2UL)

Position of SREQ field.

Definition at line 6536 of file nrf52_bitfields.h.

◆ POWER_SYSTEMOFF_SYSTEMOFF_Enter

#define POWER_SYSTEMOFF_SYSTEMOFF_Enter   (1UL)

Enable System OFF mode

Definition at line 6586 of file nrf52_bitfields.h.

◆ POWER_SYSTEMOFF_SYSTEMOFF_Msk

#define POWER_SYSTEMOFF_SYSTEMOFF_Msk   (0x1UL << POWER_SYSTEMOFF_SYSTEMOFF_Pos)

Bit mask of SYSTEMOFF field.

Definition at line 6585 of file nrf52_bitfields.h.

◆ POWER_SYSTEMOFF_SYSTEMOFF_Pos

#define POWER_SYSTEMOFF_SYSTEMOFF_Pos   (0UL)

Position of SYSTEMOFF field.

Definition at line 6584 of file nrf52_bitfields.h.

◆ PPI_CH_EEP_EEP_Msk

#define PPI_CH_EEP_EEP_Msk   (0xFFFFFFFFUL << PPI_CH_EEP_EEP_Pos)

Bit mask of EEP field.

Definition at line 7417 of file nrf52_bitfields.h.

◆ PPI_CH_EEP_EEP_Pos

#define PPI_CH_EEP_EEP_Pos   (0UL)

Position of EEP field.

Definition at line 7416 of file nrf52_bitfields.h.

◆ PPI_CH_TEP_TEP_Msk

#define PPI_CH_TEP_TEP_Msk   (0xFFFFFFFFUL << PPI_CH_TEP_TEP_Pos)

Bit mask of TEP field.

Definition at line 7424 of file nrf52_bitfields.h.

◆ PPI_CH_TEP_TEP_Pos

#define PPI_CH_TEP_TEP_Pos   (0UL)

Position of TEP field.

Definition at line 7423 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH0_Disabled

#define PPI_CHEN_CH0_Disabled   (0UL)

Disable channel

Definition at line 6955 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH0_Enabled

#define PPI_CHEN_CH0_Enabled   (1UL)

Enable channel

Definition at line 6956 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH0_Msk

#define PPI_CHEN_CH0_Msk   (0x1UL << PPI_CHEN_CH0_Pos)

Bit mask of CH0 field.

Definition at line 6954 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH0_Pos

#define PPI_CHEN_CH0_Pos   (0UL)

Position of CH0 field.

Definition at line 6953 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH10_Disabled

#define PPI_CHEN_CH10_Disabled   (0UL)

Disable channel

Definition at line 6895 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH10_Enabled

#define PPI_CHEN_CH10_Enabled   (1UL)

Enable channel

Definition at line 6896 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH10_Msk

#define PPI_CHEN_CH10_Msk   (0x1UL << PPI_CHEN_CH10_Pos)

Bit mask of CH10 field.

Definition at line 6894 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH10_Pos

#define PPI_CHEN_CH10_Pos   (10UL)

Position of CH10 field.

Definition at line 6893 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH11_Disabled

#define PPI_CHEN_CH11_Disabled   (0UL)

Disable channel

Definition at line 6889 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH11_Enabled

#define PPI_CHEN_CH11_Enabled   (1UL)

Enable channel

Definition at line 6890 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH11_Msk

#define PPI_CHEN_CH11_Msk   (0x1UL << PPI_CHEN_CH11_Pos)

Bit mask of CH11 field.

Definition at line 6888 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH11_Pos

#define PPI_CHEN_CH11_Pos   (11UL)

Position of CH11 field.

Definition at line 6887 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH12_Disabled

#define PPI_CHEN_CH12_Disabled   (0UL)

Disable channel

Definition at line 6883 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH12_Enabled

#define PPI_CHEN_CH12_Enabled   (1UL)

Enable channel

Definition at line 6884 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH12_Msk

#define PPI_CHEN_CH12_Msk   (0x1UL << PPI_CHEN_CH12_Pos)

Bit mask of CH12 field.

Definition at line 6882 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH12_Pos

#define PPI_CHEN_CH12_Pos   (12UL)

Position of CH12 field.

Definition at line 6881 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH13_Disabled

#define PPI_CHEN_CH13_Disabled   (0UL)

Disable channel

Definition at line 6877 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH13_Enabled

#define PPI_CHEN_CH13_Enabled   (1UL)

Enable channel

Definition at line 6878 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH13_Msk

#define PPI_CHEN_CH13_Msk   (0x1UL << PPI_CHEN_CH13_Pos)

Bit mask of CH13 field.

Definition at line 6876 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH13_Pos

#define PPI_CHEN_CH13_Pos   (13UL)

Position of CH13 field.

Definition at line 6875 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH14_Disabled

#define PPI_CHEN_CH14_Disabled   (0UL)

Disable channel

Definition at line 6871 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH14_Enabled

#define PPI_CHEN_CH14_Enabled   (1UL)

Enable channel

Definition at line 6872 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH14_Msk

#define PPI_CHEN_CH14_Msk   (0x1UL << PPI_CHEN_CH14_Pos)

Bit mask of CH14 field.

Definition at line 6870 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH14_Pos

#define PPI_CHEN_CH14_Pos   (14UL)

Position of CH14 field.

Definition at line 6869 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH15_Disabled

#define PPI_CHEN_CH15_Disabled   (0UL)

Disable channel

Definition at line 6865 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH15_Enabled

#define PPI_CHEN_CH15_Enabled   (1UL)

Enable channel

Definition at line 6866 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH15_Msk

#define PPI_CHEN_CH15_Msk   (0x1UL << PPI_CHEN_CH15_Pos)

Bit mask of CH15 field.

Definition at line 6864 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH15_Pos

#define PPI_CHEN_CH15_Pos   (15UL)

Position of CH15 field.

Definition at line 6863 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH16_Disabled

#define PPI_CHEN_CH16_Disabled   (0UL)

Disable channel

Definition at line 6859 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH16_Enabled

#define PPI_CHEN_CH16_Enabled   (1UL)

Enable channel

Definition at line 6860 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH16_Msk

#define PPI_CHEN_CH16_Msk   (0x1UL << PPI_CHEN_CH16_Pos)

Bit mask of CH16 field.

Definition at line 6858 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH16_Pos

#define PPI_CHEN_CH16_Pos   (16UL)

Position of CH16 field.

Definition at line 6857 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH17_Disabled

#define PPI_CHEN_CH17_Disabled   (0UL)

Disable channel

Definition at line 6853 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH17_Enabled

#define PPI_CHEN_CH17_Enabled   (1UL)

Enable channel

Definition at line 6854 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH17_Msk

#define PPI_CHEN_CH17_Msk   (0x1UL << PPI_CHEN_CH17_Pos)

Bit mask of CH17 field.

Definition at line 6852 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH17_Pos

#define PPI_CHEN_CH17_Pos   (17UL)

Position of CH17 field.

Definition at line 6851 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH18_Disabled

#define PPI_CHEN_CH18_Disabled   (0UL)

Disable channel

Definition at line 6847 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH18_Enabled

#define PPI_CHEN_CH18_Enabled   (1UL)

Enable channel

Definition at line 6848 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH18_Msk

#define PPI_CHEN_CH18_Msk   (0x1UL << PPI_CHEN_CH18_Pos)

Bit mask of CH18 field.

Definition at line 6846 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH18_Pos

#define PPI_CHEN_CH18_Pos   (18UL)

Position of CH18 field.

Definition at line 6845 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH19_Disabled

#define PPI_CHEN_CH19_Disabled   (0UL)

Disable channel

Definition at line 6841 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH19_Enabled

#define PPI_CHEN_CH19_Enabled   (1UL)

Enable channel

Definition at line 6842 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH19_Msk

#define PPI_CHEN_CH19_Msk   (0x1UL << PPI_CHEN_CH19_Pos)

Bit mask of CH19 field.

Definition at line 6840 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH19_Pos

#define PPI_CHEN_CH19_Pos   (19UL)

Position of CH19 field.

Definition at line 6839 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH1_Disabled

#define PPI_CHEN_CH1_Disabled   (0UL)

Disable channel

Definition at line 6949 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH1_Enabled

#define PPI_CHEN_CH1_Enabled   (1UL)

Enable channel

Definition at line 6950 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH1_Msk

#define PPI_CHEN_CH1_Msk   (0x1UL << PPI_CHEN_CH1_Pos)

Bit mask of CH1 field.

Definition at line 6948 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH1_Pos

#define PPI_CHEN_CH1_Pos   (1UL)

Position of CH1 field.

Definition at line 6947 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH20_Disabled

#define PPI_CHEN_CH20_Disabled   (0UL)

Disable channel

Definition at line 6835 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH20_Enabled

#define PPI_CHEN_CH20_Enabled   (1UL)

Enable channel

Definition at line 6836 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH20_Msk

#define PPI_CHEN_CH20_Msk   (0x1UL << PPI_CHEN_CH20_Pos)

Bit mask of CH20 field.

Definition at line 6834 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH20_Pos

#define PPI_CHEN_CH20_Pos   (20UL)

Position of CH20 field.

Definition at line 6833 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH21_Disabled

#define PPI_CHEN_CH21_Disabled   (0UL)

Disable channel

Definition at line 6829 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH21_Enabled

#define PPI_CHEN_CH21_Enabled   (1UL)

Enable channel

Definition at line 6830 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH21_Msk

#define PPI_CHEN_CH21_Msk   (0x1UL << PPI_CHEN_CH21_Pos)

Bit mask of CH21 field.

Definition at line 6828 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH21_Pos

#define PPI_CHEN_CH21_Pos   (21UL)

Position of CH21 field.

Definition at line 6827 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH22_Disabled

#define PPI_CHEN_CH22_Disabled   (0UL)

Disable channel

Definition at line 6823 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH22_Enabled

#define PPI_CHEN_CH22_Enabled   (1UL)

Enable channel

Definition at line 6824 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH22_Msk

#define PPI_CHEN_CH22_Msk   (0x1UL << PPI_CHEN_CH22_Pos)

Bit mask of CH22 field.

Definition at line 6822 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH22_Pos

#define PPI_CHEN_CH22_Pos   (22UL)

Position of CH22 field.

Definition at line 6821 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH23_Disabled

#define PPI_CHEN_CH23_Disabled   (0UL)

Disable channel

Definition at line 6817 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH23_Enabled

#define PPI_CHEN_CH23_Enabled   (1UL)

Enable channel

Definition at line 6818 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH23_Msk

#define PPI_CHEN_CH23_Msk   (0x1UL << PPI_CHEN_CH23_Pos)

Bit mask of CH23 field.

Definition at line 6816 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH23_Pos

#define PPI_CHEN_CH23_Pos   (23UL)

Position of CH23 field.

Definition at line 6815 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH24_Disabled

#define PPI_CHEN_CH24_Disabled   (0UL)

Disable channel

Definition at line 6811 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH24_Enabled

#define PPI_CHEN_CH24_Enabled   (1UL)

Enable channel

Definition at line 6812 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH24_Msk

#define PPI_CHEN_CH24_Msk   (0x1UL << PPI_CHEN_CH24_Pos)

Bit mask of CH24 field.

Definition at line 6810 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH24_Pos

#define PPI_CHEN_CH24_Pos   (24UL)

Position of CH24 field.

Definition at line 6809 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH25_Disabled

#define PPI_CHEN_CH25_Disabled   (0UL)

Disable channel

Definition at line 6805 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH25_Enabled

#define PPI_CHEN_CH25_Enabled   (1UL)

Enable channel

Definition at line 6806 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH25_Msk

#define PPI_CHEN_CH25_Msk   (0x1UL << PPI_CHEN_CH25_Pos)

Bit mask of CH25 field.

Definition at line 6804 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH25_Pos

#define PPI_CHEN_CH25_Pos   (25UL)

Position of CH25 field.

Definition at line 6803 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH26_Disabled

#define PPI_CHEN_CH26_Disabled   (0UL)

Disable channel

Definition at line 6799 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH26_Enabled

#define PPI_CHEN_CH26_Enabled   (1UL)

Enable channel

Definition at line 6800 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH26_Msk

#define PPI_CHEN_CH26_Msk   (0x1UL << PPI_CHEN_CH26_Pos)

Bit mask of CH26 field.

Definition at line 6798 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH26_Pos

#define PPI_CHEN_CH26_Pos   (26UL)

Position of CH26 field.

Definition at line 6797 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH27_Disabled

#define PPI_CHEN_CH27_Disabled   (0UL)

Disable channel

Definition at line 6793 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH27_Enabled

#define PPI_CHEN_CH27_Enabled   (1UL)

Enable channel

Definition at line 6794 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH27_Msk

#define PPI_CHEN_CH27_Msk   (0x1UL << PPI_CHEN_CH27_Pos)

Bit mask of CH27 field.

Definition at line 6792 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH27_Pos

#define PPI_CHEN_CH27_Pos   (27UL)

Position of CH27 field.

Definition at line 6791 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH28_Disabled

#define PPI_CHEN_CH28_Disabled   (0UL)

Disable channel

Definition at line 6787 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH28_Enabled

#define PPI_CHEN_CH28_Enabled   (1UL)

Enable channel

Definition at line 6788 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH28_Msk

#define PPI_CHEN_CH28_Msk   (0x1UL << PPI_CHEN_CH28_Pos)

Bit mask of CH28 field.

Definition at line 6786 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH28_Pos

#define PPI_CHEN_CH28_Pos   (28UL)

Position of CH28 field.

Definition at line 6785 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH29_Disabled

#define PPI_CHEN_CH29_Disabled   (0UL)

Disable channel

Definition at line 6781 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH29_Enabled

#define PPI_CHEN_CH29_Enabled   (1UL)

Enable channel

Definition at line 6782 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH29_Msk

#define PPI_CHEN_CH29_Msk   (0x1UL << PPI_CHEN_CH29_Pos)

Bit mask of CH29 field.

Definition at line 6780 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH29_Pos

#define PPI_CHEN_CH29_Pos   (29UL)

Position of CH29 field.

Definition at line 6779 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH2_Disabled

#define PPI_CHEN_CH2_Disabled   (0UL)

Disable channel

Definition at line 6943 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH2_Enabled

#define PPI_CHEN_CH2_Enabled   (1UL)

Enable channel

Definition at line 6944 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH2_Msk

#define PPI_CHEN_CH2_Msk   (0x1UL << PPI_CHEN_CH2_Pos)

Bit mask of CH2 field.

Definition at line 6942 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH2_Pos

#define PPI_CHEN_CH2_Pos   (2UL)

Position of CH2 field.

Definition at line 6941 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH30_Disabled

#define PPI_CHEN_CH30_Disabled   (0UL)

Disable channel

Definition at line 6775 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH30_Enabled

#define PPI_CHEN_CH30_Enabled   (1UL)

Enable channel

Definition at line 6776 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH30_Msk

#define PPI_CHEN_CH30_Msk   (0x1UL << PPI_CHEN_CH30_Pos)

Bit mask of CH30 field.

Definition at line 6774 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH30_Pos

#define PPI_CHEN_CH30_Pos   (30UL)

Position of CH30 field.

Definition at line 6773 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH31_Disabled

#define PPI_CHEN_CH31_Disabled   (0UL)

Disable channel

Definition at line 6769 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH31_Enabled

#define PPI_CHEN_CH31_Enabled   (1UL)

Enable channel

Definition at line 6770 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH31_Msk

#define PPI_CHEN_CH31_Msk   (0x1UL << PPI_CHEN_CH31_Pos)

Bit mask of CH31 field.

Definition at line 6768 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH31_Pos

#define PPI_CHEN_CH31_Pos   (31UL)

Position of CH31 field.

Definition at line 6767 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH3_Disabled

#define PPI_CHEN_CH3_Disabled   (0UL)

Disable channel

Definition at line 6937 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH3_Enabled

#define PPI_CHEN_CH3_Enabled   (1UL)

Enable channel

Definition at line 6938 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH3_Msk

#define PPI_CHEN_CH3_Msk   (0x1UL << PPI_CHEN_CH3_Pos)

Bit mask of CH3 field.

Definition at line 6936 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH3_Pos

#define PPI_CHEN_CH3_Pos   (3UL)

Position of CH3 field.

Definition at line 6935 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH4_Disabled

#define PPI_CHEN_CH4_Disabled   (0UL)

Disable channel

Definition at line 6931 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH4_Enabled

#define PPI_CHEN_CH4_Enabled   (1UL)

Enable channel

Definition at line 6932 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH4_Msk

#define PPI_CHEN_CH4_Msk   (0x1UL << PPI_CHEN_CH4_Pos)

Bit mask of CH4 field.

Definition at line 6930 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH4_Pos

#define PPI_CHEN_CH4_Pos   (4UL)

Position of CH4 field.

Definition at line 6929 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH5_Disabled

#define PPI_CHEN_CH5_Disabled   (0UL)

Disable channel

Definition at line 6925 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH5_Enabled

#define PPI_CHEN_CH5_Enabled   (1UL)

Enable channel

Definition at line 6926 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH5_Msk

#define PPI_CHEN_CH5_Msk   (0x1UL << PPI_CHEN_CH5_Pos)

Bit mask of CH5 field.

Definition at line 6924 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH5_Pos

#define PPI_CHEN_CH5_Pos   (5UL)

Position of CH5 field.

Definition at line 6923 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH6_Disabled

#define PPI_CHEN_CH6_Disabled   (0UL)

Disable channel

Definition at line 6919 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH6_Enabled

#define PPI_CHEN_CH6_Enabled   (1UL)

Enable channel

Definition at line 6920 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH6_Msk

#define PPI_CHEN_CH6_Msk   (0x1UL << PPI_CHEN_CH6_Pos)

Bit mask of CH6 field.

Definition at line 6918 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH6_Pos

#define PPI_CHEN_CH6_Pos   (6UL)

Position of CH6 field.

Definition at line 6917 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH7_Disabled

#define PPI_CHEN_CH7_Disabled   (0UL)

Disable channel

Definition at line 6913 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH7_Enabled

#define PPI_CHEN_CH7_Enabled   (1UL)

Enable channel

Definition at line 6914 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH7_Msk

#define PPI_CHEN_CH7_Msk   (0x1UL << PPI_CHEN_CH7_Pos)

Bit mask of CH7 field.

Definition at line 6912 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH7_Pos

#define PPI_CHEN_CH7_Pos   (7UL)

Position of CH7 field.

Definition at line 6911 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH8_Disabled

#define PPI_CHEN_CH8_Disabled   (0UL)

Disable channel

Definition at line 6907 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH8_Enabled

#define PPI_CHEN_CH8_Enabled   (1UL)

Enable channel

Definition at line 6908 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH8_Msk

#define PPI_CHEN_CH8_Msk   (0x1UL << PPI_CHEN_CH8_Pos)

Bit mask of CH8 field.

Definition at line 6906 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH8_Pos

#define PPI_CHEN_CH8_Pos   (8UL)

Position of CH8 field.

Definition at line 6905 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH9_Disabled

#define PPI_CHEN_CH9_Disabled   (0UL)

Disable channel

Definition at line 6901 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH9_Enabled

#define PPI_CHEN_CH9_Enabled   (1UL)

Enable channel

Definition at line 6902 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH9_Msk

#define PPI_CHEN_CH9_Msk   (0x1UL << PPI_CHEN_CH9_Pos)

Bit mask of CH9 field.

Definition at line 6900 of file nrf52_bitfields.h.

◆ PPI_CHEN_CH9_Pos

#define PPI_CHEN_CH9_Pos   (9UL)

Position of CH9 field.

Definition at line 6899 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH0_Clear

#define PPI_CHENCLR_CH0_Clear   (1UL)

Write: disable channel

Definition at line 7410 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH0_Disabled

#define PPI_CHENCLR_CH0_Disabled   (0UL)

Read: channel disabled

Definition at line 7408 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH0_Enabled

#define PPI_CHENCLR_CH0_Enabled   (1UL)

Read: channel enabled

Definition at line 7409 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH0_Msk

#define PPI_CHENCLR_CH0_Msk   (0x1UL << PPI_CHENCLR_CH0_Pos)

Bit mask of CH0 field.

Definition at line 7407 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH0_Pos

#define PPI_CHENCLR_CH0_Pos   (0UL)

Position of CH0 field.

Definition at line 7406 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH10_Clear

#define PPI_CHENCLR_CH10_Clear   (1UL)

Write: disable channel

Definition at line 7340 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH10_Disabled

#define PPI_CHENCLR_CH10_Disabled   (0UL)

Read: channel disabled

Definition at line 7338 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH10_Enabled

#define PPI_CHENCLR_CH10_Enabled   (1UL)

Read: channel enabled

Definition at line 7339 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH10_Msk

#define PPI_CHENCLR_CH10_Msk   (0x1UL << PPI_CHENCLR_CH10_Pos)

Bit mask of CH10 field.

Definition at line 7337 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH10_Pos

#define PPI_CHENCLR_CH10_Pos   (10UL)

Position of CH10 field.

Definition at line 7336 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH11_Clear

#define PPI_CHENCLR_CH11_Clear   (1UL)

Write: disable channel

Definition at line 7333 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH11_Disabled

#define PPI_CHENCLR_CH11_Disabled   (0UL)

Read: channel disabled

Definition at line 7331 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH11_Enabled

#define PPI_CHENCLR_CH11_Enabled   (1UL)

Read: channel enabled

Definition at line 7332 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH11_Msk

#define PPI_CHENCLR_CH11_Msk   (0x1UL << PPI_CHENCLR_CH11_Pos)

Bit mask of CH11 field.

Definition at line 7330 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH11_Pos

#define PPI_CHENCLR_CH11_Pos   (11UL)

Position of CH11 field.

Definition at line 7329 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH12_Clear

#define PPI_CHENCLR_CH12_Clear   (1UL)

Write: disable channel

Definition at line 7326 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH12_Disabled

#define PPI_CHENCLR_CH12_Disabled   (0UL)

Read: channel disabled

Definition at line 7324 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH12_Enabled

#define PPI_CHENCLR_CH12_Enabled   (1UL)

Read: channel enabled

Definition at line 7325 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH12_Msk

#define PPI_CHENCLR_CH12_Msk   (0x1UL << PPI_CHENCLR_CH12_Pos)

Bit mask of CH12 field.

Definition at line 7323 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH12_Pos

#define PPI_CHENCLR_CH12_Pos   (12UL)

Position of CH12 field.

Definition at line 7322 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH13_Clear

#define PPI_CHENCLR_CH13_Clear   (1UL)

Write: disable channel

Definition at line 7319 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH13_Disabled

#define PPI_CHENCLR_CH13_Disabled   (0UL)

Read: channel disabled

Definition at line 7317 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH13_Enabled

#define PPI_CHENCLR_CH13_Enabled   (1UL)

Read: channel enabled

Definition at line 7318 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH13_Msk

#define PPI_CHENCLR_CH13_Msk   (0x1UL << PPI_CHENCLR_CH13_Pos)

Bit mask of CH13 field.

Definition at line 7316 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH13_Pos

#define PPI_CHENCLR_CH13_Pos   (13UL)

Position of CH13 field.

Definition at line 7315 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH14_Clear

#define PPI_CHENCLR_CH14_Clear   (1UL)

Write: disable channel

Definition at line 7312 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH14_Disabled

#define PPI_CHENCLR_CH14_Disabled   (0UL)

Read: channel disabled

Definition at line 7310 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH14_Enabled

#define PPI_CHENCLR_CH14_Enabled   (1UL)

Read: channel enabled

Definition at line 7311 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH14_Msk

#define PPI_CHENCLR_CH14_Msk   (0x1UL << PPI_CHENCLR_CH14_Pos)

Bit mask of CH14 field.

Definition at line 7309 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH14_Pos

#define PPI_CHENCLR_CH14_Pos   (14UL)

Position of CH14 field.

Definition at line 7308 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH15_Clear

#define PPI_CHENCLR_CH15_Clear   (1UL)

Write: disable channel

Definition at line 7305 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH15_Disabled

#define PPI_CHENCLR_CH15_Disabled   (0UL)

Read: channel disabled

Definition at line 7303 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH15_Enabled

#define PPI_CHENCLR_CH15_Enabled   (1UL)

Read: channel enabled

Definition at line 7304 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH15_Msk

#define PPI_CHENCLR_CH15_Msk   (0x1UL << PPI_CHENCLR_CH15_Pos)

Bit mask of CH15 field.

Definition at line 7302 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH15_Pos

#define PPI_CHENCLR_CH15_Pos   (15UL)

Position of CH15 field.

Definition at line 7301 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH16_Clear

#define PPI_CHENCLR_CH16_Clear   (1UL)

Write: disable channel

Definition at line 7298 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH16_Disabled

#define PPI_CHENCLR_CH16_Disabled   (0UL)

Read: channel disabled

Definition at line 7296 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH16_Enabled

#define PPI_CHENCLR_CH16_Enabled   (1UL)

Read: channel enabled

Definition at line 7297 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH16_Msk

#define PPI_CHENCLR_CH16_Msk   (0x1UL << PPI_CHENCLR_CH16_Pos)

Bit mask of CH16 field.

Definition at line 7295 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH16_Pos

#define PPI_CHENCLR_CH16_Pos   (16UL)

Position of CH16 field.

Definition at line 7294 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH17_Clear

#define PPI_CHENCLR_CH17_Clear   (1UL)

Write: disable channel

Definition at line 7291 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH17_Disabled

#define PPI_CHENCLR_CH17_Disabled   (0UL)

Read: channel disabled

Definition at line 7289 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH17_Enabled

#define PPI_CHENCLR_CH17_Enabled   (1UL)

Read: channel enabled

Definition at line 7290 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH17_Msk

#define PPI_CHENCLR_CH17_Msk   (0x1UL << PPI_CHENCLR_CH17_Pos)

Bit mask of CH17 field.

Definition at line 7288 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH17_Pos

#define PPI_CHENCLR_CH17_Pos   (17UL)

Position of CH17 field.

Definition at line 7287 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH18_Clear

#define PPI_CHENCLR_CH18_Clear   (1UL)

Write: disable channel

Definition at line 7284 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH18_Disabled

#define PPI_CHENCLR_CH18_Disabled   (0UL)

Read: channel disabled

Definition at line 7282 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH18_Enabled

#define PPI_CHENCLR_CH18_Enabled   (1UL)

Read: channel enabled

Definition at line 7283 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH18_Msk

#define PPI_CHENCLR_CH18_Msk   (0x1UL << PPI_CHENCLR_CH18_Pos)

Bit mask of CH18 field.

Definition at line 7281 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH18_Pos

#define PPI_CHENCLR_CH18_Pos   (18UL)

Position of CH18 field.

Definition at line 7280 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH19_Clear

#define PPI_CHENCLR_CH19_Clear   (1UL)

Write: disable channel

Definition at line 7277 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH19_Disabled

#define PPI_CHENCLR_CH19_Disabled   (0UL)

Read: channel disabled

Definition at line 7275 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH19_Enabled

#define PPI_CHENCLR_CH19_Enabled   (1UL)

Read: channel enabled

Definition at line 7276 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH19_Msk

#define PPI_CHENCLR_CH19_Msk   (0x1UL << PPI_CHENCLR_CH19_Pos)

Bit mask of CH19 field.

Definition at line 7274 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH19_Pos

#define PPI_CHENCLR_CH19_Pos   (19UL)

Position of CH19 field.

Definition at line 7273 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH1_Clear

#define PPI_CHENCLR_CH1_Clear   (1UL)

Write: disable channel

Definition at line 7403 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH1_Disabled

#define PPI_CHENCLR_CH1_Disabled   (0UL)

Read: channel disabled

Definition at line 7401 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH1_Enabled

#define PPI_CHENCLR_CH1_Enabled   (1UL)

Read: channel enabled

Definition at line 7402 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH1_Msk

#define PPI_CHENCLR_CH1_Msk   (0x1UL << PPI_CHENCLR_CH1_Pos)

Bit mask of CH1 field.

Definition at line 7400 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH1_Pos

#define PPI_CHENCLR_CH1_Pos   (1UL)

Position of CH1 field.

Definition at line 7399 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH20_Clear

#define PPI_CHENCLR_CH20_Clear   (1UL)

Write: disable channel

Definition at line 7270 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH20_Disabled

#define PPI_CHENCLR_CH20_Disabled   (0UL)

Read: channel disabled

Definition at line 7268 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH20_Enabled

#define PPI_CHENCLR_CH20_Enabled   (1UL)

Read: channel enabled

Definition at line 7269 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH20_Msk

#define PPI_CHENCLR_CH20_Msk   (0x1UL << PPI_CHENCLR_CH20_Pos)

Bit mask of CH20 field.

Definition at line 7267 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH20_Pos

#define PPI_CHENCLR_CH20_Pos   (20UL)

Position of CH20 field.

Definition at line 7266 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH21_Clear

#define PPI_CHENCLR_CH21_Clear   (1UL)

Write: disable channel

Definition at line 7263 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH21_Disabled

#define PPI_CHENCLR_CH21_Disabled   (0UL)

Read: channel disabled

Definition at line 7261 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH21_Enabled

#define PPI_CHENCLR_CH21_Enabled   (1UL)

Read: channel enabled

Definition at line 7262 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH21_Msk

#define PPI_CHENCLR_CH21_Msk   (0x1UL << PPI_CHENCLR_CH21_Pos)

Bit mask of CH21 field.

Definition at line 7260 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH21_Pos

#define PPI_CHENCLR_CH21_Pos   (21UL)

Position of CH21 field.

Definition at line 7259 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH22_Clear

#define PPI_CHENCLR_CH22_Clear   (1UL)

Write: disable channel

Definition at line 7256 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH22_Disabled

#define PPI_CHENCLR_CH22_Disabled   (0UL)

Read: channel disabled

Definition at line 7254 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH22_Enabled

#define PPI_CHENCLR_CH22_Enabled   (1UL)

Read: channel enabled

Definition at line 7255 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH22_Msk

#define PPI_CHENCLR_CH22_Msk   (0x1UL << PPI_CHENCLR_CH22_Pos)

Bit mask of CH22 field.

Definition at line 7253 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH22_Pos

#define PPI_CHENCLR_CH22_Pos   (22UL)

Position of CH22 field.

Definition at line 7252 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH23_Clear

#define PPI_CHENCLR_CH23_Clear   (1UL)

Write: disable channel

Definition at line 7249 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH23_Disabled

#define PPI_CHENCLR_CH23_Disabled   (0UL)

Read: channel disabled

Definition at line 7247 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH23_Enabled

#define PPI_CHENCLR_CH23_Enabled   (1UL)

Read: channel enabled

Definition at line 7248 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH23_Msk

#define PPI_CHENCLR_CH23_Msk   (0x1UL << PPI_CHENCLR_CH23_Pos)

Bit mask of CH23 field.

Definition at line 7246 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH23_Pos

#define PPI_CHENCLR_CH23_Pos   (23UL)

Position of CH23 field.

Definition at line 7245 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH24_Clear

#define PPI_CHENCLR_CH24_Clear   (1UL)

Write: disable channel

Definition at line 7242 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH24_Disabled

#define PPI_CHENCLR_CH24_Disabled   (0UL)

Read: channel disabled

Definition at line 7240 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH24_Enabled

#define PPI_CHENCLR_CH24_Enabled   (1UL)

Read: channel enabled

Definition at line 7241 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH24_Msk

#define PPI_CHENCLR_CH24_Msk   (0x1UL << PPI_CHENCLR_CH24_Pos)

Bit mask of CH24 field.

Definition at line 7239 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH24_Pos

#define PPI_CHENCLR_CH24_Pos   (24UL)

Position of CH24 field.

Definition at line 7238 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH25_Clear

#define PPI_CHENCLR_CH25_Clear   (1UL)

Write: disable channel

Definition at line 7235 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH25_Disabled

#define PPI_CHENCLR_CH25_Disabled   (0UL)

Read: channel disabled

Definition at line 7233 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH25_Enabled

#define PPI_CHENCLR_CH25_Enabled   (1UL)

Read: channel enabled

Definition at line 7234 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH25_Msk

#define PPI_CHENCLR_CH25_Msk   (0x1UL << PPI_CHENCLR_CH25_Pos)

Bit mask of CH25 field.

Definition at line 7232 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH25_Pos

#define PPI_CHENCLR_CH25_Pos   (25UL)

Position of CH25 field.

Definition at line 7231 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH26_Clear

#define PPI_CHENCLR_CH26_Clear   (1UL)

Write: disable channel

Definition at line 7228 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH26_Disabled

#define PPI_CHENCLR_CH26_Disabled   (0UL)

Read: channel disabled

Definition at line 7226 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH26_Enabled

#define PPI_CHENCLR_CH26_Enabled   (1UL)

Read: channel enabled

Definition at line 7227 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH26_Msk

#define PPI_CHENCLR_CH26_Msk   (0x1UL << PPI_CHENCLR_CH26_Pos)

Bit mask of CH26 field.

Definition at line 7225 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH26_Pos

#define PPI_CHENCLR_CH26_Pos   (26UL)

Position of CH26 field.

Definition at line 7224 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH27_Clear

#define PPI_CHENCLR_CH27_Clear   (1UL)

Write: disable channel

Definition at line 7221 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH27_Disabled

#define PPI_CHENCLR_CH27_Disabled   (0UL)

Read: channel disabled

Definition at line 7219 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH27_Enabled

#define PPI_CHENCLR_CH27_Enabled   (1UL)

Read: channel enabled

Definition at line 7220 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH27_Msk

#define PPI_CHENCLR_CH27_Msk   (0x1UL << PPI_CHENCLR_CH27_Pos)

Bit mask of CH27 field.

Definition at line 7218 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH27_Pos

#define PPI_CHENCLR_CH27_Pos   (27UL)

Position of CH27 field.

Definition at line 7217 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH28_Clear

#define PPI_CHENCLR_CH28_Clear   (1UL)

Write: disable channel

Definition at line 7214 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH28_Disabled

#define PPI_CHENCLR_CH28_Disabled   (0UL)

Read: channel disabled

Definition at line 7212 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH28_Enabled

#define PPI_CHENCLR_CH28_Enabled   (1UL)

Read: channel enabled

Definition at line 7213 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH28_Msk

#define PPI_CHENCLR_CH28_Msk   (0x1UL << PPI_CHENCLR_CH28_Pos)

Bit mask of CH28 field.

Definition at line 7211 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH28_Pos

#define PPI_CHENCLR_CH28_Pos   (28UL)

Position of CH28 field.

Definition at line 7210 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH29_Clear

#define PPI_CHENCLR_CH29_Clear   (1UL)

Write: disable channel

Definition at line 7207 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH29_Disabled

#define PPI_CHENCLR_CH29_Disabled   (0UL)

Read: channel disabled

Definition at line 7205 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH29_Enabled

#define PPI_CHENCLR_CH29_Enabled   (1UL)

Read: channel enabled

Definition at line 7206 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH29_Msk

#define PPI_CHENCLR_CH29_Msk   (0x1UL << PPI_CHENCLR_CH29_Pos)

Bit mask of CH29 field.

Definition at line 7204 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH29_Pos

#define PPI_CHENCLR_CH29_Pos   (29UL)

Position of CH29 field.

Definition at line 7203 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH2_Clear

#define PPI_CHENCLR_CH2_Clear   (1UL)

Write: disable channel

Definition at line 7396 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH2_Disabled

#define PPI_CHENCLR_CH2_Disabled   (0UL)

Read: channel disabled

Definition at line 7394 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH2_Enabled

#define PPI_CHENCLR_CH2_Enabled   (1UL)

Read: channel enabled

Definition at line 7395 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH2_Msk

#define PPI_CHENCLR_CH2_Msk   (0x1UL << PPI_CHENCLR_CH2_Pos)

Bit mask of CH2 field.

Definition at line 7393 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH2_Pos

#define PPI_CHENCLR_CH2_Pos   (2UL)

Position of CH2 field.

Definition at line 7392 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH30_Clear

#define PPI_CHENCLR_CH30_Clear   (1UL)

Write: disable channel

Definition at line 7200 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH30_Disabled

#define PPI_CHENCLR_CH30_Disabled   (0UL)

Read: channel disabled

Definition at line 7198 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH30_Enabled

#define PPI_CHENCLR_CH30_Enabled   (1UL)

Read: channel enabled

Definition at line 7199 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH30_Msk

#define PPI_CHENCLR_CH30_Msk   (0x1UL << PPI_CHENCLR_CH30_Pos)

Bit mask of CH30 field.

Definition at line 7197 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH30_Pos

#define PPI_CHENCLR_CH30_Pos   (30UL)

Position of CH30 field.

Definition at line 7196 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH31_Clear

#define PPI_CHENCLR_CH31_Clear   (1UL)

Write: disable channel

Definition at line 7193 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH31_Disabled

#define PPI_CHENCLR_CH31_Disabled   (0UL)

Read: channel disabled

Definition at line 7191 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH31_Enabled

#define PPI_CHENCLR_CH31_Enabled   (1UL)

Read: channel enabled

Definition at line 7192 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH31_Msk

#define PPI_CHENCLR_CH31_Msk   (0x1UL << PPI_CHENCLR_CH31_Pos)

Bit mask of CH31 field.

Definition at line 7190 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH31_Pos

#define PPI_CHENCLR_CH31_Pos   (31UL)

Position of CH31 field.

Definition at line 7189 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH3_Clear

#define PPI_CHENCLR_CH3_Clear   (1UL)

Write: disable channel

Definition at line 7389 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH3_Disabled

#define PPI_CHENCLR_CH3_Disabled   (0UL)

Read: channel disabled

Definition at line 7387 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH3_Enabled

#define PPI_CHENCLR_CH3_Enabled   (1UL)

Read: channel enabled

Definition at line 7388 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH3_Msk

#define PPI_CHENCLR_CH3_Msk   (0x1UL << PPI_CHENCLR_CH3_Pos)

Bit mask of CH3 field.

Definition at line 7386 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH3_Pos

#define PPI_CHENCLR_CH3_Pos   (3UL)

Position of CH3 field.

Definition at line 7385 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH4_Clear

#define PPI_CHENCLR_CH4_Clear   (1UL)

Write: disable channel

Definition at line 7382 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH4_Disabled

#define PPI_CHENCLR_CH4_Disabled   (0UL)

Read: channel disabled

Definition at line 7380 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH4_Enabled

#define PPI_CHENCLR_CH4_Enabled   (1UL)

Read: channel enabled

Definition at line 7381 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH4_Msk

#define PPI_CHENCLR_CH4_Msk   (0x1UL << PPI_CHENCLR_CH4_Pos)

Bit mask of CH4 field.

Definition at line 7379 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH4_Pos

#define PPI_CHENCLR_CH4_Pos   (4UL)

Position of CH4 field.

Definition at line 7378 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH5_Clear

#define PPI_CHENCLR_CH5_Clear   (1UL)

Write: disable channel

Definition at line 7375 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH5_Disabled

#define PPI_CHENCLR_CH5_Disabled   (0UL)

Read: channel disabled

Definition at line 7373 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH5_Enabled

#define PPI_CHENCLR_CH5_Enabled   (1UL)

Read: channel enabled

Definition at line 7374 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH5_Msk

#define PPI_CHENCLR_CH5_Msk   (0x1UL << PPI_CHENCLR_CH5_Pos)

Bit mask of CH5 field.

Definition at line 7372 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH5_Pos

#define PPI_CHENCLR_CH5_Pos   (5UL)

Position of CH5 field.

Definition at line 7371 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH6_Clear

#define PPI_CHENCLR_CH6_Clear   (1UL)

Write: disable channel

Definition at line 7368 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH6_Disabled

#define PPI_CHENCLR_CH6_Disabled   (0UL)

Read: channel disabled

Definition at line 7366 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH6_Enabled

#define PPI_CHENCLR_CH6_Enabled   (1UL)

Read: channel enabled

Definition at line 7367 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH6_Msk

#define PPI_CHENCLR_CH6_Msk   (0x1UL << PPI_CHENCLR_CH6_Pos)

Bit mask of CH6 field.

Definition at line 7365 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH6_Pos

#define PPI_CHENCLR_CH6_Pos   (6UL)

Position of CH6 field.

Definition at line 7364 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH7_Clear

#define PPI_CHENCLR_CH7_Clear   (1UL)

Write: disable channel

Definition at line 7361 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH7_Disabled

#define PPI_CHENCLR_CH7_Disabled   (0UL)

Read: channel disabled

Definition at line 7359 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH7_Enabled

#define PPI_CHENCLR_CH7_Enabled   (1UL)

Read: channel enabled

Definition at line 7360 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH7_Msk

#define PPI_CHENCLR_CH7_Msk   (0x1UL << PPI_CHENCLR_CH7_Pos)

Bit mask of CH7 field.

Definition at line 7358 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH7_Pos

#define PPI_CHENCLR_CH7_Pos   (7UL)

Position of CH7 field.

Definition at line 7357 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH8_Clear

#define PPI_CHENCLR_CH8_Clear   (1UL)

Write: disable channel

Definition at line 7354 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH8_Disabled

#define PPI_CHENCLR_CH8_Disabled   (0UL)

Read: channel disabled

Definition at line 7352 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH8_Enabled

#define PPI_CHENCLR_CH8_Enabled   (1UL)

Read: channel enabled

Definition at line 7353 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH8_Msk

#define PPI_CHENCLR_CH8_Msk   (0x1UL << PPI_CHENCLR_CH8_Pos)

Bit mask of CH8 field.

Definition at line 7351 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH8_Pos

#define PPI_CHENCLR_CH8_Pos   (8UL)

Position of CH8 field.

Definition at line 7350 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH9_Clear

#define PPI_CHENCLR_CH9_Clear   (1UL)

Write: disable channel

Definition at line 7347 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH9_Disabled

#define PPI_CHENCLR_CH9_Disabled   (0UL)

Read: channel disabled

Definition at line 7345 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH9_Enabled

#define PPI_CHENCLR_CH9_Enabled   (1UL)

Read: channel enabled

Definition at line 7346 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH9_Msk

#define PPI_CHENCLR_CH9_Msk   (0x1UL << PPI_CHENCLR_CH9_Pos)

Bit mask of CH9 field.

Definition at line 7344 of file nrf52_bitfields.h.

◆ PPI_CHENCLR_CH9_Pos

#define PPI_CHENCLR_CH9_Pos   (9UL)

Position of CH9 field.

Definition at line 7343 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH0_Disabled

#define PPI_CHENSET_CH0_Disabled   (0UL)

Read: channel disabled

Definition at line 7181 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH0_Enabled

#define PPI_CHENSET_CH0_Enabled   (1UL)

Read: channel enabled

Definition at line 7182 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH0_Msk

#define PPI_CHENSET_CH0_Msk   (0x1UL << PPI_CHENSET_CH0_Pos)

Bit mask of CH0 field.

Definition at line 7180 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH0_Pos

#define PPI_CHENSET_CH0_Pos   (0UL)

Position of CH0 field.

Definition at line 7179 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH0_Set

#define PPI_CHENSET_CH0_Set   (1UL)

Write: Enable channel

Definition at line 7183 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH10_Disabled

#define PPI_CHENSET_CH10_Disabled   (0UL)

Read: channel disabled

Definition at line 7111 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH10_Enabled

#define PPI_CHENSET_CH10_Enabled   (1UL)

Read: channel enabled

Definition at line 7112 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH10_Msk

#define PPI_CHENSET_CH10_Msk   (0x1UL << PPI_CHENSET_CH10_Pos)

Bit mask of CH10 field.

Definition at line 7110 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH10_Pos

#define PPI_CHENSET_CH10_Pos   (10UL)

Position of CH10 field.

Definition at line 7109 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH10_Set

#define PPI_CHENSET_CH10_Set   (1UL)

Write: Enable channel

Definition at line 7113 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH11_Disabled

#define PPI_CHENSET_CH11_Disabled   (0UL)

Read: channel disabled

Definition at line 7104 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH11_Enabled

#define PPI_CHENSET_CH11_Enabled   (1UL)

Read: channel enabled

Definition at line 7105 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH11_Msk

#define PPI_CHENSET_CH11_Msk   (0x1UL << PPI_CHENSET_CH11_Pos)

Bit mask of CH11 field.

Definition at line 7103 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH11_Pos

#define PPI_CHENSET_CH11_Pos   (11UL)

Position of CH11 field.

Definition at line 7102 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH11_Set

#define PPI_CHENSET_CH11_Set   (1UL)

Write: Enable channel

Definition at line 7106 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH12_Disabled

#define PPI_CHENSET_CH12_Disabled   (0UL)

Read: channel disabled

Definition at line 7097 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH12_Enabled

#define PPI_CHENSET_CH12_Enabled   (1UL)

Read: channel enabled

Definition at line 7098 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH12_Msk

#define PPI_CHENSET_CH12_Msk   (0x1UL << PPI_CHENSET_CH12_Pos)

Bit mask of CH12 field.

Definition at line 7096 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH12_Pos

#define PPI_CHENSET_CH12_Pos   (12UL)

Position of CH12 field.

Definition at line 7095 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH12_Set

#define PPI_CHENSET_CH12_Set   (1UL)

Write: Enable channel

Definition at line 7099 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH13_Disabled

#define PPI_CHENSET_CH13_Disabled   (0UL)

Read: channel disabled

Definition at line 7090 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH13_Enabled

#define PPI_CHENSET_CH13_Enabled   (1UL)

Read: channel enabled

Definition at line 7091 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH13_Msk

#define PPI_CHENSET_CH13_Msk   (0x1UL << PPI_CHENSET_CH13_Pos)

Bit mask of CH13 field.

Definition at line 7089 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH13_Pos

#define PPI_CHENSET_CH13_Pos   (13UL)

Position of CH13 field.

Definition at line 7088 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH13_Set

#define PPI_CHENSET_CH13_Set   (1UL)

Write: Enable channel

Definition at line 7092 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH14_Disabled

#define PPI_CHENSET_CH14_Disabled   (0UL)

Read: channel disabled

Definition at line 7083 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH14_Enabled

#define PPI_CHENSET_CH14_Enabled   (1UL)

Read: channel enabled

Definition at line 7084 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH14_Msk

#define PPI_CHENSET_CH14_Msk   (0x1UL << PPI_CHENSET_CH14_Pos)

Bit mask of CH14 field.

Definition at line 7082 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH14_Pos

#define PPI_CHENSET_CH14_Pos   (14UL)

Position of CH14 field.

Definition at line 7081 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH14_Set

#define PPI_CHENSET_CH14_Set   (1UL)

Write: Enable channel

Definition at line 7085 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH15_Disabled

#define PPI_CHENSET_CH15_Disabled   (0UL)

Read: channel disabled

Definition at line 7076 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH15_Enabled

#define PPI_CHENSET_CH15_Enabled   (1UL)

Read: channel enabled

Definition at line 7077 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH15_Msk

#define PPI_CHENSET_CH15_Msk   (0x1UL << PPI_CHENSET_CH15_Pos)

Bit mask of CH15 field.

Definition at line 7075 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH15_Pos

#define PPI_CHENSET_CH15_Pos   (15UL)

Position of CH15 field.

Definition at line 7074 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH15_Set

#define PPI_CHENSET_CH15_Set   (1UL)

Write: Enable channel

Definition at line 7078 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH16_Disabled

#define PPI_CHENSET_CH16_Disabled   (0UL)

Read: channel disabled

Definition at line 7069 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH16_Enabled

#define PPI_CHENSET_CH16_Enabled   (1UL)

Read: channel enabled

Definition at line 7070 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH16_Msk

#define PPI_CHENSET_CH16_Msk   (0x1UL << PPI_CHENSET_CH16_Pos)

Bit mask of CH16 field.

Definition at line 7068 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH16_Pos

#define PPI_CHENSET_CH16_Pos   (16UL)

Position of CH16 field.

Definition at line 7067 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH16_Set

#define PPI_CHENSET_CH16_Set   (1UL)

Write: Enable channel

Definition at line 7071 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH17_Disabled

#define PPI_CHENSET_CH17_Disabled   (0UL)

Read: channel disabled

Definition at line 7062 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH17_Enabled

#define PPI_CHENSET_CH17_Enabled   (1UL)

Read: channel enabled

Definition at line 7063 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH17_Msk

#define PPI_CHENSET_CH17_Msk   (0x1UL << PPI_CHENSET_CH17_Pos)

Bit mask of CH17 field.

Definition at line 7061 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH17_Pos

#define PPI_CHENSET_CH17_Pos   (17UL)

Position of CH17 field.

Definition at line 7060 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH17_Set

#define PPI_CHENSET_CH17_Set   (1UL)

Write: Enable channel

Definition at line 7064 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH18_Disabled

#define PPI_CHENSET_CH18_Disabled   (0UL)

Read: channel disabled

Definition at line 7055 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH18_Enabled

#define PPI_CHENSET_CH18_Enabled   (1UL)

Read: channel enabled

Definition at line 7056 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH18_Msk

#define PPI_CHENSET_CH18_Msk   (0x1UL << PPI_CHENSET_CH18_Pos)

Bit mask of CH18 field.

Definition at line 7054 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH18_Pos

#define PPI_CHENSET_CH18_Pos   (18UL)

Position of CH18 field.

Definition at line 7053 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH18_Set

#define PPI_CHENSET_CH18_Set   (1UL)

Write: Enable channel

Definition at line 7057 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH19_Disabled

#define PPI_CHENSET_CH19_Disabled   (0UL)

Read: channel disabled

Definition at line 7048 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH19_Enabled

#define PPI_CHENSET_CH19_Enabled   (1UL)

Read: channel enabled

Definition at line 7049 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH19_Msk

#define PPI_CHENSET_CH19_Msk   (0x1UL << PPI_CHENSET_CH19_Pos)

Bit mask of CH19 field.

Definition at line 7047 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH19_Pos

#define PPI_CHENSET_CH19_Pos   (19UL)

Position of CH19 field.

Definition at line 7046 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH19_Set

#define PPI_CHENSET_CH19_Set   (1UL)

Write: Enable channel

Definition at line 7050 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH1_Disabled

#define PPI_CHENSET_CH1_Disabled   (0UL)

Read: channel disabled

Definition at line 7174 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH1_Enabled

#define PPI_CHENSET_CH1_Enabled   (1UL)

Read: channel enabled

Definition at line 7175 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH1_Msk

#define PPI_CHENSET_CH1_Msk   (0x1UL << PPI_CHENSET_CH1_Pos)

Bit mask of CH1 field.

Definition at line 7173 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH1_Pos

#define PPI_CHENSET_CH1_Pos   (1UL)

Position of CH1 field.

Definition at line 7172 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH1_Set

#define PPI_CHENSET_CH1_Set   (1UL)

Write: Enable channel

Definition at line 7176 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH20_Disabled

#define PPI_CHENSET_CH20_Disabled   (0UL)

Read: channel disabled

Definition at line 7041 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH20_Enabled

#define PPI_CHENSET_CH20_Enabled   (1UL)

Read: channel enabled

Definition at line 7042 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH20_Msk

#define PPI_CHENSET_CH20_Msk   (0x1UL << PPI_CHENSET_CH20_Pos)

Bit mask of CH20 field.

Definition at line 7040 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH20_Pos

#define PPI_CHENSET_CH20_Pos   (20UL)

Position of CH20 field.

Definition at line 7039 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH20_Set

#define PPI_CHENSET_CH20_Set   (1UL)

Write: Enable channel

Definition at line 7043 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH21_Disabled

#define PPI_CHENSET_CH21_Disabled   (0UL)

Read: channel disabled

Definition at line 7034 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH21_Enabled

#define PPI_CHENSET_CH21_Enabled   (1UL)

Read: channel enabled

Definition at line 7035 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH21_Msk

#define PPI_CHENSET_CH21_Msk   (0x1UL << PPI_CHENSET_CH21_Pos)

Bit mask of CH21 field.

Definition at line 7033 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH21_Pos

#define PPI_CHENSET_CH21_Pos   (21UL)

Position of CH21 field.

Definition at line 7032 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH21_Set

#define PPI_CHENSET_CH21_Set   (1UL)

Write: Enable channel

Definition at line 7036 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH22_Disabled

#define PPI_CHENSET_CH22_Disabled   (0UL)

Read: channel disabled

Definition at line 7027 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH22_Enabled

#define PPI_CHENSET_CH22_Enabled   (1UL)

Read: channel enabled

Definition at line 7028 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH22_Msk

#define PPI_CHENSET_CH22_Msk   (0x1UL << PPI_CHENSET_CH22_Pos)

Bit mask of CH22 field.

Definition at line 7026 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH22_Pos

#define PPI_CHENSET_CH22_Pos   (22UL)

Position of CH22 field.

Definition at line 7025 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH22_Set

#define PPI_CHENSET_CH22_Set   (1UL)

Write: Enable channel

Definition at line 7029 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH23_Disabled

#define PPI_CHENSET_CH23_Disabled   (0UL)

Read: channel disabled

Definition at line 7020 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH23_Enabled

#define PPI_CHENSET_CH23_Enabled   (1UL)

Read: channel enabled

Definition at line 7021 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH23_Msk

#define PPI_CHENSET_CH23_Msk   (0x1UL << PPI_CHENSET_CH23_Pos)

Bit mask of CH23 field.

Definition at line 7019 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH23_Pos

#define PPI_CHENSET_CH23_Pos   (23UL)

Position of CH23 field.

Definition at line 7018 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH23_Set

#define PPI_CHENSET_CH23_Set   (1UL)

Write: Enable channel

Definition at line 7022 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH24_Disabled

#define PPI_CHENSET_CH24_Disabled   (0UL)

Read: channel disabled

Definition at line 7013 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH24_Enabled

#define PPI_CHENSET_CH24_Enabled   (1UL)

Read: channel enabled

Definition at line 7014 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH24_Msk

#define PPI_CHENSET_CH24_Msk   (0x1UL << PPI_CHENSET_CH24_Pos)

Bit mask of CH24 field.

Definition at line 7012 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH24_Pos

#define PPI_CHENSET_CH24_Pos   (24UL)

Position of CH24 field.

Definition at line 7011 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH24_Set

#define PPI_CHENSET_CH24_Set   (1UL)

Write: Enable channel

Definition at line 7015 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH25_Disabled

#define PPI_CHENSET_CH25_Disabled   (0UL)

Read: channel disabled

Definition at line 7006 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH25_Enabled

#define PPI_CHENSET_CH25_Enabled   (1UL)

Read: channel enabled

Definition at line 7007 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH25_Msk

#define PPI_CHENSET_CH25_Msk   (0x1UL << PPI_CHENSET_CH25_Pos)

Bit mask of CH25 field.

Definition at line 7005 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH25_Pos

#define PPI_CHENSET_CH25_Pos   (25UL)

Position of CH25 field.

Definition at line 7004 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH25_Set

#define PPI_CHENSET_CH25_Set   (1UL)

Write: Enable channel

Definition at line 7008 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH26_Disabled

#define PPI_CHENSET_CH26_Disabled   (0UL)

Read: channel disabled

Definition at line 6999 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH26_Enabled

#define PPI_CHENSET_CH26_Enabled   (1UL)

Read: channel enabled

Definition at line 7000 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH26_Msk

#define PPI_CHENSET_CH26_Msk   (0x1UL << PPI_CHENSET_CH26_Pos)

Bit mask of CH26 field.

Definition at line 6998 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH26_Pos

#define PPI_CHENSET_CH26_Pos   (26UL)

Position of CH26 field.

Definition at line 6997 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH26_Set

#define PPI_CHENSET_CH26_Set   (1UL)

Write: Enable channel

Definition at line 7001 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH27_Disabled

#define PPI_CHENSET_CH27_Disabled   (0UL)

Read: channel disabled

Definition at line 6992 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH27_Enabled

#define PPI_CHENSET_CH27_Enabled   (1UL)

Read: channel enabled

Definition at line 6993 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH27_Msk

#define PPI_CHENSET_CH27_Msk   (0x1UL << PPI_CHENSET_CH27_Pos)

Bit mask of CH27 field.

Definition at line 6991 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH27_Pos

#define PPI_CHENSET_CH27_Pos   (27UL)

Position of CH27 field.

Definition at line 6990 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH27_Set

#define PPI_CHENSET_CH27_Set   (1UL)

Write: Enable channel

Definition at line 6994 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH28_Disabled

#define PPI_CHENSET_CH28_Disabled   (0UL)

Read: channel disabled

Definition at line 6985 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH28_Enabled

#define PPI_CHENSET_CH28_Enabled   (1UL)

Read: channel enabled

Definition at line 6986 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH28_Msk

#define PPI_CHENSET_CH28_Msk   (0x1UL << PPI_CHENSET_CH28_Pos)

Bit mask of CH28 field.

Definition at line 6984 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH28_Pos

#define PPI_CHENSET_CH28_Pos   (28UL)

Position of CH28 field.

Definition at line 6983 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH28_Set

#define PPI_CHENSET_CH28_Set   (1UL)

Write: Enable channel

Definition at line 6987 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH29_Disabled

#define PPI_CHENSET_CH29_Disabled   (0UL)

Read: channel disabled

Definition at line 6978 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH29_Enabled

#define PPI_CHENSET_CH29_Enabled   (1UL)

Read: channel enabled

Definition at line 6979 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH29_Msk

#define PPI_CHENSET_CH29_Msk   (0x1UL << PPI_CHENSET_CH29_Pos)

Bit mask of CH29 field.

Definition at line 6977 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH29_Pos

#define PPI_CHENSET_CH29_Pos   (29UL)

Position of CH29 field.

Definition at line 6976 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH29_Set

#define PPI_CHENSET_CH29_Set   (1UL)

Write: Enable channel

Definition at line 6980 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH2_Disabled

#define PPI_CHENSET_CH2_Disabled   (0UL)

Read: channel disabled

Definition at line 7167 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH2_Enabled

#define PPI_CHENSET_CH2_Enabled   (1UL)

Read: channel enabled

Definition at line 7168 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH2_Msk

#define PPI_CHENSET_CH2_Msk   (0x1UL << PPI_CHENSET_CH2_Pos)

Bit mask of CH2 field.

Definition at line 7166 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH2_Pos

#define PPI_CHENSET_CH2_Pos   (2UL)

Position of CH2 field.

Definition at line 7165 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH2_Set

#define PPI_CHENSET_CH2_Set   (1UL)

Write: Enable channel

Definition at line 7169 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH30_Disabled

#define PPI_CHENSET_CH30_Disabled   (0UL)

Read: channel disabled

Definition at line 6971 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH30_Enabled

#define PPI_CHENSET_CH30_Enabled   (1UL)

Read: channel enabled

Definition at line 6972 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH30_Msk

#define PPI_CHENSET_CH30_Msk   (0x1UL << PPI_CHENSET_CH30_Pos)

Bit mask of CH30 field.

Definition at line 6970 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH30_Pos

#define PPI_CHENSET_CH30_Pos   (30UL)

Position of CH30 field.

Definition at line 6969 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH30_Set

#define PPI_CHENSET_CH30_Set   (1UL)

Write: Enable channel

Definition at line 6973 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH31_Disabled

#define PPI_CHENSET_CH31_Disabled   (0UL)

Read: channel disabled

Definition at line 6964 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH31_Enabled

#define PPI_CHENSET_CH31_Enabled   (1UL)

Read: channel enabled

Definition at line 6965 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH31_Msk

#define PPI_CHENSET_CH31_Msk   (0x1UL << PPI_CHENSET_CH31_Pos)

Bit mask of CH31 field.

Definition at line 6963 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH31_Pos

#define PPI_CHENSET_CH31_Pos   (31UL)

Position of CH31 field.

Definition at line 6962 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH31_Set

#define PPI_CHENSET_CH31_Set   (1UL)

Write: Enable channel

Definition at line 6966 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH3_Disabled

#define PPI_CHENSET_CH3_Disabled   (0UL)

Read: channel disabled

Definition at line 7160 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH3_Enabled

#define PPI_CHENSET_CH3_Enabled   (1UL)

Read: channel enabled

Definition at line 7161 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH3_Msk

#define PPI_CHENSET_CH3_Msk   (0x1UL << PPI_CHENSET_CH3_Pos)

Bit mask of CH3 field.

Definition at line 7159 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH3_Pos

#define PPI_CHENSET_CH3_Pos   (3UL)

Position of CH3 field.

Definition at line 7158 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH3_Set

#define PPI_CHENSET_CH3_Set   (1UL)

Write: Enable channel

Definition at line 7162 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH4_Disabled

#define PPI_CHENSET_CH4_Disabled   (0UL)

Read: channel disabled

Definition at line 7153 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH4_Enabled

#define PPI_CHENSET_CH4_Enabled   (1UL)

Read: channel enabled

Definition at line 7154 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH4_Msk

#define PPI_CHENSET_CH4_Msk   (0x1UL << PPI_CHENSET_CH4_Pos)

Bit mask of CH4 field.

Definition at line 7152 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH4_Pos

#define PPI_CHENSET_CH4_Pos   (4UL)

Position of CH4 field.

Definition at line 7151 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH4_Set

#define PPI_CHENSET_CH4_Set   (1UL)

Write: Enable channel

Definition at line 7155 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH5_Disabled

#define PPI_CHENSET_CH5_Disabled   (0UL)

Read: channel disabled

Definition at line 7146 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH5_Enabled

#define PPI_CHENSET_CH5_Enabled   (1UL)

Read: channel enabled

Definition at line 7147 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH5_Msk

#define PPI_CHENSET_CH5_Msk   (0x1UL << PPI_CHENSET_CH5_Pos)

Bit mask of CH5 field.

Definition at line 7145 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH5_Pos

#define PPI_CHENSET_CH5_Pos   (5UL)

Position of CH5 field.

Definition at line 7144 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH5_Set

#define PPI_CHENSET_CH5_Set   (1UL)

Write: Enable channel

Definition at line 7148 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH6_Disabled

#define PPI_CHENSET_CH6_Disabled   (0UL)

Read: channel disabled

Definition at line 7139 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH6_Enabled

#define PPI_CHENSET_CH6_Enabled   (1UL)

Read: channel enabled

Definition at line 7140 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH6_Msk

#define PPI_CHENSET_CH6_Msk   (0x1UL << PPI_CHENSET_CH6_Pos)

Bit mask of CH6 field.

Definition at line 7138 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH6_Pos

#define PPI_CHENSET_CH6_Pos   (6UL)

Position of CH6 field.

Definition at line 7137 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH6_Set

#define PPI_CHENSET_CH6_Set   (1UL)

Write: Enable channel

Definition at line 7141 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH7_Disabled

#define PPI_CHENSET_CH7_Disabled   (0UL)

Read: channel disabled

Definition at line 7132 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH7_Enabled

#define PPI_CHENSET_CH7_Enabled   (1UL)

Read: channel enabled

Definition at line 7133 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH7_Msk

#define PPI_CHENSET_CH7_Msk   (0x1UL << PPI_CHENSET_CH7_Pos)

Bit mask of CH7 field.

Definition at line 7131 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH7_Pos

#define PPI_CHENSET_CH7_Pos   (7UL)

Position of CH7 field.

Definition at line 7130 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH7_Set

#define PPI_CHENSET_CH7_Set   (1UL)

Write: Enable channel

Definition at line 7134 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH8_Disabled

#define PPI_CHENSET_CH8_Disabled   (0UL)

Read: channel disabled

Definition at line 7125 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH8_Enabled

#define PPI_CHENSET_CH8_Enabled   (1UL)

Read: channel enabled

Definition at line 7126 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH8_Msk

#define PPI_CHENSET_CH8_Msk   (0x1UL << PPI_CHENSET_CH8_Pos)

Bit mask of CH8 field.

Definition at line 7124 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH8_Pos

#define PPI_CHENSET_CH8_Pos   (8UL)

Position of CH8 field.

Definition at line 7123 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH8_Set

#define PPI_CHENSET_CH8_Set   (1UL)

Write: Enable channel

Definition at line 7127 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH9_Disabled

#define PPI_CHENSET_CH9_Disabled   (0UL)

Read: channel disabled

Definition at line 7118 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH9_Enabled

#define PPI_CHENSET_CH9_Enabled   (1UL)

Read: channel enabled

Definition at line 7119 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH9_Msk

#define PPI_CHENSET_CH9_Msk   (0x1UL << PPI_CHENSET_CH9_Pos)

Bit mask of CH9 field.

Definition at line 7117 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH9_Pos

#define PPI_CHENSET_CH9_Pos   (9UL)

Position of CH9 field.

Definition at line 7116 of file nrf52_bitfields.h.

◆ PPI_CHENSET_CH9_Set

#define PPI_CHENSET_CH9_Set   (1UL)

Write: Enable channel

Definition at line 7120 of file nrf52_bitfields.h.

◆ PPI_CHG_CH0_Excluded

#define PPI_CHG_CH0_Excluded   (0UL)

Exclude

Definition at line 7618 of file nrf52_bitfields.h.

◆ PPI_CHG_CH0_Included

#define PPI_CHG_CH0_Included   (1UL)

Include

Definition at line 7619 of file nrf52_bitfields.h.

◆ PPI_CHG_CH0_Msk

#define PPI_CHG_CH0_Msk   (0x1UL << PPI_CHG_CH0_Pos)

Bit mask of CH0 field.

Definition at line 7617 of file nrf52_bitfields.h.

◆ PPI_CHG_CH0_Pos

#define PPI_CHG_CH0_Pos   (0UL)

Position of CH0 field.

Definition at line 7616 of file nrf52_bitfields.h.

◆ PPI_CHG_CH10_Excluded

#define PPI_CHG_CH10_Excluded   (0UL)

Exclude

Definition at line 7558 of file nrf52_bitfields.h.

◆ PPI_CHG_CH10_Included

#define PPI_CHG_CH10_Included   (1UL)

Include

Definition at line 7559 of file nrf52_bitfields.h.

◆ PPI_CHG_CH10_Msk

#define PPI_CHG_CH10_Msk   (0x1UL << PPI_CHG_CH10_Pos)

Bit mask of CH10 field.

Definition at line 7557 of file nrf52_bitfields.h.

◆ PPI_CHG_CH10_Pos

#define PPI_CHG_CH10_Pos   (10UL)

Position of CH10 field.

Definition at line 7556 of file nrf52_bitfields.h.

◆ PPI_CHG_CH11_Excluded

#define PPI_CHG_CH11_Excluded   (0UL)

Exclude

Definition at line 7552 of file nrf52_bitfields.h.

◆ PPI_CHG_CH11_Included

#define PPI_CHG_CH11_Included   (1UL)

Include

Definition at line 7553 of file nrf52_bitfields.h.

◆ PPI_CHG_CH11_Msk

#define PPI_CHG_CH11_Msk   (0x1UL << PPI_CHG_CH11_Pos)

Bit mask of CH11 field.

Definition at line 7551 of file nrf52_bitfields.h.

◆ PPI_CHG_CH11_Pos

#define PPI_CHG_CH11_Pos   (11UL)

Position of CH11 field.

Definition at line 7550 of file nrf52_bitfields.h.

◆ PPI_CHG_CH12_Excluded

#define PPI_CHG_CH12_Excluded   (0UL)

Exclude

Definition at line 7546 of file nrf52_bitfields.h.

◆ PPI_CHG_CH12_Included

#define PPI_CHG_CH12_Included   (1UL)

Include

Definition at line 7547 of file nrf52_bitfields.h.

◆ PPI_CHG_CH12_Msk

#define PPI_CHG_CH12_Msk   (0x1UL << PPI_CHG_CH12_Pos)

Bit mask of CH12 field.

Definition at line 7545 of file nrf52_bitfields.h.

◆ PPI_CHG_CH12_Pos

#define PPI_CHG_CH12_Pos   (12UL)

Position of CH12 field.

Definition at line 7544 of file nrf52_bitfields.h.

◆ PPI_CHG_CH13_Excluded

#define PPI_CHG_CH13_Excluded   (0UL)

Exclude

Definition at line 7540 of file nrf52_bitfields.h.

◆ PPI_CHG_CH13_Included

#define PPI_CHG_CH13_Included   (1UL)

Include

Definition at line 7541 of file nrf52_bitfields.h.

◆ PPI_CHG_CH13_Msk

#define PPI_CHG_CH13_Msk   (0x1UL << PPI_CHG_CH13_Pos)

Bit mask of CH13 field.

Definition at line 7539 of file nrf52_bitfields.h.

◆ PPI_CHG_CH13_Pos

#define PPI_CHG_CH13_Pos   (13UL)

Position of CH13 field.

Definition at line 7538 of file nrf52_bitfields.h.

◆ PPI_CHG_CH14_Excluded

#define PPI_CHG_CH14_Excluded   (0UL)

Exclude

Definition at line 7534 of file nrf52_bitfields.h.

◆ PPI_CHG_CH14_Included

#define PPI_CHG_CH14_Included   (1UL)

Include

Definition at line 7535 of file nrf52_bitfields.h.

◆ PPI_CHG_CH14_Msk

#define PPI_CHG_CH14_Msk   (0x1UL << PPI_CHG_CH14_Pos)

Bit mask of CH14 field.

Definition at line 7533 of file nrf52_bitfields.h.

◆ PPI_CHG_CH14_Pos

#define PPI_CHG_CH14_Pos   (14UL)

Position of CH14 field.

Definition at line 7532 of file nrf52_bitfields.h.

◆ PPI_CHG_CH15_Excluded

#define PPI_CHG_CH15_Excluded   (0UL)

Exclude

Definition at line 7528 of file nrf52_bitfields.h.

◆ PPI_CHG_CH15_Included

#define PPI_CHG_CH15_Included   (1UL)

Include

Definition at line 7529 of file nrf52_bitfields.h.

◆ PPI_CHG_CH15_Msk

#define PPI_CHG_CH15_Msk   (0x1UL << PPI_CHG_CH15_Pos)

Bit mask of CH15 field.

Definition at line 7527 of file nrf52_bitfields.h.

◆ PPI_CHG_CH15_Pos

#define PPI_CHG_CH15_Pos   (15UL)

Position of CH15 field.

Definition at line 7526 of file nrf52_bitfields.h.

◆ PPI_CHG_CH16_Excluded

#define PPI_CHG_CH16_Excluded   (0UL)

Exclude

Definition at line 7522 of file nrf52_bitfields.h.

◆ PPI_CHG_CH16_Included

#define PPI_CHG_CH16_Included   (1UL)

Include

Definition at line 7523 of file nrf52_bitfields.h.

◆ PPI_CHG_CH16_Msk

#define PPI_CHG_CH16_Msk   (0x1UL << PPI_CHG_CH16_Pos)

Bit mask of CH16 field.

Definition at line 7521 of file nrf52_bitfields.h.

◆ PPI_CHG_CH16_Pos

#define PPI_CHG_CH16_Pos   (16UL)

Position of CH16 field.

Definition at line 7520 of file nrf52_bitfields.h.

◆ PPI_CHG_CH17_Excluded

#define PPI_CHG_CH17_Excluded   (0UL)

Exclude

Definition at line 7516 of file nrf52_bitfields.h.

◆ PPI_CHG_CH17_Included

#define PPI_CHG_CH17_Included   (1UL)

Include

Definition at line 7517 of file nrf52_bitfields.h.

◆ PPI_CHG_CH17_Msk

#define PPI_CHG_CH17_Msk   (0x1UL << PPI_CHG_CH17_Pos)

Bit mask of CH17 field.

Definition at line 7515 of file nrf52_bitfields.h.

◆ PPI_CHG_CH17_Pos

#define PPI_CHG_CH17_Pos   (17UL)

Position of CH17 field.

Definition at line 7514 of file nrf52_bitfields.h.

◆ PPI_CHG_CH18_Excluded

#define PPI_CHG_CH18_Excluded   (0UL)

Exclude

Definition at line 7510 of file nrf52_bitfields.h.

◆ PPI_CHG_CH18_Included

#define PPI_CHG_CH18_Included   (1UL)

Include

Definition at line 7511 of file nrf52_bitfields.h.

◆ PPI_CHG_CH18_Msk

#define PPI_CHG_CH18_Msk   (0x1UL << PPI_CHG_CH18_Pos)

Bit mask of CH18 field.

Definition at line 7509 of file nrf52_bitfields.h.

◆ PPI_CHG_CH18_Pos

#define PPI_CHG_CH18_Pos   (18UL)

Position of CH18 field.

Definition at line 7508 of file nrf52_bitfields.h.

◆ PPI_CHG_CH19_Excluded

#define PPI_CHG_CH19_Excluded   (0UL)

Exclude

Definition at line 7504 of file nrf52_bitfields.h.

◆ PPI_CHG_CH19_Included

#define PPI_CHG_CH19_Included   (1UL)

Include

Definition at line 7505 of file nrf52_bitfields.h.

◆ PPI_CHG_CH19_Msk

#define PPI_CHG_CH19_Msk   (0x1UL << PPI_CHG_CH19_Pos)

Bit mask of CH19 field.

Definition at line 7503 of file nrf52_bitfields.h.

◆ PPI_CHG_CH19_Pos

#define PPI_CHG_CH19_Pos   (19UL)

Position of CH19 field.

Definition at line 7502 of file nrf52_bitfields.h.

◆ PPI_CHG_CH1_Excluded

#define PPI_CHG_CH1_Excluded   (0UL)

Exclude

Definition at line 7612 of file nrf52_bitfields.h.

◆ PPI_CHG_CH1_Included

#define PPI_CHG_CH1_Included   (1UL)

Include

Definition at line 7613 of file nrf52_bitfields.h.

◆ PPI_CHG_CH1_Msk

#define PPI_CHG_CH1_Msk   (0x1UL << PPI_CHG_CH1_Pos)

Bit mask of CH1 field.

Definition at line 7611 of file nrf52_bitfields.h.

◆ PPI_CHG_CH1_Pos

#define PPI_CHG_CH1_Pos   (1UL)

Position of CH1 field.

Definition at line 7610 of file nrf52_bitfields.h.

◆ PPI_CHG_CH20_Excluded

#define PPI_CHG_CH20_Excluded   (0UL)

Exclude

Definition at line 7498 of file nrf52_bitfields.h.

◆ PPI_CHG_CH20_Included

#define PPI_CHG_CH20_Included   (1UL)

Include

Definition at line 7499 of file nrf52_bitfields.h.

◆ PPI_CHG_CH20_Msk

#define PPI_CHG_CH20_Msk   (0x1UL << PPI_CHG_CH20_Pos)

Bit mask of CH20 field.

Definition at line 7497 of file nrf52_bitfields.h.

◆ PPI_CHG_CH20_Pos

#define PPI_CHG_CH20_Pos   (20UL)

Position of CH20 field.

Definition at line 7496 of file nrf52_bitfields.h.

◆ PPI_CHG_CH21_Excluded

#define PPI_CHG_CH21_Excluded   (0UL)

Exclude

Definition at line 7492 of file nrf52_bitfields.h.

◆ PPI_CHG_CH21_Included

#define PPI_CHG_CH21_Included   (1UL)

Include

Definition at line 7493 of file nrf52_bitfields.h.

◆ PPI_CHG_CH21_Msk

#define PPI_CHG_CH21_Msk   (0x1UL << PPI_CHG_CH21_Pos)

Bit mask of CH21 field.

Definition at line 7491 of file nrf52_bitfields.h.

◆ PPI_CHG_CH21_Pos

#define PPI_CHG_CH21_Pos   (21UL)

Position of CH21 field.

Definition at line 7490 of file nrf52_bitfields.h.

◆ PPI_CHG_CH22_Excluded

#define PPI_CHG_CH22_Excluded   (0UL)

Exclude

Definition at line 7486 of file nrf52_bitfields.h.

◆ PPI_CHG_CH22_Included

#define PPI_CHG_CH22_Included   (1UL)

Include

Definition at line 7487 of file nrf52_bitfields.h.

◆ PPI_CHG_CH22_Msk

#define PPI_CHG_CH22_Msk   (0x1UL << PPI_CHG_CH22_Pos)

Bit mask of CH22 field.

Definition at line 7485 of file nrf52_bitfields.h.

◆ PPI_CHG_CH22_Pos

#define PPI_CHG_CH22_Pos   (22UL)

Position of CH22 field.

Definition at line 7484 of file nrf52_bitfields.h.

◆ PPI_CHG_CH23_Excluded

#define PPI_CHG_CH23_Excluded   (0UL)

Exclude

Definition at line 7480 of file nrf52_bitfields.h.

◆ PPI_CHG_CH23_Included

#define PPI_CHG_CH23_Included   (1UL)

Include

Definition at line 7481 of file nrf52_bitfields.h.

◆ PPI_CHG_CH23_Msk

#define PPI_CHG_CH23_Msk   (0x1UL << PPI_CHG_CH23_Pos)

Bit mask of CH23 field.

Definition at line 7479 of file nrf52_bitfields.h.

◆ PPI_CHG_CH23_Pos

#define PPI_CHG_CH23_Pos   (23UL)

Position of CH23 field.

Definition at line 7478 of file nrf52_bitfields.h.

◆ PPI_CHG_CH24_Excluded

#define PPI_CHG_CH24_Excluded   (0UL)

Exclude

Definition at line 7474 of file nrf52_bitfields.h.

◆ PPI_CHG_CH24_Included

#define PPI_CHG_CH24_Included   (1UL)

Include

Definition at line 7475 of file nrf52_bitfields.h.

◆ PPI_CHG_CH24_Msk

#define PPI_CHG_CH24_Msk   (0x1UL << PPI_CHG_CH24_Pos)

Bit mask of CH24 field.

Definition at line 7473 of file nrf52_bitfields.h.

◆ PPI_CHG_CH24_Pos

#define PPI_CHG_CH24_Pos   (24UL)

Position of CH24 field.

Definition at line 7472 of file nrf52_bitfields.h.

◆ PPI_CHG_CH25_Excluded

#define PPI_CHG_CH25_Excluded   (0UL)

Exclude

Definition at line 7468 of file nrf52_bitfields.h.

◆ PPI_CHG_CH25_Included

#define PPI_CHG_CH25_Included   (1UL)

Include

Definition at line 7469 of file nrf52_bitfields.h.

◆ PPI_CHG_CH25_Msk

#define PPI_CHG_CH25_Msk   (0x1UL << PPI_CHG_CH25_Pos)

Bit mask of CH25 field.

Definition at line 7467 of file nrf52_bitfields.h.

◆ PPI_CHG_CH25_Pos

#define PPI_CHG_CH25_Pos   (25UL)

Position of CH25 field.

Definition at line 7466 of file nrf52_bitfields.h.

◆ PPI_CHG_CH26_Excluded

#define PPI_CHG_CH26_Excluded   (0UL)

Exclude

Definition at line 7462 of file nrf52_bitfields.h.

◆ PPI_CHG_CH26_Included

#define PPI_CHG_CH26_Included   (1UL)

Include

Definition at line 7463 of file nrf52_bitfields.h.

◆ PPI_CHG_CH26_Msk

#define PPI_CHG_CH26_Msk   (0x1UL << PPI_CHG_CH26_Pos)

Bit mask of CH26 field.

Definition at line 7461 of file nrf52_bitfields.h.

◆ PPI_CHG_CH26_Pos

#define PPI_CHG_CH26_Pos   (26UL)

Position of CH26 field.

Definition at line 7460 of file nrf52_bitfields.h.

◆ PPI_CHG_CH27_Excluded

#define PPI_CHG_CH27_Excluded   (0UL)

Exclude

Definition at line 7456 of file nrf52_bitfields.h.

◆ PPI_CHG_CH27_Included

#define PPI_CHG_CH27_Included   (1UL)

Include

Definition at line 7457 of file nrf52_bitfields.h.

◆ PPI_CHG_CH27_Msk

#define PPI_CHG_CH27_Msk   (0x1UL << PPI_CHG_CH27_Pos)

Bit mask of CH27 field.

Definition at line 7455 of file nrf52_bitfields.h.

◆ PPI_CHG_CH27_Pos

#define PPI_CHG_CH27_Pos   (27UL)

Position of CH27 field.

Definition at line 7454 of file nrf52_bitfields.h.

◆ PPI_CHG_CH28_Excluded

#define PPI_CHG_CH28_Excluded   (0UL)

Exclude

Definition at line 7450 of file nrf52_bitfields.h.

◆ PPI_CHG_CH28_Included

#define PPI_CHG_CH28_Included   (1UL)

Include

Definition at line 7451 of file nrf52_bitfields.h.

◆ PPI_CHG_CH28_Msk

#define PPI_CHG_CH28_Msk   (0x1UL << PPI_CHG_CH28_Pos)

Bit mask of CH28 field.

Definition at line 7449 of file nrf52_bitfields.h.

◆ PPI_CHG_CH28_Pos

#define PPI_CHG_CH28_Pos   (28UL)

Position of CH28 field.

Definition at line 7448 of file nrf52_bitfields.h.

◆ PPI_CHG_CH29_Excluded

#define PPI_CHG_CH29_Excluded   (0UL)

Exclude

Definition at line 7444 of file nrf52_bitfields.h.

◆ PPI_CHG_CH29_Included

#define PPI_CHG_CH29_Included   (1UL)

Include

Definition at line 7445 of file nrf52_bitfields.h.

◆ PPI_CHG_CH29_Msk

#define PPI_CHG_CH29_Msk   (0x1UL << PPI_CHG_CH29_Pos)

Bit mask of CH29 field.

Definition at line 7443 of file nrf52_bitfields.h.

◆ PPI_CHG_CH29_Pos

#define PPI_CHG_CH29_Pos   (29UL)

Position of CH29 field.

Definition at line 7442 of file nrf52_bitfields.h.

◆ PPI_CHG_CH2_Excluded

#define PPI_CHG_CH2_Excluded   (0UL)

Exclude

Definition at line 7606 of file nrf52_bitfields.h.

◆ PPI_CHG_CH2_Included

#define PPI_CHG_CH2_Included   (1UL)

Include

Definition at line 7607 of file nrf52_bitfields.h.

◆ PPI_CHG_CH2_Msk

#define PPI_CHG_CH2_Msk   (0x1UL << PPI_CHG_CH2_Pos)

Bit mask of CH2 field.

Definition at line 7605 of file nrf52_bitfields.h.

◆ PPI_CHG_CH2_Pos

#define PPI_CHG_CH2_Pos   (2UL)

Position of CH2 field.

Definition at line 7604 of file nrf52_bitfields.h.

◆ PPI_CHG_CH30_Excluded

#define PPI_CHG_CH30_Excluded   (0UL)

Exclude

Definition at line 7438 of file nrf52_bitfields.h.

◆ PPI_CHG_CH30_Included

#define PPI_CHG_CH30_Included   (1UL)

Include

Definition at line 7439 of file nrf52_bitfields.h.

◆ PPI_CHG_CH30_Msk

#define PPI_CHG_CH30_Msk   (0x1UL << PPI_CHG_CH30_Pos)

Bit mask of CH30 field.

Definition at line 7437 of file nrf52_bitfields.h.

◆ PPI_CHG_CH30_Pos

#define PPI_CHG_CH30_Pos   (30UL)

Position of CH30 field.

Definition at line 7436 of file nrf52_bitfields.h.

◆ PPI_CHG_CH31_Excluded

#define PPI_CHG_CH31_Excluded   (0UL)

Exclude

Definition at line 7432 of file nrf52_bitfields.h.

◆ PPI_CHG_CH31_Included

#define PPI_CHG_CH31_Included   (1UL)

Include

Definition at line 7433 of file nrf52_bitfields.h.

◆ PPI_CHG_CH31_Msk

#define PPI_CHG_CH31_Msk   (0x1UL << PPI_CHG_CH31_Pos)

Bit mask of CH31 field.

Definition at line 7431 of file nrf52_bitfields.h.

◆ PPI_CHG_CH31_Pos

#define PPI_CHG_CH31_Pos   (31UL)

Position of CH31 field.

Definition at line 7430 of file nrf52_bitfields.h.

◆ PPI_CHG_CH3_Excluded

#define PPI_CHG_CH3_Excluded   (0UL)

Exclude

Definition at line 7600 of file nrf52_bitfields.h.

◆ PPI_CHG_CH3_Included

#define PPI_CHG_CH3_Included   (1UL)

Include

Definition at line 7601 of file nrf52_bitfields.h.

◆ PPI_CHG_CH3_Msk

#define PPI_CHG_CH3_Msk   (0x1UL << PPI_CHG_CH3_Pos)

Bit mask of CH3 field.

Definition at line 7599 of file nrf52_bitfields.h.

◆ PPI_CHG_CH3_Pos

#define PPI_CHG_CH3_Pos   (3UL)

Position of CH3 field.

Definition at line 7598 of file nrf52_bitfields.h.

◆ PPI_CHG_CH4_Excluded

#define PPI_CHG_CH4_Excluded   (0UL)

Exclude

Definition at line 7594 of file nrf52_bitfields.h.

◆ PPI_CHG_CH4_Included

#define PPI_CHG_CH4_Included   (1UL)

Include

Definition at line 7595 of file nrf52_bitfields.h.

◆ PPI_CHG_CH4_Msk

#define PPI_CHG_CH4_Msk   (0x1UL << PPI_CHG_CH4_Pos)

Bit mask of CH4 field.

Definition at line 7593 of file nrf52_bitfields.h.

◆ PPI_CHG_CH4_Pos

#define PPI_CHG_CH4_Pos   (4UL)

Position of CH4 field.

Definition at line 7592 of file nrf52_bitfields.h.

◆ PPI_CHG_CH5_Excluded

#define PPI_CHG_CH5_Excluded   (0UL)

Exclude

Definition at line 7588 of file nrf52_bitfields.h.

◆ PPI_CHG_CH5_Included

#define PPI_CHG_CH5_Included   (1UL)

Include

Definition at line 7589 of file nrf52_bitfields.h.

◆ PPI_CHG_CH5_Msk

#define PPI_CHG_CH5_Msk   (0x1UL << PPI_CHG_CH5_Pos)

Bit mask of CH5 field.

Definition at line 7587 of file nrf52_bitfields.h.

◆ PPI_CHG_CH5_Pos

#define PPI_CHG_CH5_Pos   (5UL)

Position of CH5 field.

Definition at line 7586 of file nrf52_bitfields.h.

◆ PPI_CHG_CH6_Excluded

#define PPI_CHG_CH6_Excluded   (0UL)

Exclude

Definition at line 7582 of file nrf52_bitfields.h.

◆ PPI_CHG_CH6_Included

#define PPI_CHG_CH6_Included   (1UL)

Include

Definition at line 7583 of file nrf52_bitfields.h.

◆ PPI_CHG_CH6_Msk

#define PPI_CHG_CH6_Msk   (0x1UL << PPI_CHG_CH6_Pos)

Bit mask of CH6 field.

Definition at line 7581 of file nrf52_bitfields.h.

◆ PPI_CHG_CH6_Pos

#define PPI_CHG_CH6_Pos   (6UL)

Position of CH6 field.

Definition at line 7580 of file nrf52_bitfields.h.

◆ PPI_CHG_CH7_Excluded

#define PPI_CHG_CH7_Excluded   (0UL)

Exclude

Definition at line 7576 of file nrf52_bitfields.h.

◆ PPI_CHG_CH7_Included

#define PPI_CHG_CH7_Included   (1UL)

Include

Definition at line 7577 of file nrf52_bitfields.h.

◆ PPI_CHG_CH7_Msk

#define PPI_CHG_CH7_Msk   (0x1UL << PPI_CHG_CH7_Pos)

Bit mask of CH7 field.

Definition at line 7575 of file nrf52_bitfields.h.

◆ PPI_CHG_CH7_Pos

#define PPI_CHG_CH7_Pos   (7UL)

Position of CH7 field.

Definition at line 7574 of file nrf52_bitfields.h.

◆ PPI_CHG_CH8_Excluded

#define PPI_CHG_CH8_Excluded   (0UL)

Exclude

Definition at line 7570 of file nrf52_bitfields.h.

◆ PPI_CHG_CH8_Included

#define PPI_CHG_CH8_Included   (1UL)

Include

Definition at line 7571 of file nrf52_bitfields.h.

◆ PPI_CHG_CH8_Msk

#define PPI_CHG_CH8_Msk   (0x1UL << PPI_CHG_CH8_Pos)

Bit mask of CH8 field.

Definition at line 7569 of file nrf52_bitfields.h.

◆ PPI_CHG_CH8_Pos

#define PPI_CHG_CH8_Pos   (8UL)

Position of CH8 field.

Definition at line 7568 of file nrf52_bitfields.h.

◆ PPI_CHG_CH9_Excluded

#define PPI_CHG_CH9_Excluded   (0UL)

Exclude

Definition at line 7564 of file nrf52_bitfields.h.

◆ PPI_CHG_CH9_Included

#define PPI_CHG_CH9_Included   (1UL)

Include

Definition at line 7565 of file nrf52_bitfields.h.

◆ PPI_CHG_CH9_Msk

#define PPI_CHG_CH9_Msk   (0x1UL << PPI_CHG_CH9_Pos)

Bit mask of CH9 field.

Definition at line 7563 of file nrf52_bitfields.h.

◆ PPI_CHG_CH9_Pos

#define PPI_CHG_CH9_Pos   (9UL)

Position of CH9 field.

Definition at line 7562 of file nrf52_bitfields.h.

◆ PPI_FORK_TEP_TEP_Msk

#define PPI_FORK_TEP_TEP_Msk   (0xFFFFFFFFUL << PPI_FORK_TEP_TEP_Pos)

Bit mask of TEP field.

Definition at line 7626 of file nrf52_bitfields.h.

◆ PPI_FORK_TEP_TEP_Pos

#define PPI_FORK_TEP_TEP_Pos   (0UL)

Position of TEP field.

Definition at line 7625 of file nrf52_bitfields.h.

◆ PWM_COUNTERTOP_COUNTERTOP_Msk

#define PWM_COUNTERTOP_COUNTERTOP_Msk   (0x7FFFUL << PWM_COUNTERTOP_COUNTERTOP_Pos)

Bit mask of COUNTERTOP field.

Definition at line 7837 of file nrf52_bitfields.h.

◆ PWM_COUNTERTOP_COUNTERTOP_Pos

#define PWM_COUNTERTOP_COUNTERTOP_Pos   (0UL)

Position of COUNTERTOP field.

Definition at line 7836 of file nrf52_bitfields.h.

◆ PWM_DECODER_LOAD_Common

#define PWM_DECODER_LOAD_Common   (0UL)

1st half word (16-bit) used in all PWM channels 0..3

Definition at line 7866 of file nrf52_bitfields.h.

◆ PWM_DECODER_LOAD_Grouped

#define PWM_DECODER_LOAD_Grouped   (1UL)

1st half word (16-bit) used in channel 0..1; 2nd word in channel 2..3

Definition at line 7867 of file nrf52_bitfields.h.

◆ PWM_DECODER_LOAD_Individual

#define PWM_DECODER_LOAD_Individual   (2UL)

1st half word (16-bit) in ch.0; 2nd in ch.1; ...; 4th in ch.3

Definition at line 7868 of file nrf52_bitfields.h.

◆ PWM_DECODER_LOAD_Msk

#define PWM_DECODER_LOAD_Msk   (0x7UL << PWM_DECODER_LOAD_Pos)

Bit mask of LOAD field.

Definition at line 7865 of file nrf52_bitfields.h.

◆ PWM_DECODER_LOAD_Pos

#define PWM_DECODER_LOAD_Pos   (0UL)

Position of LOAD field.

Definition at line 7864 of file nrf52_bitfields.h.

◆ PWM_DECODER_LOAD_WaveForm

#define PWM_DECODER_LOAD_WaveForm   (3UL)

1st half word (16-bit) in ch.0; 2nd in ch.1; ...; 4th in COUNTERTOP

Definition at line 7869 of file nrf52_bitfields.h.

◆ PWM_DECODER_MODE_Msk

#define PWM_DECODER_MODE_Msk   (0x1UL << PWM_DECODER_MODE_Pos)

Bit mask of MODE field.

Definition at line 7859 of file nrf52_bitfields.h.

◆ PWM_DECODER_MODE_NextStep

#define PWM_DECODER_MODE_NextStep   (1UL)

NEXTSTEP task causes a new value to be loaded to internal compare registers

Definition at line 7861 of file nrf52_bitfields.h.

◆ PWM_DECODER_MODE_Pos

#define PWM_DECODER_MODE_Pos   (8UL)

Position of MODE field.

Definition at line 7858 of file nrf52_bitfields.h.

◆ PWM_DECODER_MODE_RefreshCount

#define PWM_DECODER_MODE_RefreshCount   (0UL)

SEQ[n].REFRESH is used to determine loading internal compare registers

Definition at line 7860 of file nrf52_bitfields.h.

◆ PWM_ENABLE_ENABLE_Disabled

#define PWM_ENABLE_ENABLE_Disabled   (0UL)

Disabled

Definition at line 7820 of file nrf52_bitfields.h.

◆ PWM_ENABLE_ENABLE_Enabled

#define PWM_ENABLE_ENABLE_Enabled   (1UL)

Enable

Definition at line 7821 of file nrf52_bitfields.h.

◆ PWM_ENABLE_ENABLE_Msk

#define PWM_ENABLE_ENABLE_Msk   (0x1UL << PWM_ENABLE_ENABLE_Pos)

Bit mask of ENABLE field.

Definition at line 7819 of file nrf52_bitfields.h.

◆ PWM_ENABLE_ENABLE_Pos

#define PWM_ENABLE_ENABLE_Pos   (0UL)

Position of ENABLE field.

Definition at line 7818 of file nrf52_bitfields.h.

◆ PWM_INTEN_LOOPSDONE_Disabled

#define PWM_INTEN_LOOPSDONE_Disabled   (0UL)

Disable

Definition at line 7671 of file nrf52_bitfields.h.

◆ PWM_INTEN_LOOPSDONE_Enabled

#define PWM_INTEN_LOOPSDONE_Enabled   (1UL)

Enable

Definition at line 7672 of file nrf52_bitfields.h.

◆ PWM_INTEN_LOOPSDONE_Msk

#define PWM_INTEN_LOOPSDONE_Msk   (0x1UL << PWM_INTEN_LOOPSDONE_Pos)

Bit mask of LOOPSDONE field.

Definition at line 7670 of file nrf52_bitfields.h.

◆ PWM_INTEN_LOOPSDONE_Pos

#define PWM_INTEN_LOOPSDONE_Pos   (7UL)

Position of LOOPSDONE field.

Definition at line 7669 of file nrf52_bitfields.h.

◆ PWM_INTEN_PWMPERIODEND_Disabled

#define PWM_INTEN_PWMPERIODEND_Disabled   (0UL)

Disable

Definition at line 7677 of file nrf52_bitfields.h.

◆ PWM_INTEN_PWMPERIODEND_Enabled

#define PWM_INTEN_PWMPERIODEND_Enabled   (1UL)

Enable

Definition at line 7678 of file nrf52_bitfields.h.

◆ PWM_INTEN_PWMPERIODEND_Msk

#define PWM_INTEN_PWMPERIODEND_Msk   (0x1UL << PWM_INTEN_PWMPERIODEND_Pos)

Bit mask of PWMPERIODEND field.

Definition at line 7676 of file nrf52_bitfields.h.

◆ PWM_INTEN_PWMPERIODEND_Pos

#define PWM_INTEN_PWMPERIODEND_Pos   (6UL)

Position of PWMPERIODEND field.

Definition at line 7675 of file nrf52_bitfields.h.

◆ PWM_INTEN_SEQEND0_Disabled

#define PWM_INTEN_SEQEND0_Disabled   (0UL)

Disable

Definition at line 7689 of file nrf52_bitfields.h.

◆ PWM_INTEN_SEQEND0_Enabled

#define PWM_INTEN_SEQEND0_Enabled   (1UL)

Enable

Definition at line 7690 of file nrf52_bitfields.h.

◆ PWM_INTEN_SEQEND0_Msk

#define PWM_INTEN_SEQEND0_Msk   (0x1UL << PWM_INTEN_SEQEND0_Pos)

Bit mask of SEQEND0 field.

Definition at line 7688 of file nrf52_bitfields.h.

◆ PWM_INTEN_SEQEND0_Pos

#define PWM_INTEN_SEQEND0_Pos   (4UL)

Position of SEQEND0 field.

Definition at line 7687 of file nrf52_bitfields.h.

◆ PWM_INTEN_SEQEND1_Disabled

#define PWM_INTEN_SEQEND1_Disabled   (0UL)

Disable

Definition at line 7683 of file nrf52_bitfields.h.

◆ PWM_INTEN_SEQEND1_Enabled

#define PWM_INTEN_SEQEND1_Enabled   (1UL)

Enable

Definition at line 7684 of file nrf52_bitfields.h.

◆ PWM_INTEN_SEQEND1_Msk

#define PWM_INTEN_SEQEND1_Msk   (0x1UL << PWM_INTEN_SEQEND1_Pos)

Bit mask of SEQEND1 field.

Definition at line 7682 of file nrf52_bitfields.h.

◆ PWM_INTEN_SEQEND1_Pos

#define PWM_INTEN_SEQEND1_Pos   (5UL)

Position of SEQEND1 field.

Definition at line 7681 of file nrf52_bitfields.h.

◆ PWM_INTEN_SEQSTARTED0_Disabled

#define PWM_INTEN_SEQSTARTED0_Disabled   (0UL)

Disable

Definition at line 7701 of file nrf52_bitfields.h.

◆ PWM_INTEN_SEQSTARTED0_Enabled

#define PWM_INTEN_SEQSTARTED0_Enabled   (1UL)

Enable

Definition at line 7702 of file nrf52_bitfields.h.

◆ PWM_INTEN_SEQSTARTED0_Msk

#define PWM_INTEN_SEQSTARTED0_Msk   (0x1UL << PWM_INTEN_SEQSTARTED0_Pos)

Bit mask of SEQSTARTED0 field.

Definition at line 7700 of file nrf52_bitfields.h.

◆ PWM_INTEN_SEQSTARTED0_Pos

#define PWM_INTEN_SEQSTARTED0_Pos   (2UL)

Position of SEQSTARTED0 field.

Definition at line 7699 of file nrf52_bitfields.h.

◆ PWM_INTEN_SEQSTARTED1_Disabled

#define PWM_INTEN_SEQSTARTED1_Disabled   (0UL)

Disable

Definition at line 7695 of file nrf52_bitfields.h.

◆ PWM_INTEN_SEQSTARTED1_Enabled

#define PWM_INTEN_SEQSTARTED1_Enabled   (1UL)

Enable

Definition at line 7696 of file nrf52_bitfields.h.

◆ PWM_INTEN_SEQSTARTED1_Msk

#define PWM_INTEN_SEQSTARTED1_Msk   (0x1UL << PWM_INTEN_SEQSTARTED1_Pos)

Bit mask of SEQSTARTED1 field.

Definition at line 7694 of file nrf52_bitfields.h.

◆ PWM_INTEN_SEQSTARTED1_Pos

#define PWM_INTEN_SEQSTARTED1_Pos   (3UL)

Position of SEQSTARTED1 field.

Definition at line 7693 of file nrf52_bitfields.h.

◆ PWM_INTEN_STOPPED_Disabled

#define PWM_INTEN_STOPPED_Disabled   (0UL)

Disable

Definition at line 7707 of file nrf52_bitfields.h.

◆ PWM_INTEN_STOPPED_Enabled

#define PWM_INTEN_STOPPED_Enabled   (1UL)

Enable

Definition at line 7708 of file nrf52_bitfields.h.

◆ PWM_INTEN_STOPPED_Msk

#define PWM_INTEN_STOPPED_Msk   (0x1UL << PWM_INTEN_STOPPED_Pos)

Bit mask of STOPPED field.

Definition at line 7706 of file nrf52_bitfields.h.

◆ PWM_INTEN_STOPPED_Pos

#define PWM_INTEN_STOPPED_Pos   (1UL)

Position of STOPPED field.

Definition at line 7705 of file nrf52_bitfields.h.

◆ PWM_INTENCLR_LOOPSDONE_Clear

#define PWM_INTENCLR_LOOPSDONE_Clear   (1UL)

Disable

Definition at line 7770 of file nrf52_bitfields.h.

◆ PWM_INTENCLR_LOOPSDONE_Disabled

#define PWM_INTENCLR_LOOPSDONE_Disabled   (0UL)

Read: Disabled

Definition at line 7768 of file nrf52_bitfields.h.

◆ PWM_INTENCLR_LOOPSDONE_Enabled

#define PWM_INTENCLR_LOOPSDONE_Enabled   (1UL)

Read: Enabled

Definition at line 7769 of file nrf52_bitfields.h.

◆ PWM_INTENCLR_LOOPSDONE_Msk

#define PWM_INTENCLR_LOOPSDONE_Msk   (0x1UL << PWM_INTENCLR_LOOPSDONE_Pos)

Bit mask of LOOPSDONE field.

Definition at line 7767 of file nrf52_bitfields.h.

◆ PWM_INTENCLR_LOOPSDONE_Pos

#define PWM_INTENCLR_LOOPSDONE_Pos   (7UL)

Position of LOOPSDONE field.

Definition at line 7766 of file nrf52_bitfields.h.

◆ PWM_INTENCLR_PWMPERIODEND_Clear

#define PWM_INTENCLR_PWMPERIODEND_Clear   (1UL)

Disable

Definition at line 7777 of file nrf52_bitfields.h.

◆ PWM_INTENCLR_PWMPERIODEND_Disabled

#define PWM_INTENCLR_PWMPERIODEND_Disabled   (0UL)

Read: Disabled

Definition at line 7775 of file nrf52_bitfields.h.

◆ PWM_INTENCLR_PWMPERIODEND_Enabled

#define PWM_INTENCLR_PWMPERIODEND_Enabled   (1UL)

Read: Enabled

Definition at line 7776 of file nrf52_bitfields.h.

◆ PWM_INTENCLR_PWMPERIODEND_Msk

#define PWM_INTENCLR_PWMPERIODEND_Msk   (0x1UL << PWM_INTENCLR_PWMPERIODEND_Pos)

Bit mask of PWMPERIODEND field.

Definition at line 7774 of file nrf52_bitfields.h.

◆ PWM_INTENCLR_PWMPERIODEND_Pos

#define PWM_INTENCLR_PWMPERIODEND_Pos   (6UL)

Position of PWMPERIODEND field.

Definition at line 7773 of file nrf52_bitfields.h.

◆ PWM_INTENCLR_SEQEND0_Clear

#define PWM_INTENCLR_SEQEND0_Clear   (1UL)

Disable

Definition at line 7791 of file nrf52_bitfields.h.

◆ PWM_INTENCLR_SEQEND0_Disabled

#define PWM_INTENCLR_SEQEND0_Disabled   (0UL)

Read: Disabled

Definition at line 7789 of file nrf52_bitfields.h.

◆ PWM_INTENCLR_SEQEND0_Enabled

#define PWM_INTENCLR_SEQEND0_Enabled   (1UL)

Read: Enabled

Definition at line 7790 of file nrf52_bitfields.h.

◆ PWM_INTENCLR_SEQEND0_Msk

#define PWM_INTENCLR_SEQEND0_Msk   (0x1UL << PWM_INTENCLR_SEQEND0_Pos)

Bit mask of SEQEND0 field.

Definition at line 7788 of file nrf52_bitfields.h.

◆ PWM_INTENCLR_SEQEND0_Pos

#define PWM_INTENCLR_SEQEND0_Pos   (4UL)

Position of SEQEND0 field.

Definition at line 7787 of file nrf52_bitfields.h.

◆ PWM_INTENCLR_SEQEND1_Clear

#define PWM_INTENCLR_SEQEND1_Clear   (1UL)

Disable

Definition at line 7784 of file nrf52_bitfields.h.

◆ PWM_INTENCLR_SEQEND1_Disabled

#define PWM_INTENCLR_SEQEND1_Disabled   (0UL)

Read: Disabled

Definition at line 7782 of file nrf52_bitfields.h.

◆ PWM_INTENCLR_SEQEND1_Enabled

#define PWM_INTENCLR_SEQEND1_Enabled   (1UL)

Read: Enabled

Definition at line 7783 of file nrf52_bitfields.h.

◆ PWM_INTENCLR_SEQEND1_Msk

#define PWM_INTENCLR_SEQEND1_Msk   (0x1UL << PWM_INTENCLR_SEQEND1_Pos)

Bit mask of SEQEND1 field.

Definition at line 7781 of file nrf52_bitfields.h.

◆ PWM_INTENCLR_SEQEND1_Pos

#define PWM_INTENCLR_SEQEND1_Pos   (5UL)

Position of SEQEND1 field.

Definition at line 7780 of file nrf52_bitfields.h.

◆ PWM_INTENCLR_SEQSTARTED0_Clear

#define PWM_INTENCLR_SEQSTARTED0_Clear   (1UL)

Disable

Definition at line 7805 of file nrf52_bitfields.h.

◆ PWM_INTENCLR_SEQSTARTED0_Disabled

#define PWM_INTENCLR_SEQSTARTED0_Disabled   (0UL)

Read: Disabled

Definition at line 7803 of file nrf52_bitfields.h.

◆ PWM_INTENCLR_SEQSTARTED0_Enabled

#define PWM_INTENCLR_SEQSTARTED0_Enabled   (1UL)

Read: Enabled

Definition at line 7804 of file nrf52_bitfields.h.

◆ PWM_INTENCLR_SEQSTARTED0_Msk

#define PWM_INTENCLR_SEQSTARTED0_Msk   (0x1UL << PWM_INTENCLR_SEQSTARTED0_Pos)

Bit mask of SEQSTARTED0 field.

Definition at line 7802 of file nrf52_bitfields.h.

◆ PWM_INTENCLR_SEQSTARTED0_Pos

#define PWM_INTENCLR_SEQSTARTED0_Pos   (2UL)

Position of SEQSTARTED0 field.

Definition at line 7801 of file nrf52_bitfields.h.

◆ PWM_INTENCLR_SEQSTARTED1_Clear

#define PWM_INTENCLR_SEQSTARTED1_Clear   (1UL)

Disable

Definition at line 7798 of file nrf52_bitfields.h.

◆ PWM_INTENCLR_SEQSTARTED1_Disabled

#define PWM_INTENCLR_SEQSTARTED1_Disabled   (0UL)

Read: Disabled

Definition at line 7796 of file nrf52_bitfields.h.

◆ PWM_INTENCLR_SEQSTARTED1_Enabled

#define PWM_INTENCLR_SEQSTARTED1_Enabled   (1UL)

Read: Enabled

Definition at line 7797 of file nrf52_bitfields.h.

◆ PWM_INTENCLR_SEQSTARTED1_Msk

#define PWM_INTENCLR_SEQSTARTED1_Msk   (0x1UL << PWM_INTENCLR_SEQSTARTED1_Pos)

Bit mask of SEQSTARTED1 field.

Definition at line 7795 of file nrf52_bitfields.h.

◆ PWM_INTENCLR_SEQSTARTED1_Pos

#define PWM_INTENCLR_SEQSTARTED1_Pos   (3UL)

Position of SEQSTARTED1 field.

Definition at line 7794 of file nrf52_bitfields.h.

◆ PWM_INTENCLR_STOPPED_Clear

#define PWM_INTENCLR_STOPPED_Clear   (1UL)

Disable

Definition at line 7812 of file nrf52_bitfields.h.

◆ PWM_INTENCLR_STOPPED_Disabled

#define PWM_INTENCLR_STOPPED_Disabled   (0UL)

Read: Disabled

Definition at line 7810 of file nrf52_bitfields.h.

◆ PWM_INTENCLR_STOPPED_Enabled

#define PWM_INTENCLR_STOPPED_Enabled   (1UL)

Read: Enabled

Definition at line 7811 of file nrf52_bitfields.h.

◆ PWM_INTENCLR_STOPPED_Msk

#define PWM_INTENCLR_STOPPED_Msk   (0x1UL << PWM_INTENCLR_STOPPED_Pos)

Bit mask of STOPPED field.

Definition at line 7809 of file nrf52_bitfields.h.

◆ PWM_INTENCLR_STOPPED_Pos

#define PWM_INTENCLR_STOPPED_Pos   (1UL)

Position of STOPPED field.

Definition at line 7808 of file nrf52_bitfields.h.

◆ PWM_INTENSET_LOOPSDONE_Disabled

#define PWM_INTENSET_LOOPSDONE_Disabled   (0UL)

Read: Disabled

Definition at line 7716 of file nrf52_bitfields.h.

◆ PWM_INTENSET_LOOPSDONE_Enabled

#define PWM_INTENSET_LOOPSDONE_Enabled   (1UL)

Read: Enabled

Definition at line 7717 of file nrf52_bitfields.h.

◆ PWM_INTENSET_LOOPSDONE_Msk

#define PWM_INTENSET_LOOPSDONE_Msk   (0x1UL << PWM_INTENSET_LOOPSDONE_Pos)

Bit mask of LOOPSDONE field.

Definition at line 7715 of file nrf52_bitfields.h.

◆ PWM_INTENSET_LOOPSDONE_Pos

#define PWM_INTENSET_LOOPSDONE_Pos   (7UL)

Position of LOOPSDONE field.

Definition at line 7714 of file nrf52_bitfields.h.

◆ PWM_INTENSET_LOOPSDONE_Set

#define PWM_INTENSET_LOOPSDONE_Set   (1UL)

Enable

Definition at line 7718 of file nrf52_bitfields.h.

◆ PWM_INTENSET_PWMPERIODEND_Disabled

#define PWM_INTENSET_PWMPERIODEND_Disabled   (0UL)

Read: Disabled

Definition at line 7723 of file nrf52_bitfields.h.

◆ PWM_INTENSET_PWMPERIODEND_Enabled

#define PWM_INTENSET_PWMPERIODEND_Enabled   (1UL)

Read: Enabled

Definition at line 7724 of file nrf52_bitfields.h.

◆ PWM_INTENSET_PWMPERIODEND_Msk

#define PWM_INTENSET_PWMPERIODEND_Msk   (0x1UL << PWM_INTENSET_PWMPERIODEND_Pos)

Bit mask of PWMPERIODEND field.

Definition at line 7722 of file nrf52_bitfields.h.

◆ PWM_INTENSET_PWMPERIODEND_Pos

#define PWM_INTENSET_PWMPERIODEND_Pos   (6UL)

Position of PWMPERIODEND field.

Definition at line 7721 of file nrf52_bitfields.h.

◆ PWM_INTENSET_PWMPERIODEND_Set

#define PWM_INTENSET_PWMPERIODEND_Set   (1UL)

Enable

Definition at line 7725 of file nrf52_bitfields.h.

◆ PWM_INTENSET_SEQEND0_Disabled

#define PWM_INTENSET_SEQEND0_Disabled   (0UL)

Read: Disabled

Definition at line 7737 of file nrf52_bitfields.h.

◆ PWM_INTENSET_SEQEND0_Enabled

#define PWM_INTENSET_SEQEND0_Enabled   (1UL)

Read: Enabled

Definition at line 7738 of file nrf52_bitfields.h.

◆ PWM_INTENSET_SEQEND0_Msk

#define PWM_INTENSET_SEQEND0_Msk   (0x1UL << PWM_INTENSET_SEQEND0_Pos)

Bit mask of SEQEND0 field.

Definition at line 7736 of file nrf52_bitfields.h.

◆ PWM_INTENSET_SEQEND0_Pos

#define PWM_INTENSET_SEQEND0_Pos   (4UL)

Position of SEQEND0 field.

Definition at line 7735 of file nrf52_bitfields.h.

◆ PWM_INTENSET_SEQEND0_Set

#define PWM_INTENSET_SEQEND0_Set   (1UL)

Enable

Definition at line 7739 of file nrf52_bitfields.h.

◆ PWM_INTENSET_SEQEND1_Disabled

#define PWM_INTENSET_SEQEND1_Disabled   (0UL)

Read: Disabled

Definition at line 7730 of file nrf52_bitfields.h.

◆ PWM_INTENSET_SEQEND1_Enabled

#define PWM_INTENSET_SEQEND1_Enabled   (1UL)

Read: Enabled

Definition at line 7731 of file nrf52_bitfields.h.

◆ PWM_INTENSET_SEQEND1_Msk

#define PWM_INTENSET_SEQEND1_Msk   (0x1UL << PWM_INTENSET_SEQEND1_Pos)

Bit mask of SEQEND1 field.

Definition at line 7729 of file nrf52_bitfields.h.

◆ PWM_INTENSET_SEQEND1_Pos

#define PWM_INTENSET_SEQEND1_Pos   (5UL)

Position of SEQEND1 field.

Definition at line 7728 of file nrf52_bitfields.h.

◆ PWM_INTENSET_SEQEND1_Set

#define PWM_INTENSET_SEQEND1_Set   (1UL)

Enable

Definition at line 7732 of file nrf52_bitfields.h.

◆ PWM_INTENSET_SEQSTARTED0_Disabled

#define PWM_INTENSET_SEQSTARTED0_Disabled   (0UL)

Read: Disabled

Definition at line 7751 of file nrf52_bitfields.h.

◆ PWM_INTENSET_SEQSTARTED0_Enabled

#define PWM_INTENSET_SEQSTARTED0_Enabled   (1UL)

Read: Enabled

Definition at line 7752 of file nrf52_bitfields.h.

◆ PWM_INTENSET_SEQSTARTED0_Msk

#define PWM_INTENSET_SEQSTARTED0_Msk   (0x1UL << PWM_INTENSET_SEQSTARTED0_Pos)

Bit mask of SEQSTARTED0 field.

Definition at line 7750 of file nrf52_bitfields.h.

◆ PWM_INTENSET_SEQSTARTED0_Pos

#define PWM_INTENSET_SEQSTARTED0_Pos   (2UL)

Position of SEQSTARTED0 field.

Definition at line 7749 of file nrf52_bitfields.h.

◆ PWM_INTENSET_SEQSTARTED0_Set

#define PWM_INTENSET_SEQSTARTED0_Set   (1UL)

Enable

Definition at line 7753 of file nrf52_bitfields.h.

◆ PWM_INTENSET_SEQSTARTED1_Disabled

#define PWM_INTENSET_SEQSTARTED1_Disabled   (0UL)

Read: Disabled

Definition at line 7744 of file nrf52_bitfields.h.

◆ PWM_INTENSET_SEQSTARTED1_Enabled

#define PWM_INTENSET_SEQSTARTED1_Enabled   (1UL)

Read: Enabled

Definition at line 7745 of file nrf52_bitfields.h.

◆ PWM_INTENSET_SEQSTARTED1_Msk

#define PWM_INTENSET_SEQSTARTED1_Msk   (0x1UL << PWM_INTENSET_SEQSTARTED1_Pos)

Bit mask of SEQSTARTED1 field.

Definition at line 7743 of file nrf52_bitfields.h.

◆ PWM_INTENSET_SEQSTARTED1_Pos

#define PWM_INTENSET_SEQSTARTED1_Pos   (3UL)

Position of SEQSTARTED1 field.

Definition at line 7742 of file nrf52_bitfields.h.

◆ PWM_INTENSET_SEQSTARTED1_Set

#define PWM_INTENSET_SEQSTARTED1_Set   (1UL)

Enable

Definition at line 7746 of file nrf52_bitfields.h.

◆ PWM_INTENSET_STOPPED_Disabled

#define PWM_INTENSET_STOPPED_Disabled   (0UL)

Read: Disabled

Definition at line 7758 of file nrf52_bitfields.h.

◆ PWM_INTENSET_STOPPED_Enabled

#define PWM_INTENSET_STOPPED_Enabled   (1UL)

Read: Enabled

Definition at line 7759 of file nrf52_bitfields.h.

◆ PWM_INTENSET_STOPPED_Msk

#define PWM_INTENSET_STOPPED_Msk   (0x1UL << PWM_INTENSET_STOPPED_Pos)

Bit mask of STOPPED field.

Definition at line 7757 of file nrf52_bitfields.h.

◆ PWM_INTENSET_STOPPED_Pos

#define PWM_INTENSET_STOPPED_Pos   (1UL)

Position of STOPPED field.

Definition at line 7756 of file nrf52_bitfields.h.

◆ PWM_INTENSET_STOPPED_Set

#define PWM_INTENSET_STOPPED_Set   (1UL)

Enable

Definition at line 7760 of file nrf52_bitfields.h.

◆ PWM_LOOP_CNT_Disabled

#define PWM_LOOP_CNT_Disabled   (0UL)

Looping disabled (stop at the end of the sequence)

Definition at line 7877 of file nrf52_bitfields.h.

◆ PWM_LOOP_CNT_Msk

#define PWM_LOOP_CNT_Msk   (0xFFFFUL << PWM_LOOP_CNT_Pos)

Bit mask of CNT field.

Definition at line 7876 of file nrf52_bitfields.h.

◆ PWM_LOOP_CNT_Pos

#define PWM_LOOP_CNT_Pos   (0UL)

Position of CNT field.

Definition at line 7875 of file nrf52_bitfields.h.

◆ PWM_MODE_UPDOWN_Msk

#define PWM_MODE_UPDOWN_Msk   (0x1UL << PWM_MODE_UPDOWN_Pos)

Bit mask of UPDOWN field.

Definition at line 7828 of file nrf52_bitfields.h.

◆ PWM_MODE_UPDOWN_Pos

#define PWM_MODE_UPDOWN_Pos   (0UL)

Position of UPDOWN field.

Definition at line 7827 of file nrf52_bitfields.h.

◆ PWM_MODE_UPDOWN_Up

#define PWM_MODE_UPDOWN_Up   (0UL)

Up counter - edge aligned PWM duty-cycle

Definition at line 7829 of file nrf52_bitfields.h.

◆ PWM_MODE_UPDOWN_UpAndDown

#define PWM_MODE_UPDOWN_UpAndDown   (1UL)

Up and down counter - center aligned PWM duty cycle

Definition at line 7830 of file nrf52_bitfields.h.

◆ PWM_PRESCALER_PRESCALER_DIV_1

#define PWM_PRESCALER_PRESCALER_DIV_1   (0UL)

Divide by 1 (16MHz)

Definition at line 7845 of file nrf52_bitfields.h.

◆ PWM_PRESCALER_PRESCALER_DIV_128

#define PWM_PRESCALER_PRESCALER_DIV_128   (7UL)

Divide by 128 ( 125kHz)

Definition at line 7852 of file nrf52_bitfields.h.

◆ PWM_PRESCALER_PRESCALER_DIV_16

#define PWM_PRESCALER_PRESCALER_DIV_16   (4UL)

Divide by 16 ( 1MHz)

Definition at line 7849 of file nrf52_bitfields.h.

◆ PWM_PRESCALER_PRESCALER_DIV_2

#define PWM_PRESCALER_PRESCALER_DIV_2   (1UL)

Divide by 2 ( 8MHz)

Definition at line 7846 of file nrf52_bitfields.h.

◆ PWM_PRESCALER_PRESCALER_DIV_32

#define PWM_PRESCALER_PRESCALER_DIV_32   (5UL)

Divide by 32 ( 500kHz)

Definition at line 7850 of file nrf52_bitfields.h.

◆ PWM_PRESCALER_PRESCALER_DIV_4

#define PWM_PRESCALER_PRESCALER_DIV_4   (2UL)

Divide by 4 ( 4MHz)

Definition at line 7847 of file nrf52_bitfields.h.

◆ PWM_PRESCALER_PRESCALER_DIV_64

#define PWM_PRESCALER_PRESCALER_DIV_64   (6UL)

Divide by 64 ( 250kHz)

Definition at line 7851 of file nrf52_bitfields.h.

◆ PWM_PRESCALER_PRESCALER_DIV_8

#define PWM_PRESCALER_PRESCALER_DIV_8   (3UL)

Divide by 8 ( 2MHz)

Definition at line 7848 of file nrf52_bitfields.h.

◆ PWM_PRESCALER_PRESCALER_Msk

#define PWM_PRESCALER_PRESCALER_Msk   (0x7UL << PWM_PRESCALER_PRESCALER_Pos)

Bit mask of PRESCALER field.

Definition at line 7844 of file nrf52_bitfields.h.

◆ PWM_PRESCALER_PRESCALER_Pos

#define PWM_PRESCALER_PRESCALER_Pos   (0UL)

Position of PRESCALER field.

Definition at line 7843 of file nrf52_bitfields.h.

◆ PWM_PSEL_OUT_CONNECT_Connected

#define PWM_PSEL_OUT_CONNECT_Connected   (0UL)

Connect

Definition at line 7915 of file nrf52_bitfields.h.

◆ PWM_PSEL_OUT_CONNECT_Disconnected

#define PWM_PSEL_OUT_CONNECT_Disconnected   (1UL)

Disconnect

Definition at line 7916 of file nrf52_bitfields.h.

◆ PWM_PSEL_OUT_CONNECT_Msk

#define PWM_PSEL_OUT_CONNECT_Msk   (0x1UL << PWM_PSEL_OUT_CONNECT_Pos)

Bit mask of CONNECT field.

Definition at line 7914 of file nrf52_bitfields.h.

◆ PWM_PSEL_OUT_CONNECT_Pos

#define PWM_PSEL_OUT_CONNECT_Pos   (31UL)

Position of CONNECT field.

Definition at line 7913 of file nrf52_bitfields.h.

◆ PWM_PSEL_OUT_PIN_Msk

#define PWM_PSEL_OUT_PIN_Msk   (0x1FUL << PWM_PSEL_OUT_PIN_Pos)

Bit mask of PIN field.

Definition at line 7920 of file nrf52_bitfields.h.

◆ PWM_PSEL_OUT_PIN_Pos

#define PWM_PSEL_OUT_PIN_Pos   (0UL)

Position of PIN field.

Definition at line 7919 of file nrf52_bitfields.h.

◆ PWM_SEQ_CNT_CNT_Disabled

#define PWM_SEQ_CNT_CNT_Disabled   (0UL)

Sequence is disabled

Definition at line 7892 of file nrf52_bitfields.h.

◆ PWM_SEQ_CNT_CNT_Msk

#define PWM_SEQ_CNT_CNT_Msk   (0x7FFFUL << PWM_SEQ_CNT_CNT_Pos)

Bit mask of CNT field.

Definition at line 7891 of file nrf52_bitfields.h.

◆ PWM_SEQ_CNT_CNT_Pos

#define PWM_SEQ_CNT_CNT_Pos   (0UL)

Position of CNT field.

Definition at line 7890 of file nrf52_bitfields.h.

◆ PWM_SEQ_ENDDELAY_CNT_Msk

#define PWM_SEQ_ENDDELAY_CNT_Msk   (0xFFFFFFUL << PWM_SEQ_ENDDELAY_CNT_Pos)

Bit mask of CNT field.

Definition at line 7907 of file nrf52_bitfields.h.

◆ PWM_SEQ_ENDDELAY_CNT_Pos

#define PWM_SEQ_ENDDELAY_CNT_Pos   (0UL)

Position of CNT field.

Definition at line 7906 of file nrf52_bitfields.h.

◆ PWM_SEQ_PTR_PTR_Msk

#define PWM_SEQ_PTR_PTR_Msk   (0xFFFFFFFFUL << PWM_SEQ_PTR_PTR_Pos)

Bit mask of PTR field.

Definition at line 7884 of file nrf52_bitfields.h.

◆ PWM_SEQ_PTR_PTR_Pos

#define PWM_SEQ_PTR_PTR_Pos   (0UL)

Position of PTR field.

Definition at line 7883 of file nrf52_bitfields.h.

◆ PWM_SEQ_REFRESH_CNT_Continuous

#define PWM_SEQ_REFRESH_CNT_Continuous   (0UL)

Update every PWM period

Definition at line 7900 of file nrf52_bitfields.h.

◆ PWM_SEQ_REFRESH_CNT_Msk

#define PWM_SEQ_REFRESH_CNT_Msk   (0xFFFFFFUL << PWM_SEQ_REFRESH_CNT_Pos)

Bit mask of CNT field.

Definition at line 7899 of file nrf52_bitfields.h.

◆ PWM_SEQ_REFRESH_CNT_Pos

#define PWM_SEQ_REFRESH_CNT_Pos   (0UL)

Position of CNT field.

Definition at line 7898 of file nrf52_bitfields.h.

◆ PWM_SHORTS_LOOPSDONE_SEQSTART0_Disabled

#define PWM_SHORTS_LOOPSDONE_SEQSTART0_Disabled   (0UL)

Disable shortcut

Definition at line 7650 of file nrf52_bitfields.h.

◆ PWM_SHORTS_LOOPSDONE_SEQSTART0_Enabled

#define PWM_SHORTS_LOOPSDONE_SEQSTART0_Enabled   (1UL)

Enable shortcut

Definition at line 7651 of file nrf52_bitfields.h.

◆ PWM_SHORTS_LOOPSDONE_SEQSTART0_Msk

#define PWM_SHORTS_LOOPSDONE_SEQSTART0_Msk   (0x1UL << PWM_SHORTS_LOOPSDONE_SEQSTART0_Pos)

Bit mask of LOOPSDONE_SEQSTART0 field.

Definition at line 7649 of file nrf52_bitfields.h.

◆ PWM_SHORTS_LOOPSDONE_SEQSTART0_Pos

#define PWM_SHORTS_LOOPSDONE_SEQSTART0_Pos   (2UL)

Position of LOOPSDONE_SEQSTART0 field.

Definition at line 7648 of file nrf52_bitfields.h.

◆ PWM_SHORTS_LOOPSDONE_SEQSTART1_Disabled

#define PWM_SHORTS_LOOPSDONE_SEQSTART1_Disabled   (0UL)

Disable shortcut

Definition at line 7644 of file nrf52_bitfields.h.

◆ PWM_SHORTS_LOOPSDONE_SEQSTART1_Enabled

#define PWM_SHORTS_LOOPSDONE_SEQSTART1_Enabled   (1UL)

Enable shortcut

Definition at line 7645 of file nrf52_bitfields.h.

◆ PWM_SHORTS_LOOPSDONE_SEQSTART1_Msk

#define PWM_SHORTS_LOOPSDONE_SEQSTART1_Msk   (0x1UL << PWM_SHORTS_LOOPSDONE_SEQSTART1_Pos)

Bit mask of LOOPSDONE_SEQSTART1 field.

Definition at line 7643 of file nrf52_bitfields.h.

◆ PWM_SHORTS_LOOPSDONE_SEQSTART1_Pos

#define PWM_SHORTS_LOOPSDONE_SEQSTART1_Pos   (3UL)

Position of LOOPSDONE_SEQSTART1 field.

Definition at line 7642 of file nrf52_bitfields.h.

◆ PWM_SHORTS_LOOPSDONE_STOP_Disabled

#define PWM_SHORTS_LOOPSDONE_STOP_Disabled   (0UL)

Disable shortcut

Definition at line 7638 of file nrf52_bitfields.h.

◆ PWM_SHORTS_LOOPSDONE_STOP_Enabled

#define PWM_SHORTS_LOOPSDONE_STOP_Enabled   (1UL)

Enable shortcut

Definition at line 7639 of file nrf52_bitfields.h.

◆ PWM_SHORTS_LOOPSDONE_STOP_Msk

#define PWM_SHORTS_LOOPSDONE_STOP_Msk   (0x1UL << PWM_SHORTS_LOOPSDONE_STOP_Pos)

Bit mask of LOOPSDONE_STOP field.

Definition at line 7637 of file nrf52_bitfields.h.

◆ PWM_SHORTS_LOOPSDONE_STOP_Pos

#define PWM_SHORTS_LOOPSDONE_STOP_Pos   (4UL)

Position of LOOPSDONE_STOP field.

Definition at line 7636 of file nrf52_bitfields.h.

◆ PWM_SHORTS_SEQEND0_STOP_Disabled

#define PWM_SHORTS_SEQEND0_STOP_Disabled   (0UL)

Disable shortcut

Definition at line 7662 of file nrf52_bitfields.h.

◆ PWM_SHORTS_SEQEND0_STOP_Enabled

#define PWM_SHORTS_SEQEND0_STOP_Enabled   (1UL)

Enable shortcut

Definition at line 7663 of file nrf52_bitfields.h.

◆ PWM_SHORTS_SEQEND0_STOP_Msk

#define PWM_SHORTS_SEQEND0_STOP_Msk   (0x1UL << PWM_SHORTS_SEQEND0_STOP_Pos)

Bit mask of SEQEND0_STOP field.

Definition at line 7661 of file nrf52_bitfields.h.

◆ PWM_SHORTS_SEQEND0_STOP_Pos

#define PWM_SHORTS_SEQEND0_STOP_Pos   (0UL)

Position of SEQEND0_STOP field.

Definition at line 7660 of file nrf52_bitfields.h.

◆ PWM_SHORTS_SEQEND1_STOP_Disabled

#define PWM_SHORTS_SEQEND1_STOP_Disabled   (0UL)

Disable shortcut

Definition at line 7656 of file nrf52_bitfields.h.

◆ PWM_SHORTS_SEQEND1_STOP_Enabled

#define PWM_SHORTS_SEQEND1_STOP_Enabled   (1UL)

Enable shortcut

Definition at line 7657 of file nrf52_bitfields.h.

◆ PWM_SHORTS_SEQEND1_STOP_Msk

#define PWM_SHORTS_SEQEND1_STOP_Msk   (0x1UL << PWM_SHORTS_SEQEND1_STOP_Pos)

Bit mask of SEQEND1_STOP field.

Definition at line 7655 of file nrf52_bitfields.h.

◆ PWM_SHORTS_SEQEND1_STOP_Pos

#define PWM_SHORTS_SEQEND1_STOP_Pos   (1UL)

Position of SEQEND1_STOP field.

Definition at line 7654 of file nrf52_bitfields.h.

◆ QDEC_ACC_ACC_Msk

#define QDEC_ACC_ACC_Msk   (0xFFFFFFFFUL << QDEC_ACC_ACC_Pos)

Bit mask of ACC field.

Definition at line 8111 of file nrf52_bitfields.h.

◆ QDEC_ACC_ACC_Pos

#define QDEC_ACC_ACC_Pos   (0UL)

Position of ACC field.

Definition at line 8110 of file nrf52_bitfields.h.

◆ QDEC_ACCDBL_ACCDBL_Msk

#define QDEC_ACCDBL_ACCDBL_Msk   (0xFUL << QDEC_ACCDBL_ACCDBL_Pos)

Bit mask of ACCDBL field.

Definition at line 8180 of file nrf52_bitfields.h.

◆ QDEC_ACCDBL_ACCDBL_Pos

#define QDEC_ACCDBL_ACCDBL_Pos   (0UL)

Position of ACCDBL field.

Definition at line 8179 of file nrf52_bitfields.h.

◆ QDEC_ACCDBLREAD_ACCDBLREAD_Msk

#define QDEC_ACCDBLREAD_ACCDBLREAD_Msk   (0xFUL << QDEC_ACCDBLREAD_ACCDBLREAD_Pos)

Bit mask of ACCDBLREAD field.

Definition at line 8187 of file nrf52_bitfields.h.

◆ QDEC_ACCDBLREAD_ACCDBLREAD_Pos

#define QDEC_ACCDBLREAD_ACCDBLREAD_Pos   (0UL)

Position of ACCDBLREAD field.

Definition at line 8186 of file nrf52_bitfields.h.

◆ QDEC_ACCREAD_ACCREAD_Msk

#define QDEC_ACCREAD_ACCREAD_Msk   (0xFFFFFFFFUL << QDEC_ACCREAD_ACCREAD_Pos)

Bit mask of ACCREAD field.

Definition at line 8118 of file nrf52_bitfields.h.

◆ QDEC_ACCREAD_ACCREAD_Pos

#define QDEC_ACCREAD_ACCREAD_Pos   (0UL)

Position of ACCREAD field.

Definition at line 8117 of file nrf52_bitfields.h.

◆ QDEC_DBFEN_DBFEN_Disabled

#define QDEC_DBFEN_DBFEN_Disabled   (0UL)

Debounce input filters disabled

Definition at line 8165 of file nrf52_bitfields.h.

◆ QDEC_DBFEN_DBFEN_Enabled

#define QDEC_DBFEN_DBFEN_Enabled   (1UL)

Debounce input filters enabled

Definition at line 8166 of file nrf52_bitfields.h.

◆ QDEC_DBFEN_DBFEN_Msk

#define QDEC_DBFEN_DBFEN_Msk   (0x1UL << QDEC_DBFEN_DBFEN_Pos)

Bit mask of DBFEN field.

Definition at line 8164 of file nrf52_bitfields.h.

◆ QDEC_DBFEN_DBFEN_Pos

#define QDEC_DBFEN_DBFEN_Pos   (0UL)

Position of DBFEN field.

Definition at line 8163 of file nrf52_bitfields.h.

◆ QDEC_ENABLE_ENABLE_Disabled

#define QDEC_ENABLE_ENABLE_Disabled   (0UL)

Disable

Definition at line 8053 of file nrf52_bitfields.h.

◆ QDEC_ENABLE_ENABLE_Enabled

#define QDEC_ENABLE_ENABLE_Enabled   (1UL)

Enable

Definition at line 8054 of file nrf52_bitfields.h.

◆ QDEC_ENABLE_ENABLE_Msk

#define QDEC_ENABLE_ENABLE_Msk   (0x1UL << QDEC_ENABLE_ENABLE_Pos)

Bit mask of ENABLE field.

Definition at line 8052 of file nrf52_bitfields.h.

◆ QDEC_ENABLE_ENABLE_Pos

#define QDEC_ENABLE_ENABLE_Pos   (0UL)

Position of ENABLE field.

Definition at line 8051 of file nrf52_bitfields.h.

◆ QDEC_INTENCLR_ACCOF_Clear

#define QDEC_INTENCLR_ACCOF_Clear   (1UL)

Disable

Definition at line 8031 of file nrf52_bitfields.h.

◆ QDEC_INTENCLR_ACCOF_Disabled

#define QDEC_INTENCLR_ACCOF_Disabled   (0UL)

Read: Disabled

Definition at line 8029 of file nrf52_bitfields.h.

◆ QDEC_INTENCLR_ACCOF_Enabled

#define QDEC_INTENCLR_ACCOF_Enabled   (1UL)

Read: Enabled

Definition at line 8030 of file nrf52_bitfields.h.

◆ QDEC_INTENCLR_ACCOF_Msk

#define QDEC_INTENCLR_ACCOF_Msk   (0x1UL << QDEC_INTENCLR_ACCOF_Pos)

Bit mask of ACCOF field.

Definition at line 8028 of file nrf52_bitfields.h.

◆ QDEC_INTENCLR_ACCOF_Pos

#define QDEC_INTENCLR_ACCOF_Pos   (2UL)

Position of ACCOF field.

Definition at line 8027 of file nrf52_bitfields.h.

◆ QDEC_INTENCLR_DBLRDY_Clear

#define QDEC_INTENCLR_DBLRDY_Clear   (1UL)

Disable

Definition at line 8024 of file nrf52_bitfields.h.

◆ QDEC_INTENCLR_DBLRDY_Disabled

#define QDEC_INTENCLR_DBLRDY_Disabled   (0UL)

Read: Disabled

Definition at line 8022 of file nrf52_bitfields.h.

◆ QDEC_INTENCLR_DBLRDY_Enabled

#define QDEC_INTENCLR_DBLRDY_Enabled   (1UL)

Read: Enabled

Definition at line 8023 of file nrf52_bitfields.h.

◆ QDEC_INTENCLR_DBLRDY_Msk

#define QDEC_INTENCLR_DBLRDY_Msk   (0x1UL << QDEC_INTENCLR_DBLRDY_Pos)

Bit mask of DBLRDY field.

Definition at line 8021 of file nrf52_bitfields.h.

◆ QDEC_INTENCLR_DBLRDY_Pos

#define QDEC_INTENCLR_DBLRDY_Pos   (3UL)

Position of DBLRDY field.

Definition at line 8020 of file nrf52_bitfields.h.

◆ QDEC_INTENCLR_REPORTRDY_Clear

#define QDEC_INTENCLR_REPORTRDY_Clear   (1UL)

Disable

Definition at line 8038 of file nrf52_bitfields.h.

◆ QDEC_INTENCLR_REPORTRDY_Disabled

#define QDEC_INTENCLR_REPORTRDY_Disabled   (0UL)

Read: Disabled

Definition at line 8036 of file nrf52_bitfields.h.

◆ QDEC_INTENCLR_REPORTRDY_Enabled

#define QDEC_INTENCLR_REPORTRDY_Enabled   (1UL)

Read: Enabled

Definition at line 8037 of file nrf52_bitfields.h.

◆ QDEC_INTENCLR_REPORTRDY_Msk

#define QDEC_INTENCLR_REPORTRDY_Msk   (0x1UL << QDEC_INTENCLR_REPORTRDY_Pos)

Bit mask of REPORTRDY field.

Definition at line 8035 of file nrf52_bitfields.h.

◆ QDEC_INTENCLR_REPORTRDY_Pos

#define QDEC_INTENCLR_REPORTRDY_Pos   (1UL)

Position of REPORTRDY field.

Definition at line 8034 of file nrf52_bitfields.h.

◆ QDEC_INTENCLR_SAMPLERDY_Clear

#define QDEC_INTENCLR_SAMPLERDY_Clear   (1UL)

Disable

Definition at line 8045 of file nrf52_bitfields.h.

◆ QDEC_INTENCLR_SAMPLERDY_Disabled

#define QDEC_INTENCLR_SAMPLERDY_Disabled   (0UL)

Read: Disabled

Definition at line 8043 of file nrf52_bitfields.h.

◆ QDEC_INTENCLR_SAMPLERDY_Enabled

#define QDEC_INTENCLR_SAMPLERDY_Enabled   (1UL)

Read: Enabled

Definition at line 8044 of file nrf52_bitfields.h.

◆ QDEC_INTENCLR_SAMPLERDY_Msk

#define QDEC_INTENCLR_SAMPLERDY_Msk   (0x1UL << QDEC_INTENCLR_SAMPLERDY_Pos)

Bit mask of SAMPLERDY field.

Definition at line 8042 of file nrf52_bitfields.h.

◆ QDEC_INTENCLR_SAMPLERDY_Pos

#define QDEC_INTENCLR_SAMPLERDY_Pos   (0UL)

Position of SAMPLERDY field.

Definition at line 8041 of file nrf52_bitfields.h.

◆ QDEC_INTENCLR_STOPPED_Clear

#define QDEC_INTENCLR_STOPPED_Clear   (1UL)

Disable

Definition at line 8017 of file nrf52_bitfields.h.

◆ QDEC_INTENCLR_STOPPED_Disabled

#define QDEC_INTENCLR_STOPPED_Disabled   (0UL)

Read: Disabled

Definition at line 8015 of file nrf52_bitfields.h.

◆ QDEC_INTENCLR_STOPPED_Enabled

#define QDEC_INTENCLR_STOPPED_Enabled   (1UL)

Read: Enabled

Definition at line 8016 of file nrf52_bitfields.h.

◆ QDEC_INTENCLR_STOPPED_Msk

#define QDEC_INTENCLR_STOPPED_Msk   (0x1UL << QDEC_INTENCLR_STOPPED_Pos)

Bit mask of STOPPED field.

Definition at line 8014 of file nrf52_bitfields.h.

◆ QDEC_INTENCLR_STOPPED_Pos

#define QDEC_INTENCLR_STOPPED_Pos   (4UL)

Position of STOPPED field.

Definition at line 8013 of file nrf52_bitfields.h.

◆ QDEC_INTENSET_ACCOF_Disabled

#define QDEC_INTENSET_ACCOF_Disabled   (0UL)

Read: Disabled

Definition at line 7991 of file nrf52_bitfields.h.

◆ QDEC_INTENSET_ACCOF_Enabled

#define QDEC_INTENSET_ACCOF_Enabled   (1UL)

Read: Enabled

Definition at line 7992 of file nrf52_bitfields.h.

◆ QDEC_INTENSET_ACCOF_Msk

#define QDEC_INTENSET_ACCOF_Msk   (0x1UL << QDEC_INTENSET_ACCOF_Pos)

Bit mask of ACCOF field.

Definition at line 7990 of file nrf52_bitfields.h.

◆ QDEC_INTENSET_ACCOF_Pos

#define QDEC_INTENSET_ACCOF_Pos   (2UL)

Position of ACCOF field.

Definition at line 7989 of file nrf52_bitfields.h.

◆ QDEC_INTENSET_ACCOF_Set

#define QDEC_INTENSET_ACCOF_Set   (1UL)

Enable

Definition at line 7993 of file nrf52_bitfields.h.

◆ QDEC_INTENSET_DBLRDY_Disabled

#define QDEC_INTENSET_DBLRDY_Disabled   (0UL)

Read: Disabled

Definition at line 7984 of file nrf52_bitfields.h.

◆ QDEC_INTENSET_DBLRDY_Enabled

#define QDEC_INTENSET_DBLRDY_Enabled   (1UL)

Read: Enabled

Definition at line 7985 of file nrf52_bitfields.h.

◆ QDEC_INTENSET_DBLRDY_Msk

#define QDEC_INTENSET_DBLRDY_Msk   (0x1UL << QDEC_INTENSET_DBLRDY_Pos)

Bit mask of DBLRDY field.

Definition at line 7983 of file nrf52_bitfields.h.

◆ QDEC_INTENSET_DBLRDY_Pos

#define QDEC_INTENSET_DBLRDY_Pos   (3UL)

Position of DBLRDY field.

Definition at line 7982 of file nrf52_bitfields.h.

◆ QDEC_INTENSET_DBLRDY_Set

#define QDEC_INTENSET_DBLRDY_Set   (1UL)

Enable

Definition at line 7986 of file nrf52_bitfields.h.

◆ QDEC_INTENSET_REPORTRDY_Disabled

#define QDEC_INTENSET_REPORTRDY_Disabled   (0UL)

Read: Disabled

Definition at line 7998 of file nrf52_bitfields.h.

◆ QDEC_INTENSET_REPORTRDY_Enabled

#define QDEC_INTENSET_REPORTRDY_Enabled   (1UL)

Read: Enabled

Definition at line 7999 of file nrf52_bitfields.h.

◆ QDEC_INTENSET_REPORTRDY_Msk

#define QDEC_INTENSET_REPORTRDY_Msk   (0x1UL << QDEC_INTENSET_REPORTRDY_Pos)

Bit mask of REPORTRDY field.

Definition at line 7997 of file nrf52_bitfields.h.

◆ QDEC_INTENSET_REPORTRDY_Pos

#define QDEC_INTENSET_REPORTRDY_Pos   (1UL)

Position of REPORTRDY field.

Definition at line 7996 of file nrf52_bitfields.h.

◆ QDEC_INTENSET_REPORTRDY_Set

#define QDEC_INTENSET_REPORTRDY_Set   (1UL)

Enable

Definition at line 8000 of file nrf52_bitfields.h.

◆ QDEC_INTENSET_SAMPLERDY_Disabled

#define QDEC_INTENSET_SAMPLERDY_Disabled   (0UL)

Read: Disabled

Definition at line 8005 of file nrf52_bitfields.h.

◆ QDEC_INTENSET_SAMPLERDY_Enabled

#define QDEC_INTENSET_SAMPLERDY_Enabled   (1UL)

Read: Enabled

Definition at line 8006 of file nrf52_bitfields.h.

◆ QDEC_INTENSET_SAMPLERDY_Msk

#define QDEC_INTENSET_SAMPLERDY_Msk   (0x1UL << QDEC_INTENSET_SAMPLERDY_Pos)

Bit mask of SAMPLERDY field.

Definition at line 8004 of file nrf52_bitfields.h.

◆ QDEC_INTENSET_SAMPLERDY_Pos

#define QDEC_INTENSET_SAMPLERDY_Pos   (0UL)

Position of SAMPLERDY field.

Definition at line 8003 of file nrf52_bitfields.h.

◆ QDEC_INTENSET_SAMPLERDY_Set

#define QDEC_INTENSET_SAMPLERDY_Set   (1UL)

Enable

Definition at line 8007 of file nrf52_bitfields.h.

◆ QDEC_INTENSET_STOPPED_Disabled

#define QDEC_INTENSET_STOPPED_Disabled   (0UL)

Read: Disabled

Definition at line 7977 of file nrf52_bitfields.h.

◆ QDEC_INTENSET_STOPPED_Enabled

#define QDEC_INTENSET_STOPPED_Enabled   (1UL)

Read: Enabled

Definition at line 7978 of file nrf52_bitfields.h.

◆ QDEC_INTENSET_STOPPED_Msk

#define QDEC_INTENSET_STOPPED_Msk   (0x1UL << QDEC_INTENSET_STOPPED_Pos)

Bit mask of STOPPED field.

Definition at line 7976 of file nrf52_bitfields.h.

◆ QDEC_INTENSET_STOPPED_Pos

#define QDEC_INTENSET_STOPPED_Pos   (4UL)

Position of STOPPED field.

Definition at line 7975 of file nrf52_bitfields.h.

◆ QDEC_INTENSET_STOPPED_Set

#define QDEC_INTENSET_STOPPED_Set   (1UL)

Enable

Definition at line 7979 of file nrf52_bitfields.h.

◆ QDEC_LEDPOL_LEDPOL_ActiveHigh

#define QDEC_LEDPOL_LEDPOL_ActiveHigh   (1UL)

Led active on output pin high

Definition at line 8063 of file nrf52_bitfields.h.

◆ QDEC_LEDPOL_LEDPOL_ActiveLow

#define QDEC_LEDPOL_LEDPOL_ActiveLow   (0UL)

Led active on output pin low

Definition at line 8062 of file nrf52_bitfields.h.

◆ QDEC_LEDPOL_LEDPOL_Msk

#define QDEC_LEDPOL_LEDPOL_Msk   (0x1UL << QDEC_LEDPOL_LEDPOL_Pos)

Bit mask of LEDPOL field.

Definition at line 8061 of file nrf52_bitfields.h.

◆ QDEC_LEDPOL_LEDPOL_Pos

#define QDEC_LEDPOL_LEDPOL_Pos   (0UL)

Position of LEDPOL field.

Definition at line 8060 of file nrf52_bitfields.h.

◆ QDEC_LEDPRE_LEDPRE_Msk

#define QDEC_LEDPRE_LEDPRE_Msk   (0x1FFUL << QDEC_LEDPRE_LEDPRE_Pos)

Bit mask of LEDPRE field.

Definition at line 8173 of file nrf52_bitfields.h.

◆ QDEC_LEDPRE_LEDPRE_Pos

#define QDEC_LEDPRE_LEDPRE_Pos   (0UL)

Position of LEDPRE field.

Definition at line 8172 of file nrf52_bitfields.h.

◆ QDEC_PSEL_A_CONNECT_Connected

#define QDEC_PSEL_A_CONNECT_Connected   (0UL)

Connect

Definition at line 8139 of file nrf52_bitfields.h.

◆ QDEC_PSEL_A_CONNECT_Disconnected

#define QDEC_PSEL_A_CONNECT_Disconnected   (1UL)

Disconnect

Definition at line 8140 of file nrf52_bitfields.h.

◆ QDEC_PSEL_A_CONNECT_Msk

#define QDEC_PSEL_A_CONNECT_Msk   (0x1UL << QDEC_PSEL_A_CONNECT_Pos)

Bit mask of CONNECT field.

Definition at line 8138 of file nrf52_bitfields.h.

◆ QDEC_PSEL_A_CONNECT_Pos

#define QDEC_PSEL_A_CONNECT_Pos   (31UL)

Position of CONNECT field.

Definition at line 8137 of file nrf52_bitfields.h.

◆ QDEC_PSEL_A_PIN_Msk

#define QDEC_PSEL_A_PIN_Msk   (0x1FUL << QDEC_PSEL_A_PIN_Pos)

Bit mask of PIN field.

Definition at line 8144 of file nrf52_bitfields.h.

◆ QDEC_PSEL_A_PIN_Pos

#define QDEC_PSEL_A_PIN_Pos   (0UL)

Position of PIN field.

Definition at line 8143 of file nrf52_bitfields.h.

◆ QDEC_PSEL_B_CONNECT_Connected

#define QDEC_PSEL_B_CONNECT_Connected   (0UL)

Connect

Definition at line 8152 of file nrf52_bitfields.h.

◆ QDEC_PSEL_B_CONNECT_Disconnected

#define QDEC_PSEL_B_CONNECT_Disconnected   (1UL)

Disconnect

Definition at line 8153 of file nrf52_bitfields.h.

◆ QDEC_PSEL_B_CONNECT_Msk

#define QDEC_PSEL_B_CONNECT_Msk   (0x1UL << QDEC_PSEL_B_CONNECT_Pos)

Bit mask of CONNECT field.

Definition at line 8151 of file nrf52_bitfields.h.

◆ QDEC_PSEL_B_CONNECT_Pos

#define QDEC_PSEL_B_CONNECT_Pos   (31UL)

Position of CONNECT field.

Definition at line 8150 of file nrf52_bitfields.h.

◆ QDEC_PSEL_B_PIN_Msk

#define QDEC_PSEL_B_PIN_Msk   (0x1FUL << QDEC_PSEL_B_PIN_Pos)

Bit mask of PIN field.

Definition at line 8157 of file nrf52_bitfields.h.

◆ QDEC_PSEL_B_PIN_Pos

#define QDEC_PSEL_B_PIN_Pos   (0UL)

Position of PIN field.

Definition at line 8156 of file nrf52_bitfields.h.

◆ QDEC_PSEL_LED_CONNECT_Connected

#define QDEC_PSEL_LED_CONNECT_Connected   (0UL)

Connect

Definition at line 8126 of file nrf52_bitfields.h.

◆ QDEC_PSEL_LED_CONNECT_Disconnected

#define QDEC_PSEL_LED_CONNECT_Disconnected   (1UL)

Disconnect

Definition at line 8127 of file nrf52_bitfields.h.

◆ QDEC_PSEL_LED_CONNECT_Msk

#define QDEC_PSEL_LED_CONNECT_Msk   (0x1UL << QDEC_PSEL_LED_CONNECT_Pos)

Bit mask of CONNECT field.

Definition at line 8125 of file nrf52_bitfields.h.

◆ QDEC_PSEL_LED_CONNECT_Pos

#define QDEC_PSEL_LED_CONNECT_Pos   (31UL)

Position of CONNECT field.

Definition at line 8124 of file nrf52_bitfields.h.

◆ QDEC_PSEL_LED_PIN_Msk

#define QDEC_PSEL_LED_PIN_Msk   (0x1FUL << QDEC_PSEL_LED_PIN_Pos)

Bit mask of PIN field.

Definition at line 8131 of file nrf52_bitfields.h.

◆ QDEC_PSEL_LED_PIN_Pos

#define QDEC_PSEL_LED_PIN_Pos   (0UL)

Position of PIN field.

Definition at line 8130 of file nrf52_bitfields.h.

◆ QDEC_REPORTPER_REPORTPER_10Smpl

#define QDEC_REPORTPER_REPORTPER_10Smpl   (0UL)

10 samples / report

Definition at line 8096 of file nrf52_bitfields.h.

◆ QDEC_REPORTPER_REPORTPER_120Smpl

#define QDEC_REPORTPER_REPORTPER_120Smpl   (3UL)

120 samples / report

Definition at line 8099 of file nrf52_bitfields.h.

◆ QDEC_REPORTPER_REPORTPER_160Smpl

#define QDEC_REPORTPER_REPORTPER_160Smpl   (4UL)

160 samples / report

Definition at line 8100 of file nrf52_bitfields.h.

◆ QDEC_REPORTPER_REPORTPER_1Smpl

#define QDEC_REPORTPER_REPORTPER_1Smpl   (8UL)

1 sample / report

Definition at line 8104 of file nrf52_bitfields.h.

◆ QDEC_REPORTPER_REPORTPER_200Smpl

#define QDEC_REPORTPER_REPORTPER_200Smpl   (5UL)

200 samples / report

Definition at line 8101 of file nrf52_bitfields.h.

◆ QDEC_REPORTPER_REPORTPER_240Smpl

#define QDEC_REPORTPER_REPORTPER_240Smpl   (6UL)

240 samples / report

Definition at line 8102 of file nrf52_bitfields.h.

◆ QDEC_REPORTPER_REPORTPER_280Smpl

#define QDEC_REPORTPER_REPORTPER_280Smpl   (7UL)

280 samples / report

Definition at line 8103 of file nrf52_bitfields.h.

◆ QDEC_REPORTPER_REPORTPER_40Smpl

#define QDEC_REPORTPER_REPORTPER_40Smpl   (1UL)

40 samples / report

Definition at line 8097 of file nrf52_bitfields.h.

◆ QDEC_REPORTPER_REPORTPER_80Smpl

#define QDEC_REPORTPER_REPORTPER_80Smpl   (2UL)

80 samples / report

Definition at line 8098 of file nrf52_bitfields.h.

◆ QDEC_REPORTPER_REPORTPER_Msk

#define QDEC_REPORTPER_REPORTPER_Msk   (0xFUL << QDEC_REPORTPER_REPORTPER_Pos)

Bit mask of REPORTPER field.

Definition at line 8095 of file nrf52_bitfields.h.

◆ QDEC_REPORTPER_REPORTPER_Pos

#define QDEC_REPORTPER_REPORTPER_Pos   (0UL)

Position of REPORTPER field.

Definition at line 8094 of file nrf52_bitfields.h.

◆ QDEC_SAMPLE_SAMPLE_Msk

#define QDEC_SAMPLE_SAMPLE_Msk   (0xFFFFFFFFUL << QDEC_SAMPLE_SAMPLE_Pos)

Bit mask of SAMPLE field.

Definition at line 8088 of file nrf52_bitfields.h.

◆ QDEC_SAMPLE_SAMPLE_Pos

#define QDEC_SAMPLE_SAMPLE_Pos   (0UL)

Position of SAMPLE field.

Definition at line 8087 of file nrf52_bitfields.h.

◆ QDEC_SAMPLEPER_SAMPLEPER_1024us

#define QDEC_SAMPLEPER_SAMPLEPER_1024us   (3UL)

1024 us

Definition at line 8074 of file nrf52_bitfields.h.

◆ QDEC_SAMPLEPER_SAMPLEPER_128us

#define QDEC_SAMPLEPER_SAMPLEPER_128us   (0UL)

128 us

Definition at line 8071 of file nrf52_bitfields.h.

◆ QDEC_SAMPLEPER_SAMPLEPER_131ms

#define QDEC_SAMPLEPER_SAMPLEPER_131ms   (10UL)

131072 us

Definition at line 8081 of file nrf52_bitfields.h.

◆ QDEC_SAMPLEPER_SAMPLEPER_16384us

#define QDEC_SAMPLEPER_SAMPLEPER_16384us   (7UL)

16384 us

Definition at line 8078 of file nrf52_bitfields.h.

◆ QDEC_SAMPLEPER_SAMPLEPER_2048us

#define QDEC_SAMPLEPER_SAMPLEPER_2048us   (4UL)

2048 us

Definition at line 8075 of file nrf52_bitfields.h.

◆ QDEC_SAMPLEPER_SAMPLEPER_256us

#define QDEC_SAMPLEPER_SAMPLEPER_256us   (1UL)

256 us

Definition at line 8072 of file nrf52_bitfields.h.

◆ QDEC_SAMPLEPER_SAMPLEPER_32ms

#define QDEC_SAMPLEPER_SAMPLEPER_32ms   (8UL)

32768 us

Definition at line 8079 of file nrf52_bitfields.h.

◆ QDEC_SAMPLEPER_SAMPLEPER_4096us

#define QDEC_SAMPLEPER_SAMPLEPER_4096us   (5UL)

4096 us

Definition at line 8076 of file nrf52_bitfields.h.

◆ QDEC_SAMPLEPER_SAMPLEPER_512us

#define QDEC_SAMPLEPER_SAMPLEPER_512us   (2UL)

512 us

Definition at line 8073 of file nrf52_bitfields.h.

◆ QDEC_SAMPLEPER_SAMPLEPER_65ms

#define QDEC_SAMPLEPER_SAMPLEPER_65ms   (9UL)

65536 us

Definition at line 8080 of file nrf52_bitfields.h.

◆ QDEC_SAMPLEPER_SAMPLEPER_8192us

#define QDEC_SAMPLEPER_SAMPLEPER_8192us   (6UL)

8192 us

Definition at line 8077 of file nrf52_bitfields.h.

◆ QDEC_SAMPLEPER_SAMPLEPER_Msk

#define QDEC_SAMPLEPER_SAMPLEPER_Msk   (0xFUL << QDEC_SAMPLEPER_SAMPLEPER_Pos)

Bit mask of SAMPLEPER field.

Definition at line 8070 of file nrf52_bitfields.h.

◆ QDEC_SAMPLEPER_SAMPLEPER_Pos

#define QDEC_SAMPLEPER_SAMPLEPER_Pos   (0UL)

Position of SAMPLEPER field.

Definition at line 8069 of file nrf52_bitfields.h.

◆ QDEC_SHORTS_DBLRDY_RDCLRDBL_Disabled

#define QDEC_SHORTS_DBLRDY_RDCLRDBL_Disabled   (0UL)

Disable shortcut

Definition at line 7944 of file nrf52_bitfields.h.

◆ QDEC_SHORTS_DBLRDY_RDCLRDBL_Enabled

#define QDEC_SHORTS_DBLRDY_RDCLRDBL_Enabled   (1UL)

Enable shortcut

Definition at line 7945 of file nrf52_bitfields.h.

◆ QDEC_SHORTS_DBLRDY_RDCLRDBL_Msk

#define QDEC_SHORTS_DBLRDY_RDCLRDBL_Msk   (0x1UL << QDEC_SHORTS_DBLRDY_RDCLRDBL_Pos)

Bit mask of DBLRDY_RDCLRDBL field.

Definition at line 7943 of file nrf52_bitfields.h.

◆ QDEC_SHORTS_DBLRDY_RDCLRDBL_Pos

#define QDEC_SHORTS_DBLRDY_RDCLRDBL_Pos   (4UL)

Position of DBLRDY_RDCLRDBL field.

Definition at line 7942 of file nrf52_bitfields.h.

◆ QDEC_SHORTS_DBLRDY_STOP_Disabled

#define QDEC_SHORTS_DBLRDY_STOP_Disabled   (0UL)

Disable shortcut

Definition at line 7938 of file nrf52_bitfields.h.

◆ QDEC_SHORTS_DBLRDY_STOP_Enabled

#define QDEC_SHORTS_DBLRDY_STOP_Enabled   (1UL)

Enable shortcut

Definition at line 7939 of file nrf52_bitfields.h.

◆ QDEC_SHORTS_DBLRDY_STOP_Msk

#define QDEC_SHORTS_DBLRDY_STOP_Msk   (0x1UL << QDEC_SHORTS_DBLRDY_STOP_Pos)

Bit mask of DBLRDY_STOP field.

Definition at line 7937 of file nrf52_bitfields.h.

◆ QDEC_SHORTS_DBLRDY_STOP_Pos

#define QDEC_SHORTS_DBLRDY_STOP_Pos   (5UL)

Position of DBLRDY_STOP field.

Definition at line 7936 of file nrf52_bitfields.h.

◆ QDEC_SHORTS_REPORTRDY_RDCLRACC_Disabled

#define QDEC_SHORTS_REPORTRDY_RDCLRACC_Disabled   (0UL)

Disable shortcut

Definition at line 7956 of file nrf52_bitfields.h.

◆ QDEC_SHORTS_REPORTRDY_RDCLRACC_Enabled

#define QDEC_SHORTS_REPORTRDY_RDCLRACC_Enabled   (1UL)

Enable shortcut

Definition at line 7957 of file nrf52_bitfields.h.

◆ QDEC_SHORTS_REPORTRDY_RDCLRACC_Msk

#define QDEC_SHORTS_REPORTRDY_RDCLRACC_Msk   (0x1UL << QDEC_SHORTS_REPORTRDY_RDCLRACC_Pos)

Bit mask of REPORTRDY_RDCLRACC field.

Definition at line 7955 of file nrf52_bitfields.h.

◆ QDEC_SHORTS_REPORTRDY_RDCLRACC_Pos

#define QDEC_SHORTS_REPORTRDY_RDCLRACC_Pos   (2UL)

Position of REPORTRDY_RDCLRACC field.

Definition at line 7954 of file nrf52_bitfields.h.

◆ QDEC_SHORTS_REPORTRDY_READCLRACC_Disabled

#define QDEC_SHORTS_REPORTRDY_READCLRACC_Disabled   (0UL)

Disable shortcut

Definition at line 7968 of file nrf52_bitfields.h.

◆ QDEC_SHORTS_REPORTRDY_READCLRACC_Enabled

#define QDEC_SHORTS_REPORTRDY_READCLRACC_Enabled   (1UL)

Enable shortcut

Definition at line 7969 of file nrf52_bitfields.h.

◆ QDEC_SHORTS_REPORTRDY_READCLRACC_Msk

#define QDEC_SHORTS_REPORTRDY_READCLRACC_Msk   (0x1UL << QDEC_SHORTS_REPORTRDY_READCLRACC_Pos)

Bit mask of REPORTRDY_READCLRACC field.

Definition at line 7967 of file nrf52_bitfields.h.

◆ QDEC_SHORTS_REPORTRDY_READCLRACC_Pos

#define QDEC_SHORTS_REPORTRDY_READCLRACC_Pos   (0UL)

Position of REPORTRDY_READCLRACC field.

Definition at line 7966 of file nrf52_bitfields.h.

◆ QDEC_SHORTS_REPORTRDY_STOP_Disabled

#define QDEC_SHORTS_REPORTRDY_STOP_Disabled   (0UL)

Disable shortcut

Definition at line 7950 of file nrf52_bitfields.h.

◆ QDEC_SHORTS_REPORTRDY_STOP_Enabled

#define QDEC_SHORTS_REPORTRDY_STOP_Enabled   (1UL)

Enable shortcut

Definition at line 7951 of file nrf52_bitfields.h.

◆ QDEC_SHORTS_REPORTRDY_STOP_Msk

#define QDEC_SHORTS_REPORTRDY_STOP_Msk   (0x1UL << QDEC_SHORTS_REPORTRDY_STOP_Pos)

Bit mask of REPORTRDY_STOP field.

Definition at line 7949 of file nrf52_bitfields.h.

◆ QDEC_SHORTS_REPORTRDY_STOP_Pos

#define QDEC_SHORTS_REPORTRDY_STOP_Pos   (3UL)

Position of REPORTRDY_STOP field.

Definition at line 7948 of file nrf52_bitfields.h.

◆ QDEC_SHORTS_SAMPLERDY_READCLRACC_Disabled

#define QDEC_SHORTS_SAMPLERDY_READCLRACC_Disabled   (0UL)

Disable shortcut

Definition at line 7932 of file nrf52_bitfields.h.

◆ QDEC_SHORTS_SAMPLERDY_READCLRACC_Enabled

#define QDEC_SHORTS_SAMPLERDY_READCLRACC_Enabled   (1UL)

Enable shortcut

Definition at line 7933 of file nrf52_bitfields.h.

◆ QDEC_SHORTS_SAMPLERDY_READCLRACC_Msk

#define QDEC_SHORTS_SAMPLERDY_READCLRACC_Msk   (0x1UL << QDEC_SHORTS_SAMPLERDY_READCLRACC_Pos)

Bit mask of SAMPLERDY_READCLRACC field.

Definition at line 7931 of file nrf52_bitfields.h.

◆ QDEC_SHORTS_SAMPLERDY_READCLRACC_Pos

#define QDEC_SHORTS_SAMPLERDY_READCLRACC_Pos   (6UL)

Position of SAMPLERDY_READCLRACC field.

Definition at line 7930 of file nrf52_bitfields.h.

◆ QDEC_SHORTS_SAMPLERDY_STOP_Disabled

#define QDEC_SHORTS_SAMPLERDY_STOP_Disabled   (0UL)

Disable shortcut

Definition at line 7962 of file nrf52_bitfields.h.

◆ QDEC_SHORTS_SAMPLERDY_STOP_Enabled

#define QDEC_SHORTS_SAMPLERDY_STOP_Enabled   (1UL)

Enable shortcut

Definition at line 7963 of file nrf52_bitfields.h.

◆ QDEC_SHORTS_SAMPLERDY_STOP_Msk

#define QDEC_SHORTS_SAMPLERDY_STOP_Msk   (0x1UL << QDEC_SHORTS_SAMPLERDY_STOP_Pos)

Bit mask of SAMPLERDY_STOP field.

Definition at line 7961 of file nrf52_bitfields.h.

◆ QDEC_SHORTS_SAMPLERDY_STOP_Pos

#define QDEC_SHORTS_SAMPLERDY_STOP_Pos   (1UL)

Position of SAMPLERDY_STOP field.

Definition at line 7960 of file nrf52_bitfields.h.

◆ RADIO_BASE0_BASE0_Msk

#define RADIO_BASE0_BASE0_Msk   (0xFFFFFFFFUL << RADIO_BASE0_BASE0_Pos)

Bit mask of BASE0 field.

Definition at line 8535 of file nrf52_bitfields.h.

◆ RADIO_BASE0_BASE0_Pos

#define RADIO_BASE0_BASE0_Pos   (0UL)

Position of BASE0 field.

Definition at line 8534 of file nrf52_bitfields.h.

◆ RADIO_BASE1_BASE1_Msk

#define RADIO_BASE1_BASE1_Msk   (0xFFFFFFFFUL << RADIO_BASE1_BASE1_Pos)

Bit mask of BASE1 field.

Definition at line 8542 of file nrf52_bitfields.h.

◆ RADIO_BASE1_BASE1_Pos

#define RADIO_BASE1_BASE1_Pos   (0UL)

Position of BASE1 field.

Definition at line 8541 of file nrf52_bitfields.h.

◆ RADIO_BCC_BCC_Msk

#define RADIO_BCC_BCC_Msk   (0xFFFFFFFFUL << RADIO_BCC_BCC_Pos)

Bit mask of BCC field.

Definition at line 8713 of file nrf52_bitfields.h.

◆ RADIO_BCC_BCC_Pos

#define RADIO_BCC_BCC_Pos   (0UL)

Position of BCC field.

Definition at line 8712 of file nrf52_bitfields.h.

◆ RADIO_CRCCNF_LEN_Disabled

#define RADIO_CRCCNF_LEN_Disabled   (0UL)

CRC length is zero and CRC calculation is disabled

Definition at line 8652 of file nrf52_bitfields.h.

◆ RADIO_CRCCNF_LEN_Msk

#define RADIO_CRCCNF_LEN_Msk   (0x3UL << RADIO_CRCCNF_LEN_Pos)

Bit mask of LEN field.

Definition at line 8651 of file nrf52_bitfields.h.

◆ RADIO_CRCCNF_LEN_One

#define RADIO_CRCCNF_LEN_One   (1UL)

CRC length is one byte and CRC calculation is enabled

Definition at line 8653 of file nrf52_bitfields.h.

◆ RADIO_CRCCNF_LEN_Pos

#define RADIO_CRCCNF_LEN_Pos   (0UL)

Position of LEN field.

Definition at line 8650 of file nrf52_bitfields.h.

◆ RADIO_CRCCNF_LEN_Three

#define RADIO_CRCCNF_LEN_Three   (3UL)

CRC length is three bytes and CRC calculation is enabled

Definition at line 8655 of file nrf52_bitfields.h.

◆ RADIO_CRCCNF_LEN_Two

#define RADIO_CRCCNF_LEN_Two   (2UL)

CRC length is two bytes and CRC calculation is enabled

Definition at line 8654 of file nrf52_bitfields.h.

◆ RADIO_CRCCNF_SKIPADDR_Include

#define RADIO_CRCCNF_SKIPADDR_Include   (0UL)

CRC calculation includes address field

Definition at line 8646 of file nrf52_bitfields.h.

◆ RADIO_CRCCNF_SKIPADDR_Msk

#define RADIO_CRCCNF_SKIPADDR_Msk   (0x1UL << RADIO_CRCCNF_SKIPADDR_Pos)

Bit mask of SKIPADDR field.

Definition at line 8645 of file nrf52_bitfields.h.

◆ RADIO_CRCCNF_SKIPADDR_Pos

#define RADIO_CRCCNF_SKIPADDR_Pos   (8UL)

Position of SKIPADDR field.

Definition at line 8644 of file nrf52_bitfields.h.

◆ RADIO_CRCCNF_SKIPADDR_Skip

#define RADIO_CRCCNF_SKIPADDR_Skip   (1UL)

CRC calculation does not include address field. The CRC calculation will start at the first byte after the address.

Definition at line 8647 of file nrf52_bitfields.h.

◆ RADIO_CRCINIT_CRCINIT_Msk

#define RADIO_CRCINIT_CRCINIT_Msk   (0xFFFFFFUL << RADIO_CRCINIT_CRCINIT_Pos)

Bit mask of CRCINIT field.

Definition at line 8669 of file nrf52_bitfields.h.

◆ RADIO_CRCINIT_CRCINIT_Pos

#define RADIO_CRCINIT_CRCINIT_Pos   (0UL)

Position of CRCINIT field.

Definition at line 8668 of file nrf52_bitfields.h.

◆ RADIO_CRCPOLY_CRCPOLY_Msk

#define RADIO_CRCPOLY_CRCPOLY_Msk   (0xFFFFFFUL << RADIO_CRCPOLY_CRCPOLY_Pos)

Bit mask of CRCPOLY field.

Definition at line 8662 of file nrf52_bitfields.h.

◆ RADIO_CRCPOLY_CRCPOLY_Pos

#define RADIO_CRCPOLY_CRCPOLY_Pos   (0UL)

Position of CRCPOLY field.

Definition at line 8661 of file nrf52_bitfields.h.

◆ RADIO_CRCSTATUS_CRCSTATUS_CRCError

#define RADIO_CRCSTATUS_CRCSTATUS_CRCError   (0UL)

Packet received with CRC error

Definition at line 8410 of file nrf52_bitfields.h.

◆ RADIO_CRCSTATUS_CRCSTATUS_CRCOk

#define RADIO_CRCSTATUS_CRCSTATUS_CRCOk   (1UL)

Packet received with CRC ok

Definition at line 8411 of file nrf52_bitfields.h.

◆ RADIO_CRCSTATUS_CRCSTATUS_Msk

#define RADIO_CRCSTATUS_CRCSTATUS_Msk   (0x1UL << RADIO_CRCSTATUS_CRCSTATUS_Pos)

Bit mask of CRCSTATUS field.

Definition at line 8409 of file nrf52_bitfields.h.

◆ RADIO_CRCSTATUS_CRCSTATUS_Pos

#define RADIO_CRCSTATUS_CRCSTATUS_Pos   (0UL)

Position of CRCSTATUS field.

Definition at line 8408 of file nrf52_bitfields.h.

◆ RADIO_DAB_DAB_Msk

#define RADIO_DAB_DAB_Msk   (0xFFFFFFFFUL << RADIO_DAB_DAB_Pos)

Bit mask of DAB field.

Definition at line 8720 of file nrf52_bitfields.h.

◆ RADIO_DAB_DAB_Pos

#define RADIO_DAB_DAB_Pos   (0UL)

Position of DAB field.

Definition at line 8719 of file nrf52_bitfields.h.

◆ RADIO_DACNF_ENA0_Disabled

#define RADIO_DACNF_ENA0_Disabled   (0UL)

Disabled

Definition at line 8809 of file nrf52_bitfields.h.

◆ RADIO_DACNF_ENA0_Enabled

#define RADIO_DACNF_ENA0_Enabled   (1UL)

Enabled

Definition at line 8810 of file nrf52_bitfields.h.

◆ RADIO_DACNF_ENA0_Msk

#define RADIO_DACNF_ENA0_Msk   (0x1UL << RADIO_DACNF_ENA0_Pos)

Bit mask of ENA0 field.

Definition at line 8808 of file nrf52_bitfields.h.

◆ RADIO_DACNF_ENA0_Pos

#define RADIO_DACNF_ENA0_Pos   (0UL)

Position of ENA0 field.

Definition at line 8807 of file nrf52_bitfields.h.

◆ RADIO_DACNF_ENA1_Disabled

#define RADIO_DACNF_ENA1_Disabled   (0UL)

Disabled

Definition at line 8803 of file nrf52_bitfields.h.

◆ RADIO_DACNF_ENA1_Enabled

#define RADIO_DACNF_ENA1_Enabled   (1UL)

Enabled

Definition at line 8804 of file nrf52_bitfields.h.

◆ RADIO_DACNF_ENA1_Msk

#define RADIO_DACNF_ENA1_Msk   (0x1UL << RADIO_DACNF_ENA1_Pos)

Bit mask of ENA1 field.

Definition at line 8802 of file nrf52_bitfields.h.

◆ RADIO_DACNF_ENA1_Pos

#define RADIO_DACNF_ENA1_Pos   (1UL)

Position of ENA1 field.

Definition at line 8801 of file nrf52_bitfields.h.

◆ RADIO_DACNF_ENA2_Disabled

#define RADIO_DACNF_ENA2_Disabled   (0UL)

Disabled

Definition at line 8797 of file nrf52_bitfields.h.

◆ RADIO_DACNF_ENA2_Enabled

#define RADIO_DACNF_ENA2_Enabled   (1UL)

Enabled

Definition at line 8798 of file nrf52_bitfields.h.

◆ RADIO_DACNF_ENA2_Msk

#define RADIO_DACNF_ENA2_Msk   (0x1UL << RADIO_DACNF_ENA2_Pos)

Bit mask of ENA2 field.

Definition at line 8796 of file nrf52_bitfields.h.

◆ RADIO_DACNF_ENA2_Pos

#define RADIO_DACNF_ENA2_Pos   (2UL)

Position of ENA2 field.

Definition at line 8795 of file nrf52_bitfields.h.

◆ RADIO_DACNF_ENA3_Disabled

#define RADIO_DACNF_ENA3_Disabled   (0UL)

Disabled

Definition at line 8791 of file nrf52_bitfields.h.

◆ RADIO_DACNF_ENA3_Enabled

#define RADIO_DACNF_ENA3_Enabled   (1UL)

Enabled

Definition at line 8792 of file nrf52_bitfields.h.

◆ RADIO_DACNF_ENA3_Msk

#define RADIO_DACNF_ENA3_Msk   (0x1UL << RADIO_DACNF_ENA3_Pos)

Bit mask of ENA3 field.

Definition at line 8790 of file nrf52_bitfields.h.

◆ RADIO_DACNF_ENA3_Pos

#define RADIO_DACNF_ENA3_Pos   (3UL)

Position of ENA3 field.

Definition at line 8789 of file nrf52_bitfields.h.

◆ RADIO_DACNF_ENA4_Disabled

#define RADIO_DACNF_ENA4_Disabled   (0UL)

Disabled

Definition at line 8785 of file nrf52_bitfields.h.

◆ RADIO_DACNF_ENA4_Enabled

#define RADIO_DACNF_ENA4_Enabled   (1UL)

Enabled

Definition at line 8786 of file nrf52_bitfields.h.

◆ RADIO_DACNF_ENA4_Msk

#define RADIO_DACNF_ENA4_Msk   (0x1UL << RADIO_DACNF_ENA4_Pos)

Bit mask of ENA4 field.

Definition at line 8784 of file nrf52_bitfields.h.

◆ RADIO_DACNF_ENA4_Pos

#define RADIO_DACNF_ENA4_Pos   (4UL)

Position of ENA4 field.

Definition at line 8783 of file nrf52_bitfields.h.

◆ RADIO_DACNF_ENA5_Disabled

#define RADIO_DACNF_ENA5_Disabled   (0UL)

Disabled

Definition at line 8779 of file nrf52_bitfields.h.

◆ RADIO_DACNF_ENA5_Enabled

#define RADIO_DACNF_ENA5_Enabled   (1UL)

Enabled

Definition at line 8780 of file nrf52_bitfields.h.

◆ RADIO_DACNF_ENA5_Msk

#define RADIO_DACNF_ENA5_Msk   (0x1UL << RADIO_DACNF_ENA5_Pos)

Bit mask of ENA5 field.

Definition at line 8778 of file nrf52_bitfields.h.

◆ RADIO_DACNF_ENA5_Pos

#define RADIO_DACNF_ENA5_Pos   (5UL)

Position of ENA5 field.

Definition at line 8777 of file nrf52_bitfields.h.

◆ RADIO_DACNF_ENA6_Disabled

#define RADIO_DACNF_ENA6_Disabled   (0UL)

Disabled

Definition at line 8773 of file nrf52_bitfields.h.

◆ RADIO_DACNF_ENA6_Enabled

#define RADIO_DACNF_ENA6_Enabled   (1UL)

Enabled

Definition at line 8774 of file nrf52_bitfields.h.

◆ RADIO_DACNF_ENA6_Msk

#define RADIO_DACNF_ENA6_Msk   (0x1UL << RADIO_DACNF_ENA6_Pos)

Bit mask of ENA6 field.

Definition at line 8772 of file nrf52_bitfields.h.

◆ RADIO_DACNF_ENA6_Pos

#define RADIO_DACNF_ENA6_Pos   (6UL)

Position of ENA6 field.

Definition at line 8771 of file nrf52_bitfields.h.

◆ RADIO_DACNF_ENA7_Disabled

#define RADIO_DACNF_ENA7_Disabled   (0UL)

Disabled

Definition at line 8767 of file nrf52_bitfields.h.

◆ RADIO_DACNF_ENA7_Enabled

#define RADIO_DACNF_ENA7_Enabled   (1UL)

Enabled

Definition at line 8768 of file nrf52_bitfields.h.

◆ RADIO_DACNF_ENA7_Msk

#define RADIO_DACNF_ENA7_Msk   (0x1UL << RADIO_DACNF_ENA7_Pos)

Bit mask of ENA7 field.

Definition at line 8766 of file nrf52_bitfields.h.

◆ RADIO_DACNF_ENA7_Pos

#define RADIO_DACNF_ENA7_Pos   (7UL)

Position of ENA7 field.

Definition at line 8765 of file nrf52_bitfields.h.

◆ RADIO_DACNF_TXADD0_Msk

#define RADIO_DACNF_TXADD0_Msk   (0x1UL << RADIO_DACNF_TXADD0_Pos)

Bit mask of TXADD0 field.

Definition at line 8762 of file nrf52_bitfields.h.

◆ RADIO_DACNF_TXADD0_Pos

#define RADIO_DACNF_TXADD0_Pos   (8UL)

Position of TXADD0 field.

Definition at line 8761 of file nrf52_bitfields.h.

◆ RADIO_DACNF_TXADD1_Msk

#define RADIO_DACNF_TXADD1_Msk   (0x1UL << RADIO_DACNF_TXADD1_Pos)

Bit mask of TXADD1 field.

Definition at line 8758 of file nrf52_bitfields.h.

◆ RADIO_DACNF_TXADD1_Pos

#define RADIO_DACNF_TXADD1_Pos   (9UL)

Position of TXADD1 field.

Definition at line 8757 of file nrf52_bitfields.h.

◆ RADIO_DACNF_TXADD2_Msk

#define RADIO_DACNF_TXADD2_Msk   (0x1UL << RADIO_DACNF_TXADD2_Pos)

Bit mask of TXADD2 field.

Definition at line 8754 of file nrf52_bitfields.h.

◆ RADIO_DACNF_TXADD2_Pos

#define RADIO_DACNF_TXADD2_Pos   (10UL)

Position of TXADD2 field.

Definition at line 8753 of file nrf52_bitfields.h.

◆ RADIO_DACNF_TXADD3_Msk

#define RADIO_DACNF_TXADD3_Msk   (0x1UL << RADIO_DACNF_TXADD3_Pos)

Bit mask of TXADD3 field.

Definition at line 8750 of file nrf52_bitfields.h.

◆ RADIO_DACNF_TXADD3_Pos

#define RADIO_DACNF_TXADD3_Pos   (11UL)

Position of TXADD3 field.

Definition at line 8749 of file nrf52_bitfields.h.

◆ RADIO_DACNF_TXADD4_Msk

#define RADIO_DACNF_TXADD4_Msk   (0x1UL << RADIO_DACNF_TXADD4_Pos)

Bit mask of TXADD4 field.

Definition at line 8746 of file nrf52_bitfields.h.

◆ RADIO_DACNF_TXADD4_Pos

#define RADIO_DACNF_TXADD4_Pos   (12UL)

Position of TXADD4 field.

Definition at line 8745 of file nrf52_bitfields.h.

◆ RADIO_DACNF_TXADD5_Msk

#define RADIO_DACNF_TXADD5_Msk   (0x1UL << RADIO_DACNF_TXADD5_Pos)

Bit mask of TXADD5 field.

Definition at line 8742 of file nrf52_bitfields.h.

◆ RADIO_DACNF_TXADD5_Pos

#define RADIO_DACNF_TXADD5_Pos   (13UL)

Position of TXADD5 field.

Definition at line 8741 of file nrf52_bitfields.h.

◆ RADIO_DACNF_TXADD6_Msk

#define RADIO_DACNF_TXADD6_Msk   (0x1UL << RADIO_DACNF_TXADD6_Pos)

Bit mask of TXADD6 field.

Definition at line 8738 of file nrf52_bitfields.h.

◆ RADIO_DACNF_TXADD6_Pos

#define RADIO_DACNF_TXADD6_Pos   (14UL)

Position of TXADD6 field.

Definition at line 8737 of file nrf52_bitfields.h.

◆ RADIO_DACNF_TXADD7_Msk

#define RADIO_DACNF_TXADD7_Msk   (0x1UL << RADIO_DACNF_TXADD7_Pos)

Bit mask of TXADD7 field.

Definition at line 8734 of file nrf52_bitfields.h.

◆ RADIO_DACNF_TXADD7_Pos

#define RADIO_DACNF_TXADD7_Pos   (15UL)

Position of TXADD7 field.

Definition at line 8733 of file nrf52_bitfields.h.

◆ RADIO_DAI_DAI_Msk

#define RADIO_DAI_DAI_Msk   (0x7UL << RADIO_DAI_DAI_Pos)

Bit mask of DAI field.

Definition at line 8432 of file nrf52_bitfields.h.

◆ RADIO_DAI_DAI_Pos

#define RADIO_DAI_DAI_Pos   (0UL)

Position of DAI field.

Definition at line 8431 of file nrf52_bitfields.h.

◆ RADIO_DAP_DAP_Msk

#define RADIO_DAP_DAP_Msk   (0xFFFFUL << RADIO_DAP_DAP_Pos)

Bit mask of DAP field.

Definition at line 8727 of file nrf52_bitfields.h.

◆ RADIO_DAP_DAP_Pos

#define RADIO_DAP_DAP_Pos   (0UL)

Position of DAP field.

Definition at line 8726 of file nrf52_bitfields.h.

◆ RADIO_DATAWHITEIV_DATAWHITEIV_Msk

#define RADIO_DATAWHITEIV_DATAWHITEIV_Msk   (0x7FUL << RADIO_DATAWHITEIV_DATAWHITEIV_Pos)

Bit mask of DATAWHITEIV field.

Definition at line 8706 of file nrf52_bitfields.h.

◆ RADIO_DATAWHITEIV_DATAWHITEIV_Pos

#define RADIO_DATAWHITEIV_DATAWHITEIV_Pos   (0UL)

Position of DATAWHITEIV field.

Definition at line 8705 of file nrf52_bitfields.h.

◆ RADIO_FREQUENCY_FREQUENCY_Msk

#define RADIO_FREQUENCY_FREQUENCY_Msk   (0x7FUL << RADIO_FREQUENCY_FREQUENCY_Pos)

Bit mask of FREQUENCY field.

Definition at line 8446 of file nrf52_bitfields.h.

◆ RADIO_FREQUENCY_FREQUENCY_Pos

#define RADIO_FREQUENCY_FREQUENCY_Pos   (0UL)

Position of FREQUENCY field.

Definition at line 8445 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_ADDRESS_Clear

#define RADIO_INTENCLR_ADDRESS_Clear   (1UL)

Disable

Definition at line 8395 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_ADDRESS_Disabled

#define RADIO_INTENCLR_ADDRESS_Disabled   (0UL)

Read: Disabled

Definition at line 8393 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_ADDRESS_Enabled

#define RADIO_INTENCLR_ADDRESS_Enabled   (1UL)

Read: Enabled

Definition at line 8394 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_ADDRESS_Msk

#define RADIO_INTENCLR_ADDRESS_Msk   (0x1UL << RADIO_INTENCLR_ADDRESS_Pos)

Bit mask of ADDRESS field.

Definition at line 8392 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_ADDRESS_Pos

#define RADIO_INTENCLR_ADDRESS_Pos   (1UL)

Position of ADDRESS field.

Definition at line 8391 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_BCMATCH_Clear

#define RADIO_INTENCLR_BCMATCH_Clear   (1UL)

Disable

Definition at line 8346 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_BCMATCH_Disabled

#define RADIO_INTENCLR_BCMATCH_Disabled   (0UL)

Read: Disabled

Definition at line 8344 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_BCMATCH_Enabled

#define RADIO_INTENCLR_BCMATCH_Enabled   (1UL)

Read: Enabled

Definition at line 8345 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_BCMATCH_Msk

#define RADIO_INTENCLR_BCMATCH_Msk   (0x1UL << RADIO_INTENCLR_BCMATCH_Pos)

Bit mask of BCMATCH field.

Definition at line 8343 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_BCMATCH_Pos

#define RADIO_INTENCLR_BCMATCH_Pos   (10UL)

Position of BCMATCH field.

Definition at line 8342 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_CRCERROR_Clear

#define RADIO_INTENCLR_CRCERROR_Clear   (1UL)

Disable

Definition at line 8332 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_CRCERROR_Disabled

#define RADIO_INTENCLR_CRCERROR_Disabled   (0UL)

Read: Disabled

Definition at line 8330 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_CRCERROR_Enabled

#define RADIO_INTENCLR_CRCERROR_Enabled   (1UL)

Read: Enabled

Definition at line 8331 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_CRCERROR_Msk

#define RADIO_INTENCLR_CRCERROR_Msk   (0x1UL << RADIO_INTENCLR_CRCERROR_Pos)

Bit mask of CRCERROR field.

Definition at line 8329 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_CRCERROR_Pos

#define RADIO_INTENCLR_CRCERROR_Pos   (13UL)

Position of CRCERROR field.

Definition at line 8328 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_CRCOK_Clear

#define RADIO_INTENCLR_CRCOK_Clear   (1UL)

Disable

Definition at line 8339 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_CRCOK_Disabled

#define RADIO_INTENCLR_CRCOK_Disabled   (0UL)

Read: Disabled

Definition at line 8337 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_CRCOK_Enabled

#define RADIO_INTENCLR_CRCOK_Enabled   (1UL)

Read: Enabled

Definition at line 8338 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_CRCOK_Msk

#define RADIO_INTENCLR_CRCOK_Msk   (0x1UL << RADIO_INTENCLR_CRCOK_Pos)

Bit mask of CRCOK field.

Definition at line 8336 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_CRCOK_Pos

#define RADIO_INTENCLR_CRCOK_Pos   (12UL)

Position of CRCOK field.

Definition at line 8335 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_DEVMATCH_Clear

#define RADIO_INTENCLR_DEVMATCH_Clear   (1UL)

Disable

Definition at line 8367 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_DEVMATCH_Disabled

#define RADIO_INTENCLR_DEVMATCH_Disabled   (0UL)

Read: Disabled

Definition at line 8365 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_DEVMATCH_Enabled

#define RADIO_INTENCLR_DEVMATCH_Enabled   (1UL)

Read: Enabled

Definition at line 8366 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_DEVMATCH_Msk

#define RADIO_INTENCLR_DEVMATCH_Msk   (0x1UL << RADIO_INTENCLR_DEVMATCH_Pos)

Bit mask of DEVMATCH field.

Definition at line 8364 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_DEVMATCH_Pos

#define RADIO_INTENCLR_DEVMATCH_Pos   (5UL)

Position of DEVMATCH field.

Definition at line 8363 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_DEVMISS_Clear

#define RADIO_INTENCLR_DEVMISS_Clear   (1UL)

Disable

Definition at line 8360 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_DEVMISS_Disabled

#define RADIO_INTENCLR_DEVMISS_Disabled   (0UL)

Read: Disabled

Definition at line 8358 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_DEVMISS_Enabled

#define RADIO_INTENCLR_DEVMISS_Enabled   (1UL)

Read: Enabled

Definition at line 8359 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_DEVMISS_Msk

#define RADIO_INTENCLR_DEVMISS_Msk   (0x1UL << RADIO_INTENCLR_DEVMISS_Pos)

Bit mask of DEVMISS field.

Definition at line 8357 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_DEVMISS_Pos

#define RADIO_INTENCLR_DEVMISS_Pos   (6UL)

Position of DEVMISS field.

Definition at line 8356 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_DISABLED_Clear

#define RADIO_INTENCLR_DISABLED_Clear   (1UL)

Disable

Definition at line 8374 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_DISABLED_Disabled

#define RADIO_INTENCLR_DISABLED_Disabled   (0UL)

Read: Disabled

Definition at line 8372 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_DISABLED_Enabled

#define RADIO_INTENCLR_DISABLED_Enabled   (1UL)

Read: Enabled

Definition at line 8373 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_DISABLED_Msk

#define RADIO_INTENCLR_DISABLED_Msk   (0x1UL << RADIO_INTENCLR_DISABLED_Pos)

Bit mask of DISABLED field.

Definition at line 8371 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_DISABLED_Pos

#define RADIO_INTENCLR_DISABLED_Pos   (4UL)

Position of DISABLED field.

Definition at line 8370 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_END_Clear

#define RADIO_INTENCLR_END_Clear   (1UL)

Disable

Definition at line 8381 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_END_Disabled

#define RADIO_INTENCLR_END_Disabled   (0UL)

Read: Disabled

Definition at line 8379 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_END_Enabled

#define RADIO_INTENCLR_END_Enabled   (1UL)

Read: Enabled

Definition at line 8380 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_END_Msk

#define RADIO_INTENCLR_END_Msk   (0x1UL << RADIO_INTENCLR_END_Pos)

Bit mask of END field.

Definition at line 8378 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_END_Pos

#define RADIO_INTENCLR_END_Pos   (3UL)

Position of END field.

Definition at line 8377 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_PAYLOAD_Clear

#define RADIO_INTENCLR_PAYLOAD_Clear   (1UL)

Disable

Definition at line 8388 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_PAYLOAD_Disabled

#define RADIO_INTENCLR_PAYLOAD_Disabled   (0UL)

Read: Disabled

Definition at line 8386 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_PAYLOAD_Enabled

#define RADIO_INTENCLR_PAYLOAD_Enabled   (1UL)

Read: Enabled

Definition at line 8387 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_PAYLOAD_Msk

#define RADIO_INTENCLR_PAYLOAD_Msk   (0x1UL << RADIO_INTENCLR_PAYLOAD_Pos)

Bit mask of PAYLOAD field.

Definition at line 8385 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_PAYLOAD_Pos

#define RADIO_INTENCLR_PAYLOAD_Pos   (2UL)

Position of PAYLOAD field.

Definition at line 8384 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_READY_Clear

#define RADIO_INTENCLR_READY_Clear   (1UL)

Disable

Definition at line 8402 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_READY_Disabled

#define RADIO_INTENCLR_READY_Disabled   (0UL)

Read: Disabled

Definition at line 8400 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_READY_Enabled

#define RADIO_INTENCLR_READY_Enabled   (1UL)

Read: Enabled

Definition at line 8401 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_READY_Msk

#define RADIO_INTENCLR_READY_Msk   (0x1UL << RADIO_INTENCLR_READY_Pos)

Bit mask of READY field.

Definition at line 8399 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_READY_Pos

#define RADIO_INTENCLR_READY_Pos   (0UL)

Position of READY field.

Definition at line 8398 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_RSSIEND_Clear

#define RADIO_INTENCLR_RSSIEND_Clear   (1UL)

Disable

Definition at line 8353 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_RSSIEND_Disabled

#define RADIO_INTENCLR_RSSIEND_Disabled   (0UL)

Read: Disabled

Definition at line 8351 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_RSSIEND_Enabled

#define RADIO_INTENCLR_RSSIEND_Enabled   (1UL)

Read: Enabled

Definition at line 8352 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_RSSIEND_Msk

#define RADIO_INTENCLR_RSSIEND_Msk   (0x1UL << RADIO_INTENCLR_RSSIEND_Pos)

Bit mask of RSSIEND field.

Definition at line 8350 of file nrf52_bitfields.h.

◆ RADIO_INTENCLR_RSSIEND_Pos

#define RADIO_INTENCLR_RSSIEND_Pos   (7UL)

Position of RSSIEND field.

Definition at line 8349 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_ADDRESS_Disabled

#define RADIO_INTENSET_ADDRESS_Disabled   (0UL)

Read: Disabled

Definition at line 8313 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_ADDRESS_Enabled

#define RADIO_INTENSET_ADDRESS_Enabled   (1UL)

Read: Enabled

Definition at line 8314 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_ADDRESS_Msk

#define RADIO_INTENSET_ADDRESS_Msk   (0x1UL << RADIO_INTENSET_ADDRESS_Pos)

Bit mask of ADDRESS field.

Definition at line 8312 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_ADDRESS_Pos

#define RADIO_INTENSET_ADDRESS_Pos   (1UL)

Position of ADDRESS field.

Definition at line 8311 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_ADDRESS_Set

#define RADIO_INTENSET_ADDRESS_Set   (1UL)

Enable

Definition at line 8315 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_BCMATCH_Disabled

#define RADIO_INTENSET_BCMATCH_Disabled   (0UL)

Read: Disabled

Definition at line 8264 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_BCMATCH_Enabled

#define RADIO_INTENSET_BCMATCH_Enabled   (1UL)

Read: Enabled

Definition at line 8265 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_BCMATCH_Msk

#define RADIO_INTENSET_BCMATCH_Msk   (0x1UL << RADIO_INTENSET_BCMATCH_Pos)

Bit mask of BCMATCH field.

Definition at line 8263 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_BCMATCH_Pos

#define RADIO_INTENSET_BCMATCH_Pos   (10UL)

Position of BCMATCH field.

Definition at line 8262 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_BCMATCH_Set

#define RADIO_INTENSET_BCMATCH_Set   (1UL)

Enable

Definition at line 8266 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_CRCERROR_Disabled

#define RADIO_INTENSET_CRCERROR_Disabled   (0UL)

Read: Disabled

Definition at line 8250 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_CRCERROR_Enabled

#define RADIO_INTENSET_CRCERROR_Enabled   (1UL)

Read: Enabled

Definition at line 8251 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_CRCERROR_Msk

#define RADIO_INTENSET_CRCERROR_Msk   (0x1UL << RADIO_INTENSET_CRCERROR_Pos)

Bit mask of CRCERROR field.

Definition at line 8249 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_CRCERROR_Pos

#define RADIO_INTENSET_CRCERROR_Pos   (13UL)

Position of CRCERROR field.

Definition at line 8248 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_CRCERROR_Set

#define RADIO_INTENSET_CRCERROR_Set   (1UL)

Enable

Definition at line 8252 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_CRCOK_Disabled

#define RADIO_INTENSET_CRCOK_Disabled   (0UL)

Read: Disabled

Definition at line 8257 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_CRCOK_Enabled

#define RADIO_INTENSET_CRCOK_Enabled   (1UL)

Read: Enabled

Definition at line 8258 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_CRCOK_Msk

#define RADIO_INTENSET_CRCOK_Msk   (0x1UL << RADIO_INTENSET_CRCOK_Pos)

Bit mask of CRCOK field.

Definition at line 8256 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_CRCOK_Pos

#define RADIO_INTENSET_CRCOK_Pos   (12UL)

Position of CRCOK field.

Definition at line 8255 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_CRCOK_Set

#define RADIO_INTENSET_CRCOK_Set   (1UL)

Enable

Definition at line 8259 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_DEVMATCH_Disabled

#define RADIO_INTENSET_DEVMATCH_Disabled   (0UL)

Read: Disabled

Definition at line 8285 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_DEVMATCH_Enabled

#define RADIO_INTENSET_DEVMATCH_Enabled   (1UL)

Read: Enabled

Definition at line 8286 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_DEVMATCH_Msk

#define RADIO_INTENSET_DEVMATCH_Msk   (0x1UL << RADIO_INTENSET_DEVMATCH_Pos)

Bit mask of DEVMATCH field.

Definition at line 8284 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_DEVMATCH_Pos

#define RADIO_INTENSET_DEVMATCH_Pos   (5UL)

Position of DEVMATCH field.

Definition at line 8283 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_DEVMATCH_Set

#define RADIO_INTENSET_DEVMATCH_Set   (1UL)

Enable

Definition at line 8287 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_DEVMISS_Disabled

#define RADIO_INTENSET_DEVMISS_Disabled   (0UL)

Read: Disabled

Definition at line 8278 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_DEVMISS_Enabled

#define RADIO_INTENSET_DEVMISS_Enabled   (1UL)

Read: Enabled

Definition at line 8279 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_DEVMISS_Msk

#define RADIO_INTENSET_DEVMISS_Msk   (0x1UL << RADIO_INTENSET_DEVMISS_Pos)

Bit mask of DEVMISS field.

Definition at line 8277 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_DEVMISS_Pos

#define RADIO_INTENSET_DEVMISS_Pos   (6UL)

Position of DEVMISS field.

Definition at line 8276 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_DEVMISS_Set

#define RADIO_INTENSET_DEVMISS_Set   (1UL)

Enable

Definition at line 8280 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_DISABLED_Disabled

#define RADIO_INTENSET_DISABLED_Disabled   (0UL)

Read: Disabled

Definition at line 8292 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_DISABLED_Enabled

#define RADIO_INTENSET_DISABLED_Enabled   (1UL)

Read: Enabled

Definition at line 8293 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_DISABLED_Msk

#define RADIO_INTENSET_DISABLED_Msk   (0x1UL << RADIO_INTENSET_DISABLED_Pos)

Bit mask of DISABLED field.

Definition at line 8291 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_DISABLED_Pos

#define RADIO_INTENSET_DISABLED_Pos   (4UL)

Position of DISABLED field.

Definition at line 8290 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_DISABLED_Set

#define RADIO_INTENSET_DISABLED_Set   (1UL)

Enable

Definition at line 8294 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_END_Disabled

#define RADIO_INTENSET_END_Disabled   (0UL)

Read: Disabled

Definition at line 8299 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_END_Enabled

#define RADIO_INTENSET_END_Enabled   (1UL)

Read: Enabled

Definition at line 8300 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_END_Msk

#define RADIO_INTENSET_END_Msk   (0x1UL << RADIO_INTENSET_END_Pos)

Bit mask of END field.

Definition at line 8298 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_END_Pos

#define RADIO_INTENSET_END_Pos   (3UL)

Position of END field.

Definition at line 8297 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_END_Set

#define RADIO_INTENSET_END_Set   (1UL)

Enable

Definition at line 8301 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_PAYLOAD_Disabled

#define RADIO_INTENSET_PAYLOAD_Disabled   (0UL)

Read: Disabled

Definition at line 8306 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_PAYLOAD_Enabled

#define RADIO_INTENSET_PAYLOAD_Enabled   (1UL)

Read: Enabled

Definition at line 8307 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_PAYLOAD_Msk

#define RADIO_INTENSET_PAYLOAD_Msk   (0x1UL << RADIO_INTENSET_PAYLOAD_Pos)

Bit mask of PAYLOAD field.

Definition at line 8305 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_PAYLOAD_Pos

#define RADIO_INTENSET_PAYLOAD_Pos   (2UL)

Position of PAYLOAD field.

Definition at line 8304 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_PAYLOAD_Set

#define RADIO_INTENSET_PAYLOAD_Set   (1UL)

Enable

Definition at line 8308 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_READY_Disabled

#define RADIO_INTENSET_READY_Disabled   (0UL)

Read: Disabled

Definition at line 8320 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_READY_Enabled

#define RADIO_INTENSET_READY_Enabled   (1UL)

Read: Enabled

Definition at line 8321 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_READY_Msk

#define RADIO_INTENSET_READY_Msk   (0x1UL << RADIO_INTENSET_READY_Pos)

Bit mask of READY field.

Definition at line 8319 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_READY_Pos

#define RADIO_INTENSET_READY_Pos   (0UL)

Position of READY field.

Definition at line 8318 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_READY_Set

#define RADIO_INTENSET_READY_Set   (1UL)

Enable

Definition at line 8322 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_RSSIEND_Disabled

#define RADIO_INTENSET_RSSIEND_Disabled   (0UL)

Read: Disabled

Definition at line 8271 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_RSSIEND_Enabled

#define RADIO_INTENSET_RSSIEND_Enabled   (1UL)

Read: Enabled

Definition at line 8272 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_RSSIEND_Msk

#define RADIO_INTENSET_RSSIEND_Msk   (0x1UL << RADIO_INTENSET_RSSIEND_Pos)

Bit mask of RSSIEND field.

Definition at line 8270 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_RSSIEND_Pos

#define RADIO_INTENSET_RSSIEND_Pos   (7UL)

Position of RSSIEND field.

Definition at line 8269 of file nrf52_bitfields.h.

◆ RADIO_INTENSET_RSSIEND_Set

#define RADIO_INTENSET_RSSIEND_Set   (1UL)

Enable

Definition at line 8273 of file nrf52_bitfields.h.

◆ RADIO_MODE_MODE_Ble_1Mbit

#define RADIO_MODE_MODE_Ble_1Mbit   (3UL)

1 Mbit/s Bluetooth Low Energy

Definition at line 8474 of file nrf52_bitfields.h.

◆ RADIO_MODE_MODE_Msk

#define RADIO_MODE_MODE_Msk   (0xFUL << RADIO_MODE_MODE_Pos)

Bit mask of MODE field.

Definition at line 8470 of file nrf52_bitfields.h.

◆ RADIO_MODE_MODE_Nrf_1Mbit

#define RADIO_MODE_MODE_Nrf_1Mbit   (0UL)

1 Mbit/s Nordic proprietary radio mode

Definition at line 8471 of file nrf52_bitfields.h.

◆ RADIO_MODE_MODE_Nrf_250Kbit

#define RADIO_MODE_MODE_Nrf_250Kbit   (2UL)

Deprecated enumerator - 250 kbit/s Nordic proprietary radio mode

Definition at line 8473 of file nrf52_bitfields.h.

◆ RADIO_MODE_MODE_Nrf_2Mbit

#define RADIO_MODE_MODE_Nrf_2Mbit   (1UL)

2 Mbit/s Nordic proprietary radio mode

Definition at line 8472 of file nrf52_bitfields.h.

◆ RADIO_MODE_MODE_Pos

#define RADIO_MODE_MODE_Pos   (0UL)

Position of MODE field.

Definition at line 8469 of file nrf52_bitfields.h.

◆ RADIO_MODECNF0_DTX_B0

#define RADIO_MODECNF0_DTX_B0   (1UL)

Transmit '0'

Definition at line 8819 of file nrf52_bitfields.h.

◆ RADIO_MODECNF0_DTX_B1

#define RADIO_MODECNF0_DTX_B1   (0UL)

Transmit '1'

Definition at line 8818 of file nrf52_bitfields.h.

◆ RADIO_MODECNF0_DTX_Center

#define RADIO_MODECNF0_DTX_Center   (2UL)

Transmit center frequency

Definition at line 8820 of file nrf52_bitfields.h.

◆ RADIO_MODECNF0_DTX_Msk

#define RADIO_MODECNF0_DTX_Msk   (0x3UL << RADIO_MODECNF0_DTX_Pos)

Bit mask of DTX field.

Definition at line 8817 of file nrf52_bitfields.h.

◆ RADIO_MODECNF0_DTX_Pos

#define RADIO_MODECNF0_DTX_Pos   (8UL)

Position of DTX field.

Definition at line 8816 of file nrf52_bitfields.h.

◆ RADIO_MODECNF0_RU_Default

#define RADIO_MODECNF0_RU_Default   (0UL)

Default ramp-up time, compatible with nRF51

Definition at line 8825 of file nrf52_bitfields.h.

◆ RADIO_MODECNF0_RU_Fast

#define RADIO_MODECNF0_RU_Fast   (1UL)

Fast ramp-up, see product specification for more information

Definition at line 8826 of file nrf52_bitfields.h.

◆ RADIO_MODECNF0_RU_Msk

#define RADIO_MODECNF0_RU_Msk   (0x1UL << RADIO_MODECNF0_RU_Pos)

Bit mask of RU field.

Definition at line 8824 of file nrf52_bitfields.h.

◆ RADIO_MODECNF0_RU_Pos

#define RADIO_MODECNF0_RU_Pos   (0UL)

Position of RU field.

Definition at line 8823 of file nrf52_bitfields.h.

◆ RADIO_PACKETPTR_PACKETPTR_Msk

#define RADIO_PACKETPTR_PACKETPTR_Msk   (0xFFFFFFFFUL << RADIO_PACKETPTR_PACKETPTR_Pos)

Bit mask of PACKETPTR field.

Definition at line 8439 of file nrf52_bitfields.h.

◆ RADIO_PACKETPTR_PACKETPTR_Pos

#define RADIO_PACKETPTR_PACKETPTR_Pos   (0UL)

Position of PACKETPTR field.

Definition at line 8438 of file nrf52_bitfields.h.

◆ RADIO_PCNF0_LFLEN_Msk

#define RADIO_PCNF0_LFLEN_Msk   (0xFUL << RADIO_PCNF0_LFLEN_Pos)

Bit mask of LFLEN field.

Definition at line 8501 of file nrf52_bitfields.h.

◆ RADIO_PCNF0_LFLEN_Pos

#define RADIO_PCNF0_LFLEN_Pos   (0UL)

Position of LFLEN field.

Definition at line 8500 of file nrf52_bitfields.h.

◆ RADIO_PCNF0_PLEN_16bit

#define RADIO_PCNF0_PLEN_16bit   (1UL)

16-bit preamble

Definition at line 8483 of file nrf52_bitfields.h.

◆ RADIO_PCNF0_PLEN_8bit

#define RADIO_PCNF0_PLEN_8bit   (0UL)

8-bit preamble

Definition at line 8482 of file nrf52_bitfields.h.

◆ RADIO_PCNF0_PLEN_Msk

#define RADIO_PCNF0_PLEN_Msk   (0x1UL << RADIO_PCNF0_PLEN_Pos)

Bit mask of PLEN field.

Definition at line 8481 of file nrf52_bitfields.h.

◆ RADIO_PCNF0_PLEN_Pos

#define RADIO_PCNF0_PLEN_Pos   (24UL)

Position of PLEN field.

Definition at line 8480 of file nrf52_bitfields.h.

◆ RADIO_PCNF0_S0LEN_Msk

#define RADIO_PCNF0_S0LEN_Msk   (0x1UL << RADIO_PCNF0_S0LEN_Pos)

Bit mask of S0LEN field.

Definition at line 8497 of file nrf52_bitfields.h.

◆ RADIO_PCNF0_S0LEN_Pos

#define RADIO_PCNF0_S0LEN_Pos   (8UL)

Position of S0LEN field.

Definition at line 8496 of file nrf52_bitfields.h.

◆ RADIO_PCNF0_S1INCL_Automatic

#define RADIO_PCNF0_S1INCL_Automatic   (0UL)

Include S1 field in RAM only if S1LEN > 0

Definition at line 8488 of file nrf52_bitfields.h.

◆ RADIO_PCNF0_S1INCL_Include

#define RADIO_PCNF0_S1INCL_Include   (1UL)

Always include S1 field in RAM independent of S1LEN

Definition at line 8489 of file nrf52_bitfields.h.

◆ RADIO_PCNF0_S1INCL_Msk

#define RADIO_PCNF0_S1INCL_Msk   (0x1UL << RADIO_PCNF0_S1INCL_Pos)

Bit mask of S1INCL field.

Definition at line 8487 of file nrf52_bitfields.h.

◆ RADIO_PCNF0_S1INCL_Pos

#define RADIO_PCNF0_S1INCL_Pos   (20UL)

Position of S1INCL field.

Definition at line 8486 of file nrf52_bitfields.h.

◆ RADIO_PCNF0_S1LEN_Msk

#define RADIO_PCNF0_S1LEN_Msk   (0xFUL << RADIO_PCNF0_S1LEN_Pos)

Bit mask of S1LEN field.

Definition at line 8493 of file nrf52_bitfields.h.

◆ RADIO_PCNF0_S1LEN_Pos

#define RADIO_PCNF0_S1LEN_Pos   (16UL)

Position of S1LEN field.

Definition at line 8492 of file nrf52_bitfields.h.

◆ RADIO_PCNF1_BALEN_Msk

#define RADIO_PCNF1_BALEN_Msk   (0x7UL << RADIO_PCNF1_BALEN_Pos)

Bit mask of BALEN field.

Definition at line 8520 of file nrf52_bitfields.h.

◆ RADIO_PCNF1_BALEN_Pos

#define RADIO_PCNF1_BALEN_Pos   (16UL)

Position of BALEN field.

Definition at line 8519 of file nrf52_bitfields.h.

◆ RADIO_PCNF1_ENDIAN_Big

#define RADIO_PCNF1_ENDIAN_Big   (1UL)

Most significant bit on air first

Definition at line 8516 of file nrf52_bitfields.h.

◆ RADIO_PCNF1_ENDIAN_Little

#define RADIO_PCNF1_ENDIAN_Little   (0UL)

Least Significant bit on air first

Definition at line 8515 of file nrf52_bitfields.h.

◆ RADIO_PCNF1_ENDIAN_Msk

#define RADIO_PCNF1_ENDIAN_Msk   (0x1UL << RADIO_PCNF1_ENDIAN_Pos)

Bit mask of ENDIAN field.

Definition at line 8514 of file nrf52_bitfields.h.

◆ RADIO_PCNF1_ENDIAN_Pos

#define RADIO_PCNF1_ENDIAN_Pos   (24UL)

Position of ENDIAN field.

Definition at line 8513 of file nrf52_bitfields.h.

◆ RADIO_PCNF1_MAXLEN_Msk

#define RADIO_PCNF1_MAXLEN_Msk   (0xFFUL << RADIO_PCNF1_MAXLEN_Pos)

Bit mask of MAXLEN field.

Definition at line 8528 of file nrf52_bitfields.h.

◆ RADIO_PCNF1_MAXLEN_Pos

#define RADIO_PCNF1_MAXLEN_Pos   (0UL)

Position of MAXLEN field.

Definition at line 8527 of file nrf52_bitfields.h.

◆ RADIO_PCNF1_STATLEN_Msk

#define RADIO_PCNF1_STATLEN_Msk   (0xFFUL << RADIO_PCNF1_STATLEN_Pos)

Bit mask of STATLEN field.

Definition at line 8524 of file nrf52_bitfields.h.

◆ RADIO_PCNF1_STATLEN_Pos

#define RADIO_PCNF1_STATLEN_Pos   (8UL)

Position of STATLEN field.

Definition at line 8523 of file nrf52_bitfields.h.

◆ RADIO_PCNF1_WHITEEN_Disabled

#define RADIO_PCNF1_WHITEEN_Disabled   (0UL)

Disable

Definition at line 8509 of file nrf52_bitfields.h.

◆ RADIO_PCNF1_WHITEEN_Enabled

#define RADIO_PCNF1_WHITEEN_Enabled   (1UL)

Enable

Definition at line 8510 of file nrf52_bitfields.h.

◆ RADIO_PCNF1_WHITEEN_Msk

#define RADIO_PCNF1_WHITEEN_Msk   (0x1UL << RADIO_PCNF1_WHITEEN_Pos)

Bit mask of WHITEEN field.

Definition at line 8508 of file nrf52_bitfields.h.

◆ RADIO_PCNF1_WHITEEN_Pos

#define RADIO_PCNF1_WHITEEN_Pos   (25UL)

Position of WHITEEN field.

Definition at line 8507 of file nrf52_bitfields.h.

◆ RADIO_POWER_POWER_Disabled

#define RADIO_POWER_POWER_Disabled   (0UL)

Peripheral is powered off

Definition at line 8834 of file nrf52_bitfields.h.

◆ RADIO_POWER_POWER_Enabled

#define RADIO_POWER_POWER_Enabled   (1UL)

Peripheral is powered on

Definition at line 8835 of file nrf52_bitfields.h.

◆ RADIO_POWER_POWER_Msk

#define RADIO_POWER_POWER_Msk   (0x1UL << RADIO_POWER_POWER_Pos)

Bit mask of POWER field.

Definition at line 8833 of file nrf52_bitfields.h.

◆ RADIO_POWER_POWER_Pos

#define RADIO_POWER_POWER_Pos   (0UL)

Position of POWER field.

Definition at line 8832 of file nrf52_bitfields.h.

◆ RADIO_PREFIX0_AP0_Msk

#define RADIO_PREFIX0_AP0_Msk   (0xFFUL << RADIO_PREFIX0_AP0_Pos)

Bit mask of AP0 field.

Definition at line 8561 of file nrf52_bitfields.h.

◆ RADIO_PREFIX0_AP0_Pos

#define RADIO_PREFIX0_AP0_Pos   (0UL)

Position of AP0 field.

Definition at line 8560 of file nrf52_bitfields.h.

◆ RADIO_PREFIX0_AP1_Msk

#define RADIO_PREFIX0_AP1_Msk   (0xFFUL << RADIO_PREFIX0_AP1_Pos)

Bit mask of AP1 field.

Definition at line 8557 of file nrf52_bitfields.h.

◆ RADIO_PREFIX0_AP1_Pos

#define RADIO_PREFIX0_AP1_Pos   (8UL)

Position of AP1 field.

Definition at line 8556 of file nrf52_bitfields.h.

◆ RADIO_PREFIX0_AP2_Msk

#define RADIO_PREFIX0_AP2_Msk   (0xFFUL << RADIO_PREFIX0_AP2_Pos)

Bit mask of AP2 field.

Definition at line 8553 of file nrf52_bitfields.h.

◆ RADIO_PREFIX0_AP2_Pos

#define RADIO_PREFIX0_AP2_Pos   (16UL)

Position of AP2 field.

Definition at line 8552 of file nrf52_bitfields.h.

◆ RADIO_PREFIX0_AP3_Msk

#define RADIO_PREFIX0_AP3_Msk   (0xFFUL << RADIO_PREFIX0_AP3_Pos)

Bit mask of AP3 field.

Definition at line 8549 of file nrf52_bitfields.h.

◆ RADIO_PREFIX0_AP3_Pos

#define RADIO_PREFIX0_AP3_Pos   (24UL)

Position of AP3 field.

Definition at line 8548 of file nrf52_bitfields.h.

◆ RADIO_PREFIX1_AP4_Msk

#define RADIO_PREFIX1_AP4_Msk   (0xFFUL << RADIO_PREFIX1_AP4_Pos)

Bit mask of AP4 field.

Definition at line 8580 of file nrf52_bitfields.h.

◆ RADIO_PREFIX1_AP4_Pos

#define RADIO_PREFIX1_AP4_Pos   (0UL)

Position of AP4 field.

Definition at line 8579 of file nrf52_bitfields.h.

◆ RADIO_PREFIX1_AP5_Msk

#define RADIO_PREFIX1_AP5_Msk   (0xFFUL << RADIO_PREFIX1_AP5_Pos)

Bit mask of AP5 field.

Definition at line 8576 of file nrf52_bitfields.h.

◆ RADIO_PREFIX1_AP5_Pos

#define RADIO_PREFIX1_AP5_Pos   (8UL)

Position of AP5 field.

Definition at line 8575 of file nrf52_bitfields.h.

◆ RADIO_PREFIX1_AP6_Msk

#define RADIO_PREFIX1_AP6_Msk   (0xFFUL << RADIO_PREFIX1_AP6_Pos)

Bit mask of AP6 field.

Definition at line 8572 of file nrf52_bitfields.h.

◆ RADIO_PREFIX1_AP6_Pos

#define RADIO_PREFIX1_AP6_Pos   (16UL)

Position of AP6 field.

Definition at line 8571 of file nrf52_bitfields.h.

◆ RADIO_PREFIX1_AP7_Msk

#define RADIO_PREFIX1_AP7_Msk   (0xFFUL << RADIO_PREFIX1_AP7_Pos)

Bit mask of AP7 field.

Definition at line 8568 of file nrf52_bitfields.h.

◆ RADIO_PREFIX1_AP7_Pos

#define RADIO_PREFIX1_AP7_Pos   (24UL)

Position of AP7 field.

Definition at line 8567 of file nrf52_bitfields.h.

◆ RADIO_RSSISAMPLE_RSSISAMPLE_Msk

#define RADIO_RSSISAMPLE_RSSISAMPLE_Msk   (0x7FUL << RADIO_RSSISAMPLE_RSSISAMPLE_Pos)

Bit mask of RSSISAMPLE field.

Definition at line 8683 of file nrf52_bitfields.h.

◆ RADIO_RSSISAMPLE_RSSISAMPLE_Pos

#define RADIO_RSSISAMPLE_RSSISAMPLE_Pos   (0UL)

Position of RSSISAMPLE field.

Definition at line 8682 of file nrf52_bitfields.h.

◆ RADIO_RXADDRESSES_ADDR0_Disabled

#define RADIO_RXADDRESSES_ADDR0_Disabled   (0UL)

Disable

Definition at line 8637 of file nrf52_bitfields.h.

◆ RADIO_RXADDRESSES_ADDR0_Enabled

#define RADIO_RXADDRESSES_ADDR0_Enabled   (1UL)

Enable

Definition at line 8638 of file nrf52_bitfields.h.

◆ RADIO_RXADDRESSES_ADDR0_Msk

#define RADIO_RXADDRESSES_ADDR0_Msk   (0x1UL << RADIO_RXADDRESSES_ADDR0_Pos)

Bit mask of ADDR0 field.

Definition at line 8636 of file nrf52_bitfields.h.

◆ RADIO_RXADDRESSES_ADDR0_Pos

#define RADIO_RXADDRESSES_ADDR0_Pos   (0UL)

Position of ADDR0 field.

Definition at line 8635 of file nrf52_bitfields.h.

◆ RADIO_RXADDRESSES_ADDR1_Disabled

#define RADIO_RXADDRESSES_ADDR1_Disabled   (0UL)

Disable

Definition at line 8631 of file nrf52_bitfields.h.

◆ RADIO_RXADDRESSES_ADDR1_Enabled

#define RADIO_RXADDRESSES_ADDR1_Enabled   (1UL)

Enable

Definition at line 8632 of file nrf52_bitfields.h.

◆ RADIO_RXADDRESSES_ADDR1_Msk

#define RADIO_RXADDRESSES_ADDR1_Msk   (0x1UL << RADIO_RXADDRESSES_ADDR1_Pos)

Bit mask of ADDR1 field.

Definition at line 8630 of file nrf52_bitfields.h.

◆ RADIO_RXADDRESSES_ADDR1_Pos

#define RADIO_RXADDRESSES_ADDR1_Pos   (1UL)

Position of ADDR1 field.

Definition at line 8629 of file nrf52_bitfields.h.

◆ RADIO_RXADDRESSES_ADDR2_Disabled

#define RADIO_RXADDRESSES_ADDR2_Disabled   (0UL)

Disable

Definition at line 8625 of file nrf52_bitfields.h.

◆ RADIO_RXADDRESSES_ADDR2_Enabled

#define RADIO_RXADDRESSES_ADDR2_Enabled   (1UL)

Enable

Definition at line 8626 of file nrf52_bitfields.h.

◆ RADIO_RXADDRESSES_ADDR2_Msk

#define RADIO_RXADDRESSES_ADDR2_Msk   (0x1UL << RADIO_RXADDRESSES_ADDR2_Pos)

Bit mask of ADDR2 field.

Definition at line 8624 of file nrf52_bitfields.h.

◆ RADIO_RXADDRESSES_ADDR2_Pos

#define RADIO_RXADDRESSES_ADDR2_Pos   (2UL)

Position of ADDR2 field.

Definition at line 8623 of file nrf52_bitfields.h.

◆ RADIO_RXADDRESSES_ADDR3_Disabled

#define RADIO_RXADDRESSES_ADDR3_Disabled   (0UL)

Disable

Definition at line 8619 of file nrf52_bitfields.h.

◆ RADIO_RXADDRESSES_ADDR3_Enabled

#define RADIO_RXADDRESSES_ADDR3_Enabled   (1UL)

Enable

Definition at line 8620 of file nrf52_bitfields.h.

◆ RADIO_RXADDRESSES_ADDR3_Msk

#define RADIO_RXADDRESSES_ADDR3_Msk   (0x1UL << RADIO_RXADDRESSES_ADDR3_Pos)

Bit mask of ADDR3 field.

Definition at line 8618 of file nrf52_bitfields.h.

◆ RADIO_RXADDRESSES_ADDR3_Pos

#define RADIO_RXADDRESSES_ADDR3_Pos   (3UL)

Position of ADDR3 field.

Definition at line 8617 of file nrf52_bitfields.h.

◆ RADIO_RXADDRESSES_ADDR4_Disabled

#define RADIO_RXADDRESSES_ADDR4_Disabled   (0UL)

Disable

Definition at line 8613 of file nrf52_bitfields.h.

◆ RADIO_RXADDRESSES_ADDR4_Enabled

#define RADIO_RXADDRESSES_ADDR4_Enabled   (1UL)

Enable

Definition at line 8614 of file nrf52_bitfields.h.

◆ RADIO_RXADDRESSES_ADDR4_Msk

#define RADIO_RXADDRESSES_ADDR4_Msk   (0x1UL << RADIO_RXADDRESSES_ADDR4_Pos)

Bit mask of ADDR4 field.

Definition at line 8612 of file nrf52_bitfields.h.

◆ RADIO_RXADDRESSES_ADDR4_Pos

#define RADIO_RXADDRESSES_ADDR4_Pos   (4UL)

Position of ADDR4 field.

Definition at line 8611 of file nrf52_bitfields.h.

◆ RADIO_RXADDRESSES_ADDR5_Disabled

#define RADIO_RXADDRESSES_ADDR5_Disabled   (0UL)

Disable

Definition at line 8607 of file nrf52_bitfields.h.

◆ RADIO_RXADDRESSES_ADDR5_Enabled

#define RADIO_RXADDRESSES_ADDR5_Enabled   (1UL)

Enable

Definition at line 8608 of file nrf52_bitfields.h.

◆ RADIO_RXADDRESSES_ADDR5_Msk

#define RADIO_RXADDRESSES_ADDR5_Msk   (0x1UL << RADIO_RXADDRESSES_ADDR5_Pos)

Bit mask of ADDR5 field.

Definition at line 8606 of file nrf52_bitfields.h.

◆ RADIO_RXADDRESSES_ADDR5_Pos

#define RADIO_RXADDRESSES_ADDR5_Pos   (5UL)

Position of ADDR5 field.

Definition at line 8605 of file nrf52_bitfields.h.

◆ RADIO_RXADDRESSES_ADDR6_Disabled

#define RADIO_RXADDRESSES_ADDR6_Disabled   (0UL)

Disable

Definition at line 8601 of file nrf52_bitfields.h.

◆ RADIO_RXADDRESSES_ADDR6_Enabled

#define RADIO_RXADDRESSES_ADDR6_Enabled   (1UL)

Enable

Definition at line 8602 of file nrf52_bitfields.h.

◆ RADIO_RXADDRESSES_ADDR6_Msk

#define RADIO_RXADDRESSES_ADDR6_Msk   (0x1UL << RADIO_RXADDRESSES_ADDR6_Pos)

Bit mask of ADDR6 field.

Definition at line 8600 of file nrf52_bitfields.h.

◆ RADIO_RXADDRESSES_ADDR6_Pos

#define RADIO_RXADDRESSES_ADDR6_Pos   (6UL)

Position of ADDR6 field.

Definition at line 8599 of file nrf52_bitfields.h.

◆ RADIO_RXADDRESSES_ADDR7_Disabled

#define RADIO_RXADDRESSES_ADDR7_Disabled   (0UL)

Disable

Definition at line 8595 of file nrf52_bitfields.h.

◆ RADIO_RXADDRESSES_ADDR7_Enabled

#define RADIO_RXADDRESSES_ADDR7_Enabled   (1UL)

Enable

Definition at line 8596 of file nrf52_bitfields.h.

◆ RADIO_RXADDRESSES_ADDR7_Msk

#define RADIO_RXADDRESSES_ADDR7_Msk   (0x1UL << RADIO_RXADDRESSES_ADDR7_Pos)

Bit mask of ADDR7 field.

Definition at line 8594 of file nrf52_bitfields.h.

◆ RADIO_RXADDRESSES_ADDR7_Pos

#define RADIO_RXADDRESSES_ADDR7_Pos   (7UL)

Position of ADDR7 field.

Definition at line 8593 of file nrf52_bitfields.h.

◆ RADIO_RXCRC_RXCRC_Msk

#define RADIO_RXCRC_RXCRC_Msk   (0xFFFFFFUL << RADIO_RXCRC_RXCRC_Pos)

Bit mask of RXCRC field.

Definition at line 8425 of file nrf52_bitfields.h.

◆ RADIO_RXCRC_RXCRC_Pos

#define RADIO_RXCRC_RXCRC_Pos   (0UL)

Position of RXCRC field.

Definition at line 8424 of file nrf52_bitfields.h.

◆ RADIO_RXMATCH_RXMATCH_Msk

#define RADIO_RXMATCH_RXMATCH_Msk   (0x7UL << RADIO_RXMATCH_RXMATCH_Pos)

Bit mask of RXMATCH field.

Definition at line 8418 of file nrf52_bitfields.h.

◆ RADIO_RXMATCH_RXMATCH_Pos

#define RADIO_RXMATCH_RXMATCH_Pos   (0UL)

Position of RXMATCH field.

Definition at line 8417 of file nrf52_bitfields.h.

◆ RADIO_SHORTS_ADDRESS_BCSTART_Disabled

#define RADIO_SHORTS_ADDRESS_BCSTART_Disabled   (0UL)

Disable shortcut

Definition at line 8205 of file nrf52_bitfields.h.

◆ RADIO_SHORTS_ADDRESS_BCSTART_Enabled

#define RADIO_SHORTS_ADDRESS_BCSTART_Enabled   (1UL)

Enable shortcut

Definition at line 8206 of file nrf52_bitfields.h.

◆ RADIO_SHORTS_ADDRESS_BCSTART_Msk

#define RADIO_SHORTS_ADDRESS_BCSTART_Msk   (0x1UL << RADIO_SHORTS_ADDRESS_BCSTART_Pos)

Bit mask of ADDRESS_BCSTART field.

Definition at line 8204 of file nrf52_bitfields.h.

◆ RADIO_SHORTS_ADDRESS_BCSTART_Pos

#define RADIO_SHORTS_ADDRESS_BCSTART_Pos   (6UL)

Position of ADDRESS_BCSTART field.

Definition at line 8203 of file nrf52_bitfields.h.

◆ RADIO_SHORTS_ADDRESS_RSSISTART_Disabled

#define RADIO_SHORTS_ADDRESS_RSSISTART_Disabled   (0UL)

Disable shortcut

Definition at line 8217 of file nrf52_bitfields.h.

◆ RADIO_SHORTS_ADDRESS_RSSISTART_Enabled

#define RADIO_SHORTS_ADDRESS_RSSISTART_Enabled   (1UL)

Enable shortcut

Definition at line 8218 of file nrf52_bitfields.h.

◆ RADIO_SHORTS_ADDRESS_RSSISTART_Msk

#define RADIO_SHORTS_ADDRESS_RSSISTART_Msk   (0x1UL << RADIO_SHORTS_ADDRESS_RSSISTART_Pos)

Bit mask of ADDRESS_RSSISTART field.

Definition at line 8216 of file nrf52_bitfields.h.

◆ RADIO_SHORTS_ADDRESS_RSSISTART_Pos

#define RADIO_SHORTS_ADDRESS_RSSISTART_Pos   (4UL)

Position of ADDRESS_RSSISTART field.

Definition at line 8215 of file nrf52_bitfields.h.

◆ RADIO_SHORTS_DISABLED_RSSISTOP_Disabled

#define RADIO_SHORTS_DISABLED_RSSISTOP_Disabled   (0UL)

Disable shortcut

Definition at line 8199 of file nrf52_bitfields.h.

◆ RADIO_SHORTS_DISABLED_RSSISTOP_Enabled

#define RADIO_SHORTS_DISABLED_RSSISTOP_Enabled   (1UL)

Enable shortcut

Definition at line 8200 of file nrf52_bitfields.h.

◆ RADIO_SHORTS_DISABLED_RSSISTOP_Msk

#define RADIO_SHORTS_DISABLED_RSSISTOP_Msk   (0x1UL << RADIO_SHORTS_DISABLED_RSSISTOP_Pos)

Bit mask of DISABLED_RSSISTOP field.

Definition at line 8198 of file nrf52_bitfields.h.

◆ RADIO_SHORTS_DISABLED_RSSISTOP_Pos

#define RADIO_SHORTS_DISABLED_RSSISTOP_Pos   (8UL)

Position of DISABLED_RSSISTOP field.

Definition at line 8197 of file nrf52_bitfields.h.

◆ RADIO_SHORTS_DISABLED_RXEN_Disabled

#define RADIO_SHORTS_DISABLED_RXEN_Disabled   (0UL)

Disable shortcut

Definition at line 8223 of file nrf52_bitfields.h.

◆ RADIO_SHORTS_DISABLED_RXEN_Enabled

#define RADIO_SHORTS_DISABLED_RXEN_Enabled   (1UL)

Enable shortcut

Definition at line 8224 of file nrf52_bitfields.h.

◆ RADIO_SHORTS_DISABLED_RXEN_Msk

#define RADIO_SHORTS_DISABLED_RXEN_Msk   (0x1UL << RADIO_SHORTS_DISABLED_RXEN_Pos)

Bit mask of DISABLED_RXEN field.

Definition at line 8222 of file nrf52_bitfields.h.

◆ RADIO_SHORTS_DISABLED_RXEN_Pos

#define RADIO_SHORTS_DISABLED_RXEN_Pos   (3UL)

Position of DISABLED_RXEN field.

Definition at line 8221 of file nrf52_bitfields.h.

◆ RADIO_SHORTS_DISABLED_TXEN_Disabled

#define RADIO_SHORTS_DISABLED_TXEN_Disabled   (0UL)

Disable shortcut

Definition at line 8229 of file nrf52_bitfields.h.

◆ RADIO_SHORTS_DISABLED_TXEN_Enabled

#define RADIO_SHORTS_DISABLED_TXEN_Enabled   (1UL)

Enable shortcut

Definition at line 8230 of file nrf52_bitfields.h.

◆ RADIO_SHORTS_DISABLED_TXEN_Msk

#define RADIO_SHORTS_DISABLED_TXEN_Msk   (0x1UL << RADIO_SHORTS_DISABLED_TXEN_Pos)

Bit mask of DISABLED_TXEN field.

Definition at line 8228 of file nrf52_bitfields.h.

◆ RADIO_SHORTS_DISABLED_TXEN_Pos

#define RADIO_SHORTS_DISABLED_TXEN_Pos   (2UL)

Position of DISABLED_TXEN field.

Definition at line 8227 of file nrf52_bitfields.h.

◆ RADIO_SHORTS_END_DISABLE_Disabled

#define RADIO_SHORTS_END_DISABLE_Disabled   (0UL)

Disable shortcut

Definition at line 8235 of file nrf52_bitfields.h.

◆ RADIO_SHORTS_END_DISABLE_Enabled

#define RADIO_SHORTS_END_DISABLE_Enabled   (1UL)

Enable shortcut

Definition at line 8236 of file nrf52_bitfields.h.

◆ RADIO_SHORTS_END_DISABLE_Msk

#define RADIO_SHORTS_END_DISABLE_Msk   (0x1UL << RADIO_SHORTS_END_DISABLE_Pos)

Bit mask of END_DISABLE field.

Definition at line 8234 of file nrf52_bitfields.h.

◆ RADIO_SHORTS_END_DISABLE_Pos

#define RADIO_SHORTS_END_DISABLE_Pos   (1UL)

Position of END_DISABLE field.

Definition at line 8233 of file nrf52_bitfields.h.

◆ RADIO_SHORTS_END_START_Disabled

#define RADIO_SHORTS_END_START_Disabled   (0UL)

Disable shortcut

Definition at line 8211 of file nrf52_bitfields.h.

◆ RADIO_SHORTS_END_START_Enabled

#define RADIO_SHORTS_END_START_Enabled   (1UL)

Enable shortcut

Definition at line 8212 of file nrf52_bitfields.h.

◆ RADIO_SHORTS_END_START_Msk

#define RADIO_SHORTS_END_START_Msk   (0x1UL << RADIO_SHORTS_END_START_Pos)

Bit mask of END_START field.

Definition at line 8210 of file nrf52_bitfields.h.

◆ RADIO_SHORTS_END_START_Pos

#define RADIO_SHORTS_END_START_Pos   (5UL)

Position of END_START field.

Definition at line 8209 of file nrf52_bitfields.h.

◆ RADIO_SHORTS_READY_START_Disabled

#define RADIO_SHORTS_READY_START_Disabled   (0UL)

Disable shortcut

Definition at line 8241 of file nrf52_bitfields.h.

◆ RADIO_SHORTS_READY_START_Enabled

#define RADIO_SHORTS_READY_START_Enabled   (1UL)

Enable shortcut

Definition at line 8242 of file nrf52_bitfields.h.

◆ RADIO_SHORTS_READY_START_Msk

#define RADIO_SHORTS_READY_START_Msk   (0x1UL << RADIO_SHORTS_READY_START_Pos)

Bit mask of READY_START field.

Definition at line 8240 of file nrf52_bitfields.h.

◆ RADIO_SHORTS_READY_START_Pos

#define RADIO_SHORTS_READY_START_Pos   (0UL)

Position of READY_START field.

Definition at line 8239 of file nrf52_bitfields.h.

◆ RADIO_STATE_STATE_Disabled

#define RADIO_STATE_STATE_Disabled   (0UL)

RADIO is in the Disabled state

Definition at line 8691 of file nrf52_bitfields.h.

◆ RADIO_STATE_STATE_Msk

#define RADIO_STATE_STATE_Msk   (0xFUL << RADIO_STATE_STATE_Pos)

Bit mask of STATE field.

Definition at line 8690 of file nrf52_bitfields.h.

◆ RADIO_STATE_STATE_Pos

#define RADIO_STATE_STATE_Pos   (0UL)

Position of STATE field.

Definition at line 8689 of file nrf52_bitfields.h.

◆ RADIO_STATE_STATE_Rx

#define RADIO_STATE_STATE_Rx   (3UL)

RADIO is in the RX state

Definition at line 8694 of file nrf52_bitfields.h.

◆ RADIO_STATE_STATE_RxDisable

#define RADIO_STATE_STATE_RxDisable   (4UL)

RADIO is in the RXDISABLED state

Definition at line 8695 of file nrf52_bitfields.h.

◆ RADIO_STATE_STATE_RxIdle

#define RADIO_STATE_STATE_RxIdle   (2UL)

RADIO is in the RXIDLE state

Definition at line 8693 of file nrf52_bitfields.h.

◆ RADIO_STATE_STATE_RxRu

#define RADIO_STATE_STATE_RxRu   (1UL)

RADIO is in the RXRU state

Definition at line 8692 of file nrf52_bitfields.h.

◆ RADIO_STATE_STATE_Tx

#define RADIO_STATE_STATE_Tx   (11UL)

RADIO is in the TX state

Definition at line 8698 of file nrf52_bitfields.h.

◆ RADIO_STATE_STATE_TxDisable

#define RADIO_STATE_STATE_TxDisable   (12UL)

RADIO is in the TXDISABLED state

Definition at line 8699 of file nrf52_bitfields.h.

◆ RADIO_STATE_STATE_TxIdle

#define RADIO_STATE_STATE_TxIdle   (10UL)

RADIO is in the TXIDLE state

Definition at line 8697 of file nrf52_bitfields.h.

◆ RADIO_STATE_STATE_TxRu

#define RADIO_STATE_STATE_TxRu   (9UL)

RADIO is in the TXRU state

Definition at line 8696 of file nrf52_bitfields.h.

◆ RADIO_TIFS_TIFS_Msk

#define RADIO_TIFS_TIFS_Msk   (0xFFUL << RADIO_TIFS_TIFS_Pos)

Bit mask of TIFS field.

Definition at line 8676 of file nrf52_bitfields.h.

◆ RADIO_TIFS_TIFS_Pos

#define RADIO_TIFS_TIFS_Pos   (0UL)

Position of TIFS field.

Definition at line 8675 of file nrf52_bitfields.h.

◆ RADIO_TXADDRESS_TXADDRESS_Msk

#define RADIO_TXADDRESS_TXADDRESS_Msk   (0x7UL << RADIO_TXADDRESS_TXADDRESS_Pos)

Bit mask of TXADDRESS field.

Definition at line 8587 of file nrf52_bitfields.h.

◆ RADIO_TXADDRESS_TXADDRESS_Pos

#define RADIO_TXADDRESS_TXADDRESS_Pos   (0UL)

Position of TXADDRESS field.

Definition at line 8586 of file nrf52_bitfields.h.

◆ RADIO_TXPOWER_TXPOWER_0dBm

#define RADIO_TXPOWER_TXPOWER_0dBm   (0x00UL)

0 dBm

Definition at line 8454 of file nrf52_bitfields.h.

◆ RADIO_TXPOWER_TXPOWER_Msk

#define RADIO_TXPOWER_TXPOWER_Msk   (0xFFUL << RADIO_TXPOWER_TXPOWER_Pos)

Bit mask of TXPOWER field.

Definition at line 8453 of file nrf52_bitfields.h.

◆ RADIO_TXPOWER_TXPOWER_Neg12dBm

#define RADIO_TXPOWER_TXPOWER_Neg12dBm   (0xF4UL)

-12 dBm

Definition at line 8461 of file nrf52_bitfields.h.

◆ RADIO_TXPOWER_TXPOWER_Neg16dBm

#define RADIO_TXPOWER_TXPOWER_Neg16dBm   (0xF0UL)

-16 dBm

Definition at line 8460 of file nrf52_bitfields.h.

◆ RADIO_TXPOWER_TXPOWER_Neg20dBm

#define RADIO_TXPOWER_TXPOWER_Neg20dBm   (0xECUL)

-20 dBm

Definition at line 8459 of file nrf52_bitfields.h.

◆ RADIO_TXPOWER_TXPOWER_Neg30dBm

#define RADIO_TXPOWER_TXPOWER_Neg30dBm   (0xD8UL)

Deprecated enumerator - -40 dBm

Definition at line 8457 of file nrf52_bitfields.h.

◆ RADIO_TXPOWER_TXPOWER_Neg40dBm

#define RADIO_TXPOWER_TXPOWER_Neg40dBm   (0xD8UL)

-40 dBm

Definition at line 8458 of file nrf52_bitfields.h.

◆ RADIO_TXPOWER_TXPOWER_Neg4dBm

#define RADIO_TXPOWER_TXPOWER_Neg4dBm   (0xFCUL)

-4 dBm

Definition at line 8463 of file nrf52_bitfields.h.

◆ RADIO_TXPOWER_TXPOWER_Neg8dBm

#define RADIO_TXPOWER_TXPOWER_Neg8dBm   (0xF8UL)

-8 dBm

Definition at line 8462 of file nrf52_bitfields.h.

◆ RADIO_TXPOWER_TXPOWER_Pos

#define RADIO_TXPOWER_TXPOWER_Pos   (0UL)

Position of TXPOWER field.

Definition at line 8452 of file nrf52_bitfields.h.

◆ RADIO_TXPOWER_TXPOWER_Pos3dBm

#define RADIO_TXPOWER_TXPOWER_Pos3dBm   (0x03UL)

+3 dBm

Definition at line 8455 of file nrf52_bitfields.h.

◆ RADIO_TXPOWER_TXPOWER_Pos4dBm

#define RADIO_TXPOWER_TXPOWER_Pos4dBm   (0x04UL)

+4 dBm

Definition at line 8456 of file nrf52_bitfields.h.

◆ RNG_CONFIG_DERCEN_Disabled

#define RNG_CONFIG_DERCEN_Disabled   (0UL)

Disabled

Definition at line 8876 of file nrf52_bitfields.h.

◆ RNG_CONFIG_DERCEN_Enabled

#define RNG_CONFIG_DERCEN_Enabled   (1UL)

Enabled

Definition at line 8877 of file nrf52_bitfields.h.

◆ RNG_CONFIG_DERCEN_Msk

#define RNG_CONFIG_DERCEN_Msk   (0x1UL << RNG_CONFIG_DERCEN_Pos)

Bit mask of DERCEN field.

Definition at line 8875 of file nrf52_bitfields.h.

◆ RNG_CONFIG_DERCEN_Pos

#define RNG_CONFIG_DERCEN_Pos   (0UL)

Position of DERCEN field.

Definition at line 8874 of file nrf52_bitfields.h.

◆ RNG_INTENCLR_VALRDY_Clear

#define RNG_INTENCLR_VALRDY_Clear   (1UL)

Disable

Definition at line 8868 of file nrf52_bitfields.h.

◆ RNG_INTENCLR_VALRDY_Disabled

#define RNG_INTENCLR_VALRDY_Disabled   (0UL)

Read: Disabled

Definition at line 8866 of file nrf52_bitfields.h.

◆ RNG_INTENCLR_VALRDY_Enabled

#define RNG_INTENCLR_VALRDY_Enabled   (1UL)

Read: Enabled

Definition at line 8867 of file nrf52_bitfields.h.

◆ RNG_INTENCLR_VALRDY_Msk

#define RNG_INTENCLR_VALRDY_Msk   (0x1UL << RNG_INTENCLR_VALRDY_Pos)

Bit mask of VALRDY field.

Definition at line 8865 of file nrf52_bitfields.h.

◆ RNG_INTENCLR_VALRDY_Pos

#define RNG_INTENCLR_VALRDY_Pos   (0UL)

Position of VALRDY field.

Definition at line 8864 of file nrf52_bitfields.h.

◆ RNG_INTENSET_VALRDY_Disabled

#define RNG_INTENSET_VALRDY_Disabled   (0UL)

Read: Disabled

Definition at line 8856 of file nrf52_bitfields.h.

◆ RNG_INTENSET_VALRDY_Enabled

#define RNG_INTENSET_VALRDY_Enabled   (1UL)

Read: Enabled

Definition at line 8857 of file nrf52_bitfields.h.

◆ RNG_INTENSET_VALRDY_Msk

#define RNG_INTENSET_VALRDY_Msk   (0x1UL << RNG_INTENSET_VALRDY_Pos)

Bit mask of VALRDY field.

Definition at line 8855 of file nrf52_bitfields.h.

◆ RNG_INTENSET_VALRDY_Pos

#define RNG_INTENSET_VALRDY_Pos   (0UL)

Position of VALRDY field.

Definition at line 8854 of file nrf52_bitfields.h.

◆ RNG_INTENSET_VALRDY_Set

#define RNG_INTENSET_VALRDY_Set   (1UL)

Enable

Definition at line 8858 of file nrf52_bitfields.h.

◆ RNG_SHORTS_VALRDY_STOP_Disabled

#define RNG_SHORTS_VALRDY_STOP_Disabled   (0UL)

Disable shortcut

Definition at line 8847 of file nrf52_bitfields.h.

◆ RNG_SHORTS_VALRDY_STOP_Enabled

#define RNG_SHORTS_VALRDY_STOP_Enabled   (1UL)

Enable shortcut

Definition at line 8848 of file nrf52_bitfields.h.

◆ RNG_SHORTS_VALRDY_STOP_Msk

#define RNG_SHORTS_VALRDY_STOP_Msk   (0x1UL << RNG_SHORTS_VALRDY_STOP_Pos)

Bit mask of VALRDY_STOP field.

Definition at line 8846 of file nrf52_bitfields.h.

◆ RNG_SHORTS_VALRDY_STOP_Pos

#define RNG_SHORTS_VALRDY_STOP_Pos   (0UL)

Position of VALRDY_STOP field.

Definition at line 8845 of file nrf52_bitfields.h.

◆ RNG_VALUE_VALUE_Msk

#define RNG_VALUE_VALUE_Msk   (0xFFUL << RNG_VALUE_VALUE_Pos)

Bit mask of VALUE field.

Definition at line 8884 of file nrf52_bitfields.h.

◆ RNG_VALUE_VALUE_Pos

#define RNG_VALUE_VALUE_Pos   (0UL)

Position of VALUE field.

Definition at line 8883 of file nrf52_bitfields.h.

◆ RTC_CC_COMPARE_Msk

#define RTC_CC_COMPARE_Msk   (0xFFFFFFUL << RTC_CC_COMPARE_Pos)

Bit mask of COMPARE field.

Definition at line 9128 of file nrf52_bitfields.h.

◆ RTC_CC_COMPARE_Pos

#define RTC_CC_COMPARE_Pos   (0UL)

Position of COMPARE field.

Definition at line 9127 of file nrf52_bitfields.h.

◆ RTC_COUNTER_COUNTER_Msk

#define RTC_COUNTER_COUNTER_Msk   (0xFFFFFFUL << RTC_COUNTER_COUNTER_Pos)

Bit mask of COUNTER field.

Definition at line 9114 of file nrf52_bitfields.h.

◆ RTC_COUNTER_COUNTER_Pos

#define RTC_COUNTER_COUNTER_Pos   (0UL)

Position of COUNTER field.

Definition at line 9113 of file nrf52_bitfields.h.

◆ RTC_EVTEN_COMPARE0_Disabled

#define RTC_EVTEN_COMPARE0_Disabled   (0UL)

Disable

Definition at line 9004 of file nrf52_bitfields.h.

◆ RTC_EVTEN_COMPARE0_Enabled

#define RTC_EVTEN_COMPARE0_Enabled   (1UL)

Enable

Definition at line 9005 of file nrf52_bitfields.h.

◆ RTC_EVTEN_COMPARE0_Msk

#define RTC_EVTEN_COMPARE0_Msk   (0x1UL << RTC_EVTEN_COMPARE0_Pos)

Bit mask of COMPARE0 field.

Definition at line 9003 of file nrf52_bitfields.h.

◆ RTC_EVTEN_COMPARE0_Pos

#define RTC_EVTEN_COMPARE0_Pos   (16UL)

Position of COMPARE0 field.

Definition at line 9002 of file nrf52_bitfields.h.

◆ RTC_EVTEN_COMPARE1_Disabled

#define RTC_EVTEN_COMPARE1_Disabled   (0UL)

Disable

Definition at line 8998 of file nrf52_bitfields.h.

◆ RTC_EVTEN_COMPARE1_Enabled

#define RTC_EVTEN_COMPARE1_Enabled   (1UL)

Enable

Definition at line 8999 of file nrf52_bitfields.h.

◆ RTC_EVTEN_COMPARE1_Msk

#define RTC_EVTEN_COMPARE1_Msk   (0x1UL << RTC_EVTEN_COMPARE1_Pos)

Bit mask of COMPARE1 field.

Definition at line 8997 of file nrf52_bitfields.h.

◆ RTC_EVTEN_COMPARE1_Pos

#define RTC_EVTEN_COMPARE1_Pos   (17UL)

Position of COMPARE1 field.

Definition at line 8996 of file nrf52_bitfields.h.

◆ RTC_EVTEN_COMPARE2_Disabled

#define RTC_EVTEN_COMPARE2_Disabled   (0UL)

Disable

Definition at line 8992 of file nrf52_bitfields.h.

◆ RTC_EVTEN_COMPARE2_Enabled

#define RTC_EVTEN_COMPARE2_Enabled   (1UL)

Enable

Definition at line 8993 of file nrf52_bitfields.h.

◆ RTC_EVTEN_COMPARE2_Msk

#define RTC_EVTEN_COMPARE2_Msk   (0x1UL << RTC_EVTEN_COMPARE2_Pos)

Bit mask of COMPARE2 field.

Definition at line 8991 of file nrf52_bitfields.h.

◆ RTC_EVTEN_COMPARE2_Pos

#define RTC_EVTEN_COMPARE2_Pos   (18UL)

Position of COMPARE2 field.

Definition at line 8990 of file nrf52_bitfields.h.

◆ RTC_EVTEN_COMPARE3_Disabled

#define RTC_EVTEN_COMPARE3_Disabled   (0UL)

Disable

Definition at line 8986 of file nrf52_bitfields.h.

◆ RTC_EVTEN_COMPARE3_Enabled

#define RTC_EVTEN_COMPARE3_Enabled   (1UL)

Enable

Definition at line 8987 of file nrf52_bitfields.h.

◆ RTC_EVTEN_COMPARE3_Msk

#define RTC_EVTEN_COMPARE3_Msk   (0x1UL << RTC_EVTEN_COMPARE3_Pos)

Bit mask of COMPARE3 field.

Definition at line 8985 of file nrf52_bitfields.h.

◆ RTC_EVTEN_COMPARE3_Pos

#define RTC_EVTEN_COMPARE3_Pos   (19UL)

Position of COMPARE3 field.

Definition at line 8984 of file nrf52_bitfields.h.

◆ RTC_EVTEN_OVRFLW_Disabled

#define RTC_EVTEN_OVRFLW_Disabled   (0UL)

Disable

Definition at line 9010 of file nrf52_bitfields.h.

◆ RTC_EVTEN_OVRFLW_Enabled

#define RTC_EVTEN_OVRFLW_Enabled   (1UL)

Enable

Definition at line 9011 of file nrf52_bitfields.h.

◆ RTC_EVTEN_OVRFLW_Msk

#define RTC_EVTEN_OVRFLW_Msk   (0x1UL << RTC_EVTEN_OVRFLW_Pos)

Bit mask of OVRFLW field.

Definition at line 9009 of file nrf52_bitfields.h.

◆ RTC_EVTEN_OVRFLW_Pos

#define RTC_EVTEN_OVRFLW_Pos   (1UL)

Position of OVRFLW field.

Definition at line 9008 of file nrf52_bitfields.h.

◆ RTC_EVTEN_TICK_Disabled

#define RTC_EVTEN_TICK_Disabled   (0UL)

Disable

Definition at line 9016 of file nrf52_bitfields.h.

◆ RTC_EVTEN_TICK_Enabled

#define RTC_EVTEN_TICK_Enabled   (1UL)

Enable

Definition at line 9017 of file nrf52_bitfields.h.

◆ RTC_EVTEN_TICK_Msk

#define RTC_EVTEN_TICK_Msk   (0x1UL << RTC_EVTEN_TICK_Pos)

Bit mask of TICK field.

Definition at line 9015 of file nrf52_bitfields.h.

◆ RTC_EVTEN_TICK_Pos

#define RTC_EVTEN_TICK_Pos   (0UL)

Position of TICK field.

Definition at line 9014 of file nrf52_bitfields.h.

◆ RTC_EVTENCLR_COMPARE0_Clear

#define RTC_EVTENCLR_COMPARE0_Clear   (1UL)

Disable

Definition at line 9093 of file nrf52_bitfields.h.

◆ RTC_EVTENCLR_COMPARE0_Disabled

#define RTC_EVTENCLR_COMPARE0_Disabled   (0UL)

Read: Disabled

Definition at line 9091 of file nrf52_bitfields.h.

◆ RTC_EVTENCLR_COMPARE0_Enabled

#define RTC_EVTENCLR_COMPARE0_Enabled   (1UL)

Read: Enabled

Definition at line 9092 of file nrf52_bitfields.h.

◆ RTC_EVTENCLR_COMPARE0_Msk

#define RTC_EVTENCLR_COMPARE0_Msk   (0x1UL << RTC_EVTENCLR_COMPARE0_Pos)

Bit mask of COMPARE0 field.

Definition at line 9090 of file nrf52_bitfields.h.

◆ RTC_EVTENCLR_COMPARE0_Pos

#define RTC_EVTENCLR_COMPARE0_Pos   (16UL)

Position of COMPARE0 field.

Definition at line 9089 of file nrf52_bitfields.h.

◆ RTC_EVTENCLR_COMPARE1_Clear

#define RTC_EVTENCLR_COMPARE1_Clear   (1UL)

Disable

Definition at line 9086 of file nrf52_bitfields.h.

◆ RTC_EVTENCLR_COMPARE1_Disabled

#define RTC_EVTENCLR_COMPARE1_Disabled   (0UL)

Read: Disabled

Definition at line 9084 of file nrf52_bitfields.h.

◆ RTC_EVTENCLR_COMPARE1_Enabled

#define RTC_EVTENCLR_COMPARE1_Enabled   (1UL)

Read: Enabled

Definition at line 9085 of file nrf52_bitfields.h.

◆ RTC_EVTENCLR_COMPARE1_Msk

#define RTC_EVTENCLR_COMPARE1_Msk   (0x1UL << RTC_EVTENCLR_COMPARE1_Pos)

Bit mask of COMPARE1 field.

Definition at line 9083 of file nrf52_bitfields.h.

◆ RTC_EVTENCLR_COMPARE1_Pos

#define RTC_EVTENCLR_COMPARE1_Pos   (17UL)

Position of COMPARE1 field.

Definition at line 9082 of file nrf52_bitfields.h.

◆ RTC_EVTENCLR_COMPARE2_Clear

#define RTC_EVTENCLR_COMPARE2_Clear   (1UL)

Disable

Definition at line 9079 of file nrf52_bitfields.h.

◆ RTC_EVTENCLR_COMPARE2_Disabled

#define RTC_EVTENCLR_COMPARE2_Disabled   (0UL)

Read: Disabled

Definition at line 9077 of file nrf52_bitfields.h.

◆ RTC_EVTENCLR_COMPARE2_Enabled

#define RTC_EVTENCLR_COMPARE2_Enabled   (1UL)

Read: Enabled

Definition at line 9078 of file nrf52_bitfields.h.

◆ RTC_EVTENCLR_COMPARE2_Msk

#define RTC_EVTENCLR_COMPARE2_Msk   (0x1UL << RTC_EVTENCLR_COMPARE2_Pos)

Bit mask of COMPARE2 field.

Definition at line 9076 of file nrf52_bitfields.h.

◆ RTC_EVTENCLR_COMPARE2_Pos

#define RTC_EVTENCLR_COMPARE2_Pos   (18UL)

Position of COMPARE2 field.

Definition at line 9075 of file nrf52_bitfields.h.

◆ RTC_EVTENCLR_COMPARE3_Clear

#define RTC_EVTENCLR_COMPARE3_Clear   (1UL)

Disable

Definition at line 9072 of file nrf52_bitfields.h.

◆ RTC_EVTENCLR_COMPARE3_Disabled

#define RTC_EVTENCLR_COMPARE3_Disabled   (0UL)

Read: Disabled

Definition at line 9070 of file nrf52_bitfields.h.

◆ RTC_EVTENCLR_COMPARE3_Enabled

#define RTC_EVTENCLR_COMPARE3_Enabled   (1UL)

Read: Enabled

Definition at line 9071 of file nrf52_bitfields.h.

◆ RTC_EVTENCLR_COMPARE3_Msk

#define RTC_EVTENCLR_COMPARE3_Msk   (0x1UL << RTC_EVTENCLR_COMPARE3_Pos)

Bit mask of COMPARE3 field.

Definition at line 9069 of file nrf52_bitfields.h.

◆ RTC_EVTENCLR_COMPARE3_Pos

#define RTC_EVTENCLR_COMPARE3_Pos   (19UL)

Position of COMPARE3 field.

Definition at line 9068 of file nrf52_bitfields.h.

◆ RTC_EVTENCLR_OVRFLW_Clear

#define RTC_EVTENCLR_OVRFLW_Clear   (1UL)

Disable

Definition at line 9100 of file nrf52_bitfields.h.

◆ RTC_EVTENCLR_OVRFLW_Disabled

#define RTC_EVTENCLR_OVRFLW_Disabled   (0UL)

Read: Disabled

Definition at line 9098 of file nrf52_bitfields.h.

◆ RTC_EVTENCLR_OVRFLW_Enabled

#define RTC_EVTENCLR_OVRFLW_Enabled   (1UL)

Read: Enabled

Definition at line 9099 of file nrf52_bitfields.h.

◆ RTC_EVTENCLR_OVRFLW_Msk

#define RTC_EVTENCLR_OVRFLW_Msk   (0x1UL << RTC_EVTENCLR_OVRFLW_Pos)

Bit mask of OVRFLW field.

Definition at line 9097 of file nrf52_bitfields.h.

◆ RTC_EVTENCLR_OVRFLW_Pos

#define RTC_EVTENCLR_OVRFLW_Pos   (1UL)

Position of OVRFLW field.

Definition at line 9096 of file nrf52_bitfields.h.

◆ RTC_EVTENCLR_TICK_Clear

#define RTC_EVTENCLR_TICK_Clear   (1UL)

Disable

Definition at line 9107 of file nrf52_bitfields.h.

◆ RTC_EVTENCLR_TICK_Disabled

#define RTC_EVTENCLR_TICK_Disabled   (0UL)

Read: Disabled

Definition at line 9105 of file nrf52_bitfields.h.

◆ RTC_EVTENCLR_TICK_Enabled

#define RTC_EVTENCLR_TICK_Enabled   (1UL)

Read: Enabled

Definition at line 9106 of file nrf52_bitfields.h.

◆ RTC_EVTENCLR_TICK_Msk

#define RTC_EVTENCLR_TICK_Msk   (0x1UL << RTC_EVTENCLR_TICK_Pos)

Bit mask of TICK field.

Definition at line 9104 of file nrf52_bitfields.h.

◆ RTC_EVTENCLR_TICK_Pos

#define RTC_EVTENCLR_TICK_Pos   (0UL)

Position of TICK field.

Definition at line 9103 of file nrf52_bitfields.h.

◆ RTC_EVTENSET_COMPARE0_Disabled

#define RTC_EVTENSET_COMPARE0_Disabled   (0UL)

Read: Disabled

Definition at line 9046 of file nrf52_bitfields.h.

◆ RTC_EVTENSET_COMPARE0_Enabled

#define RTC_EVTENSET_COMPARE0_Enabled   (1UL)

Read: Enabled

Definition at line 9047 of file nrf52_bitfields.h.

◆ RTC_EVTENSET_COMPARE0_Msk

#define RTC_EVTENSET_COMPARE0_Msk   (0x1UL << RTC_EVTENSET_COMPARE0_Pos)

Bit mask of COMPARE0 field.

Definition at line 9045 of file nrf52_bitfields.h.

◆ RTC_EVTENSET_COMPARE0_Pos

#define RTC_EVTENSET_COMPARE0_Pos   (16UL)

Position of COMPARE0 field.

Definition at line 9044 of file nrf52_bitfields.h.

◆ RTC_EVTENSET_COMPARE0_Set

#define RTC_EVTENSET_COMPARE0_Set   (1UL)

Enable

Definition at line 9048 of file nrf52_bitfields.h.

◆ RTC_EVTENSET_COMPARE1_Disabled

#define RTC_EVTENSET_COMPARE1_Disabled   (0UL)

Read: Disabled

Definition at line 9039 of file nrf52_bitfields.h.

◆ RTC_EVTENSET_COMPARE1_Enabled

#define RTC_EVTENSET_COMPARE1_Enabled   (1UL)

Read: Enabled

Definition at line 9040 of file nrf52_bitfields.h.

◆ RTC_EVTENSET_COMPARE1_Msk

#define RTC_EVTENSET_COMPARE1_Msk   (0x1UL << RTC_EVTENSET_COMPARE1_Pos)

Bit mask of COMPARE1 field.

Definition at line 9038 of file nrf52_bitfields.h.

◆ RTC_EVTENSET_COMPARE1_Pos

#define RTC_EVTENSET_COMPARE1_Pos   (17UL)

Position of COMPARE1 field.

Definition at line 9037 of file nrf52_bitfields.h.

◆ RTC_EVTENSET_COMPARE1_Set

#define RTC_EVTENSET_COMPARE1_Set   (1UL)

Enable

Definition at line 9041 of file nrf52_bitfields.h.

◆ RTC_EVTENSET_COMPARE2_Disabled

#define RTC_EVTENSET_COMPARE2_Disabled   (0UL)

Read: Disabled

Definition at line 9032 of file nrf52_bitfields.h.

◆ RTC_EVTENSET_COMPARE2_Enabled

#define RTC_EVTENSET_COMPARE2_Enabled   (1UL)

Read: Enabled

Definition at line 9033 of file nrf52_bitfields.h.

◆ RTC_EVTENSET_COMPARE2_Msk

#define RTC_EVTENSET_COMPARE2_Msk   (0x1UL << RTC_EVTENSET_COMPARE2_Pos)

Bit mask of COMPARE2 field.

Definition at line 9031 of file nrf52_bitfields.h.

◆ RTC_EVTENSET_COMPARE2_Pos

#define RTC_EVTENSET_COMPARE2_Pos   (18UL)

Position of COMPARE2 field.

Definition at line 9030 of file nrf52_bitfields.h.

◆ RTC_EVTENSET_COMPARE2_Set

#define RTC_EVTENSET_COMPARE2_Set   (1UL)

Enable

Definition at line 9034 of file nrf52_bitfields.h.

◆ RTC_EVTENSET_COMPARE3_Disabled

#define RTC_EVTENSET_COMPARE3_Disabled   (0UL)

Read: Disabled

Definition at line 9025 of file nrf52_bitfields.h.

◆ RTC_EVTENSET_COMPARE3_Enabled

#define RTC_EVTENSET_COMPARE3_Enabled   (1UL)

Read: Enabled

Definition at line 9026 of file nrf52_bitfields.h.

◆ RTC_EVTENSET_COMPARE3_Msk

#define RTC_EVTENSET_COMPARE3_Msk   (0x1UL << RTC_EVTENSET_COMPARE3_Pos)

Bit mask of COMPARE3 field.

Definition at line 9024 of file nrf52_bitfields.h.

◆ RTC_EVTENSET_COMPARE3_Pos

#define RTC_EVTENSET_COMPARE3_Pos   (19UL)

Position of COMPARE3 field.

Definition at line 9023 of file nrf52_bitfields.h.

◆ RTC_EVTENSET_COMPARE3_Set

#define RTC_EVTENSET_COMPARE3_Set   (1UL)

Enable

Definition at line 9027 of file nrf52_bitfields.h.

◆ RTC_EVTENSET_OVRFLW_Disabled

#define RTC_EVTENSET_OVRFLW_Disabled   (0UL)

Read: Disabled

Definition at line 9053 of file nrf52_bitfields.h.

◆ RTC_EVTENSET_OVRFLW_Enabled

#define RTC_EVTENSET_OVRFLW_Enabled   (1UL)

Read: Enabled

Definition at line 9054 of file nrf52_bitfields.h.

◆ RTC_EVTENSET_OVRFLW_Msk

#define RTC_EVTENSET_OVRFLW_Msk   (0x1UL << RTC_EVTENSET_OVRFLW_Pos)

Bit mask of OVRFLW field.

Definition at line 9052 of file nrf52_bitfields.h.

◆ RTC_EVTENSET_OVRFLW_Pos

#define RTC_EVTENSET_OVRFLW_Pos   (1UL)

Position of OVRFLW field.

Definition at line 9051 of file nrf52_bitfields.h.

◆ RTC_EVTENSET_OVRFLW_Set

#define RTC_EVTENSET_OVRFLW_Set   (1UL)

Enable

Definition at line 9055 of file nrf52_bitfields.h.

◆ RTC_EVTENSET_TICK_Disabled

#define RTC_EVTENSET_TICK_Disabled   (0UL)

Read: Disabled

Definition at line 9060 of file nrf52_bitfields.h.

◆ RTC_EVTENSET_TICK_Enabled

#define RTC_EVTENSET_TICK_Enabled   (1UL)

Read: Enabled

Definition at line 9061 of file nrf52_bitfields.h.

◆ RTC_EVTENSET_TICK_Msk

#define RTC_EVTENSET_TICK_Msk   (0x1UL << RTC_EVTENSET_TICK_Pos)

Bit mask of TICK field.

Definition at line 9059 of file nrf52_bitfields.h.

◆ RTC_EVTENSET_TICK_Pos

#define RTC_EVTENSET_TICK_Pos   (0UL)

Position of TICK field.

Definition at line 9058 of file nrf52_bitfields.h.

◆ RTC_EVTENSET_TICK_Set

#define RTC_EVTENSET_TICK_Set   (1UL)

Enable

Definition at line 9062 of file nrf52_bitfields.h.

◆ RTC_INTENCLR_COMPARE0_Clear

#define RTC_INTENCLR_COMPARE0_Clear   (1UL)

Disable

Definition at line 8964 of file nrf52_bitfields.h.

◆ RTC_INTENCLR_COMPARE0_Disabled

#define RTC_INTENCLR_COMPARE0_Disabled   (0UL)

Read: Disabled

Definition at line 8962 of file nrf52_bitfields.h.

◆ RTC_INTENCLR_COMPARE0_Enabled

#define RTC_INTENCLR_COMPARE0_Enabled   (1UL)

Read: Enabled

Definition at line 8963 of file nrf52_bitfields.h.

◆ RTC_INTENCLR_COMPARE0_Msk

#define RTC_INTENCLR_COMPARE0_Msk   (0x1UL << RTC_INTENCLR_COMPARE0_Pos)

Bit mask of COMPARE0 field.

Definition at line 8961 of file nrf52_bitfields.h.

◆ RTC_INTENCLR_COMPARE0_Pos

#define RTC_INTENCLR_COMPARE0_Pos   (16UL)

Position of COMPARE0 field.

Definition at line 8960 of file nrf52_bitfields.h.

◆ RTC_INTENCLR_COMPARE1_Clear

#define RTC_INTENCLR_COMPARE1_Clear   (1UL)

Disable

Definition at line 8957 of file nrf52_bitfields.h.

◆ RTC_INTENCLR_COMPARE1_Disabled

#define RTC_INTENCLR_COMPARE1_Disabled   (0UL)

Read: Disabled

Definition at line 8955 of file nrf52_bitfields.h.

◆ RTC_INTENCLR_COMPARE1_Enabled

#define RTC_INTENCLR_COMPARE1_Enabled   (1UL)

Read: Enabled

Definition at line 8956 of file nrf52_bitfields.h.

◆ RTC_INTENCLR_COMPARE1_Msk

#define RTC_INTENCLR_COMPARE1_Msk   (0x1UL << RTC_INTENCLR_COMPARE1_Pos)

Bit mask of COMPARE1 field.

Definition at line 8954 of file nrf52_bitfields.h.

◆ RTC_INTENCLR_COMPARE1_Pos

#define RTC_INTENCLR_COMPARE1_Pos   (17UL)

Position of COMPARE1 field.

Definition at line 8953 of file nrf52_bitfields.h.

◆ RTC_INTENCLR_COMPARE2_Clear

#define RTC_INTENCLR_COMPARE2_Clear   (1UL)

Disable

Definition at line 8950 of file nrf52_bitfields.h.

◆ RTC_INTENCLR_COMPARE2_Disabled

#define RTC_INTENCLR_COMPARE2_Disabled   (0UL)

Read: Disabled

Definition at line 8948 of file nrf52_bitfields.h.

◆ RTC_INTENCLR_COMPARE2_Enabled

#define RTC_INTENCLR_COMPARE2_Enabled   (1UL)

Read: Enabled

Definition at line 8949 of file nrf52_bitfields.h.

◆ RTC_INTENCLR_COMPARE2_Msk

#define RTC_INTENCLR_COMPARE2_Msk   (0x1UL << RTC_INTENCLR_COMPARE2_Pos)

Bit mask of COMPARE2 field.

Definition at line 8947 of file nrf52_bitfields.h.

◆ RTC_INTENCLR_COMPARE2_Pos

#define RTC_INTENCLR_COMPARE2_Pos   (18UL)

Position of COMPARE2 field.

Definition at line 8946 of file nrf52_bitfields.h.

◆ RTC_INTENCLR_COMPARE3_Clear

#define RTC_INTENCLR_COMPARE3_Clear   (1UL)

Disable

Definition at line 8943 of file nrf52_bitfields.h.

◆ RTC_INTENCLR_COMPARE3_Disabled

#define RTC_INTENCLR_COMPARE3_Disabled   (0UL)

Read: Disabled

Definition at line 8941 of file nrf52_bitfields.h.

◆ RTC_INTENCLR_COMPARE3_Enabled

#define RTC_INTENCLR_COMPARE3_Enabled   (1UL)

Read: Enabled

Definition at line 8942 of file nrf52_bitfields.h.

◆ RTC_INTENCLR_COMPARE3_Msk

#define RTC_INTENCLR_COMPARE3_Msk   (0x1UL << RTC_INTENCLR_COMPARE3_Pos)

Bit mask of COMPARE3 field.

Definition at line 8940 of file nrf52_bitfields.h.

◆ RTC_INTENCLR_COMPARE3_Pos

#define RTC_INTENCLR_COMPARE3_Pos   (19UL)

Position of COMPARE3 field.

Definition at line 8939 of file nrf52_bitfields.h.

◆ RTC_INTENCLR_OVRFLW_Clear

#define RTC_INTENCLR_OVRFLW_Clear   (1UL)

Disable

Definition at line 8971 of file nrf52_bitfields.h.

◆ RTC_INTENCLR_OVRFLW_Disabled

#define RTC_INTENCLR_OVRFLW_Disabled   (0UL)

Read: Disabled

Definition at line 8969 of file nrf52_bitfields.h.

◆ RTC_INTENCLR_OVRFLW_Enabled

#define RTC_INTENCLR_OVRFLW_Enabled   (1UL)

Read: Enabled

Definition at line 8970 of file nrf52_bitfields.h.

◆ RTC_INTENCLR_OVRFLW_Msk

#define RTC_INTENCLR_OVRFLW_Msk   (0x1UL << RTC_INTENCLR_OVRFLW_Pos)

Bit mask of OVRFLW field.

Definition at line 8968 of file nrf52_bitfields.h.

◆ RTC_INTENCLR_OVRFLW_Pos

#define RTC_INTENCLR_OVRFLW_Pos   (1UL)

Position of OVRFLW field.

Definition at line 8967 of file nrf52_bitfields.h.

◆ RTC_INTENCLR_TICK_Clear

#define RTC_INTENCLR_TICK_Clear   (1UL)

Disable

Definition at line 8978 of file nrf52_bitfields.h.

◆ RTC_INTENCLR_TICK_Disabled

#define RTC_INTENCLR_TICK_Disabled   (0UL)

Read: Disabled

Definition at line 8976 of file nrf52_bitfields.h.

◆ RTC_INTENCLR_TICK_Enabled

#define RTC_INTENCLR_TICK_Enabled   (1UL)

Read: Enabled

Definition at line 8977 of file nrf52_bitfields.h.

◆ RTC_INTENCLR_TICK_Msk

#define RTC_INTENCLR_TICK_Msk   (0x1UL << RTC_INTENCLR_TICK_Pos)

Bit mask of TICK field.

Definition at line 8975 of file nrf52_bitfields.h.

◆ RTC_INTENCLR_TICK_Pos

#define RTC_INTENCLR_TICK_Pos   (0UL)

Position of TICK field.

Definition at line 8974 of file nrf52_bitfields.h.

◆ RTC_INTENSET_COMPARE0_Disabled

#define RTC_INTENSET_COMPARE0_Disabled   (0UL)

Read: Disabled

Definition at line 8917 of file nrf52_bitfields.h.

◆ RTC_INTENSET_COMPARE0_Enabled

#define RTC_INTENSET_COMPARE0_Enabled   (1UL)

Read: Enabled

Definition at line 8918 of file nrf52_bitfields.h.

◆ RTC_INTENSET_COMPARE0_Msk

#define RTC_INTENSET_COMPARE0_Msk   (0x1UL << RTC_INTENSET_COMPARE0_Pos)

Bit mask of COMPARE0 field.

Definition at line 8916 of file nrf52_bitfields.h.

◆ RTC_INTENSET_COMPARE0_Pos

#define RTC_INTENSET_COMPARE0_Pos   (16UL)

Position of COMPARE0 field.

Definition at line 8915 of file nrf52_bitfields.h.

◆ RTC_INTENSET_COMPARE0_Set

#define RTC_INTENSET_COMPARE0_Set   (1UL)

Enable

Definition at line 8919 of file nrf52_bitfields.h.

◆ RTC_INTENSET_COMPARE1_Disabled

#define RTC_INTENSET_COMPARE1_Disabled   (0UL)

Read: Disabled

Definition at line 8910 of file nrf52_bitfields.h.

◆ RTC_INTENSET_COMPARE1_Enabled

#define RTC_INTENSET_COMPARE1_Enabled   (1UL)

Read: Enabled

Definition at line 8911 of file nrf52_bitfields.h.

◆ RTC_INTENSET_COMPARE1_Msk

#define RTC_INTENSET_COMPARE1_Msk   (0x1UL << RTC_INTENSET_COMPARE1_Pos)

Bit mask of COMPARE1 field.

Definition at line 8909 of file nrf52_bitfields.h.

◆ RTC_INTENSET_COMPARE1_Pos

#define RTC_INTENSET_COMPARE1_Pos   (17UL)

Position of COMPARE1 field.

Definition at line 8908 of file nrf52_bitfields.h.

◆ RTC_INTENSET_COMPARE1_Set

#define RTC_INTENSET_COMPARE1_Set   (1UL)

Enable

Definition at line 8912 of file nrf52_bitfields.h.

◆ RTC_INTENSET_COMPARE2_Disabled

#define RTC_INTENSET_COMPARE2_Disabled   (0UL)

Read: Disabled

Definition at line 8903 of file nrf52_bitfields.h.

◆ RTC_INTENSET_COMPARE2_Enabled

#define RTC_INTENSET_COMPARE2_Enabled   (1UL)

Read: Enabled

Definition at line 8904 of file nrf52_bitfields.h.

◆ RTC_INTENSET_COMPARE2_Msk

#define RTC_INTENSET_COMPARE2_Msk   (0x1UL << RTC_INTENSET_COMPARE2_Pos)

Bit mask of COMPARE2 field.

Definition at line 8902 of file nrf52_bitfields.h.

◆ RTC_INTENSET_COMPARE2_Pos

#define RTC_INTENSET_COMPARE2_Pos   (18UL)

Position of COMPARE2 field.

Definition at line 8901 of file nrf52_bitfields.h.

◆ RTC_INTENSET_COMPARE2_Set

#define RTC_INTENSET_COMPARE2_Set   (1UL)

Enable

Definition at line 8905 of file nrf52_bitfields.h.

◆ RTC_INTENSET_COMPARE3_Disabled

#define RTC_INTENSET_COMPARE3_Disabled   (0UL)

Read: Disabled

Definition at line 8896 of file nrf52_bitfields.h.

◆ RTC_INTENSET_COMPARE3_Enabled

#define RTC_INTENSET_COMPARE3_Enabled   (1UL)

Read: Enabled

Definition at line 8897 of file nrf52_bitfields.h.

◆ RTC_INTENSET_COMPARE3_Msk

#define RTC_INTENSET_COMPARE3_Msk   (0x1UL << RTC_INTENSET_COMPARE3_Pos)

Bit mask of COMPARE3 field.

Definition at line 8895 of file nrf52_bitfields.h.

◆ RTC_INTENSET_COMPARE3_Pos

#define RTC_INTENSET_COMPARE3_Pos   (19UL)

Position of COMPARE3 field.

Definition at line 8894 of file nrf52_bitfields.h.

◆ RTC_INTENSET_COMPARE3_Set

#define RTC_INTENSET_COMPARE3_Set   (1UL)

Enable

Definition at line 8898 of file nrf52_bitfields.h.

◆ RTC_INTENSET_OVRFLW_Disabled

#define RTC_INTENSET_OVRFLW_Disabled   (0UL)

Read: Disabled

Definition at line 8924 of file nrf52_bitfields.h.

◆ RTC_INTENSET_OVRFLW_Enabled

#define RTC_INTENSET_OVRFLW_Enabled   (1UL)

Read: Enabled

Definition at line 8925 of file nrf52_bitfields.h.

◆ RTC_INTENSET_OVRFLW_Msk

#define RTC_INTENSET_OVRFLW_Msk   (0x1UL << RTC_INTENSET_OVRFLW_Pos)

Bit mask of OVRFLW field.

Definition at line 8923 of file nrf52_bitfields.h.

◆ RTC_INTENSET_OVRFLW_Pos

#define RTC_INTENSET_OVRFLW_Pos   (1UL)

Position of OVRFLW field.

Definition at line 8922 of file nrf52_bitfields.h.

◆ RTC_INTENSET_OVRFLW_Set

#define RTC_INTENSET_OVRFLW_Set   (1UL)

Enable

Definition at line 8926 of file nrf52_bitfields.h.

◆ RTC_INTENSET_TICK_Disabled

#define RTC_INTENSET_TICK_Disabled   (0UL)

Read: Disabled

Definition at line 8931 of file nrf52_bitfields.h.

◆ RTC_INTENSET_TICK_Enabled

#define RTC_INTENSET_TICK_Enabled   (1UL)

Read: Enabled

Definition at line 8932 of file nrf52_bitfields.h.

◆ RTC_INTENSET_TICK_Msk

#define RTC_INTENSET_TICK_Msk   (0x1UL << RTC_INTENSET_TICK_Pos)

Bit mask of TICK field.

Definition at line 8930 of file nrf52_bitfields.h.

◆ RTC_INTENSET_TICK_Pos

#define RTC_INTENSET_TICK_Pos   (0UL)

Position of TICK field.

Definition at line 8929 of file nrf52_bitfields.h.

◆ RTC_INTENSET_TICK_Set

#define RTC_INTENSET_TICK_Set   (1UL)

Enable

Definition at line 8933 of file nrf52_bitfields.h.

◆ RTC_PRESCALER_PRESCALER_Msk

#define RTC_PRESCALER_PRESCALER_Msk   (0xFFFUL << RTC_PRESCALER_PRESCALER_Pos)

Bit mask of PRESCALER field.

Definition at line 9121 of file nrf52_bitfields.h.

◆ RTC_PRESCALER_PRESCALER_Pos

#define RTC_PRESCALER_PRESCALER_Pos   (0UL)

Position of PRESCALER field.

Definition at line 9120 of file nrf52_bitfields.h.

◆ SAADC_CH_CONFIG_GAIN_Gain1

#define SAADC_CH_CONFIG_GAIN_Gain1   (5UL)

1

Definition at line 9668 of file nrf52_bitfields.h.

◆ SAADC_CH_CONFIG_GAIN_Gain1_2

#define SAADC_CH_CONFIG_GAIN_Gain1_2   (4UL)

1/2

Definition at line 9667 of file nrf52_bitfields.h.

◆ SAADC_CH_CONFIG_GAIN_Gain1_3

#define SAADC_CH_CONFIG_GAIN_Gain1_3   (3UL)

1/3

Definition at line 9666 of file nrf52_bitfields.h.

◆ SAADC_CH_CONFIG_GAIN_Gain1_4

#define SAADC_CH_CONFIG_GAIN_Gain1_4   (2UL)

1/4

Definition at line 9665 of file nrf52_bitfields.h.

◆ SAADC_CH_CONFIG_GAIN_Gain1_5

#define SAADC_CH_CONFIG_GAIN_Gain1_5   (1UL)

1/5

Definition at line 9664 of file nrf52_bitfields.h.

◆ SAADC_CH_CONFIG_GAIN_Gain1_6

#define SAADC_CH_CONFIG_GAIN_Gain1_6   (0UL)

1/6

Definition at line 9663 of file nrf52_bitfields.h.

◆ SAADC_CH_CONFIG_GAIN_Gain2

#define SAADC_CH_CONFIG_GAIN_Gain2   (6UL)

2

Definition at line 9669 of file nrf52_bitfields.h.

◆ SAADC_CH_CONFIG_GAIN_Gain4

#define SAADC_CH_CONFIG_GAIN_Gain4   (7UL)

4

Definition at line 9670 of file nrf52_bitfields.h.

◆ SAADC_CH_CONFIG_GAIN_Msk

#define SAADC_CH_CONFIG_GAIN_Msk   (0x7UL << SAADC_CH_CONFIG_GAIN_Pos)

Bit mask of GAIN field.

Definition at line 9662 of file nrf52_bitfields.h.

◆ SAADC_CH_CONFIG_GAIN_Pos

#define SAADC_CH_CONFIG_GAIN_Pos   (8UL)

Position of GAIN field.

Definition at line 9661 of file nrf52_bitfields.h.

◆ SAADC_CH_CONFIG_MODE_Diff

#define SAADC_CH_CONFIG_MODE_Diff   (1UL)

Differential

Definition at line 9642 of file nrf52_bitfields.h.

◆ SAADC_CH_CONFIG_MODE_Msk

#define SAADC_CH_CONFIG_MODE_Msk   (0x1UL << SAADC_CH_CONFIG_MODE_Pos)

Bit mask of MODE field.

Definition at line 9640 of file nrf52_bitfields.h.

◆ SAADC_CH_CONFIG_MODE_Pos

#define SAADC_CH_CONFIG_MODE_Pos   (20UL)

Position of MODE field.

Definition at line 9639 of file nrf52_bitfields.h.

◆ SAADC_CH_CONFIG_MODE_SE

#define SAADC_CH_CONFIG_MODE_SE   (0UL)

Single ended, PSELN will be ignored, negative input to ADC shorted to GND

Definition at line 9641 of file nrf52_bitfields.h.

◆ SAADC_CH_CONFIG_REFSEL_Internal

#define SAADC_CH_CONFIG_REFSEL_Internal   (0UL)

Internal reference (0.6 V)

Definition at line 9657 of file nrf52_bitfields.h.

◆ SAADC_CH_CONFIG_REFSEL_Msk

#define SAADC_CH_CONFIG_REFSEL_Msk   (0x1UL << SAADC_CH_CONFIG_REFSEL_Pos)

Bit mask of REFSEL field.

Definition at line 9656 of file nrf52_bitfields.h.

◆ SAADC_CH_CONFIG_REFSEL_Pos

#define SAADC_CH_CONFIG_REFSEL_Pos   (12UL)

Position of REFSEL field.

Definition at line 9655 of file nrf52_bitfields.h.

◆ SAADC_CH_CONFIG_REFSEL_VDD1_4

#define SAADC_CH_CONFIG_REFSEL_VDD1_4   (1UL)

VDD/4 as reference

Definition at line 9658 of file nrf52_bitfields.h.

◆ SAADC_CH_CONFIG_RESN_Bypass

#define SAADC_CH_CONFIG_RESN_Bypass   (0UL)

Bypass resistor ladder

Definition at line 9675 of file nrf52_bitfields.h.

◆ SAADC_CH_CONFIG_RESN_Msk

#define SAADC_CH_CONFIG_RESN_Msk   (0x3UL << SAADC_CH_CONFIG_RESN_Pos)

Bit mask of RESN field.

Definition at line 9674 of file nrf52_bitfields.h.

◆ SAADC_CH_CONFIG_RESN_Pos

#define SAADC_CH_CONFIG_RESN_Pos   (4UL)

Position of RESN field.

Definition at line 9673 of file nrf52_bitfields.h.

◆ SAADC_CH_CONFIG_RESN_Pulldown

#define SAADC_CH_CONFIG_RESN_Pulldown   (1UL)

Pull-down to GND

Definition at line 9676 of file nrf52_bitfields.h.

◆ SAADC_CH_CONFIG_RESN_Pullup

#define SAADC_CH_CONFIG_RESN_Pullup   (2UL)

Pull-up to VDD

Definition at line 9677 of file nrf52_bitfields.h.

◆ SAADC_CH_CONFIG_RESN_VDD1_2

#define SAADC_CH_CONFIG_RESN_VDD1_2   (3UL)

Set input at VDD/2

Definition at line 9678 of file nrf52_bitfields.h.

◆ SAADC_CH_CONFIG_RESP_Bypass

#define SAADC_CH_CONFIG_RESP_Bypass   (0UL)

Bypass resistor ladder

Definition at line 9683 of file nrf52_bitfields.h.

◆ SAADC_CH_CONFIG_RESP_Msk

#define SAADC_CH_CONFIG_RESP_Msk   (0x3UL << SAADC_CH_CONFIG_RESP_Pos)

Bit mask of RESP field.

Definition at line 9682 of file nrf52_bitfields.h.

◆ SAADC_CH_CONFIG_RESP_Pos

#define SAADC_CH_CONFIG_RESP_Pos   (0UL)

Position of RESP field.

Definition at line 9681 of file nrf52_bitfields.h.

◆ SAADC_CH_CONFIG_RESP_Pulldown

#define SAADC_CH_CONFIG_RESP_Pulldown   (1UL)

Pull-down to GND

Definition at line 9684 of file nrf52_bitfields.h.

◆ SAADC_CH_CONFIG_RESP_Pullup

#define SAADC_CH_CONFIG_RESP_Pullup   (2UL)

Pull-up to VDD

Definition at line 9685 of file nrf52_bitfields.h.

◆ SAADC_CH_CONFIG_RESP_VDD1_2

#define SAADC_CH_CONFIG_RESP_VDD1_2   (3UL)

Set input at VDD/2

Definition at line 9686 of file nrf52_bitfields.h.

◆ SAADC_CH_CONFIG_TACQ_10us

#define SAADC_CH_CONFIG_TACQ_10us   (2UL)

10 us

Definition at line 9649 of file nrf52_bitfields.h.

◆ SAADC_CH_CONFIG_TACQ_15us

#define SAADC_CH_CONFIG_TACQ_15us   (3UL)

15 us

Definition at line 9650 of file nrf52_bitfields.h.

◆ SAADC_CH_CONFIG_TACQ_20us

#define SAADC_CH_CONFIG_TACQ_20us   (4UL)

20 us

Definition at line 9651 of file nrf52_bitfields.h.

◆ SAADC_CH_CONFIG_TACQ_3us

#define SAADC_CH_CONFIG_TACQ_3us   (0UL)

3 us

Definition at line 9647 of file nrf52_bitfields.h.

◆ SAADC_CH_CONFIG_TACQ_40us

#define SAADC_CH_CONFIG_TACQ_40us   (5UL)

40 us

Definition at line 9652 of file nrf52_bitfields.h.

◆ SAADC_CH_CONFIG_TACQ_5us

#define SAADC_CH_CONFIG_TACQ_5us   (1UL)

5 us

Definition at line 9648 of file nrf52_bitfields.h.

◆ SAADC_CH_CONFIG_TACQ_Msk

#define SAADC_CH_CONFIG_TACQ_Msk   (0x7UL << SAADC_CH_CONFIG_TACQ_Pos)

Bit mask of TACQ field.

Definition at line 9646 of file nrf52_bitfields.h.

◆ SAADC_CH_CONFIG_TACQ_Pos

#define SAADC_CH_CONFIG_TACQ_Pos   (16UL)

Position of TACQ field.

Definition at line 9645 of file nrf52_bitfields.h.

◆ SAADC_CH_LIMIT_HIGH_Msk

#define SAADC_CH_LIMIT_HIGH_Msk   (0xFFFFUL << SAADC_CH_LIMIT_HIGH_Pos)

Bit mask of HIGH field.

Definition at line 9693 of file nrf52_bitfields.h.

◆ SAADC_CH_LIMIT_HIGH_Pos

#define SAADC_CH_LIMIT_HIGH_Pos   (16UL)

Position of HIGH field.

Definition at line 9692 of file nrf52_bitfields.h.

◆ SAADC_CH_LIMIT_LOW_Msk

#define SAADC_CH_LIMIT_LOW_Msk   (0xFFFFUL << SAADC_CH_LIMIT_LOW_Pos)

Bit mask of LOW field.

Definition at line 9697 of file nrf52_bitfields.h.

◆ SAADC_CH_LIMIT_LOW_Pos

#define SAADC_CH_LIMIT_LOW_Pos   (0UL)

Position of LOW field.

Definition at line 9696 of file nrf52_bitfields.h.

◆ SAADC_CH_PSELN_PSELN_AnalogInput0

#define SAADC_CH_PSELN_PSELN_AnalogInput0   (1UL)

AIN0

Definition at line 9625 of file nrf52_bitfields.h.

◆ SAADC_CH_PSELN_PSELN_AnalogInput1

#define SAADC_CH_PSELN_PSELN_AnalogInput1   (2UL)

AIN1

Definition at line 9626 of file nrf52_bitfields.h.

◆ SAADC_CH_PSELN_PSELN_AnalogInput2

#define SAADC_CH_PSELN_PSELN_AnalogInput2   (3UL)

AIN2

Definition at line 9627 of file nrf52_bitfields.h.

◆ SAADC_CH_PSELN_PSELN_AnalogInput3

#define SAADC_CH_PSELN_PSELN_AnalogInput3   (4UL)

AIN3

Definition at line 9628 of file nrf52_bitfields.h.

◆ SAADC_CH_PSELN_PSELN_AnalogInput4

#define SAADC_CH_PSELN_PSELN_AnalogInput4   (5UL)

AIN4

Definition at line 9629 of file nrf52_bitfields.h.

◆ SAADC_CH_PSELN_PSELN_AnalogInput5

#define SAADC_CH_PSELN_PSELN_AnalogInput5   (6UL)

AIN5

Definition at line 9630 of file nrf52_bitfields.h.

◆ SAADC_CH_PSELN_PSELN_AnalogInput6

#define SAADC_CH_PSELN_PSELN_AnalogInput6   (7UL)

AIN6

Definition at line 9631 of file nrf52_bitfields.h.

◆ SAADC_CH_PSELN_PSELN_AnalogInput7

#define SAADC_CH_PSELN_PSELN_AnalogInput7   (8UL)

AIN7

Definition at line 9632 of file nrf52_bitfields.h.

◆ SAADC_CH_PSELN_PSELN_Msk

#define SAADC_CH_PSELN_PSELN_Msk   (0x1FUL << SAADC_CH_PSELN_PSELN_Pos)

Bit mask of PSELN field.

Definition at line 9623 of file nrf52_bitfields.h.

◆ SAADC_CH_PSELN_PSELN_NC

#define SAADC_CH_PSELN_PSELN_NC   (0UL)

Not connected

Definition at line 9624 of file nrf52_bitfields.h.

◆ SAADC_CH_PSELN_PSELN_Pos

#define SAADC_CH_PSELN_PSELN_Pos   (0UL)

Position of PSELN field.

Definition at line 9622 of file nrf52_bitfields.h.

◆ SAADC_CH_PSELN_PSELN_VDD

#define SAADC_CH_PSELN_PSELN_VDD   (9UL)

VDD

Definition at line 9633 of file nrf52_bitfields.h.

◆ SAADC_CH_PSELP_PSELP_AnalogInput0

#define SAADC_CH_PSELP_PSELP_AnalogInput0   (1UL)

AIN0

Definition at line 9608 of file nrf52_bitfields.h.

◆ SAADC_CH_PSELP_PSELP_AnalogInput1

#define SAADC_CH_PSELP_PSELP_AnalogInput1   (2UL)

AIN1

Definition at line 9609 of file nrf52_bitfields.h.

◆ SAADC_CH_PSELP_PSELP_AnalogInput2

#define SAADC_CH_PSELP_PSELP_AnalogInput2   (3UL)

AIN2

Definition at line 9610 of file nrf52_bitfields.h.

◆ SAADC_CH_PSELP_PSELP_AnalogInput3

#define SAADC_CH_PSELP_PSELP_AnalogInput3   (4UL)

AIN3

Definition at line 9611 of file nrf52_bitfields.h.

◆ SAADC_CH_PSELP_PSELP_AnalogInput4

#define SAADC_CH_PSELP_PSELP_AnalogInput4   (5UL)

AIN4

Definition at line 9612 of file nrf52_bitfields.h.

◆ SAADC_CH_PSELP_PSELP_AnalogInput5

#define SAADC_CH_PSELP_PSELP_AnalogInput5   (6UL)

AIN5

Definition at line 9613 of file nrf52_bitfields.h.

◆ SAADC_CH_PSELP_PSELP_AnalogInput6

#define SAADC_CH_PSELP_PSELP_AnalogInput6   (7UL)

AIN6

Definition at line 9614 of file nrf52_bitfields.h.

◆ SAADC_CH_PSELP_PSELP_AnalogInput7

#define SAADC_CH_PSELP_PSELP_AnalogInput7   (8UL)

AIN7

Definition at line 9615 of file nrf52_bitfields.h.

◆ SAADC_CH_PSELP_PSELP_Msk

#define SAADC_CH_PSELP_PSELP_Msk   (0x1FUL << SAADC_CH_PSELP_PSELP_Pos)

Bit mask of PSELP field.

Definition at line 9606 of file nrf52_bitfields.h.

◆ SAADC_CH_PSELP_PSELP_NC

#define SAADC_CH_PSELP_PSELP_NC   (0UL)

Not connected

Definition at line 9607 of file nrf52_bitfields.h.

◆ SAADC_CH_PSELP_PSELP_Pos

#define SAADC_CH_PSELP_PSELP_Pos   (0UL)

Position of PSELP field.

Definition at line 9605 of file nrf52_bitfields.h.

◆ SAADC_CH_PSELP_PSELP_VDD

#define SAADC_CH_PSELP_PSELP_VDD   (9UL)

VDD

Definition at line 9616 of file nrf52_bitfields.h.

◆ SAADC_ENABLE_ENABLE_Disabled

#define SAADC_ENABLE_ENABLE_Disabled   (0UL)

Disable ADC

Definition at line 9598 of file nrf52_bitfields.h.

◆ SAADC_ENABLE_ENABLE_Enabled

#define SAADC_ENABLE_ENABLE_Enabled   (1UL)

Enable ADC

Definition at line 9599 of file nrf52_bitfields.h.

◆ SAADC_ENABLE_ENABLE_Msk

#define SAADC_ENABLE_ENABLE_Msk   (0x1UL << SAADC_ENABLE_ENABLE_Pos)

Bit mask of ENABLE field.

Definition at line 9597 of file nrf52_bitfields.h.

◆ SAADC_ENABLE_ENABLE_Pos

#define SAADC_ENABLE_ENABLE_Pos   (0UL)

Position of ENABLE field.

Definition at line 9596 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CALIBRATEDONE_Disabled

#define SAADC_INTEN_CALIBRATEDONE_Disabled   (0UL)

Disable

Definition at line 9242 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CALIBRATEDONE_Enabled

#define SAADC_INTEN_CALIBRATEDONE_Enabled   (1UL)

Enable

Definition at line 9243 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CALIBRATEDONE_Msk

#define SAADC_INTEN_CALIBRATEDONE_Msk   (0x1UL << SAADC_INTEN_CALIBRATEDONE_Pos)

Bit mask of CALIBRATEDONE field.

Definition at line 9241 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CALIBRATEDONE_Pos

#define SAADC_INTEN_CALIBRATEDONE_Pos   (4UL)

Position of CALIBRATEDONE field.

Definition at line 9240 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH0LIMITH_Disabled

#define SAADC_INTEN_CH0LIMITH_Disabled   (0UL)

Disable

Definition at line 9230 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH0LIMITH_Enabled

#define SAADC_INTEN_CH0LIMITH_Enabled   (1UL)

Enable

Definition at line 9231 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH0LIMITH_Msk

#define SAADC_INTEN_CH0LIMITH_Msk   (0x1UL << SAADC_INTEN_CH0LIMITH_Pos)

Bit mask of CH0LIMITH field.

Definition at line 9229 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH0LIMITH_Pos

#define SAADC_INTEN_CH0LIMITH_Pos   (6UL)

Position of CH0LIMITH field.

Definition at line 9228 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH0LIMITL_Disabled

#define SAADC_INTEN_CH0LIMITL_Disabled   (0UL)

Disable

Definition at line 9224 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH0LIMITL_Enabled

#define SAADC_INTEN_CH0LIMITL_Enabled   (1UL)

Enable

Definition at line 9225 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH0LIMITL_Msk

#define SAADC_INTEN_CH0LIMITL_Msk   (0x1UL << SAADC_INTEN_CH0LIMITL_Pos)

Bit mask of CH0LIMITL field.

Definition at line 9223 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH0LIMITL_Pos

#define SAADC_INTEN_CH0LIMITL_Pos   (7UL)

Position of CH0LIMITL field.

Definition at line 9222 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH1LIMITH_Disabled

#define SAADC_INTEN_CH1LIMITH_Disabled   (0UL)

Disable

Definition at line 9218 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH1LIMITH_Enabled

#define SAADC_INTEN_CH1LIMITH_Enabled   (1UL)

Enable

Definition at line 9219 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH1LIMITH_Msk

#define SAADC_INTEN_CH1LIMITH_Msk   (0x1UL << SAADC_INTEN_CH1LIMITH_Pos)

Bit mask of CH1LIMITH field.

Definition at line 9217 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH1LIMITH_Pos

#define SAADC_INTEN_CH1LIMITH_Pos   (8UL)

Position of CH1LIMITH field.

Definition at line 9216 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH1LIMITL_Disabled

#define SAADC_INTEN_CH1LIMITL_Disabled   (0UL)

Disable

Definition at line 9212 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH1LIMITL_Enabled

#define SAADC_INTEN_CH1LIMITL_Enabled   (1UL)

Enable

Definition at line 9213 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH1LIMITL_Msk

#define SAADC_INTEN_CH1LIMITL_Msk   (0x1UL << SAADC_INTEN_CH1LIMITL_Pos)

Bit mask of CH1LIMITL field.

Definition at line 9211 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH1LIMITL_Pos

#define SAADC_INTEN_CH1LIMITL_Pos   (9UL)

Position of CH1LIMITL field.

Definition at line 9210 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH2LIMITH_Disabled

#define SAADC_INTEN_CH2LIMITH_Disabled   (0UL)

Disable

Definition at line 9206 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH2LIMITH_Enabled

#define SAADC_INTEN_CH2LIMITH_Enabled   (1UL)

Enable

Definition at line 9207 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH2LIMITH_Msk

#define SAADC_INTEN_CH2LIMITH_Msk   (0x1UL << SAADC_INTEN_CH2LIMITH_Pos)

Bit mask of CH2LIMITH field.

Definition at line 9205 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH2LIMITH_Pos

#define SAADC_INTEN_CH2LIMITH_Pos   (10UL)

Position of CH2LIMITH field.

Definition at line 9204 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH2LIMITL_Disabled

#define SAADC_INTEN_CH2LIMITL_Disabled   (0UL)

Disable

Definition at line 9200 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH2LIMITL_Enabled

#define SAADC_INTEN_CH2LIMITL_Enabled   (1UL)

Enable

Definition at line 9201 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH2LIMITL_Msk

#define SAADC_INTEN_CH2LIMITL_Msk   (0x1UL << SAADC_INTEN_CH2LIMITL_Pos)

Bit mask of CH2LIMITL field.

Definition at line 9199 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH2LIMITL_Pos

#define SAADC_INTEN_CH2LIMITL_Pos   (11UL)

Position of CH2LIMITL field.

Definition at line 9198 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH3LIMITH_Disabled

#define SAADC_INTEN_CH3LIMITH_Disabled   (0UL)

Disable

Definition at line 9194 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH3LIMITH_Enabled

#define SAADC_INTEN_CH3LIMITH_Enabled   (1UL)

Enable

Definition at line 9195 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH3LIMITH_Msk

#define SAADC_INTEN_CH3LIMITH_Msk   (0x1UL << SAADC_INTEN_CH3LIMITH_Pos)

Bit mask of CH3LIMITH field.

Definition at line 9193 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH3LIMITH_Pos

#define SAADC_INTEN_CH3LIMITH_Pos   (12UL)

Position of CH3LIMITH field.

Definition at line 9192 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH3LIMITL_Disabled

#define SAADC_INTEN_CH3LIMITL_Disabled   (0UL)

Disable

Definition at line 9188 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH3LIMITL_Enabled

#define SAADC_INTEN_CH3LIMITL_Enabled   (1UL)

Enable

Definition at line 9189 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH3LIMITL_Msk

#define SAADC_INTEN_CH3LIMITL_Msk   (0x1UL << SAADC_INTEN_CH3LIMITL_Pos)

Bit mask of CH3LIMITL field.

Definition at line 9187 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH3LIMITL_Pos

#define SAADC_INTEN_CH3LIMITL_Pos   (13UL)

Position of CH3LIMITL field.

Definition at line 9186 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH4LIMITH_Disabled

#define SAADC_INTEN_CH4LIMITH_Disabled   (0UL)

Disable

Definition at line 9182 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH4LIMITH_Enabled

#define SAADC_INTEN_CH4LIMITH_Enabled   (1UL)

Enable

Definition at line 9183 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH4LIMITH_Msk

#define SAADC_INTEN_CH4LIMITH_Msk   (0x1UL << SAADC_INTEN_CH4LIMITH_Pos)

Bit mask of CH4LIMITH field.

Definition at line 9181 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH4LIMITH_Pos

#define SAADC_INTEN_CH4LIMITH_Pos   (14UL)

Position of CH4LIMITH field.

Definition at line 9180 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH4LIMITL_Disabled

#define SAADC_INTEN_CH4LIMITL_Disabled   (0UL)

Disable

Definition at line 9176 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH4LIMITL_Enabled

#define SAADC_INTEN_CH4LIMITL_Enabled   (1UL)

Enable

Definition at line 9177 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH4LIMITL_Msk

#define SAADC_INTEN_CH4LIMITL_Msk   (0x1UL << SAADC_INTEN_CH4LIMITL_Pos)

Bit mask of CH4LIMITL field.

Definition at line 9175 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH4LIMITL_Pos

#define SAADC_INTEN_CH4LIMITL_Pos   (15UL)

Position of CH4LIMITL field.

Definition at line 9174 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH5LIMITH_Disabled

#define SAADC_INTEN_CH5LIMITH_Disabled   (0UL)

Disable

Definition at line 9170 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH5LIMITH_Enabled

#define SAADC_INTEN_CH5LIMITH_Enabled   (1UL)

Enable

Definition at line 9171 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH5LIMITH_Msk

#define SAADC_INTEN_CH5LIMITH_Msk   (0x1UL << SAADC_INTEN_CH5LIMITH_Pos)

Bit mask of CH5LIMITH field.

Definition at line 9169 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH5LIMITH_Pos

#define SAADC_INTEN_CH5LIMITH_Pos   (16UL)

Position of CH5LIMITH field.

Definition at line 9168 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH5LIMITL_Disabled

#define SAADC_INTEN_CH5LIMITL_Disabled   (0UL)

Disable

Definition at line 9164 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH5LIMITL_Enabled

#define SAADC_INTEN_CH5LIMITL_Enabled   (1UL)

Enable

Definition at line 9165 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH5LIMITL_Msk

#define SAADC_INTEN_CH5LIMITL_Msk   (0x1UL << SAADC_INTEN_CH5LIMITL_Pos)

Bit mask of CH5LIMITL field.

Definition at line 9163 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH5LIMITL_Pos

#define SAADC_INTEN_CH5LIMITL_Pos   (17UL)

Position of CH5LIMITL field.

Definition at line 9162 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH6LIMITH_Disabled

#define SAADC_INTEN_CH6LIMITH_Disabled   (0UL)

Disable

Definition at line 9158 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH6LIMITH_Enabled

#define SAADC_INTEN_CH6LIMITH_Enabled   (1UL)

Enable

Definition at line 9159 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH6LIMITH_Msk

#define SAADC_INTEN_CH6LIMITH_Msk   (0x1UL << SAADC_INTEN_CH6LIMITH_Pos)

Bit mask of CH6LIMITH field.

Definition at line 9157 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH6LIMITH_Pos

#define SAADC_INTEN_CH6LIMITH_Pos   (18UL)

Position of CH6LIMITH field.

Definition at line 9156 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH6LIMITL_Disabled

#define SAADC_INTEN_CH6LIMITL_Disabled   (0UL)

Disable

Definition at line 9152 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH6LIMITL_Enabled

#define SAADC_INTEN_CH6LIMITL_Enabled   (1UL)

Enable

Definition at line 9153 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH6LIMITL_Msk

#define SAADC_INTEN_CH6LIMITL_Msk   (0x1UL << SAADC_INTEN_CH6LIMITL_Pos)

Bit mask of CH6LIMITL field.

Definition at line 9151 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH6LIMITL_Pos

#define SAADC_INTEN_CH6LIMITL_Pos   (19UL)

Position of CH6LIMITL field.

Definition at line 9150 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH7LIMITH_Disabled

#define SAADC_INTEN_CH7LIMITH_Disabled   (0UL)

Disable

Definition at line 9146 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH7LIMITH_Enabled

#define SAADC_INTEN_CH7LIMITH_Enabled   (1UL)

Enable

Definition at line 9147 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH7LIMITH_Msk

#define SAADC_INTEN_CH7LIMITH_Msk   (0x1UL << SAADC_INTEN_CH7LIMITH_Pos)

Bit mask of CH7LIMITH field.

Definition at line 9145 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH7LIMITH_Pos

#define SAADC_INTEN_CH7LIMITH_Pos   (20UL)

Position of CH7LIMITH field.

Definition at line 9144 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH7LIMITL_Disabled

#define SAADC_INTEN_CH7LIMITL_Disabled   (0UL)

Disable

Definition at line 9140 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH7LIMITL_Enabled

#define SAADC_INTEN_CH7LIMITL_Enabled   (1UL)

Enable

Definition at line 9141 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH7LIMITL_Msk

#define SAADC_INTEN_CH7LIMITL_Msk   (0x1UL << SAADC_INTEN_CH7LIMITL_Pos)

Bit mask of CH7LIMITL field.

Definition at line 9139 of file nrf52_bitfields.h.

◆ SAADC_INTEN_CH7LIMITL_Pos

#define SAADC_INTEN_CH7LIMITL_Pos   (21UL)

Position of CH7LIMITL field.

Definition at line 9138 of file nrf52_bitfields.h.

◆ SAADC_INTEN_DONE_Disabled

#define SAADC_INTEN_DONE_Disabled   (0UL)

Disable

Definition at line 9254 of file nrf52_bitfields.h.

◆ SAADC_INTEN_DONE_Enabled

#define SAADC_INTEN_DONE_Enabled   (1UL)

Enable

Definition at line 9255 of file nrf52_bitfields.h.

◆ SAADC_INTEN_DONE_Msk

#define SAADC_INTEN_DONE_Msk   (0x1UL << SAADC_INTEN_DONE_Pos)

Bit mask of DONE field.

Definition at line 9253 of file nrf52_bitfields.h.

◆ SAADC_INTEN_DONE_Pos

#define SAADC_INTEN_DONE_Pos   (2UL)

Position of DONE field.

Definition at line 9252 of file nrf52_bitfields.h.

◆ SAADC_INTEN_END_Disabled

#define SAADC_INTEN_END_Disabled   (0UL)

Disable

Definition at line 9260 of file nrf52_bitfields.h.

◆ SAADC_INTEN_END_Enabled

#define SAADC_INTEN_END_Enabled   (1UL)

Enable

Definition at line 9261 of file nrf52_bitfields.h.

◆ SAADC_INTEN_END_Msk

#define SAADC_INTEN_END_Msk   (0x1UL << SAADC_INTEN_END_Pos)

Bit mask of END field.

Definition at line 9259 of file nrf52_bitfields.h.

◆ SAADC_INTEN_END_Pos

#define SAADC_INTEN_END_Pos   (1UL)

Position of END field.

Definition at line 9258 of file nrf52_bitfields.h.

◆ SAADC_INTEN_RESULTDONE_Disabled

#define SAADC_INTEN_RESULTDONE_Disabled   (0UL)

Disable

Definition at line 9248 of file nrf52_bitfields.h.

◆ SAADC_INTEN_RESULTDONE_Enabled

#define SAADC_INTEN_RESULTDONE_Enabled   (1UL)

Enable

Definition at line 9249 of file nrf52_bitfields.h.

◆ SAADC_INTEN_RESULTDONE_Msk

#define SAADC_INTEN_RESULTDONE_Msk   (0x1UL << SAADC_INTEN_RESULTDONE_Pos)

Bit mask of RESULTDONE field.

Definition at line 9247 of file nrf52_bitfields.h.

◆ SAADC_INTEN_RESULTDONE_Pos

#define SAADC_INTEN_RESULTDONE_Pos   (3UL)

Position of RESULTDONE field.

Definition at line 9246 of file nrf52_bitfields.h.

◆ SAADC_INTEN_STARTED_Disabled

#define SAADC_INTEN_STARTED_Disabled   (0UL)

Disable

Definition at line 9266 of file nrf52_bitfields.h.

◆ SAADC_INTEN_STARTED_Enabled

#define SAADC_INTEN_STARTED_Enabled   (1UL)

Enable

Definition at line 9267 of file nrf52_bitfields.h.

◆ SAADC_INTEN_STARTED_Msk

#define SAADC_INTEN_STARTED_Msk   (0x1UL << SAADC_INTEN_STARTED_Pos)

Bit mask of STARTED field.

Definition at line 9265 of file nrf52_bitfields.h.

◆ SAADC_INTEN_STARTED_Pos

#define SAADC_INTEN_STARTED_Pos   (0UL)

Position of STARTED field.

Definition at line 9264 of file nrf52_bitfields.h.

◆ SAADC_INTEN_STOPPED_Disabled

#define SAADC_INTEN_STOPPED_Disabled   (0UL)

Disable

Definition at line 9236 of file nrf52_bitfields.h.

◆ SAADC_INTEN_STOPPED_Enabled

#define SAADC_INTEN_STOPPED_Enabled   (1UL)

Enable

Definition at line 9237 of file nrf52_bitfields.h.

◆ SAADC_INTEN_STOPPED_Msk

#define SAADC_INTEN_STOPPED_Msk   (0x1UL << SAADC_INTEN_STOPPED_Pos)

Bit mask of STOPPED field.

Definition at line 9235 of file nrf52_bitfields.h.

◆ SAADC_INTEN_STOPPED_Pos

#define SAADC_INTEN_STOPPED_Pos   (5UL)

Position of STOPPED field.

Definition at line 9234 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CALIBRATEDONE_Clear

#define SAADC_INTENCLR_CALIBRATEDONE_Clear   (1UL)

Disable

Definition at line 9553 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CALIBRATEDONE_Disabled

#define SAADC_INTENCLR_CALIBRATEDONE_Disabled   (0UL)

Read: Disabled

Definition at line 9551 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CALIBRATEDONE_Enabled

#define SAADC_INTENCLR_CALIBRATEDONE_Enabled   (1UL)

Read: Enabled

Definition at line 9552 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CALIBRATEDONE_Msk

#define SAADC_INTENCLR_CALIBRATEDONE_Msk   (0x1UL << SAADC_INTENCLR_CALIBRATEDONE_Pos)

Bit mask of CALIBRATEDONE field.

Definition at line 9550 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CALIBRATEDONE_Pos

#define SAADC_INTENCLR_CALIBRATEDONE_Pos   (4UL)

Position of CALIBRATEDONE field.

Definition at line 9549 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH0LIMITH_Clear

#define SAADC_INTENCLR_CH0LIMITH_Clear   (1UL)

Disable

Definition at line 9539 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH0LIMITH_Disabled

#define SAADC_INTENCLR_CH0LIMITH_Disabled   (0UL)

Read: Disabled

Definition at line 9537 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH0LIMITH_Enabled

#define SAADC_INTENCLR_CH0LIMITH_Enabled   (1UL)

Read: Enabled

Definition at line 9538 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH0LIMITH_Msk

#define SAADC_INTENCLR_CH0LIMITH_Msk   (0x1UL << SAADC_INTENCLR_CH0LIMITH_Pos)

Bit mask of CH0LIMITH field.

Definition at line 9536 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH0LIMITH_Pos

#define SAADC_INTENCLR_CH0LIMITH_Pos   (6UL)

Position of CH0LIMITH field.

Definition at line 9535 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH0LIMITL_Clear

#define SAADC_INTENCLR_CH0LIMITL_Clear   (1UL)

Disable

Definition at line 9532 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH0LIMITL_Disabled

#define SAADC_INTENCLR_CH0LIMITL_Disabled   (0UL)

Read: Disabled

Definition at line 9530 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH0LIMITL_Enabled

#define SAADC_INTENCLR_CH0LIMITL_Enabled   (1UL)

Read: Enabled

Definition at line 9531 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH0LIMITL_Msk

#define SAADC_INTENCLR_CH0LIMITL_Msk   (0x1UL << SAADC_INTENCLR_CH0LIMITL_Pos)

Bit mask of CH0LIMITL field.

Definition at line 9529 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH0LIMITL_Pos

#define SAADC_INTENCLR_CH0LIMITL_Pos   (7UL)

Position of CH0LIMITL field.

Definition at line 9528 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH1LIMITH_Clear

#define SAADC_INTENCLR_CH1LIMITH_Clear   (1UL)

Disable

Definition at line 9525 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH1LIMITH_Disabled

#define SAADC_INTENCLR_CH1LIMITH_Disabled   (0UL)

Read: Disabled

Definition at line 9523 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH1LIMITH_Enabled

#define SAADC_INTENCLR_CH1LIMITH_Enabled   (1UL)

Read: Enabled

Definition at line 9524 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH1LIMITH_Msk

#define SAADC_INTENCLR_CH1LIMITH_Msk   (0x1UL << SAADC_INTENCLR_CH1LIMITH_Pos)

Bit mask of CH1LIMITH field.

Definition at line 9522 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH1LIMITH_Pos

#define SAADC_INTENCLR_CH1LIMITH_Pos   (8UL)

Position of CH1LIMITH field.

Definition at line 9521 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH1LIMITL_Clear

#define SAADC_INTENCLR_CH1LIMITL_Clear   (1UL)

Disable

Definition at line 9518 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH1LIMITL_Disabled

#define SAADC_INTENCLR_CH1LIMITL_Disabled   (0UL)

Read: Disabled

Definition at line 9516 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH1LIMITL_Enabled

#define SAADC_INTENCLR_CH1LIMITL_Enabled   (1UL)

Read: Enabled

Definition at line 9517 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH1LIMITL_Msk

#define SAADC_INTENCLR_CH1LIMITL_Msk   (0x1UL << SAADC_INTENCLR_CH1LIMITL_Pos)

Bit mask of CH1LIMITL field.

Definition at line 9515 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH1LIMITL_Pos

#define SAADC_INTENCLR_CH1LIMITL_Pos   (9UL)

Position of CH1LIMITL field.

Definition at line 9514 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH2LIMITH_Clear

#define SAADC_INTENCLR_CH2LIMITH_Clear   (1UL)

Disable

Definition at line 9511 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH2LIMITH_Disabled

#define SAADC_INTENCLR_CH2LIMITH_Disabled   (0UL)

Read: Disabled

Definition at line 9509 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH2LIMITH_Enabled

#define SAADC_INTENCLR_CH2LIMITH_Enabled   (1UL)

Read: Enabled

Definition at line 9510 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH2LIMITH_Msk

#define SAADC_INTENCLR_CH2LIMITH_Msk   (0x1UL << SAADC_INTENCLR_CH2LIMITH_Pos)

Bit mask of CH2LIMITH field.

Definition at line 9508 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH2LIMITH_Pos

#define SAADC_INTENCLR_CH2LIMITH_Pos   (10UL)

Position of CH2LIMITH field.

Definition at line 9507 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH2LIMITL_Clear

#define SAADC_INTENCLR_CH2LIMITL_Clear   (1UL)

Disable

Definition at line 9504 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH2LIMITL_Disabled

#define SAADC_INTENCLR_CH2LIMITL_Disabled   (0UL)

Read: Disabled

Definition at line 9502 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH2LIMITL_Enabled

#define SAADC_INTENCLR_CH2LIMITL_Enabled   (1UL)

Read: Enabled

Definition at line 9503 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH2LIMITL_Msk

#define SAADC_INTENCLR_CH2LIMITL_Msk   (0x1UL << SAADC_INTENCLR_CH2LIMITL_Pos)

Bit mask of CH2LIMITL field.

Definition at line 9501 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH2LIMITL_Pos

#define SAADC_INTENCLR_CH2LIMITL_Pos   (11UL)

Position of CH2LIMITL field.

Definition at line 9500 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH3LIMITH_Clear

#define SAADC_INTENCLR_CH3LIMITH_Clear   (1UL)

Disable

Definition at line 9497 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH3LIMITH_Disabled

#define SAADC_INTENCLR_CH3LIMITH_Disabled   (0UL)

Read: Disabled

Definition at line 9495 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH3LIMITH_Enabled

#define SAADC_INTENCLR_CH3LIMITH_Enabled   (1UL)

Read: Enabled

Definition at line 9496 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH3LIMITH_Msk

#define SAADC_INTENCLR_CH3LIMITH_Msk   (0x1UL << SAADC_INTENCLR_CH3LIMITH_Pos)

Bit mask of CH3LIMITH field.

Definition at line 9494 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH3LIMITH_Pos

#define SAADC_INTENCLR_CH3LIMITH_Pos   (12UL)

Position of CH3LIMITH field.

Definition at line 9493 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH3LIMITL_Clear

#define SAADC_INTENCLR_CH3LIMITL_Clear   (1UL)

Disable

Definition at line 9490 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH3LIMITL_Disabled

#define SAADC_INTENCLR_CH3LIMITL_Disabled   (0UL)

Read: Disabled

Definition at line 9488 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH3LIMITL_Enabled

#define SAADC_INTENCLR_CH3LIMITL_Enabled   (1UL)

Read: Enabled

Definition at line 9489 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH3LIMITL_Msk

#define SAADC_INTENCLR_CH3LIMITL_Msk   (0x1UL << SAADC_INTENCLR_CH3LIMITL_Pos)

Bit mask of CH3LIMITL field.

Definition at line 9487 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH3LIMITL_Pos

#define SAADC_INTENCLR_CH3LIMITL_Pos   (13UL)

Position of CH3LIMITL field.

Definition at line 9486 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH4LIMITH_Clear

#define SAADC_INTENCLR_CH4LIMITH_Clear   (1UL)

Disable

Definition at line 9483 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH4LIMITH_Disabled

#define SAADC_INTENCLR_CH4LIMITH_Disabled   (0UL)

Read: Disabled

Definition at line 9481 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH4LIMITH_Enabled

#define SAADC_INTENCLR_CH4LIMITH_Enabled   (1UL)

Read: Enabled

Definition at line 9482 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH4LIMITH_Msk

#define SAADC_INTENCLR_CH4LIMITH_Msk   (0x1UL << SAADC_INTENCLR_CH4LIMITH_Pos)

Bit mask of CH4LIMITH field.

Definition at line 9480 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH4LIMITH_Pos

#define SAADC_INTENCLR_CH4LIMITH_Pos   (14UL)

Position of CH4LIMITH field.

Definition at line 9479 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH4LIMITL_Clear

#define SAADC_INTENCLR_CH4LIMITL_Clear   (1UL)

Disable

Definition at line 9476 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH4LIMITL_Disabled

#define SAADC_INTENCLR_CH4LIMITL_Disabled   (0UL)

Read: Disabled

Definition at line 9474 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH4LIMITL_Enabled

#define SAADC_INTENCLR_CH4LIMITL_Enabled   (1UL)

Read: Enabled

Definition at line 9475 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH4LIMITL_Msk

#define SAADC_INTENCLR_CH4LIMITL_Msk   (0x1UL << SAADC_INTENCLR_CH4LIMITL_Pos)

Bit mask of CH4LIMITL field.

Definition at line 9473 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH4LIMITL_Pos

#define SAADC_INTENCLR_CH4LIMITL_Pos   (15UL)

Position of CH4LIMITL field.

Definition at line 9472 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH5LIMITH_Clear

#define SAADC_INTENCLR_CH5LIMITH_Clear   (1UL)

Disable

Definition at line 9469 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH5LIMITH_Disabled

#define SAADC_INTENCLR_CH5LIMITH_Disabled   (0UL)

Read: Disabled

Definition at line 9467 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH5LIMITH_Enabled

#define SAADC_INTENCLR_CH5LIMITH_Enabled   (1UL)

Read: Enabled

Definition at line 9468 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH5LIMITH_Msk

#define SAADC_INTENCLR_CH5LIMITH_Msk   (0x1UL << SAADC_INTENCLR_CH5LIMITH_Pos)

Bit mask of CH5LIMITH field.

Definition at line 9466 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH5LIMITH_Pos

#define SAADC_INTENCLR_CH5LIMITH_Pos   (16UL)

Position of CH5LIMITH field.

Definition at line 9465 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH5LIMITL_Clear

#define SAADC_INTENCLR_CH5LIMITL_Clear   (1UL)

Disable

Definition at line 9462 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH5LIMITL_Disabled

#define SAADC_INTENCLR_CH5LIMITL_Disabled   (0UL)

Read: Disabled

Definition at line 9460 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH5LIMITL_Enabled

#define SAADC_INTENCLR_CH5LIMITL_Enabled   (1UL)

Read: Enabled

Definition at line 9461 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH5LIMITL_Msk

#define SAADC_INTENCLR_CH5LIMITL_Msk   (0x1UL << SAADC_INTENCLR_CH5LIMITL_Pos)

Bit mask of CH5LIMITL field.

Definition at line 9459 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH5LIMITL_Pos

#define SAADC_INTENCLR_CH5LIMITL_Pos   (17UL)

Position of CH5LIMITL field.

Definition at line 9458 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH6LIMITH_Clear

#define SAADC_INTENCLR_CH6LIMITH_Clear   (1UL)

Disable

Definition at line 9455 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH6LIMITH_Disabled

#define SAADC_INTENCLR_CH6LIMITH_Disabled   (0UL)

Read: Disabled

Definition at line 9453 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH6LIMITH_Enabled

#define SAADC_INTENCLR_CH6LIMITH_Enabled   (1UL)

Read: Enabled

Definition at line 9454 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH6LIMITH_Msk

#define SAADC_INTENCLR_CH6LIMITH_Msk   (0x1UL << SAADC_INTENCLR_CH6LIMITH_Pos)

Bit mask of CH6LIMITH field.

Definition at line 9452 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH6LIMITH_Pos

#define SAADC_INTENCLR_CH6LIMITH_Pos   (18UL)

Position of CH6LIMITH field.

Definition at line 9451 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH6LIMITL_Clear

#define SAADC_INTENCLR_CH6LIMITL_Clear   (1UL)

Disable

Definition at line 9448 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH6LIMITL_Disabled

#define SAADC_INTENCLR_CH6LIMITL_Disabled   (0UL)

Read: Disabled

Definition at line 9446 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH6LIMITL_Enabled

#define SAADC_INTENCLR_CH6LIMITL_Enabled   (1UL)

Read: Enabled

Definition at line 9447 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH6LIMITL_Msk

#define SAADC_INTENCLR_CH6LIMITL_Msk   (0x1UL << SAADC_INTENCLR_CH6LIMITL_Pos)

Bit mask of CH6LIMITL field.

Definition at line 9445 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH6LIMITL_Pos

#define SAADC_INTENCLR_CH6LIMITL_Pos   (19UL)

Position of CH6LIMITL field.

Definition at line 9444 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH7LIMITH_Clear

#define SAADC_INTENCLR_CH7LIMITH_Clear   (1UL)

Disable

Definition at line 9441 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH7LIMITH_Disabled

#define SAADC_INTENCLR_CH7LIMITH_Disabled   (0UL)

Read: Disabled

Definition at line 9439 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH7LIMITH_Enabled

#define SAADC_INTENCLR_CH7LIMITH_Enabled   (1UL)

Read: Enabled

Definition at line 9440 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH7LIMITH_Msk

#define SAADC_INTENCLR_CH7LIMITH_Msk   (0x1UL << SAADC_INTENCLR_CH7LIMITH_Pos)

Bit mask of CH7LIMITH field.

Definition at line 9438 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH7LIMITH_Pos

#define SAADC_INTENCLR_CH7LIMITH_Pos   (20UL)

Position of CH7LIMITH field.

Definition at line 9437 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH7LIMITL_Clear

#define SAADC_INTENCLR_CH7LIMITL_Clear   (1UL)

Disable

Definition at line 9434 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH7LIMITL_Disabled

#define SAADC_INTENCLR_CH7LIMITL_Disabled   (0UL)

Read: Disabled

Definition at line 9432 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH7LIMITL_Enabled

#define SAADC_INTENCLR_CH7LIMITL_Enabled   (1UL)

Read: Enabled

Definition at line 9433 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH7LIMITL_Msk

#define SAADC_INTENCLR_CH7LIMITL_Msk   (0x1UL << SAADC_INTENCLR_CH7LIMITL_Pos)

Bit mask of CH7LIMITL field.

Definition at line 9431 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_CH7LIMITL_Pos

#define SAADC_INTENCLR_CH7LIMITL_Pos   (21UL)

Position of CH7LIMITL field.

Definition at line 9430 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_DONE_Clear

#define SAADC_INTENCLR_DONE_Clear   (1UL)

Disable

Definition at line 9567 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_DONE_Disabled

#define SAADC_INTENCLR_DONE_Disabled   (0UL)

Read: Disabled

Definition at line 9565 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_DONE_Enabled

#define SAADC_INTENCLR_DONE_Enabled   (1UL)

Read: Enabled

Definition at line 9566 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_DONE_Msk

#define SAADC_INTENCLR_DONE_Msk   (0x1UL << SAADC_INTENCLR_DONE_Pos)

Bit mask of DONE field.

Definition at line 9564 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_DONE_Pos

#define SAADC_INTENCLR_DONE_Pos   (2UL)

Position of DONE field.

Definition at line 9563 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_END_Clear

#define SAADC_INTENCLR_END_Clear   (1UL)

Disable

Definition at line 9574 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_END_Disabled

#define SAADC_INTENCLR_END_Disabled   (0UL)

Read: Disabled

Definition at line 9572 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_END_Enabled

#define SAADC_INTENCLR_END_Enabled   (1UL)

Read: Enabled

Definition at line 9573 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_END_Msk

#define SAADC_INTENCLR_END_Msk   (0x1UL << SAADC_INTENCLR_END_Pos)

Bit mask of END field.

Definition at line 9571 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_END_Pos

#define SAADC_INTENCLR_END_Pos   (1UL)

Position of END field.

Definition at line 9570 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_RESULTDONE_Clear

#define SAADC_INTENCLR_RESULTDONE_Clear   (1UL)

Disable

Definition at line 9560 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_RESULTDONE_Disabled

#define SAADC_INTENCLR_RESULTDONE_Disabled   (0UL)

Read: Disabled

Definition at line 9558 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_RESULTDONE_Enabled

#define SAADC_INTENCLR_RESULTDONE_Enabled   (1UL)

Read: Enabled

Definition at line 9559 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_RESULTDONE_Msk

#define SAADC_INTENCLR_RESULTDONE_Msk   (0x1UL << SAADC_INTENCLR_RESULTDONE_Pos)

Bit mask of RESULTDONE field.

Definition at line 9557 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_RESULTDONE_Pos

#define SAADC_INTENCLR_RESULTDONE_Pos   (3UL)

Position of RESULTDONE field.

Definition at line 9556 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_STARTED_Clear

#define SAADC_INTENCLR_STARTED_Clear   (1UL)

Disable

Definition at line 9581 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_STARTED_Disabled

#define SAADC_INTENCLR_STARTED_Disabled   (0UL)

Read: Disabled

Definition at line 9579 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_STARTED_Enabled

#define SAADC_INTENCLR_STARTED_Enabled   (1UL)

Read: Enabled

Definition at line 9580 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_STARTED_Msk

#define SAADC_INTENCLR_STARTED_Msk   (0x1UL << SAADC_INTENCLR_STARTED_Pos)

Bit mask of STARTED field.

Definition at line 9578 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_STARTED_Pos

#define SAADC_INTENCLR_STARTED_Pos   (0UL)

Position of STARTED field.

Definition at line 9577 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_STOPPED_Clear

#define SAADC_INTENCLR_STOPPED_Clear   (1UL)

Disable

Definition at line 9546 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_STOPPED_Disabled

#define SAADC_INTENCLR_STOPPED_Disabled   (0UL)

Read: Disabled

Definition at line 9544 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_STOPPED_Enabled

#define SAADC_INTENCLR_STOPPED_Enabled   (1UL)

Read: Enabled

Definition at line 9545 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_STOPPED_Msk

#define SAADC_INTENCLR_STOPPED_Msk   (0x1UL << SAADC_INTENCLR_STOPPED_Pos)

Bit mask of STOPPED field.

Definition at line 9543 of file nrf52_bitfields.h.

◆ SAADC_INTENCLR_STOPPED_Pos

#define SAADC_INTENCLR_STOPPED_Pos   (5UL)

Position of STOPPED field.

Definition at line 9542 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CALIBRATEDONE_Disabled

#define SAADC_INTENSET_CALIBRATEDONE_Disabled   (0UL)

Read: Disabled

Definition at line 9394 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CALIBRATEDONE_Enabled

#define SAADC_INTENSET_CALIBRATEDONE_Enabled   (1UL)

Read: Enabled

Definition at line 9395 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CALIBRATEDONE_Msk

#define SAADC_INTENSET_CALIBRATEDONE_Msk   (0x1UL << SAADC_INTENSET_CALIBRATEDONE_Pos)

Bit mask of CALIBRATEDONE field.

Definition at line 9393 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CALIBRATEDONE_Pos

#define SAADC_INTENSET_CALIBRATEDONE_Pos   (4UL)

Position of CALIBRATEDONE field.

Definition at line 9392 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CALIBRATEDONE_Set

#define SAADC_INTENSET_CALIBRATEDONE_Set   (1UL)

Enable

Definition at line 9396 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH0LIMITH_Disabled

#define SAADC_INTENSET_CH0LIMITH_Disabled   (0UL)

Read: Disabled

Definition at line 9380 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH0LIMITH_Enabled

#define SAADC_INTENSET_CH0LIMITH_Enabled   (1UL)

Read: Enabled

Definition at line 9381 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH0LIMITH_Msk

#define SAADC_INTENSET_CH0LIMITH_Msk   (0x1UL << SAADC_INTENSET_CH0LIMITH_Pos)

Bit mask of CH0LIMITH field.

Definition at line 9379 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH0LIMITH_Pos

#define SAADC_INTENSET_CH0LIMITH_Pos   (6UL)

Position of CH0LIMITH field.

Definition at line 9378 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH0LIMITH_Set

#define SAADC_INTENSET_CH0LIMITH_Set   (1UL)

Enable

Definition at line 9382 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH0LIMITL_Disabled

#define SAADC_INTENSET_CH0LIMITL_Disabled   (0UL)

Read: Disabled

Definition at line 9373 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH0LIMITL_Enabled

#define SAADC_INTENSET_CH0LIMITL_Enabled   (1UL)

Read: Enabled

Definition at line 9374 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH0LIMITL_Msk

#define SAADC_INTENSET_CH0LIMITL_Msk   (0x1UL << SAADC_INTENSET_CH0LIMITL_Pos)

Bit mask of CH0LIMITL field.

Definition at line 9372 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH0LIMITL_Pos

#define SAADC_INTENSET_CH0LIMITL_Pos   (7UL)

Position of CH0LIMITL field.

Definition at line 9371 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH0LIMITL_Set

#define SAADC_INTENSET_CH0LIMITL_Set   (1UL)

Enable

Definition at line 9375 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH1LIMITH_Disabled

#define SAADC_INTENSET_CH1LIMITH_Disabled   (0UL)

Read: Disabled

Definition at line 9366 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH1LIMITH_Enabled

#define SAADC_INTENSET_CH1LIMITH_Enabled   (1UL)

Read: Enabled

Definition at line 9367 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH1LIMITH_Msk

#define SAADC_INTENSET_CH1LIMITH_Msk   (0x1UL << SAADC_INTENSET_CH1LIMITH_Pos)

Bit mask of CH1LIMITH field.

Definition at line 9365 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH1LIMITH_Pos

#define SAADC_INTENSET_CH1LIMITH_Pos   (8UL)

Position of CH1LIMITH field.

Definition at line 9364 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH1LIMITH_Set

#define SAADC_INTENSET_CH1LIMITH_Set   (1UL)

Enable

Definition at line 9368 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH1LIMITL_Disabled

#define SAADC_INTENSET_CH1LIMITL_Disabled   (0UL)

Read: Disabled

Definition at line 9359 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH1LIMITL_Enabled

#define SAADC_INTENSET_CH1LIMITL_Enabled   (1UL)

Read: Enabled

Definition at line 9360 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH1LIMITL_Msk

#define SAADC_INTENSET_CH1LIMITL_Msk   (0x1UL << SAADC_INTENSET_CH1LIMITL_Pos)

Bit mask of CH1LIMITL field.

Definition at line 9358 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH1LIMITL_Pos

#define SAADC_INTENSET_CH1LIMITL_Pos   (9UL)

Position of CH1LIMITL field.

Definition at line 9357 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH1LIMITL_Set

#define SAADC_INTENSET_CH1LIMITL_Set   (1UL)

Enable

Definition at line 9361 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH2LIMITH_Disabled

#define SAADC_INTENSET_CH2LIMITH_Disabled   (0UL)

Read: Disabled

Definition at line 9352 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH2LIMITH_Enabled

#define SAADC_INTENSET_CH2LIMITH_Enabled   (1UL)

Read: Enabled

Definition at line 9353 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH2LIMITH_Msk

#define SAADC_INTENSET_CH2LIMITH_Msk   (0x1UL << SAADC_INTENSET_CH2LIMITH_Pos)

Bit mask of CH2LIMITH field.

Definition at line 9351 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH2LIMITH_Pos

#define SAADC_INTENSET_CH2LIMITH_Pos   (10UL)

Position of CH2LIMITH field.

Definition at line 9350 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH2LIMITH_Set

#define SAADC_INTENSET_CH2LIMITH_Set   (1UL)

Enable

Definition at line 9354 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH2LIMITL_Disabled

#define SAADC_INTENSET_CH2LIMITL_Disabled   (0UL)

Read: Disabled

Definition at line 9345 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH2LIMITL_Enabled

#define SAADC_INTENSET_CH2LIMITL_Enabled   (1UL)

Read: Enabled

Definition at line 9346 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH2LIMITL_Msk

#define SAADC_INTENSET_CH2LIMITL_Msk   (0x1UL << SAADC_INTENSET_CH2LIMITL_Pos)

Bit mask of CH2LIMITL field.

Definition at line 9344 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH2LIMITL_Pos

#define SAADC_INTENSET_CH2LIMITL_Pos   (11UL)

Position of CH2LIMITL field.

Definition at line 9343 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH2LIMITL_Set

#define SAADC_INTENSET_CH2LIMITL_Set   (1UL)

Enable

Definition at line 9347 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH3LIMITH_Disabled

#define SAADC_INTENSET_CH3LIMITH_Disabled   (0UL)

Read: Disabled

Definition at line 9338 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH3LIMITH_Enabled

#define SAADC_INTENSET_CH3LIMITH_Enabled   (1UL)

Read: Enabled

Definition at line 9339 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH3LIMITH_Msk

#define SAADC_INTENSET_CH3LIMITH_Msk   (0x1UL << SAADC_INTENSET_CH3LIMITH_Pos)

Bit mask of CH3LIMITH field.

Definition at line 9337 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH3LIMITH_Pos

#define SAADC_INTENSET_CH3LIMITH_Pos   (12UL)

Position of CH3LIMITH field.

Definition at line 9336 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH3LIMITH_Set

#define SAADC_INTENSET_CH3LIMITH_Set   (1UL)

Enable

Definition at line 9340 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH3LIMITL_Disabled

#define SAADC_INTENSET_CH3LIMITL_Disabled   (0UL)

Read: Disabled

Definition at line 9331 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH3LIMITL_Enabled

#define SAADC_INTENSET_CH3LIMITL_Enabled   (1UL)

Read: Enabled

Definition at line 9332 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH3LIMITL_Msk

#define SAADC_INTENSET_CH3LIMITL_Msk   (0x1UL << SAADC_INTENSET_CH3LIMITL_Pos)

Bit mask of CH3LIMITL field.

Definition at line 9330 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH3LIMITL_Pos

#define SAADC_INTENSET_CH3LIMITL_Pos   (13UL)

Position of CH3LIMITL field.

Definition at line 9329 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH3LIMITL_Set

#define SAADC_INTENSET_CH3LIMITL_Set   (1UL)

Enable

Definition at line 9333 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH4LIMITH_Disabled

#define SAADC_INTENSET_CH4LIMITH_Disabled   (0UL)

Read: Disabled

Definition at line 9324 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH4LIMITH_Enabled

#define SAADC_INTENSET_CH4LIMITH_Enabled   (1UL)

Read: Enabled

Definition at line 9325 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH4LIMITH_Msk

#define SAADC_INTENSET_CH4LIMITH_Msk   (0x1UL << SAADC_INTENSET_CH4LIMITH_Pos)

Bit mask of CH4LIMITH field.

Definition at line 9323 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH4LIMITH_Pos

#define SAADC_INTENSET_CH4LIMITH_Pos   (14UL)

Position of CH4LIMITH field.

Definition at line 9322 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH4LIMITH_Set

#define SAADC_INTENSET_CH4LIMITH_Set   (1UL)

Enable

Definition at line 9326 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH4LIMITL_Disabled

#define SAADC_INTENSET_CH4LIMITL_Disabled   (0UL)

Read: Disabled

Definition at line 9317 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH4LIMITL_Enabled

#define SAADC_INTENSET_CH4LIMITL_Enabled   (1UL)

Read: Enabled

Definition at line 9318 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH4LIMITL_Msk

#define SAADC_INTENSET_CH4LIMITL_Msk   (0x1UL << SAADC_INTENSET_CH4LIMITL_Pos)

Bit mask of CH4LIMITL field.

Definition at line 9316 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH4LIMITL_Pos

#define SAADC_INTENSET_CH4LIMITL_Pos   (15UL)

Position of CH4LIMITL field.

Definition at line 9315 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH4LIMITL_Set

#define SAADC_INTENSET_CH4LIMITL_Set   (1UL)

Enable

Definition at line 9319 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH5LIMITH_Disabled

#define SAADC_INTENSET_CH5LIMITH_Disabled   (0UL)

Read: Disabled

Definition at line 9310 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH5LIMITH_Enabled

#define SAADC_INTENSET_CH5LIMITH_Enabled   (1UL)

Read: Enabled

Definition at line 9311 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH5LIMITH_Msk

#define SAADC_INTENSET_CH5LIMITH_Msk   (0x1UL << SAADC_INTENSET_CH5LIMITH_Pos)

Bit mask of CH5LIMITH field.

Definition at line 9309 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH5LIMITH_Pos

#define SAADC_INTENSET_CH5LIMITH_Pos   (16UL)

Position of CH5LIMITH field.

Definition at line 9308 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH5LIMITH_Set

#define SAADC_INTENSET_CH5LIMITH_Set   (1UL)

Enable

Definition at line 9312 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH5LIMITL_Disabled

#define SAADC_INTENSET_CH5LIMITL_Disabled   (0UL)

Read: Disabled

Definition at line 9303 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH5LIMITL_Enabled

#define SAADC_INTENSET_CH5LIMITL_Enabled   (1UL)

Read: Enabled

Definition at line 9304 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH5LIMITL_Msk

#define SAADC_INTENSET_CH5LIMITL_Msk   (0x1UL << SAADC_INTENSET_CH5LIMITL_Pos)

Bit mask of CH5LIMITL field.

Definition at line 9302 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH5LIMITL_Pos

#define SAADC_INTENSET_CH5LIMITL_Pos   (17UL)

Position of CH5LIMITL field.

Definition at line 9301 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH5LIMITL_Set

#define SAADC_INTENSET_CH5LIMITL_Set   (1UL)

Enable

Definition at line 9305 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH6LIMITH_Disabled

#define SAADC_INTENSET_CH6LIMITH_Disabled   (0UL)

Read: Disabled

Definition at line 9296 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH6LIMITH_Enabled

#define SAADC_INTENSET_CH6LIMITH_Enabled   (1UL)

Read: Enabled

Definition at line 9297 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH6LIMITH_Msk

#define SAADC_INTENSET_CH6LIMITH_Msk   (0x1UL << SAADC_INTENSET_CH6LIMITH_Pos)

Bit mask of CH6LIMITH field.

Definition at line 9295 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH6LIMITH_Pos

#define SAADC_INTENSET_CH6LIMITH_Pos   (18UL)

Position of CH6LIMITH field.

Definition at line 9294 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH6LIMITH_Set

#define SAADC_INTENSET_CH6LIMITH_Set   (1UL)

Enable

Definition at line 9298 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH6LIMITL_Disabled

#define SAADC_INTENSET_CH6LIMITL_Disabled   (0UL)

Read: Disabled

Definition at line 9289 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH6LIMITL_Enabled

#define SAADC_INTENSET_CH6LIMITL_Enabled   (1UL)

Read: Enabled

Definition at line 9290 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH6LIMITL_Msk

#define SAADC_INTENSET_CH6LIMITL_Msk   (0x1UL << SAADC_INTENSET_CH6LIMITL_Pos)

Bit mask of CH6LIMITL field.

Definition at line 9288 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH6LIMITL_Pos

#define SAADC_INTENSET_CH6LIMITL_Pos   (19UL)

Position of CH6LIMITL field.

Definition at line 9287 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH6LIMITL_Set

#define SAADC_INTENSET_CH6LIMITL_Set   (1UL)

Enable

Definition at line 9291 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH7LIMITH_Disabled

#define SAADC_INTENSET_CH7LIMITH_Disabled   (0UL)

Read: Disabled

Definition at line 9282 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH7LIMITH_Enabled

#define SAADC_INTENSET_CH7LIMITH_Enabled   (1UL)

Read: Enabled

Definition at line 9283 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH7LIMITH_Msk

#define SAADC_INTENSET_CH7LIMITH_Msk   (0x1UL << SAADC_INTENSET_CH7LIMITH_Pos)

Bit mask of CH7LIMITH field.

Definition at line 9281 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH7LIMITH_Pos

#define SAADC_INTENSET_CH7LIMITH_Pos   (20UL)

Position of CH7LIMITH field.

Definition at line 9280 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH7LIMITH_Set

#define SAADC_INTENSET_CH7LIMITH_Set   (1UL)

Enable

Definition at line 9284 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH7LIMITL_Disabled

#define SAADC_INTENSET_CH7LIMITL_Disabled   (0UL)

Read: Disabled

Definition at line 9275 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH7LIMITL_Enabled

#define SAADC_INTENSET_CH7LIMITL_Enabled   (1UL)

Read: Enabled

Definition at line 9276 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH7LIMITL_Msk

#define SAADC_INTENSET_CH7LIMITL_Msk   (0x1UL << SAADC_INTENSET_CH7LIMITL_Pos)

Bit mask of CH7LIMITL field.

Definition at line 9274 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH7LIMITL_Pos

#define SAADC_INTENSET_CH7LIMITL_Pos   (21UL)

Position of CH7LIMITL field.

Definition at line 9273 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_CH7LIMITL_Set

#define SAADC_INTENSET_CH7LIMITL_Set   (1UL)

Enable

Definition at line 9277 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_DONE_Disabled

#define SAADC_INTENSET_DONE_Disabled   (0UL)

Read: Disabled

Definition at line 9408 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_DONE_Enabled

#define SAADC_INTENSET_DONE_Enabled   (1UL)

Read: Enabled

Definition at line 9409 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_DONE_Msk

#define SAADC_INTENSET_DONE_Msk   (0x1UL << SAADC_INTENSET_DONE_Pos)

Bit mask of DONE field.

Definition at line 9407 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_DONE_Pos

#define SAADC_INTENSET_DONE_Pos   (2UL)

Position of DONE field.

Definition at line 9406 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_DONE_Set

#define SAADC_INTENSET_DONE_Set   (1UL)

Enable

Definition at line 9410 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_END_Disabled

#define SAADC_INTENSET_END_Disabled   (0UL)

Read: Disabled

Definition at line 9415 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_END_Enabled

#define SAADC_INTENSET_END_Enabled   (1UL)

Read: Enabled

Definition at line 9416 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_END_Msk

#define SAADC_INTENSET_END_Msk   (0x1UL << SAADC_INTENSET_END_Pos)

Bit mask of END field.

Definition at line 9414 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_END_Pos

#define SAADC_INTENSET_END_Pos   (1UL)

Position of END field.

Definition at line 9413 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_END_Set

#define SAADC_INTENSET_END_Set   (1UL)

Enable

Definition at line 9417 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_RESULTDONE_Disabled

#define SAADC_INTENSET_RESULTDONE_Disabled   (0UL)

Read: Disabled

Definition at line 9401 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_RESULTDONE_Enabled

#define SAADC_INTENSET_RESULTDONE_Enabled   (1UL)

Read: Enabled

Definition at line 9402 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_RESULTDONE_Msk

#define SAADC_INTENSET_RESULTDONE_Msk   (0x1UL << SAADC_INTENSET_RESULTDONE_Pos)

Bit mask of RESULTDONE field.

Definition at line 9400 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_RESULTDONE_Pos

#define SAADC_INTENSET_RESULTDONE_Pos   (3UL)

Position of RESULTDONE field.

Definition at line 9399 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_RESULTDONE_Set

#define SAADC_INTENSET_RESULTDONE_Set   (1UL)

Enable

Definition at line 9403 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_STARTED_Disabled

#define SAADC_INTENSET_STARTED_Disabled   (0UL)

Read: Disabled

Definition at line 9422 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_STARTED_Enabled

#define SAADC_INTENSET_STARTED_Enabled   (1UL)

Read: Enabled

Definition at line 9423 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_STARTED_Msk

#define SAADC_INTENSET_STARTED_Msk   (0x1UL << SAADC_INTENSET_STARTED_Pos)

Bit mask of STARTED field.

Definition at line 9421 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_STARTED_Pos

#define SAADC_INTENSET_STARTED_Pos   (0UL)

Position of STARTED field.

Definition at line 9420 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_STARTED_Set

#define SAADC_INTENSET_STARTED_Set   (1UL)

Enable

Definition at line 9424 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_STOPPED_Disabled

#define SAADC_INTENSET_STOPPED_Disabled   (0UL)

Read: Disabled

Definition at line 9387 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_STOPPED_Enabled

#define SAADC_INTENSET_STOPPED_Enabled   (1UL)

Read: Enabled

Definition at line 9388 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_STOPPED_Msk

#define SAADC_INTENSET_STOPPED_Msk   (0x1UL << SAADC_INTENSET_STOPPED_Pos)

Bit mask of STOPPED field.

Definition at line 9386 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_STOPPED_Pos

#define SAADC_INTENSET_STOPPED_Pos   (5UL)

Position of STOPPED field.

Definition at line 9385 of file nrf52_bitfields.h.

◆ SAADC_INTENSET_STOPPED_Set

#define SAADC_INTENSET_STOPPED_Set   (1UL)

Enable

Definition at line 9389 of file nrf52_bitfields.h.

◆ SAADC_OVERSAMPLE_OVERSAMPLE_Bypass

#define SAADC_OVERSAMPLE_OVERSAMPLE_Bypass   (0UL)

Bypass oversampling

Definition at line 9716 of file nrf52_bitfields.h.

◆ SAADC_OVERSAMPLE_OVERSAMPLE_Msk

#define SAADC_OVERSAMPLE_OVERSAMPLE_Msk   (0xFUL << SAADC_OVERSAMPLE_OVERSAMPLE_Pos)

Bit mask of OVERSAMPLE field.

Definition at line 9715 of file nrf52_bitfields.h.

◆ SAADC_OVERSAMPLE_OVERSAMPLE_Over128x

#define SAADC_OVERSAMPLE_OVERSAMPLE_Over128x   (7UL)

Oversample 128x

Definition at line 9723 of file nrf52_bitfields.h.

◆ SAADC_OVERSAMPLE_OVERSAMPLE_Over16x

#define SAADC_OVERSAMPLE_OVERSAMPLE_Over16x   (4UL)

Oversample 16x

Definition at line 9720 of file nrf52_bitfields.h.

◆ SAADC_OVERSAMPLE_OVERSAMPLE_Over256x

#define SAADC_OVERSAMPLE_OVERSAMPLE_Over256x   (8UL)

Oversample 256x

Definition at line 9724 of file nrf52_bitfields.h.

◆ SAADC_OVERSAMPLE_OVERSAMPLE_Over2x

#define SAADC_OVERSAMPLE_OVERSAMPLE_Over2x   (1UL)

Oversample 2x

Definition at line 9717 of file nrf52_bitfields.h.

◆ SAADC_OVERSAMPLE_OVERSAMPLE_Over32x

#define SAADC_OVERSAMPLE_OVERSAMPLE_Over32x   (5UL)

Oversample 32x

Definition at line 9721 of file nrf52_bitfields.h.

◆ SAADC_OVERSAMPLE_OVERSAMPLE_Over4x

#define SAADC_OVERSAMPLE_OVERSAMPLE_Over4x   (2UL)

Oversample 4x

Definition at line 9718 of file nrf52_bitfields.h.

◆ SAADC_OVERSAMPLE_OVERSAMPLE_Over64x

#define SAADC_OVERSAMPLE_OVERSAMPLE_Over64x   (6UL)

Oversample 64x

Definition at line 9722 of file nrf52_bitfields.h.

◆ SAADC_OVERSAMPLE_OVERSAMPLE_Over8x

#define SAADC_OVERSAMPLE_OVERSAMPLE_Over8x   (3UL)

Oversample 8x

Definition at line 9719 of file nrf52_bitfields.h.

◆ SAADC_OVERSAMPLE_OVERSAMPLE_Pos

#define SAADC_OVERSAMPLE_OVERSAMPLE_Pos   (0UL)

Position of OVERSAMPLE field.

Definition at line 9714 of file nrf52_bitfields.h.

◆ SAADC_RESOLUTION_VAL_10bit

#define SAADC_RESOLUTION_VAL_10bit   (1UL)

10 bit

Definition at line 9706 of file nrf52_bitfields.h.

◆ SAADC_RESOLUTION_VAL_12bit

#define SAADC_RESOLUTION_VAL_12bit   (2UL)

12 bit

Definition at line 9707 of file nrf52_bitfields.h.

◆ SAADC_RESOLUTION_VAL_14bit

#define SAADC_RESOLUTION_VAL_14bit   (3UL)

14 bit

Definition at line 9708 of file nrf52_bitfields.h.

◆ SAADC_RESOLUTION_VAL_8bit

#define SAADC_RESOLUTION_VAL_8bit   (0UL)

8 bit

Definition at line 9705 of file nrf52_bitfields.h.

◆ SAADC_RESOLUTION_VAL_Msk

#define SAADC_RESOLUTION_VAL_Msk   (0x7UL << SAADC_RESOLUTION_VAL_Pos)

Bit mask of VAL field.

Definition at line 9704 of file nrf52_bitfields.h.

◆ SAADC_RESOLUTION_VAL_Pos

#define SAADC_RESOLUTION_VAL_Pos   (0UL)

Position of VAL field.

Definition at line 9703 of file nrf52_bitfields.h.

◆ SAADC_RESULT_AMOUNT_AMOUNT_Msk

#define SAADC_RESULT_AMOUNT_AMOUNT_Msk   (0xFFFFUL << SAADC_RESULT_AMOUNT_AMOUNT_Pos)

Bit mask of AMOUNT field.

Definition at line 9758 of file nrf52_bitfields.h.

◆ SAADC_RESULT_AMOUNT_AMOUNT_Pos

#define SAADC_RESULT_AMOUNT_AMOUNT_Pos   (0UL)

Position of AMOUNT field.

Definition at line 9757 of file nrf52_bitfields.h.

◆ SAADC_RESULT_MAXCNT_MAXCNT_Msk

#define SAADC_RESULT_MAXCNT_MAXCNT_Msk   (0xFFFFUL << SAADC_RESULT_MAXCNT_MAXCNT_Pos)

Bit mask of MAXCNT field.

Definition at line 9751 of file nrf52_bitfields.h.

◆ SAADC_RESULT_MAXCNT_MAXCNT_Pos

#define SAADC_RESULT_MAXCNT_MAXCNT_Pos   (0UL)

Position of MAXCNT field.

Definition at line 9750 of file nrf52_bitfields.h.

◆ SAADC_RESULT_PTR_PTR_Msk

#define SAADC_RESULT_PTR_PTR_Msk   (0xFFFFFFFFUL << SAADC_RESULT_PTR_PTR_Pos)

Bit mask of PTR field.

Definition at line 9744 of file nrf52_bitfields.h.

◆ SAADC_RESULT_PTR_PTR_Pos

#define SAADC_RESULT_PTR_PTR_Pos   (0UL)

Position of PTR field.

Definition at line 9743 of file nrf52_bitfields.h.

◆ SAADC_SAMPLERATE_CC_Msk

#define SAADC_SAMPLERATE_CC_Msk   (0x7FFUL << SAADC_SAMPLERATE_CC_Pos)

Bit mask of CC field.

Definition at line 9737 of file nrf52_bitfields.h.

◆ SAADC_SAMPLERATE_CC_Pos

#define SAADC_SAMPLERATE_CC_Pos   (0UL)

Position of CC field.

Definition at line 9736 of file nrf52_bitfields.h.

◆ SAADC_SAMPLERATE_MODE_Msk

#define SAADC_SAMPLERATE_MODE_Msk   (0x1UL << SAADC_SAMPLERATE_MODE_Pos)

Bit mask of MODE field.

Definition at line 9731 of file nrf52_bitfields.h.

◆ SAADC_SAMPLERATE_MODE_Pos

#define SAADC_SAMPLERATE_MODE_Pos   (12UL)

Position of MODE field.

Definition at line 9730 of file nrf52_bitfields.h.

◆ SAADC_SAMPLERATE_MODE_Task

#define SAADC_SAMPLERATE_MODE_Task   (0UL)

Rate is controlled from SAMPLE task

Definition at line 9732 of file nrf52_bitfields.h.

◆ SAADC_SAMPLERATE_MODE_Timers

#define SAADC_SAMPLERATE_MODE_Timers   (1UL)

Rate is controlled from local timer (use CC to control the rate)

Definition at line 9733 of file nrf52_bitfields.h.

◆ SAADC_STATUS_STATUS_Busy

#define SAADC_STATUS_STATUS_Busy   (1UL)

ADC is busy. Conversion in progress.

Definition at line 9590 of file nrf52_bitfields.h.

◆ SAADC_STATUS_STATUS_Msk

#define SAADC_STATUS_STATUS_Msk   (0x1UL << SAADC_STATUS_STATUS_Pos)

Bit mask of STATUS field.

Definition at line 9588 of file nrf52_bitfields.h.

◆ SAADC_STATUS_STATUS_Pos

#define SAADC_STATUS_STATUS_Pos   (0UL)

Position of STATUS field.

Definition at line 9587 of file nrf52_bitfields.h.

◆ SAADC_STATUS_STATUS_Ready

#define SAADC_STATUS_STATUS_Ready   (0UL)

ADC is ready. No on-going conversion.

Definition at line 9589 of file nrf52_bitfields.h.

◆ SPI_CONFIG_CPHA_Leading

#define SPI_CONFIG_CPHA_Leading   (0UL)

Sample on leading edge of clock, shift serial data on trailing edge

Definition at line 9857 of file nrf52_bitfields.h.

◆ SPI_CONFIG_CPHA_Msk

#define SPI_CONFIG_CPHA_Msk   (0x1UL << SPI_CONFIG_CPHA_Pos)

Bit mask of CPHA field.

Definition at line 9856 of file nrf52_bitfields.h.

◆ SPI_CONFIG_CPHA_Pos

#define SPI_CONFIG_CPHA_Pos   (1UL)

Position of CPHA field.

Definition at line 9855 of file nrf52_bitfields.h.

◆ SPI_CONFIG_CPHA_Trailing

#define SPI_CONFIG_CPHA_Trailing   (1UL)

Sample on trailing edge of clock, shift serial data on leading edge

Definition at line 9858 of file nrf52_bitfields.h.

◆ SPI_CONFIG_CPOL_ActiveHigh

#define SPI_CONFIG_CPOL_ActiveHigh   (0UL)

Active high

Definition at line 9851 of file nrf52_bitfields.h.

◆ SPI_CONFIG_CPOL_ActiveLow

#define SPI_CONFIG_CPOL_ActiveLow   (1UL)

Active low

Definition at line 9852 of file nrf52_bitfields.h.

◆ SPI_CONFIG_CPOL_Msk

#define SPI_CONFIG_CPOL_Msk   (0x1UL << SPI_CONFIG_CPOL_Pos)

Bit mask of CPOL field.

Definition at line 9850 of file nrf52_bitfields.h.

◆ SPI_CONFIG_CPOL_Pos

#define SPI_CONFIG_CPOL_Pos   (2UL)

Position of CPOL field.

Definition at line 9849 of file nrf52_bitfields.h.

◆ SPI_CONFIG_ORDER_LsbFirst

#define SPI_CONFIG_ORDER_LsbFirst   (1UL)

Least significant bit shifted out first

Definition at line 9864 of file nrf52_bitfields.h.

◆ SPI_CONFIG_ORDER_MsbFirst

#define SPI_CONFIG_ORDER_MsbFirst   (0UL)

Most significant bit shifted out first

Definition at line 9863 of file nrf52_bitfields.h.

◆ SPI_CONFIG_ORDER_Msk

#define SPI_CONFIG_ORDER_Msk   (0x1UL << SPI_CONFIG_ORDER_Pos)

Bit mask of ORDER field.

Definition at line 9862 of file nrf52_bitfields.h.

◆ SPI_CONFIG_ORDER_Pos

#define SPI_CONFIG_ORDER_Pos   (0UL)

Position of ORDER field.

Definition at line 9861 of file nrf52_bitfields.h.

◆ SPI_ENABLE_ENABLE_Disabled

#define SPI_ENABLE_ENABLE_Disabled   (0UL)

Disable SPI

Definition at line 9790 of file nrf52_bitfields.h.

◆ SPI_ENABLE_ENABLE_Enabled

#define SPI_ENABLE_ENABLE_Enabled   (1UL)

Enable SPI

Definition at line 9791 of file nrf52_bitfields.h.

◆ SPI_ENABLE_ENABLE_Msk

#define SPI_ENABLE_ENABLE_Msk   (0xFUL << SPI_ENABLE_ENABLE_Pos)

Bit mask of ENABLE field.

Definition at line 9789 of file nrf52_bitfields.h.

◆ SPI_ENABLE_ENABLE_Pos

#define SPI_ENABLE_ENABLE_Pos   (0UL)

Position of ENABLE field.

Definition at line 9788 of file nrf52_bitfields.h.

◆ SPI_FREQUENCY_FREQUENCY_K125

#define SPI_FREQUENCY_FREQUENCY_K125   (0x02000000UL)

125 kbps

Definition at line 9837 of file nrf52_bitfields.h.

◆ SPI_FREQUENCY_FREQUENCY_K250

#define SPI_FREQUENCY_FREQUENCY_K250   (0x04000000UL)

250 kbps

Definition at line 9838 of file nrf52_bitfields.h.

◆ SPI_FREQUENCY_FREQUENCY_K500

#define SPI_FREQUENCY_FREQUENCY_K500   (0x08000000UL)

500 kbps

Definition at line 9839 of file nrf52_bitfields.h.

◆ SPI_FREQUENCY_FREQUENCY_M1

#define SPI_FREQUENCY_FREQUENCY_M1   (0x10000000UL)

1 Mbps

Definition at line 9840 of file nrf52_bitfields.h.

◆ SPI_FREQUENCY_FREQUENCY_M2

#define SPI_FREQUENCY_FREQUENCY_M2   (0x20000000UL)

2 Mbps

Definition at line 9841 of file nrf52_bitfields.h.

◆ SPI_FREQUENCY_FREQUENCY_M4

#define SPI_FREQUENCY_FREQUENCY_M4   (0x40000000UL)

4 Mbps

Definition at line 9842 of file nrf52_bitfields.h.

◆ SPI_FREQUENCY_FREQUENCY_M8

#define SPI_FREQUENCY_FREQUENCY_M8   (0x80000000UL)

8 Mbps

Definition at line 9843 of file nrf52_bitfields.h.

◆ SPI_FREQUENCY_FREQUENCY_Msk

#define SPI_FREQUENCY_FREQUENCY_Msk   (0xFFFFFFFFUL << SPI_FREQUENCY_FREQUENCY_Pos)

Bit mask of FREQUENCY field.

Definition at line 9836 of file nrf52_bitfields.h.

◆ SPI_FREQUENCY_FREQUENCY_Pos

#define SPI_FREQUENCY_FREQUENCY_Pos   (0UL)

Position of FREQUENCY field.

Definition at line 9835 of file nrf52_bitfields.h.

◆ SPI_INTENCLR_READY_Clear

#define SPI_INTENCLR_READY_Clear   (1UL)

Disable

Definition at line 9782 of file nrf52_bitfields.h.

◆ SPI_INTENCLR_READY_Disabled

#define SPI_INTENCLR_READY_Disabled   (0UL)

Read: Disabled

Definition at line 9780 of file nrf52_bitfields.h.

◆ SPI_INTENCLR_READY_Enabled

#define SPI_INTENCLR_READY_Enabled   (1UL)

Read: Enabled

Definition at line 9781 of file nrf52_bitfields.h.

◆ SPI_INTENCLR_READY_Msk

#define SPI_INTENCLR_READY_Msk   (0x1UL << SPI_INTENCLR_READY_Pos)

Bit mask of READY field.

Definition at line 9779 of file nrf52_bitfields.h.

◆ SPI_INTENCLR_READY_Pos

#define SPI_INTENCLR_READY_Pos   (2UL)

Position of READY field.

Definition at line 9778 of file nrf52_bitfields.h.

◆ SPI_INTENSET_READY_Disabled

#define SPI_INTENSET_READY_Disabled   (0UL)

Read: Disabled

Definition at line 9770 of file nrf52_bitfields.h.

◆ SPI_INTENSET_READY_Enabled

#define SPI_INTENSET_READY_Enabled   (1UL)

Read: Enabled

Definition at line 9771 of file nrf52_bitfields.h.

◆ SPI_INTENSET_READY_Msk

#define SPI_INTENSET_READY_Msk   (0x1UL << SPI_INTENSET_READY_Pos)

Bit mask of READY field.

Definition at line 9769 of file nrf52_bitfields.h.

◆ SPI_INTENSET_READY_Pos

#define SPI_INTENSET_READY_Pos   (2UL)

Position of READY field.

Definition at line 9768 of file nrf52_bitfields.h.

◆ SPI_INTENSET_READY_Set

#define SPI_INTENSET_READY_Set   (1UL)

Enable

Definition at line 9772 of file nrf52_bitfields.h.

◆ SPI_PSEL_MISO_PSELMISO_Disconnected

#define SPI_PSEL_MISO_PSELMISO_Disconnected   (0xFFFFFFFFUL)

Disconnect

Definition at line 9815 of file nrf52_bitfields.h.

◆ SPI_PSEL_MISO_PSELMISO_Msk

#define SPI_PSEL_MISO_PSELMISO_Msk   (0xFFFFFFFFUL << SPI_PSEL_MISO_PSELMISO_Pos)

Bit mask of PSELMISO field.

Definition at line 9814 of file nrf52_bitfields.h.

◆ SPI_PSEL_MISO_PSELMISO_Pos

#define SPI_PSEL_MISO_PSELMISO_Pos   (0UL)

Position of PSELMISO field.

Definition at line 9813 of file nrf52_bitfields.h.

◆ SPI_PSEL_MOSI_PSELMOSI_Disconnected

#define SPI_PSEL_MOSI_PSELMOSI_Disconnected   (0xFFFFFFFFUL)

Disconnect

Definition at line 9807 of file nrf52_bitfields.h.

◆ SPI_PSEL_MOSI_PSELMOSI_Msk

#define SPI_PSEL_MOSI_PSELMOSI_Msk   (0xFFFFFFFFUL << SPI_PSEL_MOSI_PSELMOSI_Pos)

Bit mask of PSELMOSI field.

Definition at line 9806 of file nrf52_bitfields.h.

◆ SPI_PSEL_MOSI_PSELMOSI_Pos

#define SPI_PSEL_MOSI_PSELMOSI_Pos   (0UL)

Position of PSELMOSI field.

Definition at line 9805 of file nrf52_bitfields.h.

◆ SPI_PSEL_SCK_PSELSCK_Disconnected

#define SPI_PSEL_SCK_PSELSCK_Disconnected   (0xFFFFFFFFUL)

Disconnect

Definition at line 9799 of file nrf52_bitfields.h.

◆ SPI_PSEL_SCK_PSELSCK_Msk

#define SPI_PSEL_SCK_PSELSCK_Msk   (0xFFFFFFFFUL << SPI_PSEL_SCK_PSELSCK_Pos)

Bit mask of PSELSCK field.

Definition at line 9798 of file nrf52_bitfields.h.

◆ SPI_PSEL_SCK_PSELSCK_Pos

#define SPI_PSEL_SCK_PSELSCK_Pos   (0UL)

Position of PSELSCK field.

Definition at line 9797 of file nrf52_bitfields.h.

◆ SPI_RXD_RXD_Msk

#define SPI_RXD_RXD_Msk   (0xFFUL << SPI_RXD_RXD_Pos)

Bit mask of RXD field.

Definition at line 9822 of file nrf52_bitfields.h.

◆ SPI_RXD_RXD_Pos

#define SPI_RXD_RXD_Pos   (0UL)

Position of RXD field.

Definition at line 9821 of file nrf52_bitfields.h.

◆ SPI_TXD_TXD_Msk

#define SPI_TXD_TXD_Msk   (0xFFUL << SPI_TXD_TXD_Pos)

Bit mask of TXD field.

Definition at line 9829 of file nrf52_bitfields.h.

◆ SPI_TXD_TXD_Pos

#define SPI_TXD_TXD_Pos   (0UL)

Position of TXD field.

Definition at line 9828 of file nrf52_bitfields.h.

◆ SPIM_CONFIG_CPHA_Leading

#define SPIM_CONFIG_CPHA_Leading   (0UL)

Sample on leading edge of clock, shift serial data on trailing edge

Definition at line 10089 of file nrf52_bitfields.h.

◆ SPIM_CONFIG_CPHA_Msk

#define SPIM_CONFIG_CPHA_Msk   (0x1UL << SPIM_CONFIG_CPHA_Pos)

Bit mask of CPHA field.

Definition at line 10088 of file nrf52_bitfields.h.

◆ SPIM_CONFIG_CPHA_Pos

#define SPIM_CONFIG_CPHA_Pos   (1UL)

Position of CPHA field.

Definition at line 10087 of file nrf52_bitfields.h.

◆ SPIM_CONFIG_CPHA_Trailing

#define SPIM_CONFIG_CPHA_Trailing   (1UL)

Sample on trailing edge of clock, shift serial data on leading edge

Definition at line 10090 of file nrf52_bitfields.h.

◆ SPIM_CONFIG_CPOL_ActiveHigh

#define SPIM_CONFIG_CPOL_ActiveHigh   (0UL)

Active high

Definition at line 10083 of file nrf52_bitfields.h.

◆ SPIM_CONFIG_CPOL_ActiveLow

#define SPIM_CONFIG_CPOL_ActiveLow   (1UL)

Active low

Definition at line 10084 of file nrf52_bitfields.h.

◆ SPIM_CONFIG_CPOL_Msk

#define SPIM_CONFIG_CPOL_Msk   (0x1UL << SPIM_CONFIG_CPOL_Pos)

Bit mask of CPOL field.

Definition at line 10082 of file nrf52_bitfields.h.

◆ SPIM_CONFIG_CPOL_Pos

#define SPIM_CONFIG_CPOL_Pos   (2UL)

Position of CPOL field.

Definition at line 10081 of file nrf52_bitfields.h.

◆ SPIM_CONFIG_ORDER_LsbFirst

#define SPIM_CONFIG_ORDER_LsbFirst   (1UL)

Least significant bit shifted out first

Definition at line 10096 of file nrf52_bitfields.h.

◆ SPIM_CONFIG_ORDER_MsbFirst

#define SPIM_CONFIG_ORDER_MsbFirst   (0UL)

Most significant bit shifted out first

Definition at line 10095 of file nrf52_bitfields.h.

◆ SPIM_CONFIG_ORDER_Msk

#define SPIM_CONFIG_ORDER_Msk   (0x1UL << SPIM_CONFIG_ORDER_Pos)

Bit mask of ORDER field.

Definition at line 10094 of file nrf52_bitfields.h.

◆ SPIM_CONFIG_ORDER_Pos

#define SPIM_CONFIG_ORDER_Pos   (0UL)

Position of ORDER field.

Definition at line 10093 of file nrf52_bitfields.h.

◆ SPIM_ENABLE_ENABLE_Disabled

#define SPIM_ENABLE_ENABLE_Disabled   (0UL)

Disable SPIM

Definition at line 9961 of file nrf52_bitfields.h.

◆ SPIM_ENABLE_ENABLE_Enabled

#define SPIM_ENABLE_ENABLE_Enabled   (7UL)

Enable SPIM

Definition at line 9962 of file nrf52_bitfields.h.

◆ SPIM_ENABLE_ENABLE_Msk

#define SPIM_ENABLE_ENABLE_Msk   (0xFUL << SPIM_ENABLE_ENABLE_Pos)

Bit mask of ENABLE field.

Definition at line 9960 of file nrf52_bitfields.h.

◆ SPIM_ENABLE_ENABLE_Pos

#define SPIM_ENABLE_ENABLE_Pos   (0UL)

Position of ENABLE field.

Definition at line 9959 of file nrf52_bitfields.h.

◆ SPIM_FREQUENCY_FREQUENCY_K125

#define SPIM_FREQUENCY_FREQUENCY_K125   (0x02000000UL)

125 kbps

Definition at line 10009 of file nrf52_bitfields.h.

◆ SPIM_FREQUENCY_FREQUENCY_K250

#define SPIM_FREQUENCY_FREQUENCY_K250   (0x04000000UL)

250 kbps

Definition at line 10010 of file nrf52_bitfields.h.

◆ SPIM_FREQUENCY_FREQUENCY_K500

#define SPIM_FREQUENCY_FREQUENCY_K500   (0x08000000UL)

500 kbps

Definition at line 10011 of file nrf52_bitfields.h.

◆ SPIM_FREQUENCY_FREQUENCY_M1

#define SPIM_FREQUENCY_FREQUENCY_M1   (0x10000000UL)

1 Mbps

Definition at line 10012 of file nrf52_bitfields.h.

◆ SPIM_FREQUENCY_FREQUENCY_M2

#define SPIM_FREQUENCY_FREQUENCY_M2   (0x20000000UL)

2 Mbps

Definition at line 10013 of file nrf52_bitfields.h.

◆ SPIM_FREQUENCY_FREQUENCY_M4

#define SPIM_FREQUENCY_FREQUENCY_M4   (0x40000000UL)

4 Mbps

Definition at line 10014 of file nrf52_bitfields.h.

◆ SPIM_FREQUENCY_FREQUENCY_M8

#define SPIM_FREQUENCY_FREQUENCY_M8   (0x80000000UL)

8 Mbps

Definition at line 10015 of file nrf52_bitfields.h.

◆ SPIM_FREQUENCY_FREQUENCY_Msk

#define SPIM_FREQUENCY_FREQUENCY_Msk   (0xFFFFFFFFUL << SPIM_FREQUENCY_FREQUENCY_Pos)

Bit mask of FREQUENCY field.

Definition at line 10008 of file nrf52_bitfields.h.

◆ SPIM_FREQUENCY_FREQUENCY_Pos

#define SPIM_FREQUENCY_FREQUENCY_Pos   (0UL)

Position of FREQUENCY field.

Definition at line 10007 of file nrf52_bitfields.h.

◆ SPIM_INTENCLR_END_Clear

#define SPIM_INTENCLR_END_Clear   (1UL)

Disable

Definition at line 9939 of file nrf52_bitfields.h.

◆ SPIM_INTENCLR_END_Disabled

#define SPIM_INTENCLR_END_Disabled   (0UL)

Read: Disabled

Definition at line 9937 of file nrf52_bitfields.h.

◆ SPIM_INTENCLR_END_Enabled

#define SPIM_INTENCLR_END_Enabled   (1UL)

Read: Enabled

Definition at line 9938 of file nrf52_bitfields.h.

◆ SPIM_INTENCLR_END_Msk

#define SPIM_INTENCLR_END_Msk   (0x1UL << SPIM_INTENCLR_END_Pos)

Bit mask of END field.

Definition at line 9936 of file nrf52_bitfields.h.

◆ SPIM_INTENCLR_END_Pos

#define SPIM_INTENCLR_END_Pos   (6UL)

Position of END field.

Definition at line 9935 of file nrf52_bitfields.h.

◆ SPIM_INTENCLR_ENDRX_Clear

#define SPIM_INTENCLR_ENDRX_Clear   (1UL)

Disable

Definition at line 9946 of file nrf52_bitfields.h.

◆ SPIM_INTENCLR_ENDRX_Disabled

#define SPIM_INTENCLR_ENDRX_Disabled   (0UL)

Read: Disabled

Definition at line 9944 of file nrf52_bitfields.h.

◆ SPIM_INTENCLR_ENDRX_Enabled

#define SPIM_INTENCLR_ENDRX_Enabled   (1UL)

Read: Enabled

Definition at line 9945 of file nrf52_bitfields.h.

◆ SPIM_INTENCLR_ENDRX_Msk

#define SPIM_INTENCLR_ENDRX_Msk   (0x1UL << SPIM_INTENCLR_ENDRX_Pos)

Bit mask of ENDRX field.

Definition at line 9943 of file nrf52_bitfields.h.

◆ SPIM_INTENCLR_ENDRX_Pos

#define SPIM_INTENCLR_ENDRX_Pos   (4UL)

Position of ENDRX field.

Definition at line 9942 of file nrf52_bitfields.h.

◆ SPIM_INTENCLR_ENDTX_Clear

#define SPIM_INTENCLR_ENDTX_Clear   (1UL)

Disable

Definition at line 9932 of file nrf52_bitfields.h.

◆ SPIM_INTENCLR_ENDTX_Disabled

#define SPIM_INTENCLR_ENDTX_Disabled   (0UL)

Read: Disabled

Definition at line 9930 of file nrf52_bitfields.h.

◆ SPIM_INTENCLR_ENDTX_Enabled

#define SPIM_INTENCLR_ENDTX_Enabled   (1UL)

Read: Enabled

Definition at line 9931 of file nrf52_bitfields.h.

◆ SPIM_INTENCLR_ENDTX_Msk

#define SPIM_INTENCLR_ENDTX_Msk   (0x1UL << SPIM_INTENCLR_ENDTX_Pos)

Bit mask of ENDTX field.

Definition at line 9929 of file nrf52_bitfields.h.

◆ SPIM_INTENCLR_ENDTX_Pos

#define SPIM_INTENCLR_ENDTX_Pos   (8UL)

Position of ENDTX field.

Definition at line 9928 of file nrf52_bitfields.h.

◆ SPIM_INTENCLR_STARTED_Clear

#define SPIM_INTENCLR_STARTED_Clear   (1UL)

Disable

Definition at line 9925 of file nrf52_bitfields.h.

◆ SPIM_INTENCLR_STARTED_Disabled

#define SPIM_INTENCLR_STARTED_Disabled   (0UL)

Read: Disabled

Definition at line 9923 of file nrf52_bitfields.h.

◆ SPIM_INTENCLR_STARTED_Enabled

#define SPIM_INTENCLR_STARTED_Enabled   (1UL)

Read: Enabled

Definition at line 9924 of file nrf52_bitfields.h.

◆ SPIM_INTENCLR_STARTED_Msk

#define SPIM_INTENCLR_STARTED_Msk   (0x1UL << SPIM_INTENCLR_STARTED_Pos)

Bit mask of STARTED field.

Definition at line 9922 of file nrf52_bitfields.h.

◆ SPIM_INTENCLR_STARTED_Pos

#define SPIM_INTENCLR_STARTED_Pos   (19UL)

Position of STARTED field.

Definition at line 9921 of file nrf52_bitfields.h.

◆ SPIM_INTENCLR_STOPPED_Clear

#define SPIM_INTENCLR_STOPPED_Clear   (1UL)

Disable

Definition at line 9953 of file nrf52_bitfields.h.

◆ SPIM_INTENCLR_STOPPED_Disabled

#define SPIM_INTENCLR_STOPPED_Disabled   (0UL)

Read: Disabled

Definition at line 9951 of file nrf52_bitfields.h.

◆ SPIM_INTENCLR_STOPPED_Enabled

#define SPIM_INTENCLR_STOPPED_Enabled   (1UL)

Read: Enabled

Definition at line 9952 of file nrf52_bitfields.h.

◆ SPIM_INTENCLR_STOPPED_Msk

#define SPIM_INTENCLR_STOPPED_Msk   (0x1UL << SPIM_INTENCLR_STOPPED_Pos)

Bit mask of STOPPED field.

Definition at line 9950 of file nrf52_bitfields.h.

◆ SPIM_INTENCLR_STOPPED_Pos

#define SPIM_INTENCLR_STOPPED_Pos   (1UL)

Position of STOPPED field.

Definition at line 9949 of file nrf52_bitfields.h.

◆ SPIM_INTENSET_END_Disabled

#define SPIM_INTENSET_END_Disabled   (0UL)

Read: Disabled

Definition at line 9899 of file nrf52_bitfields.h.

◆ SPIM_INTENSET_END_Enabled

#define SPIM_INTENSET_END_Enabled   (1UL)

Read: Enabled

Definition at line 9900 of file nrf52_bitfields.h.

◆ SPIM_INTENSET_END_Msk

#define SPIM_INTENSET_END_Msk   (0x1UL << SPIM_INTENSET_END_Pos)

Bit mask of END field.

Definition at line 9898 of file nrf52_bitfields.h.

◆ SPIM_INTENSET_END_Pos

#define SPIM_INTENSET_END_Pos   (6UL)

Position of END field.

Definition at line 9897 of file nrf52_bitfields.h.

◆ SPIM_INTENSET_END_Set

#define SPIM_INTENSET_END_Set   (1UL)

Enable

Definition at line 9901 of file nrf52_bitfields.h.

◆ SPIM_INTENSET_ENDRX_Disabled

#define SPIM_INTENSET_ENDRX_Disabled   (0UL)

Read: Disabled

Definition at line 9906 of file nrf52_bitfields.h.

◆ SPIM_INTENSET_ENDRX_Enabled

#define SPIM_INTENSET_ENDRX_Enabled   (1UL)

Read: Enabled

Definition at line 9907 of file nrf52_bitfields.h.

◆ SPIM_INTENSET_ENDRX_Msk

#define SPIM_INTENSET_ENDRX_Msk   (0x1UL << SPIM_INTENSET_ENDRX_Pos)

Bit mask of ENDRX field.

Definition at line 9905 of file nrf52_bitfields.h.

◆ SPIM_INTENSET_ENDRX_Pos

#define SPIM_INTENSET_ENDRX_Pos   (4UL)

Position of ENDRX field.

Definition at line 9904 of file nrf52_bitfields.h.

◆ SPIM_INTENSET_ENDRX_Set

#define SPIM_INTENSET_ENDRX_Set   (1UL)

Enable

Definition at line 9908 of file nrf52_bitfields.h.

◆ SPIM_INTENSET_ENDTX_Disabled

#define SPIM_INTENSET_ENDTX_Disabled   (0UL)

Read: Disabled

Definition at line 9892 of file nrf52_bitfields.h.

◆ SPIM_INTENSET_ENDTX_Enabled

#define SPIM_INTENSET_ENDTX_Enabled   (1UL)

Read: Enabled

Definition at line 9893 of file nrf52_bitfields.h.

◆ SPIM_INTENSET_ENDTX_Msk

#define SPIM_INTENSET_ENDTX_Msk   (0x1UL << SPIM_INTENSET_ENDTX_Pos)

Bit mask of ENDTX field.

Definition at line 9891 of file nrf52_bitfields.h.

◆ SPIM_INTENSET_ENDTX_Pos

#define SPIM_INTENSET_ENDTX_Pos   (8UL)

Position of ENDTX field.

Definition at line 9890 of file nrf52_bitfields.h.

◆ SPIM_INTENSET_ENDTX_Set

#define SPIM_INTENSET_ENDTX_Set   (1UL)

Enable

Definition at line 9894 of file nrf52_bitfields.h.

◆ SPIM_INTENSET_STARTED_Disabled

#define SPIM_INTENSET_STARTED_Disabled   (0UL)

Read: Disabled

Definition at line 9885 of file nrf52_bitfields.h.

◆ SPIM_INTENSET_STARTED_Enabled

#define SPIM_INTENSET_STARTED_Enabled   (1UL)

Read: Enabled

Definition at line 9886 of file nrf52_bitfields.h.

◆ SPIM_INTENSET_STARTED_Msk

#define SPIM_INTENSET_STARTED_Msk   (0x1UL << SPIM_INTENSET_STARTED_Pos)

Bit mask of STARTED field.

Definition at line 9884 of file nrf52_bitfields.h.

◆ SPIM_INTENSET_STARTED_Pos

#define SPIM_INTENSET_STARTED_Pos   (19UL)

Position of STARTED field.

Definition at line 9883 of file nrf52_bitfields.h.

◆ SPIM_INTENSET_STARTED_Set

#define SPIM_INTENSET_STARTED_Set   (1UL)

Enable

Definition at line 9887 of file nrf52_bitfields.h.

◆ SPIM_INTENSET_STOPPED_Disabled

#define SPIM_INTENSET_STOPPED_Disabled   (0UL)

Read: Disabled

Definition at line 9913 of file nrf52_bitfields.h.

◆ SPIM_INTENSET_STOPPED_Enabled

#define SPIM_INTENSET_STOPPED_Enabled   (1UL)

Read: Enabled

Definition at line 9914 of file nrf52_bitfields.h.

◆ SPIM_INTENSET_STOPPED_Msk

#define SPIM_INTENSET_STOPPED_Msk   (0x1UL << SPIM_INTENSET_STOPPED_Pos)

Bit mask of STOPPED field.

Definition at line 9912 of file nrf52_bitfields.h.

◆ SPIM_INTENSET_STOPPED_Pos

#define SPIM_INTENSET_STOPPED_Pos   (1UL)

Position of STOPPED field.

Definition at line 9911 of file nrf52_bitfields.h.

◆ SPIM_INTENSET_STOPPED_Set

#define SPIM_INTENSET_STOPPED_Set   (1UL)

Enable

Definition at line 9915 of file nrf52_bitfields.h.

◆ SPIM_ORC_ORC_Msk

#define SPIM_ORC_ORC_Msk   (0xFFUL << SPIM_ORC_ORC_Pos)

Bit mask of ORC field.

Definition at line 10103 of file nrf52_bitfields.h.

◆ SPIM_ORC_ORC_Pos

#define SPIM_ORC_ORC_Pos   (0UL)

Position of ORC field.

Definition at line 10102 of file nrf52_bitfields.h.

◆ SPIM_PSEL_MISO_CONNECT_Connected

#define SPIM_PSEL_MISO_CONNECT_Connected   (0UL)

Connect

Definition at line 9996 of file nrf52_bitfields.h.

◆ SPIM_PSEL_MISO_CONNECT_Disconnected

#define SPIM_PSEL_MISO_CONNECT_Disconnected   (1UL)

Disconnect

Definition at line 9997 of file nrf52_bitfields.h.

◆ SPIM_PSEL_MISO_CONNECT_Msk

#define SPIM_PSEL_MISO_CONNECT_Msk   (0x1UL << SPIM_PSEL_MISO_CONNECT_Pos)

Bit mask of CONNECT field.

Definition at line 9995 of file nrf52_bitfields.h.

◆ SPIM_PSEL_MISO_CONNECT_Pos

#define SPIM_PSEL_MISO_CONNECT_Pos   (31UL)

Position of CONNECT field.

Definition at line 9994 of file nrf52_bitfields.h.

◆ SPIM_PSEL_MISO_PIN_Msk

#define SPIM_PSEL_MISO_PIN_Msk   (0x1FUL << SPIM_PSEL_MISO_PIN_Pos)

Bit mask of PIN field.

Definition at line 10001 of file nrf52_bitfields.h.

◆ SPIM_PSEL_MISO_PIN_Pos

#define SPIM_PSEL_MISO_PIN_Pos   (0UL)

Position of PIN field.

Definition at line 10000 of file nrf52_bitfields.h.

◆ SPIM_PSEL_MOSI_CONNECT_Connected

#define SPIM_PSEL_MOSI_CONNECT_Connected   (0UL)

Connect

Definition at line 9983 of file nrf52_bitfields.h.

◆ SPIM_PSEL_MOSI_CONNECT_Disconnected

#define SPIM_PSEL_MOSI_CONNECT_Disconnected   (1UL)

Disconnect

Definition at line 9984 of file nrf52_bitfields.h.

◆ SPIM_PSEL_MOSI_CONNECT_Msk

#define SPIM_PSEL_MOSI_CONNECT_Msk   (0x1UL << SPIM_PSEL_MOSI_CONNECT_Pos)

Bit mask of CONNECT field.

Definition at line 9982 of file nrf52_bitfields.h.

◆ SPIM_PSEL_MOSI_CONNECT_Pos

#define SPIM_PSEL_MOSI_CONNECT_Pos   (31UL)

Position of CONNECT field.

Definition at line 9981 of file nrf52_bitfields.h.

◆ SPIM_PSEL_MOSI_PIN_Msk

#define SPIM_PSEL_MOSI_PIN_Msk   (0x1FUL << SPIM_PSEL_MOSI_PIN_Pos)

Bit mask of PIN field.

Definition at line 9988 of file nrf52_bitfields.h.

◆ SPIM_PSEL_MOSI_PIN_Pos

#define SPIM_PSEL_MOSI_PIN_Pos   (0UL)

Position of PIN field.

Definition at line 9987 of file nrf52_bitfields.h.

◆ SPIM_PSEL_SCK_CONNECT_Connected

#define SPIM_PSEL_SCK_CONNECT_Connected   (0UL)

Connect

Definition at line 9970 of file nrf52_bitfields.h.

◆ SPIM_PSEL_SCK_CONNECT_Disconnected

#define SPIM_PSEL_SCK_CONNECT_Disconnected   (1UL)

Disconnect

Definition at line 9971 of file nrf52_bitfields.h.

◆ SPIM_PSEL_SCK_CONNECT_Msk

#define SPIM_PSEL_SCK_CONNECT_Msk   (0x1UL << SPIM_PSEL_SCK_CONNECT_Pos)

Bit mask of CONNECT field.

Definition at line 9969 of file nrf52_bitfields.h.

◆ SPIM_PSEL_SCK_CONNECT_Pos

#define SPIM_PSEL_SCK_CONNECT_Pos   (31UL)

Position of CONNECT field.

Definition at line 9968 of file nrf52_bitfields.h.

◆ SPIM_PSEL_SCK_PIN_Msk

#define SPIM_PSEL_SCK_PIN_Msk   (0x1FUL << SPIM_PSEL_SCK_PIN_Pos)

Bit mask of PIN field.

Definition at line 9975 of file nrf52_bitfields.h.

◆ SPIM_PSEL_SCK_PIN_Pos

#define SPIM_PSEL_SCK_PIN_Pos   (0UL)

Position of PIN field.

Definition at line 9974 of file nrf52_bitfields.h.

◆ SPIM_RXD_AMOUNT_AMOUNT_Msk

#define SPIM_RXD_AMOUNT_AMOUNT_Msk   (0xFFUL << SPIM_RXD_AMOUNT_AMOUNT_Pos)

Bit mask of AMOUNT field.

Definition at line 10036 of file nrf52_bitfields.h.

◆ SPIM_RXD_AMOUNT_AMOUNT_Pos

#define SPIM_RXD_AMOUNT_AMOUNT_Pos   (0UL)

Position of AMOUNT field.

Definition at line 10035 of file nrf52_bitfields.h.

◆ SPIM_RXD_LIST_LIST_ArrayList

#define SPIM_RXD_LIST_LIST_ArrayList   (1UL)

Use array list

Definition at line 10045 of file nrf52_bitfields.h.

◆ SPIM_RXD_LIST_LIST_Disabled

#define SPIM_RXD_LIST_LIST_Disabled   (0UL)

Disable EasyDMA list

Definition at line 10044 of file nrf52_bitfields.h.

◆ SPIM_RXD_LIST_LIST_Msk

#define SPIM_RXD_LIST_LIST_Msk   (0x7UL << SPIM_RXD_LIST_LIST_Pos)

Bit mask of LIST field.

Definition at line 10043 of file nrf52_bitfields.h.

◆ SPIM_RXD_LIST_LIST_Pos

#define SPIM_RXD_LIST_LIST_Pos   (0UL)

Position of LIST field.

Definition at line 10042 of file nrf52_bitfields.h.

◆ SPIM_RXD_MAXCNT_MAXCNT_Msk

#define SPIM_RXD_MAXCNT_MAXCNT_Msk   (0xFFUL << SPIM_RXD_MAXCNT_MAXCNT_Pos)

Bit mask of MAXCNT field.

Definition at line 10029 of file nrf52_bitfields.h.

◆ SPIM_RXD_MAXCNT_MAXCNT_Pos

#define SPIM_RXD_MAXCNT_MAXCNT_Pos   (0UL)

Position of MAXCNT field.

Definition at line 10028 of file nrf52_bitfields.h.

◆ SPIM_RXD_PTR_PTR_Msk

#define SPIM_RXD_PTR_PTR_Msk   (0xFFFFFFFFUL << SPIM_RXD_PTR_PTR_Pos)

Bit mask of PTR field.

Definition at line 10022 of file nrf52_bitfields.h.

◆ SPIM_RXD_PTR_PTR_Pos

#define SPIM_RXD_PTR_PTR_Pos   (0UL)

Position of PTR field.

Definition at line 10021 of file nrf52_bitfields.h.

◆ SPIM_SHORTS_END_START_Disabled

#define SPIM_SHORTS_END_START_Disabled   (0UL)

Disable shortcut

Definition at line 9876 of file nrf52_bitfields.h.

◆ SPIM_SHORTS_END_START_Enabled

#define SPIM_SHORTS_END_START_Enabled   (1UL)

Enable shortcut

Definition at line 9877 of file nrf52_bitfields.h.

◆ SPIM_SHORTS_END_START_Msk

#define SPIM_SHORTS_END_START_Msk   (0x1UL << SPIM_SHORTS_END_START_Pos)

Bit mask of END_START field.

Definition at line 9875 of file nrf52_bitfields.h.

◆ SPIM_SHORTS_END_START_Pos

#define SPIM_SHORTS_END_START_Pos   (17UL)

Position of END_START field.

Definition at line 9874 of file nrf52_bitfields.h.

◆ SPIM_TXD_AMOUNT_AMOUNT_Msk

#define SPIM_TXD_AMOUNT_AMOUNT_Msk   (0xFFUL << SPIM_TXD_AMOUNT_AMOUNT_Pos)

Bit mask of AMOUNT field.

Definition at line 10066 of file nrf52_bitfields.h.

◆ SPIM_TXD_AMOUNT_AMOUNT_Pos

#define SPIM_TXD_AMOUNT_AMOUNT_Pos   (0UL)

Position of AMOUNT field.

Definition at line 10065 of file nrf52_bitfields.h.

◆ SPIM_TXD_LIST_LIST_ArrayList

#define SPIM_TXD_LIST_LIST_ArrayList   (1UL)

Use array list

Definition at line 10075 of file nrf52_bitfields.h.

◆ SPIM_TXD_LIST_LIST_Disabled

#define SPIM_TXD_LIST_LIST_Disabled   (0UL)

Disable EasyDMA list

Definition at line 10074 of file nrf52_bitfields.h.

◆ SPIM_TXD_LIST_LIST_Msk

#define SPIM_TXD_LIST_LIST_Msk   (0x7UL << SPIM_TXD_LIST_LIST_Pos)

Bit mask of LIST field.

Definition at line 10073 of file nrf52_bitfields.h.

◆ SPIM_TXD_LIST_LIST_Pos

#define SPIM_TXD_LIST_LIST_Pos   (0UL)

Position of LIST field.

Definition at line 10072 of file nrf52_bitfields.h.

◆ SPIM_TXD_MAXCNT_MAXCNT_Msk

#define SPIM_TXD_MAXCNT_MAXCNT_Msk   (0xFFUL << SPIM_TXD_MAXCNT_MAXCNT_Pos)

Bit mask of MAXCNT field.

Definition at line 10059 of file nrf52_bitfields.h.

◆ SPIM_TXD_MAXCNT_MAXCNT_Pos

#define SPIM_TXD_MAXCNT_MAXCNT_Pos   (0UL)

Position of MAXCNT field.

Definition at line 10058 of file nrf52_bitfields.h.

◆ SPIM_TXD_PTR_PTR_Msk

#define SPIM_TXD_PTR_PTR_Msk   (0xFFFFFFFFUL << SPIM_TXD_PTR_PTR_Pos)

Bit mask of PTR field.

Definition at line 10052 of file nrf52_bitfields.h.

◆ SPIM_TXD_PTR_PTR_Pos

#define SPIM_TXD_PTR_PTR_Pos   (0UL)

Position of PTR field.

Definition at line 10051 of file nrf52_bitfields.h.

◆ SPIS_CONFIG_CPHA_Leading

#define SPIS_CONFIG_CPHA_Leading   (0UL)

Sample on leading edge of clock, shift serial data on trailing edge

Definition at line 10295 of file nrf52_bitfields.h.

◆ SPIS_CONFIG_CPHA_Msk

#define SPIS_CONFIG_CPHA_Msk   (0x1UL << SPIS_CONFIG_CPHA_Pos)

Bit mask of CPHA field.

Definition at line 10294 of file nrf52_bitfields.h.

◆ SPIS_CONFIG_CPHA_Pos

#define SPIS_CONFIG_CPHA_Pos   (1UL)

Position of CPHA field.

Definition at line 10293 of file nrf52_bitfields.h.

◆ SPIS_CONFIG_CPHA_Trailing

#define SPIS_CONFIG_CPHA_Trailing   (1UL)

Sample on trailing edge of clock, shift serial data on leading edge

Definition at line 10296 of file nrf52_bitfields.h.

◆ SPIS_CONFIG_CPOL_ActiveHigh

#define SPIS_CONFIG_CPOL_ActiveHigh   (0UL)

Active high

Definition at line 10289 of file nrf52_bitfields.h.

◆ SPIS_CONFIG_CPOL_ActiveLow

#define SPIS_CONFIG_CPOL_ActiveLow   (1UL)

Active low

Definition at line 10290 of file nrf52_bitfields.h.

◆ SPIS_CONFIG_CPOL_Msk

#define SPIS_CONFIG_CPOL_Msk   (0x1UL << SPIS_CONFIG_CPOL_Pos)

Bit mask of CPOL field.

Definition at line 10288 of file nrf52_bitfields.h.

◆ SPIS_CONFIG_CPOL_Pos

#define SPIS_CONFIG_CPOL_Pos   (2UL)

Position of CPOL field.

Definition at line 10287 of file nrf52_bitfields.h.

◆ SPIS_CONFIG_ORDER_LsbFirst

#define SPIS_CONFIG_ORDER_LsbFirst   (1UL)

Least significant bit shifted out first

Definition at line 10302 of file nrf52_bitfields.h.

◆ SPIS_CONFIG_ORDER_MsbFirst

#define SPIS_CONFIG_ORDER_MsbFirst   (0UL)

Most significant bit shifted out first

Definition at line 10301 of file nrf52_bitfields.h.

◆ SPIS_CONFIG_ORDER_Msk

#define SPIS_CONFIG_ORDER_Msk   (0x1UL << SPIS_CONFIG_ORDER_Pos)

Bit mask of ORDER field.

Definition at line 10300 of file nrf52_bitfields.h.

◆ SPIS_CONFIG_ORDER_Pos

#define SPIS_CONFIG_ORDER_Pos   (0UL)

Position of ORDER field.

Definition at line 10299 of file nrf52_bitfields.h.

◆ SPIS_DEF_DEF_Msk

#define SPIS_DEF_DEF_Msk   (0xFFUL << SPIS_DEF_DEF_Pos)

Bit mask of DEF field.

Definition at line 10309 of file nrf52_bitfields.h.

◆ SPIS_DEF_DEF_Pos

#define SPIS_DEF_DEF_Pos   (0UL)

Position of DEF field.

Definition at line 10308 of file nrf52_bitfields.h.

◆ SPIS_ENABLE_ENABLE_Disabled

#define SPIS_ENABLE_ENABLE_Disabled   (0UL)

Disable SPI slave

Definition at line 10186 of file nrf52_bitfields.h.

◆ SPIS_ENABLE_ENABLE_Enabled

#define SPIS_ENABLE_ENABLE_Enabled   (2UL)

Enable SPI slave

Definition at line 10187 of file nrf52_bitfields.h.

◆ SPIS_ENABLE_ENABLE_Msk

#define SPIS_ENABLE_ENABLE_Msk   (0xFUL << SPIS_ENABLE_ENABLE_Pos)

Bit mask of ENABLE field.

Definition at line 10185 of file nrf52_bitfields.h.

◆ SPIS_ENABLE_ENABLE_Pos

#define SPIS_ENABLE_ENABLE_Pos   (0UL)

Position of ENABLE field.

Definition at line 10184 of file nrf52_bitfields.h.

◆ SPIS_INTENCLR_ACQUIRED_Clear

#define SPIS_INTENCLR_ACQUIRED_Clear   (1UL)

Disable

Definition at line 10143 of file nrf52_bitfields.h.

◆ SPIS_INTENCLR_ACQUIRED_Disabled

#define SPIS_INTENCLR_ACQUIRED_Disabled   (0UL)

Read: Disabled

Definition at line 10141 of file nrf52_bitfields.h.

◆ SPIS_INTENCLR_ACQUIRED_Enabled

#define SPIS_INTENCLR_ACQUIRED_Enabled   (1UL)

Read: Enabled

Definition at line 10142 of file nrf52_bitfields.h.

◆ SPIS_INTENCLR_ACQUIRED_Msk

#define SPIS_INTENCLR_ACQUIRED_Msk   (0x1UL << SPIS_INTENCLR_ACQUIRED_Pos)

Bit mask of ACQUIRED field.

Definition at line 10140 of file nrf52_bitfields.h.

◆ SPIS_INTENCLR_ACQUIRED_Pos

#define SPIS_INTENCLR_ACQUIRED_Pos   (10UL)

Position of ACQUIRED field.

Definition at line 10139 of file nrf52_bitfields.h.

◆ SPIS_INTENCLR_END_Clear

#define SPIS_INTENCLR_END_Clear   (1UL)

Disable

Definition at line 10150 of file nrf52_bitfields.h.

◆ SPIS_INTENCLR_END_Disabled

#define SPIS_INTENCLR_END_Disabled   (0UL)

Read: Disabled

Definition at line 10148 of file nrf52_bitfields.h.

◆ SPIS_INTENCLR_END_Enabled

#define SPIS_INTENCLR_END_Enabled   (1UL)

Read: Enabled

Definition at line 10149 of file nrf52_bitfields.h.

◆ SPIS_INTENCLR_END_Msk

#define SPIS_INTENCLR_END_Msk   (0x1UL << SPIS_INTENCLR_END_Pos)

Bit mask of END field.

Definition at line 10147 of file nrf52_bitfields.h.

◆ SPIS_INTENCLR_END_Pos

#define SPIS_INTENCLR_END_Pos   (1UL)

Position of END field.

Definition at line 10146 of file nrf52_bitfields.h.

◆ SPIS_INTENSET_ACQUIRED_Disabled

#define SPIS_INTENSET_ACQUIRED_Disabled   (0UL)

Read: Disabled

Definition at line 10124 of file nrf52_bitfields.h.

◆ SPIS_INTENSET_ACQUIRED_Enabled

#define SPIS_INTENSET_ACQUIRED_Enabled   (1UL)

Read: Enabled

Definition at line 10125 of file nrf52_bitfields.h.

◆ SPIS_INTENSET_ACQUIRED_Msk

#define SPIS_INTENSET_ACQUIRED_Msk   (0x1UL << SPIS_INTENSET_ACQUIRED_Pos)

Bit mask of ACQUIRED field.

Definition at line 10123 of file nrf52_bitfields.h.

◆ SPIS_INTENSET_ACQUIRED_Pos

#define SPIS_INTENSET_ACQUIRED_Pos   (10UL)

Position of ACQUIRED field.

Definition at line 10122 of file nrf52_bitfields.h.

◆ SPIS_INTENSET_ACQUIRED_Set

#define SPIS_INTENSET_ACQUIRED_Set   (1UL)

Enable

Definition at line 10126 of file nrf52_bitfields.h.

◆ SPIS_INTENSET_END_Disabled

#define SPIS_INTENSET_END_Disabled   (0UL)

Read: Disabled

Definition at line 10131 of file nrf52_bitfields.h.

◆ SPIS_INTENSET_END_Enabled

#define SPIS_INTENSET_END_Enabled   (1UL)

Read: Enabled

Definition at line 10132 of file nrf52_bitfields.h.

◆ SPIS_INTENSET_END_Msk

#define SPIS_INTENSET_END_Msk   (0x1UL << SPIS_INTENSET_END_Pos)

Bit mask of END field.

Definition at line 10130 of file nrf52_bitfields.h.

◆ SPIS_INTENSET_END_Pos

#define SPIS_INTENSET_END_Pos   (1UL)

Position of END field.

Definition at line 10129 of file nrf52_bitfields.h.

◆ SPIS_INTENSET_END_Set

#define SPIS_INTENSET_END_Set   (1UL)

Enable

Definition at line 10133 of file nrf52_bitfields.h.

◆ SPIS_ORC_ORC_Msk

#define SPIS_ORC_ORC_Msk   (0xFFUL << SPIS_ORC_ORC_Pos)

Bit mask of ORC field.

Definition at line 10316 of file nrf52_bitfields.h.

◆ SPIS_ORC_ORC_Pos

#define SPIS_ORC_ORC_Pos   (0UL)

Position of ORC field.

Definition at line 10315 of file nrf52_bitfields.h.

◆ SPIS_PSEL_CSN_CONNECT_Connected

#define SPIS_PSEL_CSN_CONNECT_Connected   (0UL)

Connect

Definition at line 10234 of file nrf52_bitfields.h.

◆ SPIS_PSEL_CSN_CONNECT_Disconnected

#define SPIS_PSEL_CSN_CONNECT_Disconnected   (1UL)

Disconnect

Definition at line 10235 of file nrf52_bitfields.h.

◆ SPIS_PSEL_CSN_CONNECT_Msk

#define SPIS_PSEL_CSN_CONNECT_Msk   (0x1UL << SPIS_PSEL_CSN_CONNECT_Pos)

Bit mask of CONNECT field.

Definition at line 10233 of file nrf52_bitfields.h.

◆ SPIS_PSEL_CSN_CONNECT_Pos

#define SPIS_PSEL_CSN_CONNECT_Pos   (31UL)

Position of CONNECT field.

Definition at line 10232 of file nrf52_bitfields.h.

◆ SPIS_PSEL_CSN_PIN_Msk

#define SPIS_PSEL_CSN_PIN_Msk   (0x1FUL << SPIS_PSEL_CSN_PIN_Pos)

Bit mask of PIN field.

Definition at line 10239 of file nrf52_bitfields.h.

◆ SPIS_PSEL_CSN_PIN_Pos

#define SPIS_PSEL_CSN_PIN_Pos   (0UL)

Position of PIN field.

Definition at line 10238 of file nrf52_bitfields.h.

◆ SPIS_PSEL_MISO_CONNECT_Connected

#define SPIS_PSEL_MISO_CONNECT_Connected   (0UL)

Connect

Definition at line 10208 of file nrf52_bitfields.h.

◆ SPIS_PSEL_MISO_CONNECT_Disconnected

#define SPIS_PSEL_MISO_CONNECT_Disconnected   (1UL)

Disconnect

Definition at line 10209 of file nrf52_bitfields.h.

◆ SPIS_PSEL_MISO_CONNECT_Msk

#define SPIS_PSEL_MISO_CONNECT_Msk   (0x1UL << SPIS_PSEL_MISO_CONNECT_Pos)

Bit mask of CONNECT field.

Definition at line 10207 of file nrf52_bitfields.h.

◆ SPIS_PSEL_MISO_CONNECT_Pos

#define SPIS_PSEL_MISO_CONNECT_Pos   (31UL)

Position of CONNECT field.

Definition at line 10206 of file nrf52_bitfields.h.

◆ SPIS_PSEL_MISO_PIN_Msk

#define SPIS_PSEL_MISO_PIN_Msk   (0x1FUL << SPIS_PSEL_MISO_PIN_Pos)

Bit mask of PIN field.

Definition at line 10213 of file nrf52_bitfields.h.

◆ SPIS_PSEL_MISO_PIN_Pos

#define SPIS_PSEL_MISO_PIN_Pos   (0UL)

Position of PIN field.

Definition at line 10212 of file nrf52_bitfields.h.

◆ SPIS_PSEL_MOSI_CONNECT_Connected

#define SPIS_PSEL_MOSI_CONNECT_Connected   (0UL)

Connect

Definition at line 10221 of file nrf52_bitfields.h.

◆ SPIS_PSEL_MOSI_CONNECT_Disconnected

#define SPIS_PSEL_MOSI_CONNECT_Disconnected   (1UL)

Disconnect

Definition at line 10222 of file nrf52_bitfields.h.

◆ SPIS_PSEL_MOSI_CONNECT_Msk

#define SPIS_PSEL_MOSI_CONNECT_Msk   (0x1UL << SPIS_PSEL_MOSI_CONNECT_Pos)

Bit mask of CONNECT field.

Definition at line 10220 of file nrf52_bitfields.h.

◆ SPIS_PSEL_MOSI_CONNECT_Pos

#define SPIS_PSEL_MOSI_CONNECT_Pos   (31UL)

Position of CONNECT field.

Definition at line 10219 of file nrf52_bitfields.h.

◆ SPIS_PSEL_MOSI_PIN_Msk

#define SPIS_PSEL_MOSI_PIN_Msk   (0x1FUL << SPIS_PSEL_MOSI_PIN_Pos)

Bit mask of PIN field.

Definition at line 10226 of file nrf52_bitfields.h.

◆ SPIS_PSEL_MOSI_PIN_Pos

#define SPIS_PSEL_MOSI_PIN_Pos   (0UL)

Position of PIN field.

Definition at line 10225 of file nrf52_bitfields.h.

◆ SPIS_PSEL_SCK_CONNECT_Connected

#define SPIS_PSEL_SCK_CONNECT_Connected   (0UL)

Connect

Definition at line 10195 of file nrf52_bitfields.h.

◆ SPIS_PSEL_SCK_CONNECT_Disconnected

#define SPIS_PSEL_SCK_CONNECT_Disconnected   (1UL)

Disconnect

Definition at line 10196 of file nrf52_bitfields.h.

◆ SPIS_PSEL_SCK_CONNECT_Msk

#define SPIS_PSEL_SCK_CONNECT_Msk   (0x1UL << SPIS_PSEL_SCK_CONNECT_Pos)

Bit mask of CONNECT field.

Definition at line 10194 of file nrf52_bitfields.h.

◆ SPIS_PSEL_SCK_CONNECT_Pos

#define SPIS_PSEL_SCK_CONNECT_Pos   (31UL)

Position of CONNECT field.

Definition at line 10193 of file nrf52_bitfields.h.

◆ SPIS_PSEL_SCK_PIN_Msk

#define SPIS_PSEL_SCK_PIN_Msk   (0x1FUL << SPIS_PSEL_SCK_PIN_Pos)

Bit mask of PIN field.

Definition at line 10200 of file nrf52_bitfields.h.

◆ SPIS_PSEL_SCK_PIN_Pos

#define SPIS_PSEL_SCK_PIN_Pos   (0UL)

Position of PIN field.

Definition at line 10199 of file nrf52_bitfields.h.

◆ SPIS_RXD_AMOUNT_AMOUNT_Msk

#define SPIS_RXD_AMOUNT_AMOUNT_Msk   (0xFFUL << SPIS_RXD_AMOUNT_AMOUNT_Pos)

Bit mask of AMOUNT field.

Definition at line 10260 of file nrf52_bitfields.h.

◆ SPIS_RXD_AMOUNT_AMOUNT_Pos

#define SPIS_RXD_AMOUNT_AMOUNT_Pos   (0UL)

Position of AMOUNT field.

Definition at line 10259 of file nrf52_bitfields.h.

◆ SPIS_RXD_MAXCNT_MAXCNT_Msk

#define SPIS_RXD_MAXCNT_MAXCNT_Msk   (0xFFUL << SPIS_RXD_MAXCNT_MAXCNT_Pos)

Bit mask of MAXCNT field.

Definition at line 10253 of file nrf52_bitfields.h.

◆ SPIS_RXD_MAXCNT_MAXCNT_Pos

#define SPIS_RXD_MAXCNT_MAXCNT_Pos   (0UL)

Position of MAXCNT field.

Definition at line 10252 of file nrf52_bitfields.h.

◆ SPIS_RXD_PTR_PTR_Msk

#define SPIS_RXD_PTR_PTR_Msk   (0xFFFFFFFFUL << SPIS_RXD_PTR_PTR_Pos)

Bit mask of PTR field.

Definition at line 10246 of file nrf52_bitfields.h.

◆ SPIS_RXD_PTR_PTR_Pos

#define SPIS_RXD_PTR_PTR_Pos   (0UL)

Position of PTR field.

Definition at line 10245 of file nrf52_bitfields.h.

◆ SPIS_SEMSTAT_SEMSTAT_CPU

#define SPIS_SEMSTAT_SEMSTAT_CPU   (1UL)

Semaphore is assigned to CPU

Definition at line 10159 of file nrf52_bitfields.h.

◆ SPIS_SEMSTAT_SEMSTAT_CPUPending

#define SPIS_SEMSTAT_SEMSTAT_CPUPending   (3UL)

Semaphore is assigned to SPI but a handover to the CPU is pending

Definition at line 10161 of file nrf52_bitfields.h.

◆ SPIS_SEMSTAT_SEMSTAT_Free

#define SPIS_SEMSTAT_SEMSTAT_Free   (0UL)

Semaphore is free

Definition at line 10158 of file nrf52_bitfields.h.

◆ SPIS_SEMSTAT_SEMSTAT_Msk

#define SPIS_SEMSTAT_SEMSTAT_Msk   (0x3UL << SPIS_SEMSTAT_SEMSTAT_Pos)

Bit mask of SEMSTAT field.

Definition at line 10157 of file nrf52_bitfields.h.

◆ SPIS_SEMSTAT_SEMSTAT_Pos

#define SPIS_SEMSTAT_SEMSTAT_Pos   (0UL)

Position of SEMSTAT field.

Definition at line 10156 of file nrf52_bitfields.h.

◆ SPIS_SEMSTAT_SEMSTAT_SPIS

#define SPIS_SEMSTAT_SEMSTAT_SPIS   (2UL)

Semaphore is assigned to SPI slave

Definition at line 10160 of file nrf52_bitfields.h.

◆ SPIS_SHORTS_END_ACQUIRE_Disabled

#define SPIS_SHORTS_END_ACQUIRE_Disabled   (0UL)

Disable shortcut

Definition at line 10115 of file nrf52_bitfields.h.

◆ SPIS_SHORTS_END_ACQUIRE_Enabled

#define SPIS_SHORTS_END_ACQUIRE_Enabled   (1UL)

Enable shortcut

Definition at line 10116 of file nrf52_bitfields.h.

◆ SPIS_SHORTS_END_ACQUIRE_Msk

#define SPIS_SHORTS_END_ACQUIRE_Msk   (0x1UL << SPIS_SHORTS_END_ACQUIRE_Pos)

Bit mask of END_ACQUIRE field.

Definition at line 10114 of file nrf52_bitfields.h.

◆ SPIS_SHORTS_END_ACQUIRE_Pos

#define SPIS_SHORTS_END_ACQUIRE_Pos   (2UL)

Position of END_ACQUIRE field.

Definition at line 10113 of file nrf52_bitfields.h.

◆ SPIS_STATUS_OVERFLOW_Clear

#define SPIS_STATUS_OVERFLOW_Clear   (1UL)

Write: clear error on writing '1'

Definition at line 10171 of file nrf52_bitfields.h.

◆ SPIS_STATUS_OVERFLOW_Msk

#define SPIS_STATUS_OVERFLOW_Msk   (0x1UL << SPIS_STATUS_OVERFLOW_Pos)

Bit mask of OVERFLOW field.

Definition at line 10168 of file nrf52_bitfields.h.

◆ SPIS_STATUS_OVERFLOW_NotPresent

#define SPIS_STATUS_OVERFLOW_NotPresent   (0UL)

Read: error not present

Definition at line 10169 of file nrf52_bitfields.h.

◆ SPIS_STATUS_OVERFLOW_Pos

#define SPIS_STATUS_OVERFLOW_Pos   (1UL)

Position of OVERFLOW field.

Definition at line 10167 of file nrf52_bitfields.h.

◆ SPIS_STATUS_OVERFLOW_Present

#define SPIS_STATUS_OVERFLOW_Present   (1UL)

Read: error present

Definition at line 10170 of file nrf52_bitfields.h.

◆ SPIS_STATUS_OVERREAD_Clear

#define SPIS_STATUS_OVERREAD_Clear   (1UL)

Write: clear error on writing '1'

Definition at line 10178 of file nrf52_bitfields.h.

◆ SPIS_STATUS_OVERREAD_Msk

#define SPIS_STATUS_OVERREAD_Msk   (0x1UL << SPIS_STATUS_OVERREAD_Pos)

Bit mask of OVERREAD field.

Definition at line 10175 of file nrf52_bitfields.h.

◆ SPIS_STATUS_OVERREAD_NotPresent

#define SPIS_STATUS_OVERREAD_NotPresent   (0UL)

Read: error not present

Definition at line 10176 of file nrf52_bitfields.h.

◆ SPIS_STATUS_OVERREAD_Pos

#define SPIS_STATUS_OVERREAD_Pos   (0UL)

Position of OVERREAD field.

Definition at line 10174 of file nrf52_bitfields.h.

◆ SPIS_STATUS_OVERREAD_Present

#define SPIS_STATUS_OVERREAD_Present   (1UL)

Read: error present

Definition at line 10177 of file nrf52_bitfields.h.

◆ SPIS_TXD_AMOUNT_AMOUNT_Msk

#define SPIS_TXD_AMOUNT_AMOUNT_Msk   (0xFFUL << SPIS_TXD_AMOUNT_AMOUNT_Pos)

Bit mask of AMOUNT field.

Definition at line 10281 of file nrf52_bitfields.h.

◆ SPIS_TXD_AMOUNT_AMOUNT_Pos

#define SPIS_TXD_AMOUNT_AMOUNT_Pos   (0UL)

Position of AMOUNT field.

Definition at line 10280 of file nrf52_bitfields.h.

◆ SPIS_TXD_MAXCNT_MAXCNT_Msk

#define SPIS_TXD_MAXCNT_MAXCNT_Msk   (0xFFUL << SPIS_TXD_MAXCNT_MAXCNT_Pos)

Bit mask of MAXCNT field.

Definition at line 10274 of file nrf52_bitfields.h.

◆ SPIS_TXD_MAXCNT_MAXCNT_Pos

#define SPIS_TXD_MAXCNT_MAXCNT_Pos   (0UL)

Position of MAXCNT field.

Definition at line 10273 of file nrf52_bitfields.h.

◆ SPIS_TXD_PTR_PTR_Msk

#define SPIS_TXD_PTR_PTR_Msk   (0xFFFFFFFFUL << SPIS_TXD_PTR_PTR_Pos)

Bit mask of PTR field.

Definition at line 10267 of file nrf52_bitfields.h.

◆ SPIS_TXD_PTR_PTR_Pos

#define SPIS_TXD_PTR_PTR_Pos   (0UL)

Position of PTR field.

Definition at line 10266 of file nrf52_bitfields.h.

◆ TEMP_INTENCLR_DATARDY_Clear

#define TEMP_INTENCLR_DATARDY_Clear   (1UL)

Disable

Definition at line 10340 of file nrf52_bitfields.h.

◆ TEMP_INTENCLR_DATARDY_Disabled

#define TEMP_INTENCLR_DATARDY_Disabled   (0UL)

Read: Disabled

Definition at line 10338 of file nrf52_bitfields.h.

◆ TEMP_INTENCLR_DATARDY_Enabled

#define TEMP_INTENCLR_DATARDY_Enabled   (1UL)

Read: Enabled

Definition at line 10339 of file nrf52_bitfields.h.

◆ TEMP_INTENCLR_DATARDY_Msk

#define TEMP_INTENCLR_DATARDY_Msk   (0x1UL << TEMP_INTENCLR_DATARDY_Pos)

Bit mask of DATARDY field.

Definition at line 10337 of file nrf52_bitfields.h.

◆ TEMP_INTENCLR_DATARDY_Pos

#define TEMP_INTENCLR_DATARDY_Pos   (0UL)

Position of DATARDY field.

Definition at line 10336 of file nrf52_bitfields.h.

◆ TEMP_INTENSET_DATARDY_Disabled

#define TEMP_INTENSET_DATARDY_Disabled   (0UL)

Read: Disabled

Definition at line 10328 of file nrf52_bitfields.h.

◆ TEMP_INTENSET_DATARDY_Enabled

#define TEMP_INTENSET_DATARDY_Enabled   (1UL)

Read: Enabled

Definition at line 10329 of file nrf52_bitfields.h.

◆ TEMP_INTENSET_DATARDY_Msk

#define TEMP_INTENSET_DATARDY_Msk   (0x1UL << TEMP_INTENSET_DATARDY_Pos)

Bit mask of DATARDY field.

Definition at line 10327 of file nrf52_bitfields.h.

◆ TEMP_INTENSET_DATARDY_Pos

#define TEMP_INTENSET_DATARDY_Pos   (0UL)

Position of DATARDY field.

Definition at line 10326 of file nrf52_bitfields.h.

◆ TEMP_INTENSET_DATARDY_Set

#define TEMP_INTENSET_DATARDY_Set   (1UL)

Enable

Definition at line 10330 of file nrf52_bitfields.h.

◆ TEMP_TEMP_TEMP_Msk

#define TEMP_TEMP_TEMP_Msk   (0xFFFFFFFFUL << TEMP_TEMP_TEMP_Pos)

Bit mask of TEMP field.

Definition at line 10347 of file nrf52_bitfields.h.

◆ TEMP_TEMP_TEMP_Pos

#define TEMP_TEMP_TEMP_Pos   (0UL)

Position of TEMP field.

Definition at line 10346 of file nrf52_bitfields.h.

◆ TIMER_BITMODE_BITMODE_08Bit

#define TIMER_BITMODE_BITMODE_08Bit   (1UL)

8 bit timer bit width

Definition at line 10535 of file nrf52_bitfields.h.

◆ TIMER_BITMODE_BITMODE_16Bit

#define TIMER_BITMODE_BITMODE_16Bit   (0UL)

16 bit timer bit width

Definition at line 10534 of file nrf52_bitfields.h.

◆ TIMER_BITMODE_BITMODE_24Bit

#define TIMER_BITMODE_BITMODE_24Bit   (2UL)

24 bit timer bit width

Definition at line 10536 of file nrf52_bitfields.h.

◆ TIMER_BITMODE_BITMODE_32Bit

#define TIMER_BITMODE_BITMODE_32Bit   (3UL)

32 bit timer bit width

Definition at line 10537 of file nrf52_bitfields.h.

◆ TIMER_BITMODE_BITMODE_Msk

#define TIMER_BITMODE_BITMODE_Msk   (0x3UL << TIMER_BITMODE_BITMODE_Pos)

Bit mask of BITMODE field.

Definition at line 10533 of file nrf52_bitfields.h.

◆ TIMER_BITMODE_BITMODE_Pos

#define TIMER_BITMODE_BITMODE_Pos   (0UL)

Position of BITMODE field.

Definition at line 10532 of file nrf52_bitfields.h.

◆ TIMER_CC_CC_Msk

#define TIMER_CC_CC_Msk   (0xFFFFFFFFUL << TIMER_CC_CC_Pos)

Bit mask of CC field.

Definition at line 10551 of file nrf52_bitfields.h.

◆ TIMER_CC_CC_Pos

#define TIMER_CC_CC_Pos   (0UL)

Position of CC field.

Definition at line 10550 of file nrf52_bitfields.h.

◆ TIMER_INTENCLR_COMPARE0_Clear

#define TIMER_INTENCLR_COMPARE0_Clear   (1UL)

Disable

Definition at line 10516 of file nrf52_bitfields.h.

◆ TIMER_INTENCLR_COMPARE0_Disabled

#define TIMER_INTENCLR_COMPARE0_Disabled   (0UL)

Read: Disabled

Definition at line 10514 of file nrf52_bitfields.h.

◆ TIMER_INTENCLR_COMPARE0_Enabled

#define TIMER_INTENCLR_COMPARE0_Enabled   (1UL)

Read: Enabled

Definition at line 10515 of file nrf52_bitfields.h.

◆ TIMER_INTENCLR_COMPARE0_Msk

#define TIMER_INTENCLR_COMPARE0_Msk   (0x1UL << TIMER_INTENCLR_COMPARE0_Pos)

Bit mask of COMPARE0 field.

Definition at line 10513 of file nrf52_bitfields.h.

◆ TIMER_INTENCLR_COMPARE0_Pos

#define TIMER_INTENCLR_COMPARE0_Pos   (16UL)

Position of COMPARE0 field.

Definition at line 10512 of file nrf52_bitfields.h.

◆ TIMER_INTENCLR_COMPARE1_Clear

#define TIMER_INTENCLR_COMPARE1_Clear   (1UL)

Disable

Definition at line 10509 of file nrf52_bitfields.h.

◆ TIMER_INTENCLR_COMPARE1_Disabled

#define TIMER_INTENCLR_COMPARE1_Disabled   (0UL)

Read: Disabled

Definition at line 10507 of file nrf52_bitfields.h.

◆ TIMER_INTENCLR_COMPARE1_Enabled

#define TIMER_INTENCLR_COMPARE1_Enabled   (1UL)

Read: Enabled

Definition at line 10508 of file nrf52_bitfields.h.

◆ TIMER_INTENCLR_COMPARE1_Msk

#define TIMER_INTENCLR_COMPARE1_Msk   (0x1UL << TIMER_INTENCLR_COMPARE1_Pos)

Bit mask of COMPARE1 field.

Definition at line 10506 of file nrf52_bitfields.h.

◆ TIMER_INTENCLR_COMPARE1_Pos

#define TIMER_INTENCLR_COMPARE1_Pos   (17UL)

Position of COMPARE1 field.

Definition at line 10505 of file nrf52_bitfields.h.

◆ TIMER_INTENCLR_COMPARE2_Clear

#define TIMER_INTENCLR_COMPARE2_Clear   (1UL)

Disable

Definition at line 10502 of file nrf52_bitfields.h.

◆ TIMER_INTENCLR_COMPARE2_Disabled

#define TIMER_INTENCLR_COMPARE2_Disabled   (0UL)

Read: Disabled

Definition at line 10500 of file nrf52_bitfields.h.

◆ TIMER_INTENCLR_COMPARE2_Enabled

#define TIMER_INTENCLR_COMPARE2_Enabled   (1UL)

Read: Enabled

Definition at line 10501 of file nrf52_bitfields.h.

◆ TIMER_INTENCLR_COMPARE2_Msk

#define TIMER_INTENCLR_COMPARE2_Msk   (0x1UL << TIMER_INTENCLR_COMPARE2_Pos)

Bit mask of COMPARE2 field.

Definition at line 10499 of file nrf52_bitfields.h.

◆ TIMER_INTENCLR_COMPARE2_Pos

#define TIMER_INTENCLR_COMPARE2_Pos   (18UL)

Position of COMPARE2 field.

Definition at line 10498 of file nrf52_bitfields.h.

◆ TIMER_INTENCLR_COMPARE3_Clear

#define TIMER_INTENCLR_COMPARE3_Clear   (1UL)

Disable

Definition at line 10495 of file nrf52_bitfields.h.

◆ TIMER_INTENCLR_COMPARE3_Disabled

#define TIMER_INTENCLR_COMPARE3_Disabled   (0UL)

Read: Disabled

Definition at line 10493 of file nrf52_bitfields.h.

◆ TIMER_INTENCLR_COMPARE3_Enabled

#define TIMER_INTENCLR_COMPARE3_Enabled   (1UL)

Read: Enabled

Definition at line 10494 of file nrf52_bitfields.h.

◆ TIMER_INTENCLR_COMPARE3_Msk

#define TIMER_INTENCLR_COMPARE3_Msk   (0x1UL << TIMER_INTENCLR_COMPARE3_Pos)

Bit mask of COMPARE3 field.

Definition at line 10492 of file nrf52_bitfields.h.

◆ TIMER_INTENCLR_COMPARE3_Pos

#define TIMER_INTENCLR_COMPARE3_Pos   (19UL)

Position of COMPARE3 field.

Definition at line 10491 of file nrf52_bitfields.h.

◆ TIMER_INTENCLR_COMPARE4_Clear

#define TIMER_INTENCLR_COMPARE4_Clear   (1UL)

Disable

Definition at line 10488 of file nrf52_bitfields.h.

◆ TIMER_INTENCLR_COMPARE4_Disabled

#define TIMER_INTENCLR_COMPARE4_Disabled   (0UL)

Read: Disabled

Definition at line 10486 of file nrf52_bitfields.h.

◆ TIMER_INTENCLR_COMPARE4_Enabled

#define TIMER_INTENCLR_COMPARE4_Enabled   (1UL)

Read: Enabled

Definition at line 10487 of file nrf52_bitfields.h.

◆ TIMER_INTENCLR_COMPARE4_Msk

#define TIMER_INTENCLR_COMPARE4_Msk   (0x1UL << TIMER_INTENCLR_COMPARE4_Pos)

Bit mask of COMPARE4 field.

Definition at line 10485 of file nrf52_bitfields.h.

◆ TIMER_INTENCLR_COMPARE4_Pos

#define TIMER_INTENCLR_COMPARE4_Pos   (20UL)

Position of COMPARE4 field.

Definition at line 10484 of file nrf52_bitfields.h.

◆ TIMER_INTENCLR_COMPARE5_Clear

#define TIMER_INTENCLR_COMPARE5_Clear   (1UL)

Disable

Definition at line 10481 of file nrf52_bitfields.h.

◆ TIMER_INTENCLR_COMPARE5_Disabled

#define TIMER_INTENCLR_COMPARE5_Disabled   (0UL)

Read: Disabled

Definition at line 10479 of file nrf52_bitfields.h.

◆ TIMER_INTENCLR_COMPARE5_Enabled

#define TIMER_INTENCLR_COMPARE5_Enabled   (1UL)

Read: Enabled

Definition at line 10480 of file nrf52_bitfields.h.

◆ TIMER_INTENCLR_COMPARE5_Msk

#define TIMER_INTENCLR_COMPARE5_Msk   (0x1UL << TIMER_INTENCLR_COMPARE5_Pos)

Bit mask of COMPARE5 field.

Definition at line 10478 of file nrf52_bitfields.h.

◆ TIMER_INTENCLR_COMPARE5_Pos

#define TIMER_INTENCLR_COMPARE5_Pos   (21UL)

Position of COMPARE5 field.

Definition at line 10477 of file nrf52_bitfields.h.

◆ TIMER_INTENSET_COMPARE0_Disabled

#define TIMER_INTENSET_COMPARE0_Disabled   (0UL)

Read: Disabled

Definition at line 10469 of file nrf52_bitfields.h.

◆ TIMER_INTENSET_COMPARE0_Enabled

#define TIMER_INTENSET_COMPARE0_Enabled   (1UL)

Read: Enabled

Definition at line 10470 of file nrf52_bitfields.h.

◆ TIMER_INTENSET_COMPARE0_Msk

#define TIMER_INTENSET_COMPARE0_Msk   (0x1UL << TIMER_INTENSET_COMPARE0_Pos)

Bit mask of COMPARE0 field.

Definition at line 10468 of file nrf52_bitfields.h.

◆ TIMER_INTENSET_COMPARE0_Pos

#define TIMER_INTENSET_COMPARE0_Pos   (16UL)

Position of COMPARE0 field.

Definition at line 10467 of file nrf52_bitfields.h.

◆ TIMER_INTENSET_COMPARE0_Set

#define TIMER_INTENSET_COMPARE0_Set   (1UL)

Enable

Definition at line 10471 of file nrf52_bitfields.h.

◆ TIMER_INTENSET_COMPARE1_Disabled

#define TIMER_INTENSET_COMPARE1_Disabled   (0UL)

Read: Disabled

Definition at line 10462 of file nrf52_bitfields.h.

◆ TIMER_INTENSET_COMPARE1_Enabled

#define TIMER_INTENSET_COMPARE1_Enabled   (1UL)

Read: Enabled

Definition at line 10463 of file nrf52_bitfields.h.

◆ TIMER_INTENSET_COMPARE1_Msk

#define TIMER_INTENSET_COMPARE1_Msk   (0x1UL << TIMER_INTENSET_COMPARE1_Pos)

Bit mask of COMPARE1 field.

Definition at line 10461 of file nrf52_bitfields.h.

◆ TIMER_INTENSET_COMPARE1_Pos

#define TIMER_INTENSET_COMPARE1_Pos   (17UL)

Position of COMPARE1 field.

Definition at line 10460 of file nrf52_bitfields.h.

◆ TIMER_INTENSET_COMPARE1_Set

#define TIMER_INTENSET_COMPARE1_Set   (1UL)

Enable

Definition at line 10464 of file nrf52_bitfields.h.

◆ TIMER_INTENSET_COMPARE2_Disabled

#define TIMER_INTENSET_COMPARE2_Disabled   (0UL)

Read: Disabled

Definition at line 10455 of file nrf52_bitfields.h.

◆ TIMER_INTENSET_COMPARE2_Enabled

#define TIMER_INTENSET_COMPARE2_Enabled   (1UL)

Read: Enabled

Definition at line 10456 of file nrf52_bitfields.h.

◆ TIMER_INTENSET_COMPARE2_Msk

#define TIMER_INTENSET_COMPARE2_Msk   (0x1UL << TIMER_INTENSET_COMPARE2_Pos)

Bit mask of COMPARE2 field.

Definition at line 10454 of file nrf52_bitfields.h.

◆ TIMER_INTENSET_COMPARE2_Pos

#define TIMER_INTENSET_COMPARE2_Pos   (18UL)

Position of COMPARE2 field.

Definition at line 10453 of file nrf52_bitfields.h.

◆ TIMER_INTENSET_COMPARE2_Set

#define TIMER_INTENSET_COMPARE2_Set   (1UL)

Enable

Definition at line 10457 of file nrf52_bitfields.h.

◆ TIMER_INTENSET_COMPARE3_Disabled

#define TIMER_INTENSET_COMPARE3_Disabled   (0UL)

Read: Disabled

Definition at line 10448 of file nrf52_bitfields.h.

◆ TIMER_INTENSET_COMPARE3_Enabled

#define TIMER_INTENSET_COMPARE3_Enabled   (1UL)

Read: Enabled

Definition at line 10449 of file nrf52_bitfields.h.

◆ TIMER_INTENSET_COMPARE3_Msk

#define TIMER_INTENSET_COMPARE3_Msk   (0x1UL << TIMER_INTENSET_COMPARE3_Pos)

Bit mask of COMPARE3 field.

Definition at line 10447 of file nrf52_bitfields.h.

◆ TIMER_INTENSET_COMPARE3_Pos

#define TIMER_INTENSET_COMPARE3_Pos   (19UL)

Position of COMPARE3 field.

Definition at line 10446 of file nrf52_bitfields.h.

◆ TIMER_INTENSET_COMPARE3_Set

#define TIMER_INTENSET_COMPARE3_Set   (1UL)

Enable

Definition at line 10450 of file nrf52_bitfields.h.

◆ TIMER_INTENSET_COMPARE4_Disabled

#define TIMER_INTENSET_COMPARE4_Disabled   (0UL)

Read: Disabled

Definition at line 10441 of file nrf52_bitfields.h.

◆ TIMER_INTENSET_COMPARE4_Enabled

#define TIMER_INTENSET_COMPARE4_Enabled   (1UL)

Read: Enabled

Definition at line 10442 of file nrf52_bitfields.h.

◆ TIMER_INTENSET_COMPARE4_Msk

#define TIMER_INTENSET_COMPARE4_Msk   (0x1UL << TIMER_INTENSET_COMPARE4_Pos)

Bit mask of COMPARE4 field.

Definition at line 10440 of file nrf52_bitfields.h.

◆ TIMER_INTENSET_COMPARE4_Pos

#define TIMER_INTENSET_COMPARE4_Pos   (20UL)

Position of COMPARE4 field.

Definition at line 10439 of file nrf52_bitfields.h.

◆ TIMER_INTENSET_COMPARE4_Set

#define TIMER_INTENSET_COMPARE4_Set   (1UL)

Enable

Definition at line 10443 of file nrf52_bitfields.h.

◆ TIMER_INTENSET_COMPARE5_Disabled

#define TIMER_INTENSET_COMPARE5_Disabled   (0UL)

Read: Disabled

Definition at line 10434 of file nrf52_bitfields.h.

◆ TIMER_INTENSET_COMPARE5_Enabled

#define TIMER_INTENSET_COMPARE5_Enabled   (1UL)

Read: Enabled

Definition at line 10435 of file nrf52_bitfields.h.

◆ TIMER_INTENSET_COMPARE5_Msk

#define TIMER_INTENSET_COMPARE5_Msk   (0x1UL << TIMER_INTENSET_COMPARE5_Pos)

Bit mask of COMPARE5 field.

Definition at line 10433 of file nrf52_bitfields.h.

◆ TIMER_INTENSET_COMPARE5_Pos

#define TIMER_INTENSET_COMPARE5_Pos   (21UL)

Position of COMPARE5 field.

Definition at line 10432 of file nrf52_bitfields.h.

◆ TIMER_INTENSET_COMPARE5_Set

#define TIMER_INTENSET_COMPARE5_Set   (1UL)

Enable

Definition at line 10436 of file nrf52_bitfields.h.

◆ TIMER_MODE_MODE_Counter

#define TIMER_MODE_MODE_Counter   (1UL)

Select Counter mode

Definition at line 10525 of file nrf52_bitfields.h.

◆ TIMER_MODE_MODE_LowPowerCounter

#define TIMER_MODE_MODE_LowPowerCounter   (2UL)

Select Low Power Counter mode

Definition at line 10526 of file nrf52_bitfields.h.

◆ TIMER_MODE_MODE_Msk

#define TIMER_MODE_MODE_Msk   (0x3UL << TIMER_MODE_MODE_Pos)

Bit mask of MODE field.

Definition at line 10523 of file nrf52_bitfields.h.

◆ TIMER_MODE_MODE_Pos

#define TIMER_MODE_MODE_Pos   (0UL)

Position of MODE field.

Definition at line 10522 of file nrf52_bitfields.h.

◆ TIMER_MODE_MODE_Timer

#define TIMER_MODE_MODE_Timer   (0UL)

Select Timer mode

Definition at line 10524 of file nrf52_bitfields.h.

◆ TIMER_PRESCALER_PRESCALER_Msk

#define TIMER_PRESCALER_PRESCALER_Msk   (0xFUL << TIMER_PRESCALER_PRESCALER_Pos)

Bit mask of PRESCALER field.

Definition at line 10544 of file nrf52_bitfields.h.

◆ TIMER_PRESCALER_PRESCALER_Pos

#define TIMER_PRESCALER_PRESCALER_Pos   (0UL)

Position of PRESCALER field.

Definition at line 10543 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE0_CLEAR_Disabled

#define TIMER_SHORTS_COMPARE0_CLEAR_Disabled   (0UL)

Disable shortcut

Definition at line 10425 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE0_CLEAR_Enabled

#define TIMER_SHORTS_COMPARE0_CLEAR_Enabled   (1UL)

Enable shortcut

Definition at line 10426 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE0_CLEAR_Msk

#define TIMER_SHORTS_COMPARE0_CLEAR_Msk   (0x1UL << TIMER_SHORTS_COMPARE0_CLEAR_Pos)

Bit mask of COMPARE0_CLEAR field.

Definition at line 10424 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE0_CLEAR_Pos

#define TIMER_SHORTS_COMPARE0_CLEAR_Pos   (0UL)

Position of COMPARE0_CLEAR field.

Definition at line 10423 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE0_STOP_Disabled

#define TIMER_SHORTS_COMPARE0_STOP_Disabled   (0UL)

Disable shortcut

Definition at line 10389 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE0_STOP_Enabled

#define TIMER_SHORTS_COMPARE0_STOP_Enabled   (1UL)

Enable shortcut

Definition at line 10390 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE0_STOP_Msk

#define TIMER_SHORTS_COMPARE0_STOP_Msk   (0x1UL << TIMER_SHORTS_COMPARE0_STOP_Pos)

Bit mask of COMPARE0_STOP field.

Definition at line 10388 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE0_STOP_Pos

#define TIMER_SHORTS_COMPARE0_STOP_Pos   (8UL)

Position of COMPARE0_STOP field.

Definition at line 10387 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE1_CLEAR_Disabled

#define TIMER_SHORTS_COMPARE1_CLEAR_Disabled   (0UL)

Disable shortcut

Definition at line 10419 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE1_CLEAR_Enabled

#define TIMER_SHORTS_COMPARE1_CLEAR_Enabled   (1UL)

Enable shortcut

Definition at line 10420 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE1_CLEAR_Msk

#define TIMER_SHORTS_COMPARE1_CLEAR_Msk   (0x1UL << TIMER_SHORTS_COMPARE1_CLEAR_Pos)

Bit mask of COMPARE1_CLEAR field.

Definition at line 10418 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE1_CLEAR_Pos

#define TIMER_SHORTS_COMPARE1_CLEAR_Pos   (1UL)

Position of COMPARE1_CLEAR field.

Definition at line 10417 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE1_STOP_Disabled

#define TIMER_SHORTS_COMPARE1_STOP_Disabled   (0UL)

Disable shortcut

Definition at line 10383 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE1_STOP_Enabled

#define TIMER_SHORTS_COMPARE1_STOP_Enabled   (1UL)

Enable shortcut

Definition at line 10384 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE1_STOP_Msk

#define TIMER_SHORTS_COMPARE1_STOP_Msk   (0x1UL << TIMER_SHORTS_COMPARE1_STOP_Pos)

Bit mask of COMPARE1_STOP field.

Definition at line 10382 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE1_STOP_Pos

#define TIMER_SHORTS_COMPARE1_STOP_Pos   (9UL)

Position of COMPARE1_STOP field.

Definition at line 10381 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE2_CLEAR_Disabled

#define TIMER_SHORTS_COMPARE2_CLEAR_Disabled   (0UL)

Disable shortcut

Definition at line 10413 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE2_CLEAR_Enabled

#define TIMER_SHORTS_COMPARE2_CLEAR_Enabled   (1UL)

Enable shortcut

Definition at line 10414 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE2_CLEAR_Msk

#define TIMER_SHORTS_COMPARE2_CLEAR_Msk   (0x1UL << TIMER_SHORTS_COMPARE2_CLEAR_Pos)

Bit mask of COMPARE2_CLEAR field.

Definition at line 10412 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE2_CLEAR_Pos

#define TIMER_SHORTS_COMPARE2_CLEAR_Pos   (2UL)

Position of COMPARE2_CLEAR field.

Definition at line 10411 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE2_STOP_Disabled

#define TIMER_SHORTS_COMPARE2_STOP_Disabled   (0UL)

Disable shortcut

Definition at line 10377 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE2_STOP_Enabled

#define TIMER_SHORTS_COMPARE2_STOP_Enabled   (1UL)

Enable shortcut

Definition at line 10378 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE2_STOP_Msk

#define TIMER_SHORTS_COMPARE2_STOP_Msk   (0x1UL << TIMER_SHORTS_COMPARE2_STOP_Pos)

Bit mask of COMPARE2_STOP field.

Definition at line 10376 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE2_STOP_Pos

#define TIMER_SHORTS_COMPARE2_STOP_Pos   (10UL)

Position of COMPARE2_STOP field.

Definition at line 10375 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE3_CLEAR_Disabled

#define TIMER_SHORTS_COMPARE3_CLEAR_Disabled   (0UL)

Disable shortcut

Definition at line 10407 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE3_CLEAR_Enabled

#define TIMER_SHORTS_COMPARE3_CLEAR_Enabled   (1UL)

Enable shortcut

Definition at line 10408 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE3_CLEAR_Msk

#define TIMER_SHORTS_COMPARE3_CLEAR_Msk   (0x1UL << TIMER_SHORTS_COMPARE3_CLEAR_Pos)

Bit mask of COMPARE3_CLEAR field.

Definition at line 10406 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE3_CLEAR_Pos

#define TIMER_SHORTS_COMPARE3_CLEAR_Pos   (3UL)

Position of COMPARE3_CLEAR field.

Definition at line 10405 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE3_STOP_Disabled

#define TIMER_SHORTS_COMPARE3_STOP_Disabled   (0UL)

Disable shortcut

Definition at line 10371 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE3_STOP_Enabled

#define TIMER_SHORTS_COMPARE3_STOP_Enabled   (1UL)

Enable shortcut

Definition at line 10372 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE3_STOP_Msk

#define TIMER_SHORTS_COMPARE3_STOP_Msk   (0x1UL << TIMER_SHORTS_COMPARE3_STOP_Pos)

Bit mask of COMPARE3_STOP field.

Definition at line 10370 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE3_STOP_Pos

#define TIMER_SHORTS_COMPARE3_STOP_Pos   (11UL)

Position of COMPARE3_STOP field.

Definition at line 10369 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE4_CLEAR_Disabled

#define TIMER_SHORTS_COMPARE4_CLEAR_Disabled   (0UL)

Disable shortcut

Definition at line 10401 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE4_CLEAR_Enabled

#define TIMER_SHORTS_COMPARE4_CLEAR_Enabled   (1UL)

Enable shortcut

Definition at line 10402 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE4_CLEAR_Msk

#define TIMER_SHORTS_COMPARE4_CLEAR_Msk   (0x1UL << TIMER_SHORTS_COMPARE4_CLEAR_Pos)

Bit mask of COMPARE4_CLEAR field.

Definition at line 10400 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE4_CLEAR_Pos

#define TIMER_SHORTS_COMPARE4_CLEAR_Pos   (4UL)

Position of COMPARE4_CLEAR field.

Definition at line 10399 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE4_STOP_Disabled

#define TIMER_SHORTS_COMPARE4_STOP_Disabled   (0UL)

Disable shortcut

Definition at line 10365 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE4_STOP_Enabled

#define TIMER_SHORTS_COMPARE4_STOP_Enabled   (1UL)

Enable shortcut

Definition at line 10366 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE4_STOP_Msk

#define TIMER_SHORTS_COMPARE4_STOP_Msk   (0x1UL << TIMER_SHORTS_COMPARE4_STOP_Pos)

Bit mask of COMPARE4_STOP field.

Definition at line 10364 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE4_STOP_Pos

#define TIMER_SHORTS_COMPARE4_STOP_Pos   (12UL)

Position of COMPARE4_STOP field.

Definition at line 10363 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE5_CLEAR_Disabled

#define TIMER_SHORTS_COMPARE5_CLEAR_Disabled   (0UL)

Disable shortcut

Definition at line 10395 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE5_CLEAR_Enabled

#define TIMER_SHORTS_COMPARE5_CLEAR_Enabled   (1UL)

Enable shortcut

Definition at line 10396 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE5_CLEAR_Msk

#define TIMER_SHORTS_COMPARE5_CLEAR_Msk   (0x1UL << TIMER_SHORTS_COMPARE5_CLEAR_Pos)

Bit mask of COMPARE5_CLEAR field.

Definition at line 10394 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE5_CLEAR_Pos

#define TIMER_SHORTS_COMPARE5_CLEAR_Pos   (5UL)

Position of COMPARE5_CLEAR field.

Definition at line 10393 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE5_STOP_Disabled

#define TIMER_SHORTS_COMPARE5_STOP_Disabled   (0UL)

Disable shortcut

Definition at line 10359 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE5_STOP_Enabled

#define TIMER_SHORTS_COMPARE5_STOP_Enabled   (1UL)

Enable shortcut

Definition at line 10360 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE5_STOP_Msk

#define TIMER_SHORTS_COMPARE5_STOP_Msk   (0x1UL << TIMER_SHORTS_COMPARE5_STOP_Pos)

Bit mask of COMPARE5_STOP field.

Definition at line 10358 of file nrf52_bitfields.h.

◆ TIMER_SHORTS_COMPARE5_STOP_Pos

#define TIMER_SHORTS_COMPARE5_STOP_Pos   (13UL)

Position of COMPARE5_STOP field.

Definition at line 10357 of file nrf52_bitfields.h.

◆ TWI_ADDRESS_ADDRESS_Msk

#define TWI_ADDRESS_ADDRESS_Msk   (0x7FUL << TWI_ADDRESS_ADDRESS_Pos)

Bit mask of ADDRESS field.

Definition at line 10737 of file nrf52_bitfields.h.

◆ TWI_ADDRESS_ADDRESS_Pos

#define TWI_ADDRESS_ADDRESS_Pos   (0UL)

Position of ADDRESS field.

Definition at line 10736 of file nrf52_bitfields.h.

◆ TWI_ENABLE_ENABLE_Disabled

#define TWI_ENABLE_ENABLE_Disabled   (0UL)

Disable TWI

Definition at line 10689 of file nrf52_bitfields.h.

◆ TWI_ENABLE_ENABLE_Enabled

#define TWI_ENABLE_ENABLE_Enabled   (5UL)

Enable TWI

Definition at line 10690 of file nrf52_bitfields.h.

◆ TWI_ENABLE_ENABLE_Msk

#define TWI_ENABLE_ENABLE_Msk   (0xFUL << TWI_ENABLE_ENABLE_Pos)

Bit mask of ENABLE field.

Definition at line 10688 of file nrf52_bitfields.h.

◆ TWI_ENABLE_ENABLE_Pos

#define TWI_ENABLE_ENABLE_Pos   (0UL)

Position of ENABLE field.

Definition at line 10687 of file nrf52_bitfields.h.

◆ TWI_ERRORSRC_ANACK_Msk

#define TWI_ERRORSRC_ANACK_Msk   (0x1UL << TWI_ERRORSRC_ANACK_Pos)

Bit mask of ANACK field.

Definition at line 10673 of file nrf52_bitfields.h.

◆ TWI_ERRORSRC_ANACK_NotPresent

#define TWI_ERRORSRC_ANACK_NotPresent   (0UL)

Read: error not present

Definition at line 10674 of file nrf52_bitfields.h.

◆ TWI_ERRORSRC_ANACK_Pos

#define TWI_ERRORSRC_ANACK_Pos   (1UL)

Position of ANACK field.

Definition at line 10672 of file nrf52_bitfields.h.

◆ TWI_ERRORSRC_ANACK_Present

#define TWI_ERRORSRC_ANACK_Present   (1UL)

Read: error present

Definition at line 10675 of file nrf52_bitfields.h.

◆ TWI_ERRORSRC_DNACK_Msk

#define TWI_ERRORSRC_DNACK_Msk   (0x1UL << TWI_ERRORSRC_DNACK_Pos)

Bit mask of DNACK field.

Definition at line 10667 of file nrf52_bitfields.h.

◆ TWI_ERRORSRC_DNACK_NotPresent

#define TWI_ERRORSRC_DNACK_NotPresent   (0UL)

Read: error not present

Definition at line 10668 of file nrf52_bitfields.h.

◆ TWI_ERRORSRC_DNACK_Pos

#define TWI_ERRORSRC_DNACK_Pos   (2UL)

Position of DNACK field.

Definition at line 10666 of file nrf52_bitfields.h.

◆ TWI_ERRORSRC_DNACK_Present

#define TWI_ERRORSRC_DNACK_Present   (1UL)

Read: error present

Definition at line 10669 of file nrf52_bitfields.h.

◆ TWI_ERRORSRC_OVERRUN_Msk

#define TWI_ERRORSRC_OVERRUN_Msk   (0x1UL << TWI_ERRORSRC_OVERRUN_Pos)

Bit mask of OVERRUN field.

Definition at line 10679 of file nrf52_bitfields.h.

◆ TWI_ERRORSRC_OVERRUN_NotPresent

#define TWI_ERRORSRC_OVERRUN_NotPresent   (0UL)

Read: no overrun occured

Definition at line 10680 of file nrf52_bitfields.h.

◆ TWI_ERRORSRC_OVERRUN_Pos

#define TWI_ERRORSRC_OVERRUN_Pos   (0UL)

Position of OVERRUN field.

Definition at line 10678 of file nrf52_bitfields.h.

◆ TWI_ERRORSRC_OVERRUN_Present

#define TWI_ERRORSRC_OVERRUN_Present   (1UL)

Read: overrun occured

Definition at line 10681 of file nrf52_bitfields.h.

◆ TWI_FREQUENCY_FREQUENCY_K100

#define TWI_FREQUENCY_FREQUENCY_K100   (0x01980000UL)

100 kbps

Definition at line 10728 of file nrf52_bitfields.h.

◆ TWI_FREQUENCY_FREQUENCY_K250

#define TWI_FREQUENCY_FREQUENCY_K250   (0x04000000UL)

250 kbps

Definition at line 10729 of file nrf52_bitfields.h.

◆ TWI_FREQUENCY_FREQUENCY_K400

#define TWI_FREQUENCY_FREQUENCY_K400   (0x06680000UL)

400 kbps (actual rate 410.256 kbps)

Definition at line 10730 of file nrf52_bitfields.h.

◆ TWI_FREQUENCY_FREQUENCY_Msk

#define TWI_FREQUENCY_FREQUENCY_Msk   (0xFFFFFFFFUL << TWI_FREQUENCY_FREQUENCY_Pos)

Bit mask of FREQUENCY field.

Definition at line 10727 of file nrf52_bitfields.h.

◆ TWI_FREQUENCY_FREQUENCY_Pos

#define TWI_FREQUENCY_FREQUENCY_Pos   (0UL)

Position of FREQUENCY field.

Definition at line 10726 of file nrf52_bitfields.h.

◆ TWI_INTENCLR_BB_Clear

#define TWI_INTENCLR_BB_Clear   (1UL)

Disable

Definition at line 10632 of file nrf52_bitfields.h.

◆ TWI_INTENCLR_BB_Disabled

#define TWI_INTENCLR_BB_Disabled   (0UL)

Read: Disabled

Definition at line 10630 of file nrf52_bitfields.h.

◆ TWI_INTENCLR_BB_Enabled

#define TWI_INTENCLR_BB_Enabled   (1UL)

Read: Enabled

Definition at line 10631 of file nrf52_bitfields.h.

◆ TWI_INTENCLR_BB_Msk

#define TWI_INTENCLR_BB_Msk   (0x1UL << TWI_INTENCLR_BB_Pos)

Bit mask of BB field.

Definition at line 10629 of file nrf52_bitfields.h.

◆ TWI_INTENCLR_BB_Pos

#define TWI_INTENCLR_BB_Pos   (14UL)

Position of BB field.

Definition at line 10628 of file nrf52_bitfields.h.

◆ TWI_INTENCLR_ERROR_Clear

#define TWI_INTENCLR_ERROR_Clear   (1UL)

Disable

Definition at line 10639 of file nrf52_bitfields.h.

◆ TWI_INTENCLR_ERROR_Disabled

#define TWI_INTENCLR_ERROR_Disabled   (0UL)

Read: Disabled

Definition at line 10637 of file nrf52_bitfields.h.

◆ TWI_INTENCLR_ERROR_Enabled

#define TWI_INTENCLR_ERROR_Enabled   (1UL)

Read: Enabled

Definition at line 10638 of file nrf52_bitfields.h.

◆ TWI_INTENCLR_ERROR_Msk

#define TWI_INTENCLR_ERROR_Msk   (0x1UL << TWI_INTENCLR_ERROR_Pos)

Bit mask of ERROR field.

Definition at line 10636 of file nrf52_bitfields.h.

◆ TWI_INTENCLR_ERROR_Pos

#define TWI_INTENCLR_ERROR_Pos   (9UL)

Position of ERROR field.

Definition at line 10635 of file nrf52_bitfields.h.

◆ TWI_INTENCLR_RXDREADY_Clear

#define TWI_INTENCLR_RXDREADY_Clear   (1UL)

Disable

Definition at line 10653 of file nrf52_bitfields.h.

◆ TWI_INTENCLR_RXDREADY_Disabled

#define TWI_INTENCLR_RXDREADY_Disabled   (0UL)

Read: Disabled

Definition at line 10651 of file nrf52_bitfields.h.

◆ TWI_INTENCLR_RXDREADY_Enabled

#define TWI_INTENCLR_RXDREADY_Enabled   (1UL)

Read: Enabled

Definition at line 10652 of file nrf52_bitfields.h.

◆ TWI_INTENCLR_RXDREADY_Msk

#define TWI_INTENCLR_RXDREADY_Msk   (0x1UL << TWI_INTENCLR_RXDREADY_Pos)

Bit mask of RXDREADY field.

Definition at line 10650 of file nrf52_bitfields.h.

◆ TWI_INTENCLR_RXDREADY_Pos

#define TWI_INTENCLR_RXDREADY_Pos   (2UL)

Position of RXDREADY field.

Definition at line 10649 of file nrf52_bitfields.h.

◆ TWI_INTENCLR_STOPPED_Clear

#define TWI_INTENCLR_STOPPED_Clear   (1UL)

Disable

Definition at line 10660 of file nrf52_bitfields.h.

◆ TWI_INTENCLR_STOPPED_Disabled

#define TWI_INTENCLR_STOPPED_Disabled   (0UL)

Read: Disabled

Definition at line 10658 of file nrf52_bitfields.h.

◆ TWI_INTENCLR_STOPPED_Enabled

#define TWI_INTENCLR_STOPPED_Enabled   (1UL)

Read: Enabled

Definition at line 10659 of file nrf52_bitfields.h.

◆ TWI_INTENCLR_STOPPED_Msk

#define TWI_INTENCLR_STOPPED_Msk   (0x1UL << TWI_INTENCLR_STOPPED_Pos)

Bit mask of STOPPED field.

Definition at line 10657 of file nrf52_bitfields.h.

◆ TWI_INTENCLR_STOPPED_Pos

#define TWI_INTENCLR_STOPPED_Pos   (1UL)

Position of STOPPED field.

Definition at line 10656 of file nrf52_bitfields.h.

◆ TWI_INTENCLR_SUSPENDED_Clear

#define TWI_INTENCLR_SUSPENDED_Clear   (1UL)

Disable

Definition at line 10625 of file nrf52_bitfields.h.

◆ TWI_INTENCLR_SUSPENDED_Disabled

#define TWI_INTENCLR_SUSPENDED_Disabled   (0UL)

Read: Disabled

Definition at line 10623 of file nrf52_bitfields.h.

◆ TWI_INTENCLR_SUSPENDED_Enabled

#define TWI_INTENCLR_SUSPENDED_Enabled   (1UL)

Read: Enabled

Definition at line 10624 of file nrf52_bitfields.h.

◆ TWI_INTENCLR_SUSPENDED_Msk

#define TWI_INTENCLR_SUSPENDED_Msk   (0x1UL << TWI_INTENCLR_SUSPENDED_Pos)

Bit mask of SUSPENDED field.

Definition at line 10622 of file nrf52_bitfields.h.

◆ TWI_INTENCLR_SUSPENDED_Pos

#define TWI_INTENCLR_SUSPENDED_Pos   (18UL)

Position of SUSPENDED field.

Definition at line 10621 of file nrf52_bitfields.h.

◆ TWI_INTENCLR_TXDSENT_Clear

#define TWI_INTENCLR_TXDSENT_Clear   (1UL)

Disable

Definition at line 10646 of file nrf52_bitfields.h.

◆ TWI_INTENCLR_TXDSENT_Disabled

#define TWI_INTENCLR_TXDSENT_Disabled   (0UL)

Read: Disabled

Definition at line 10644 of file nrf52_bitfields.h.

◆ TWI_INTENCLR_TXDSENT_Enabled

#define TWI_INTENCLR_TXDSENT_Enabled   (1UL)

Read: Enabled

Definition at line 10645 of file nrf52_bitfields.h.

◆ TWI_INTENCLR_TXDSENT_Msk

#define TWI_INTENCLR_TXDSENT_Msk   (0x1UL << TWI_INTENCLR_TXDSENT_Pos)

Bit mask of TXDSENT field.

Definition at line 10643 of file nrf52_bitfields.h.

◆ TWI_INTENCLR_TXDSENT_Pos

#define TWI_INTENCLR_TXDSENT_Pos   (7UL)

Position of TXDSENT field.

Definition at line 10642 of file nrf52_bitfields.h.

◆ TWI_INTENSET_BB_Disabled

#define TWI_INTENSET_BB_Disabled   (0UL)

Read: Disabled

Definition at line 10585 of file nrf52_bitfields.h.

◆ TWI_INTENSET_BB_Enabled

#define TWI_INTENSET_BB_Enabled   (1UL)

Read: Enabled

Definition at line 10586 of file nrf52_bitfields.h.

◆ TWI_INTENSET_BB_Msk

#define TWI_INTENSET_BB_Msk   (0x1UL << TWI_INTENSET_BB_Pos)

Bit mask of BB field.

Definition at line 10584 of file nrf52_bitfields.h.

◆ TWI_INTENSET_BB_Pos

#define TWI_INTENSET_BB_Pos   (14UL)

Position of BB field.

Definition at line 10583 of file nrf52_bitfields.h.

◆ TWI_INTENSET_BB_Set

#define TWI_INTENSET_BB_Set   (1UL)

Enable

Definition at line 10587 of file nrf52_bitfields.h.

◆ TWI_INTENSET_ERROR_Disabled

#define TWI_INTENSET_ERROR_Disabled   (0UL)

Read: Disabled

Definition at line 10592 of file nrf52_bitfields.h.

◆ TWI_INTENSET_ERROR_Enabled

#define TWI_INTENSET_ERROR_Enabled   (1UL)

Read: Enabled

Definition at line 10593 of file nrf52_bitfields.h.

◆ TWI_INTENSET_ERROR_Msk

#define TWI_INTENSET_ERROR_Msk   (0x1UL << TWI_INTENSET_ERROR_Pos)

Bit mask of ERROR field.

Definition at line 10591 of file nrf52_bitfields.h.

◆ TWI_INTENSET_ERROR_Pos

#define TWI_INTENSET_ERROR_Pos   (9UL)

Position of ERROR field.

Definition at line 10590 of file nrf52_bitfields.h.

◆ TWI_INTENSET_ERROR_Set

#define TWI_INTENSET_ERROR_Set   (1UL)

Enable

Definition at line 10594 of file nrf52_bitfields.h.

◆ TWI_INTENSET_RXDREADY_Disabled

#define TWI_INTENSET_RXDREADY_Disabled   (0UL)

Read: Disabled

Definition at line 10606 of file nrf52_bitfields.h.

◆ TWI_INTENSET_RXDREADY_Enabled

#define TWI_INTENSET_RXDREADY_Enabled   (1UL)

Read: Enabled

Definition at line 10607 of file nrf52_bitfields.h.

◆ TWI_INTENSET_RXDREADY_Msk

#define TWI_INTENSET_RXDREADY_Msk   (0x1UL << TWI_INTENSET_RXDREADY_Pos)

Bit mask of RXDREADY field.

Definition at line 10605 of file nrf52_bitfields.h.

◆ TWI_INTENSET_RXDREADY_Pos

#define TWI_INTENSET_RXDREADY_Pos   (2UL)

Position of RXDREADY field.

Definition at line 10604 of file nrf52_bitfields.h.

◆ TWI_INTENSET_RXDREADY_Set

#define TWI_INTENSET_RXDREADY_Set   (1UL)

Enable

Definition at line 10608 of file nrf52_bitfields.h.

◆ TWI_INTENSET_STOPPED_Disabled

#define TWI_INTENSET_STOPPED_Disabled   (0UL)

Read: Disabled

Definition at line 10613 of file nrf52_bitfields.h.

◆ TWI_INTENSET_STOPPED_Enabled

#define TWI_INTENSET_STOPPED_Enabled   (1UL)

Read: Enabled

Definition at line 10614 of file nrf52_bitfields.h.

◆ TWI_INTENSET_STOPPED_Msk

#define TWI_INTENSET_STOPPED_Msk   (0x1UL << TWI_INTENSET_STOPPED_Pos)

Bit mask of STOPPED field.

Definition at line 10612 of file nrf52_bitfields.h.

◆ TWI_INTENSET_STOPPED_Pos

#define TWI_INTENSET_STOPPED_Pos   (1UL)

Position of STOPPED field.

Definition at line 10611 of file nrf52_bitfields.h.

◆ TWI_INTENSET_STOPPED_Set

#define TWI_INTENSET_STOPPED_Set   (1UL)

Enable

Definition at line 10615 of file nrf52_bitfields.h.

◆ TWI_INTENSET_SUSPENDED_Disabled

#define TWI_INTENSET_SUSPENDED_Disabled   (0UL)

Read: Disabled

Definition at line 10578 of file nrf52_bitfields.h.

◆ TWI_INTENSET_SUSPENDED_Enabled

#define TWI_INTENSET_SUSPENDED_Enabled   (1UL)

Read: Enabled

Definition at line 10579 of file nrf52_bitfields.h.

◆ TWI_INTENSET_SUSPENDED_Msk

#define TWI_INTENSET_SUSPENDED_Msk   (0x1UL << TWI_INTENSET_SUSPENDED_Pos)

Bit mask of SUSPENDED field.

Definition at line 10577 of file nrf52_bitfields.h.

◆ TWI_INTENSET_SUSPENDED_Pos

#define TWI_INTENSET_SUSPENDED_Pos   (18UL)

Position of SUSPENDED field.

Definition at line 10576 of file nrf52_bitfields.h.

◆ TWI_INTENSET_SUSPENDED_Set

#define TWI_INTENSET_SUSPENDED_Set   (1UL)

Enable

Definition at line 10580 of file nrf52_bitfields.h.

◆ TWI_INTENSET_TXDSENT_Disabled

#define TWI_INTENSET_TXDSENT_Disabled   (0UL)

Read: Disabled

Definition at line 10599 of file nrf52_bitfields.h.

◆ TWI_INTENSET_TXDSENT_Enabled

#define TWI_INTENSET_TXDSENT_Enabled   (1UL)

Read: Enabled

Definition at line 10600 of file nrf52_bitfields.h.

◆ TWI_INTENSET_TXDSENT_Msk

#define TWI_INTENSET_TXDSENT_Msk   (0x1UL << TWI_INTENSET_TXDSENT_Pos)

Bit mask of TXDSENT field.

Definition at line 10598 of file nrf52_bitfields.h.

◆ TWI_INTENSET_TXDSENT_Pos

#define TWI_INTENSET_TXDSENT_Pos   (7UL)

Position of TXDSENT field.

Definition at line 10597 of file nrf52_bitfields.h.

◆ TWI_INTENSET_TXDSENT_Set

#define TWI_INTENSET_TXDSENT_Set   (1UL)

Enable

Definition at line 10601 of file nrf52_bitfields.h.

◆ TWI_PSELSCL_PSELSCL_Disconnected

#define TWI_PSELSCL_PSELSCL_Disconnected   (0xFFFFFFFFUL)

Disconnect

Definition at line 10698 of file nrf52_bitfields.h.

◆ TWI_PSELSCL_PSELSCL_Msk

#define TWI_PSELSCL_PSELSCL_Msk   (0xFFFFFFFFUL << TWI_PSELSCL_PSELSCL_Pos)

Bit mask of PSELSCL field.

Definition at line 10697 of file nrf52_bitfields.h.

◆ TWI_PSELSCL_PSELSCL_Pos

#define TWI_PSELSCL_PSELSCL_Pos   (0UL)

Position of PSELSCL field.

Definition at line 10696 of file nrf52_bitfields.h.

◆ TWI_PSELSDA_PSELSDA_Disconnected

#define TWI_PSELSDA_PSELSDA_Disconnected   (0xFFFFFFFFUL)

Disconnect

Definition at line 10706 of file nrf52_bitfields.h.

◆ TWI_PSELSDA_PSELSDA_Msk

#define TWI_PSELSDA_PSELSDA_Msk   (0xFFFFFFFFUL << TWI_PSELSDA_PSELSDA_Pos)

Bit mask of PSELSDA field.

Definition at line 10705 of file nrf52_bitfields.h.

◆ TWI_PSELSDA_PSELSDA_Pos

#define TWI_PSELSDA_PSELSDA_Pos   (0UL)

Position of PSELSDA field.

Definition at line 10704 of file nrf52_bitfields.h.

◆ TWI_RXD_RXD_Msk

#define TWI_RXD_RXD_Msk   (0xFFUL << TWI_RXD_RXD_Pos)

Bit mask of RXD field.

Definition at line 10713 of file nrf52_bitfields.h.

◆ TWI_RXD_RXD_Pos

#define TWI_RXD_RXD_Pos   (0UL)

Position of RXD field.

Definition at line 10712 of file nrf52_bitfields.h.

◆ TWI_SHORTS_BB_STOP_Disabled

#define TWI_SHORTS_BB_STOP_Disabled   (0UL)

Disable shortcut

Definition at line 10563 of file nrf52_bitfields.h.

◆ TWI_SHORTS_BB_STOP_Enabled

#define TWI_SHORTS_BB_STOP_Enabled   (1UL)

Enable shortcut

Definition at line 10564 of file nrf52_bitfields.h.

◆ TWI_SHORTS_BB_STOP_Msk

#define TWI_SHORTS_BB_STOP_Msk   (0x1UL << TWI_SHORTS_BB_STOP_Pos)

Bit mask of BB_STOP field.

Definition at line 10562 of file nrf52_bitfields.h.

◆ TWI_SHORTS_BB_STOP_Pos

#define TWI_SHORTS_BB_STOP_Pos   (1UL)

Position of BB_STOP field.

Definition at line 10561 of file nrf52_bitfields.h.

◆ TWI_SHORTS_BB_SUSPEND_Disabled

#define TWI_SHORTS_BB_SUSPEND_Disabled   (0UL)

Disable shortcut

Definition at line 10569 of file nrf52_bitfields.h.

◆ TWI_SHORTS_BB_SUSPEND_Enabled

#define TWI_SHORTS_BB_SUSPEND_Enabled   (1UL)

Enable shortcut

Definition at line 10570 of file nrf52_bitfields.h.

◆ TWI_SHORTS_BB_SUSPEND_Msk

#define TWI_SHORTS_BB_SUSPEND_Msk   (0x1UL << TWI_SHORTS_BB_SUSPEND_Pos)

Bit mask of BB_SUSPEND field.

Definition at line 10568 of file nrf52_bitfields.h.

◆ TWI_SHORTS_BB_SUSPEND_Pos

#define TWI_SHORTS_BB_SUSPEND_Pos   (0UL)

Position of BB_SUSPEND field.

Definition at line 10567 of file nrf52_bitfields.h.

◆ TWI_TXD_TXD_Msk

#define TWI_TXD_TXD_Msk   (0xFFUL << TWI_TXD_TXD_Pos)

Bit mask of TXD field.

Definition at line 10720 of file nrf52_bitfields.h.

◆ TWI_TXD_TXD_Pos

#define TWI_TXD_TXD_Pos   (0UL)

Position of TXD field.

Definition at line 10719 of file nrf52_bitfields.h.

◆ TWIM_ADDRESS_ADDRESS_Msk

#define TWIM_ADDRESS_ADDRESS_Msk   (0x7FUL << TWIM_ADDRESS_ADDRESS_Pos)

Bit mask of ADDRESS field.

Definition at line 11030 of file nrf52_bitfields.h.

◆ TWIM_ADDRESS_ADDRESS_Pos

#define TWIM_ADDRESS_ADDRESS_Pos   (0UL)

Position of ADDRESS field.

Definition at line 11029 of file nrf52_bitfields.h.

◆ TWIM_ENABLE_ENABLE_Disabled

#define TWIM_ENABLE_ENABLE_Disabled   (0UL)

Disable TWIM

Definition at line 10926 of file nrf52_bitfields.h.

◆ TWIM_ENABLE_ENABLE_Enabled

#define TWIM_ENABLE_ENABLE_Enabled   (6UL)

Enable TWIM

Definition at line 10927 of file nrf52_bitfields.h.

◆ TWIM_ENABLE_ENABLE_Msk

#define TWIM_ENABLE_ENABLE_Msk   (0xFUL << TWIM_ENABLE_ENABLE_Pos)

Bit mask of ENABLE field.

Definition at line 10925 of file nrf52_bitfields.h.

◆ TWIM_ENABLE_ENABLE_Pos

#define TWIM_ENABLE_ENABLE_Pos   (0UL)

Position of ENABLE field.

Definition at line 10924 of file nrf52_bitfields.h.

◆ TWIM_ERRORSRC_ANACK_Msk

#define TWIM_ERRORSRC_ANACK_Msk   (0x1UL << TWIM_ERRORSRC_ANACK_Pos)

Bit mask of ANACK field.

Definition at line 10916 of file nrf52_bitfields.h.

◆ TWIM_ERRORSRC_ANACK_NotReceived

#define TWIM_ERRORSRC_ANACK_NotReceived   (0UL)

Error did not occur

Definition at line 10917 of file nrf52_bitfields.h.

◆ TWIM_ERRORSRC_ANACK_Pos

#define TWIM_ERRORSRC_ANACK_Pos   (1UL)

Position of ANACK field.

Definition at line 10915 of file nrf52_bitfields.h.

◆ TWIM_ERRORSRC_ANACK_Received

#define TWIM_ERRORSRC_ANACK_Received   (1UL)

Error occurred

Definition at line 10918 of file nrf52_bitfields.h.

◆ TWIM_ERRORSRC_DNACK_Msk

#define TWIM_ERRORSRC_DNACK_Msk   (0x1UL << TWIM_ERRORSRC_DNACK_Pos)

Bit mask of DNACK field.

Definition at line 10910 of file nrf52_bitfields.h.

◆ TWIM_ERRORSRC_DNACK_NotReceived

#define TWIM_ERRORSRC_DNACK_NotReceived   (0UL)

Error did not occur

Definition at line 10911 of file nrf52_bitfields.h.

◆ TWIM_ERRORSRC_DNACK_Pos

#define TWIM_ERRORSRC_DNACK_Pos   (2UL)

Position of DNACK field.

Definition at line 10909 of file nrf52_bitfields.h.

◆ TWIM_ERRORSRC_DNACK_Received

#define TWIM_ERRORSRC_DNACK_Received   (1UL)

Error occurred

Definition at line 10912 of file nrf52_bitfields.h.

◆ TWIM_FREQUENCY_FREQUENCY_K100

#define TWIM_FREQUENCY_FREQUENCY_K100   (0x01980000UL)

100 kbps

Definition at line 10961 of file nrf52_bitfields.h.

◆ TWIM_FREQUENCY_FREQUENCY_K250

#define TWIM_FREQUENCY_FREQUENCY_K250   (0x04000000UL)

250 kbps

Definition at line 10962 of file nrf52_bitfields.h.

◆ TWIM_FREQUENCY_FREQUENCY_K400

#define TWIM_FREQUENCY_FREQUENCY_K400   (0x06400000UL)

400 kbps

Definition at line 10963 of file nrf52_bitfields.h.

◆ TWIM_FREQUENCY_FREQUENCY_Msk

#define TWIM_FREQUENCY_FREQUENCY_Msk   (0xFFFFFFFFUL << TWIM_FREQUENCY_FREQUENCY_Pos)

Bit mask of FREQUENCY field.

Definition at line 10960 of file nrf52_bitfields.h.

◆ TWIM_FREQUENCY_FREQUENCY_Pos

#define TWIM_FREQUENCY_FREQUENCY_Pos   (0UL)

Position of FREQUENCY field.

Definition at line 10959 of file nrf52_bitfields.h.

◆ TWIM_INTEN_ERROR_Disabled

#define TWIM_INTEN_ERROR_Disabled   (0UL)

Disable

Definition at line 10806 of file nrf52_bitfields.h.

◆ TWIM_INTEN_ERROR_Enabled

#define TWIM_INTEN_ERROR_Enabled   (1UL)

Enable

Definition at line 10807 of file nrf52_bitfields.h.

◆ TWIM_INTEN_ERROR_Msk

#define TWIM_INTEN_ERROR_Msk   (0x1UL << TWIM_INTEN_ERROR_Pos)

Bit mask of ERROR field.

Definition at line 10805 of file nrf52_bitfields.h.

◆ TWIM_INTEN_ERROR_Pos

#define TWIM_INTEN_ERROR_Pos   (9UL)

Position of ERROR field.

Definition at line 10804 of file nrf52_bitfields.h.

◆ TWIM_INTEN_LASTRX_Disabled

#define TWIM_INTEN_LASTRX_Disabled   (0UL)

Disable

Definition at line 10788 of file nrf52_bitfields.h.

◆ TWIM_INTEN_LASTRX_Enabled

#define TWIM_INTEN_LASTRX_Enabled   (1UL)

Enable

Definition at line 10789 of file nrf52_bitfields.h.

◆ TWIM_INTEN_LASTRX_Msk

#define TWIM_INTEN_LASTRX_Msk   (0x1UL << TWIM_INTEN_LASTRX_Pos)

Bit mask of LASTRX field.

Definition at line 10787 of file nrf52_bitfields.h.

◆ TWIM_INTEN_LASTRX_Pos

#define TWIM_INTEN_LASTRX_Pos   (23UL)

Position of LASTRX field.

Definition at line 10786 of file nrf52_bitfields.h.

◆ TWIM_INTEN_LASTTX_Disabled

#define TWIM_INTEN_LASTTX_Disabled   (0UL)

Disable

Definition at line 10782 of file nrf52_bitfields.h.

◆ TWIM_INTEN_LASTTX_Enabled

#define TWIM_INTEN_LASTTX_Enabled   (1UL)

Enable

Definition at line 10783 of file nrf52_bitfields.h.

◆ TWIM_INTEN_LASTTX_Msk

#define TWIM_INTEN_LASTTX_Msk   (0x1UL << TWIM_INTEN_LASTTX_Pos)

Bit mask of LASTTX field.

Definition at line 10781 of file nrf52_bitfields.h.

◆ TWIM_INTEN_LASTTX_Pos

#define TWIM_INTEN_LASTTX_Pos   (24UL)

Position of LASTTX field.

Definition at line 10780 of file nrf52_bitfields.h.

◆ TWIM_INTEN_RXSTARTED_Disabled

#define TWIM_INTEN_RXSTARTED_Disabled   (0UL)

Disable

Definition at line 10800 of file nrf52_bitfields.h.

◆ TWIM_INTEN_RXSTARTED_Enabled

#define TWIM_INTEN_RXSTARTED_Enabled   (1UL)

Enable

Definition at line 10801 of file nrf52_bitfields.h.

◆ TWIM_INTEN_RXSTARTED_Msk

#define TWIM_INTEN_RXSTARTED_Msk   (0x1UL << TWIM_INTEN_RXSTARTED_Pos)

Bit mask of RXSTARTED field.

Definition at line 10799 of file nrf52_bitfields.h.

◆ TWIM_INTEN_RXSTARTED_Pos

#define TWIM_INTEN_RXSTARTED_Pos   (19UL)

Position of RXSTARTED field.

Definition at line 10798 of file nrf52_bitfields.h.

◆ TWIM_INTEN_STOPPED_Disabled

#define TWIM_INTEN_STOPPED_Disabled   (0UL)

Disable

Definition at line 10812 of file nrf52_bitfields.h.

◆ TWIM_INTEN_STOPPED_Enabled

#define TWIM_INTEN_STOPPED_Enabled   (1UL)

Enable

Definition at line 10813 of file nrf52_bitfields.h.

◆ TWIM_INTEN_STOPPED_Msk

#define TWIM_INTEN_STOPPED_Msk   (0x1UL << TWIM_INTEN_STOPPED_Pos)

Bit mask of STOPPED field.

Definition at line 10811 of file nrf52_bitfields.h.

◆ TWIM_INTEN_STOPPED_Pos

#define TWIM_INTEN_STOPPED_Pos   (1UL)

Position of STOPPED field.

Definition at line 10810 of file nrf52_bitfields.h.

◆ TWIM_INTEN_TXSTARTED_Disabled

#define TWIM_INTEN_TXSTARTED_Disabled   (0UL)

Disable

Definition at line 10794 of file nrf52_bitfields.h.

◆ TWIM_INTEN_TXSTARTED_Enabled

#define TWIM_INTEN_TXSTARTED_Enabled   (1UL)

Enable

Definition at line 10795 of file nrf52_bitfields.h.

◆ TWIM_INTEN_TXSTARTED_Msk

#define TWIM_INTEN_TXSTARTED_Msk   (0x1UL << TWIM_INTEN_TXSTARTED_Pos)

Bit mask of TXSTARTED field.

Definition at line 10793 of file nrf52_bitfields.h.

◆ TWIM_INTEN_TXSTARTED_Pos

#define TWIM_INTEN_TXSTARTED_Pos   (20UL)

Position of TXSTARTED field.

Definition at line 10792 of file nrf52_bitfields.h.

◆ TWIM_INTENCLR_ERROR_Clear

#define TWIM_INTENCLR_ERROR_Clear   (1UL)

Disable

Definition at line 10896 of file nrf52_bitfields.h.

◆ TWIM_INTENCLR_ERROR_Disabled

#define TWIM_INTENCLR_ERROR_Disabled   (0UL)

Read: Disabled

Definition at line 10894 of file nrf52_bitfields.h.

◆ TWIM_INTENCLR_ERROR_Enabled

#define TWIM_INTENCLR_ERROR_Enabled   (1UL)

Read: Enabled

Definition at line 10895 of file nrf52_bitfields.h.

◆ TWIM_INTENCLR_ERROR_Msk

#define TWIM_INTENCLR_ERROR_Msk   (0x1UL << TWIM_INTENCLR_ERROR_Pos)

Bit mask of ERROR field.

Definition at line 10893 of file nrf52_bitfields.h.

◆ TWIM_INTENCLR_ERROR_Pos

#define TWIM_INTENCLR_ERROR_Pos   (9UL)

Position of ERROR field.

Definition at line 10892 of file nrf52_bitfields.h.

◆ TWIM_INTENCLR_LASTRX_Clear

#define TWIM_INTENCLR_LASTRX_Clear   (1UL)

Disable

Definition at line 10875 of file nrf52_bitfields.h.

◆ TWIM_INTENCLR_LASTRX_Disabled

#define TWIM_INTENCLR_LASTRX_Disabled   (0UL)

Read: Disabled

Definition at line 10873 of file nrf52_bitfields.h.

◆ TWIM_INTENCLR_LASTRX_Enabled

#define TWIM_INTENCLR_LASTRX_Enabled   (1UL)

Read: Enabled

Definition at line 10874 of file nrf52_bitfields.h.

◆ TWIM_INTENCLR_LASTRX_Msk

#define TWIM_INTENCLR_LASTRX_Msk   (0x1UL << TWIM_INTENCLR_LASTRX_Pos)

Bit mask of LASTRX field.

Definition at line 10872 of file nrf52_bitfields.h.

◆ TWIM_INTENCLR_LASTRX_Pos

#define TWIM_INTENCLR_LASTRX_Pos   (23UL)

Position of LASTRX field.

Definition at line 10871 of file nrf52_bitfields.h.

◆ TWIM_INTENCLR_LASTTX_Clear

#define TWIM_INTENCLR_LASTTX_Clear   (1UL)

Disable

Definition at line 10868 of file nrf52_bitfields.h.

◆ TWIM_INTENCLR_LASTTX_Disabled

#define TWIM_INTENCLR_LASTTX_Disabled   (0UL)

Read: Disabled

Definition at line 10866 of file nrf52_bitfields.h.

◆ TWIM_INTENCLR_LASTTX_Enabled

#define TWIM_INTENCLR_LASTTX_Enabled   (1UL)

Read: Enabled

Definition at line 10867 of file nrf52_bitfields.h.

◆ TWIM_INTENCLR_LASTTX_Msk

#define TWIM_INTENCLR_LASTTX_Msk   (0x1UL << TWIM_INTENCLR_LASTTX_Pos)

Bit mask of LASTTX field.

Definition at line 10865 of file nrf52_bitfields.h.

◆ TWIM_INTENCLR_LASTTX_Pos

#define TWIM_INTENCLR_LASTTX_Pos   (24UL)

Position of LASTTX field.

Definition at line 10864 of file nrf52_bitfields.h.

◆ TWIM_INTENCLR_RXSTARTED_Clear

#define TWIM_INTENCLR_RXSTARTED_Clear   (1UL)

Disable

Definition at line 10889 of file nrf52_bitfields.h.

◆ TWIM_INTENCLR_RXSTARTED_Disabled

#define TWIM_INTENCLR_RXSTARTED_Disabled   (0UL)

Read: Disabled

Definition at line 10887 of file nrf52_bitfields.h.

◆ TWIM_INTENCLR_RXSTARTED_Enabled

#define TWIM_INTENCLR_RXSTARTED_Enabled   (1UL)

Read: Enabled

Definition at line 10888 of file nrf52_bitfields.h.

◆ TWIM_INTENCLR_RXSTARTED_Msk

#define TWIM_INTENCLR_RXSTARTED_Msk   (0x1UL << TWIM_INTENCLR_RXSTARTED_Pos)

Bit mask of RXSTARTED field.

Definition at line 10886 of file nrf52_bitfields.h.

◆ TWIM_INTENCLR_RXSTARTED_Pos

#define TWIM_INTENCLR_RXSTARTED_Pos   (19UL)

Position of RXSTARTED field.

Definition at line 10885 of file nrf52_bitfields.h.

◆ TWIM_INTENCLR_STOPPED_Clear

#define TWIM_INTENCLR_STOPPED_Clear   (1UL)

Disable

Definition at line 10903 of file nrf52_bitfields.h.

◆ TWIM_INTENCLR_STOPPED_Disabled

#define TWIM_INTENCLR_STOPPED_Disabled   (0UL)

Read: Disabled

Definition at line 10901 of file nrf52_bitfields.h.

◆ TWIM_INTENCLR_STOPPED_Enabled

#define TWIM_INTENCLR_STOPPED_Enabled   (1UL)

Read: Enabled

Definition at line 10902 of file nrf52_bitfields.h.

◆ TWIM_INTENCLR_STOPPED_Msk

#define TWIM_INTENCLR_STOPPED_Msk   (0x1UL << TWIM_INTENCLR_STOPPED_Pos)

Bit mask of STOPPED field.

Definition at line 10900 of file nrf52_bitfields.h.

◆ TWIM_INTENCLR_STOPPED_Pos

#define TWIM_INTENCLR_STOPPED_Pos   (1UL)

Position of STOPPED field.

Definition at line 10899 of file nrf52_bitfields.h.

◆ TWIM_INTENCLR_TXSTARTED_Clear

#define TWIM_INTENCLR_TXSTARTED_Clear   (1UL)

Disable

Definition at line 10882 of file nrf52_bitfields.h.

◆ TWIM_INTENCLR_TXSTARTED_Disabled

#define TWIM_INTENCLR_TXSTARTED_Disabled   (0UL)

Read: Disabled

Definition at line 10880 of file nrf52_bitfields.h.

◆ TWIM_INTENCLR_TXSTARTED_Enabled

#define TWIM_INTENCLR_TXSTARTED_Enabled   (1UL)

Read: Enabled

Definition at line 10881 of file nrf52_bitfields.h.

◆ TWIM_INTENCLR_TXSTARTED_Msk

#define TWIM_INTENCLR_TXSTARTED_Msk   (0x1UL << TWIM_INTENCLR_TXSTARTED_Pos)

Bit mask of TXSTARTED field.

Definition at line 10879 of file nrf52_bitfields.h.

◆ TWIM_INTENCLR_TXSTARTED_Pos

#define TWIM_INTENCLR_TXSTARTED_Pos   (20UL)

Position of TXSTARTED field.

Definition at line 10878 of file nrf52_bitfields.h.

◆ TWIM_INTENSET_ERROR_Disabled

#define TWIM_INTENSET_ERROR_Disabled   (0UL)

Read: Disabled

Definition at line 10849 of file nrf52_bitfields.h.

◆ TWIM_INTENSET_ERROR_Enabled

#define TWIM_INTENSET_ERROR_Enabled   (1UL)

Read: Enabled

Definition at line 10850 of file nrf52_bitfields.h.

◆ TWIM_INTENSET_ERROR_Msk

#define TWIM_INTENSET_ERROR_Msk   (0x1UL << TWIM_INTENSET_ERROR_Pos)

Bit mask of ERROR field.

Definition at line 10848 of file nrf52_bitfields.h.

◆ TWIM_INTENSET_ERROR_Pos

#define TWIM_INTENSET_ERROR_Pos   (9UL)

Position of ERROR field.

Definition at line 10847 of file nrf52_bitfields.h.

◆ TWIM_INTENSET_ERROR_Set

#define TWIM_INTENSET_ERROR_Set   (1UL)

Enable

Definition at line 10851 of file nrf52_bitfields.h.

◆ TWIM_INTENSET_LASTRX_Disabled

#define TWIM_INTENSET_LASTRX_Disabled   (0UL)

Read: Disabled

Definition at line 10828 of file nrf52_bitfields.h.

◆ TWIM_INTENSET_LASTRX_Enabled

#define TWIM_INTENSET_LASTRX_Enabled   (1UL)

Read: Enabled

Definition at line 10829 of file nrf52_bitfields.h.

◆ TWIM_INTENSET_LASTRX_Msk

#define TWIM_INTENSET_LASTRX_Msk   (0x1UL << TWIM_INTENSET_LASTRX_Pos)

Bit mask of LASTRX field.

Definition at line 10827 of file nrf52_bitfields.h.

◆ TWIM_INTENSET_LASTRX_Pos

#define TWIM_INTENSET_LASTRX_Pos   (23UL)

Position of LASTRX field.

Definition at line 10826 of file nrf52_bitfields.h.

◆ TWIM_INTENSET_LASTRX_Set

#define TWIM_INTENSET_LASTRX_Set   (1UL)

Enable

Definition at line 10830 of file nrf52_bitfields.h.

◆ TWIM_INTENSET_LASTTX_Disabled

#define TWIM_INTENSET_LASTTX_Disabled   (0UL)

Read: Disabled

Definition at line 10821 of file nrf52_bitfields.h.

◆ TWIM_INTENSET_LASTTX_Enabled

#define TWIM_INTENSET_LASTTX_Enabled   (1UL)

Read: Enabled

Definition at line 10822 of file nrf52_bitfields.h.

◆ TWIM_INTENSET_LASTTX_Msk

#define TWIM_INTENSET_LASTTX_Msk   (0x1UL << TWIM_INTENSET_LASTTX_Pos)

Bit mask of LASTTX field.

Definition at line 10820 of file nrf52_bitfields.h.

◆ TWIM_INTENSET_LASTTX_Pos

#define TWIM_INTENSET_LASTTX_Pos   (24UL)

Position of LASTTX field.

Definition at line 10819 of file nrf52_bitfields.h.

◆ TWIM_INTENSET_LASTTX_Set

#define TWIM_INTENSET_LASTTX_Set   (1UL)

Enable

Definition at line 10823 of file nrf52_bitfields.h.

◆ TWIM_INTENSET_RXSTARTED_Disabled

#define TWIM_INTENSET_RXSTARTED_Disabled   (0UL)

Read: Disabled

Definition at line 10842 of file nrf52_bitfields.h.

◆ TWIM_INTENSET_RXSTARTED_Enabled

#define TWIM_INTENSET_RXSTARTED_Enabled   (1UL)

Read: Enabled

Definition at line 10843 of file nrf52_bitfields.h.

◆ TWIM_INTENSET_RXSTARTED_Msk

#define TWIM_INTENSET_RXSTARTED_Msk   (0x1UL << TWIM_INTENSET_RXSTARTED_Pos)

Bit mask of RXSTARTED field.

Definition at line 10841 of file nrf52_bitfields.h.

◆ TWIM_INTENSET_RXSTARTED_Pos

#define TWIM_INTENSET_RXSTARTED_Pos   (19UL)

Position of RXSTARTED field.

Definition at line 10840 of file nrf52_bitfields.h.

◆ TWIM_INTENSET_RXSTARTED_Set

#define TWIM_INTENSET_RXSTARTED_Set   (1UL)

Enable

Definition at line 10844 of file nrf52_bitfields.h.

◆ TWIM_INTENSET_STOPPED_Disabled

#define TWIM_INTENSET_STOPPED_Disabled   (0UL)

Read: Disabled

Definition at line 10856 of file nrf52_bitfields.h.

◆ TWIM_INTENSET_STOPPED_Enabled

#define TWIM_INTENSET_STOPPED_Enabled   (1UL)

Read: Enabled

Definition at line 10857 of file nrf52_bitfields.h.

◆ TWIM_INTENSET_STOPPED_Msk

#define TWIM_INTENSET_STOPPED_Msk   (0x1UL << TWIM_INTENSET_STOPPED_Pos)

Bit mask of STOPPED field.

Definition at line 10855 of file nrf52_bitfields.h.

◆ TWIM_INTENSET_STOPPED_Pos

#define TWIM_INTENSET_STOPPED_Pos   (1UL)

Position of STOPPED field.

Definition at line 10854 of file nrf52_bitfields.h.

◆ TWIM_INTENSET_STOPPED_Set

#define TWIM_INTENSET_STOPPED_Set   (1UL)

Enable

Definition at line 10858 of file nrf52_bitfields.h.

◆ TWIM_INTENSET_TXSTARTED_Disabled

#define TWIM_INTENSET_TXSTARTED_Disabled   (0UL)

Read: Disabled

Definition at line 10835 of file nrf52_bitfields.h.

◆ TWIM_INTENSET_TXSTARTED_Enabled

#define TWIM_INTENSET_TXSTARTED_Enabled   (1UL)

Read: Enabled

Definition at line 10836 of file nrf52_bitfields.h.

◆ TWIM_INTENSET_TXSTARTED_Msk

#define TWIM_INTENSET_TXSTARTED_Msk   (0x1UL << TWIM_INTENSET_TXSTARTED_Pos)

Bit mask of TXSTARTED field.

Definition at line 10834 of file nrf52_bitfields.h.

◆ TWIM_INTENSET_TXSTARTED_Pos

#define TWIM_INTENSET_TXSTARTED_Pos   (20UL)

Position of TXSTARTED field.

Definition at line 10833 of file nrf52_bitfields.h.

◆ TWIM_INTENSET_TXSTARTED_Set

#define TWIM_INTENSET_TXSTARTED_Set   (1UL)

Enable

Definition at line 10837 of file nrf52_bitfields.h.

◆ TWIM_PSEL_SCL_CONNECT_Connected

#define TWIM_PSEL_SCL_CONNECT_Connected   (0UL)

Connect

Definition at line 10935 of file nrf52_bitfields.h.

◆ TWIM_PSEL_SCL_CONNECT_Disconnected

#define TWIM_PSEL_SCL_CONNECT_Disconnected   (1UL)

Disconnect

Definition at line 10936 of file nrf52_bitfields.h.

◆ TWIM_PSEL_SCL_CONNECT_Msk

#define TWIM_PSEL_SCL_CONNECT_Msk   (0x1UL << TWIM_PSEL_SCL_CONNECT_Pos)

Bit mask of CONNECT field.

Definition at line 10934 of file nrf52_bitfields.h.

◆ TWIM_PSEL_SCL_CONNECT_Pos

#define TWIM_PSEL_SCL_CONNECT_Pos   (31UL)

Position of CONNECT field.

Definition at line 10933 of file nrf52_bitfields.h.

◆ TWIM_PSEL_SCL_PIN_Msk

#define TWIM_PSEL_SCL_PIN_Msk   (0x1FUL << TWIM_PSEL_SCL_PIN_Pos)

Bit mask of PIN field.

Definition at line 10940 of file nrf52_bitfields.h.

◆ TWIM_PSEL_SCL_PIN_Pos

#define TWIM_PSEL_SCL_PIN_Pos   (0UL)

Position of PIN field.

Definition at line 10939 of file nrf52_bitfields.h.

◆ TWIM_PSEL_SDA_CONNECT_Connected

#define TWIM_PSEL_SDA_CONNECT_Connected   (0UL)

Connect

Definition at line 10948 of file nrf52_bitfields.h.

◆ TWIM_PSEL_SDA_CONNECT_Disconnected

#define TWIM_PSEL_SDA_CONNECT_Disconnected   (1UL)

Disconnect

Definition at line 10949 of file nrf52_bitfields.h.

◆ TWIM_PSEL_SDA_CONNECT_Msk

#define TWIM_PSEL_SDA_CONNECT_Msk   (0x1UL << TWIM_PSEL_SDA_CONNECT_Pos)

Bit mask of CONNECT field.

Definition at line 10947 of file nrf52_bitfields.h.

◆ TWIM_PSEL_SDA_CONNECT_Pos

#define TWIM_PSEL_SDA_CONNECT_Pos   (31UL)

Position of CONNECT field.

Definition at line 10946 of file nrf52_bitfields.h.

◆ TWIM_PSEL_SDA_PIN_Msk

#define TWIM_PSEL_SDA_PIN_Msk   (0x1FUL << TWIM_PSEL_SDA_PIN_Pos)

Bit mask of PIN field.

Definition at line 10953 of file nrf52_bitfields.h.

◆ TWIM_PSEL_SDA_PIN_Pos

#define TWIM_PSEL_SDA_PIN_Pos   (0UL)

Position of PIN field.

Definition at line 10952 of file nrf52_bitfields.h.

◆ TWIM_RXD_AMOUNT_AMOUNT_Msk

#define TWIM_RXD_AMOUNT_AMOUNT_Msk   (0xFFUL << TWIM_RXD_AMOUNT_AMOUNT_Pos)

Bit mask of AMOUNT field.

Definition at line 10984 of file nrf52_bitfields.h.

◆ TWIM_RXD_AMOUNT_AMOUNT_Pos

#define TWIM_RXD_AMOUNT_AMOUNT_Pos   (0UL)

Position of AMOUNT field.

Definition at line 10983 of file nrf52_bitfields.h.

◆ TWIM_RXD_LIST_LIST_ArrayList

#define TWIM_RXD_LIST_LIST_ArrayList   (1UL)

Use array list

Definition at line 10993 of file nrf52_bitfields.h.

◆ TWIM_RXD_LIST_LIST_Disabled

#define TWIM_RXD_LIST_LIST_Disabled   (0UL)

Disable EasyDMA list

Definition at line 10992 of file nrf52_bitfields.h.

◆ TWIM_RXD_LIST_LIST_Msk

#define TWIM_RXD_LIST_LIST_Msk   (0x7UL << TWIM_RXD_LIST_LIST_Pos)

Bit mask of LIST field.

Definition at line 10991 of file nrf52_bitfields.h.

◆ TWIM_RXD_LIST_LIST_Pos

#define TWIM_RXD_LIST_LIST_Pos   (0UL)

Position of LIST field.

Definition at line 10990 of file nrf52_bitfields.h.

◆ TWIM_RXD_MAXCNT_MAXCNT_Msk

#define TWIM_RXD_MAXCNT_MAXCNT_Msk   (0xFFUL << TWIM_RXD_MAXCNT_MAXCNT_Pos)

Bit mask of MAXCNT field.

Definition at line 10977 of file nrf52_bitfields.h.

◆ TWIM_RXD_MAXCNT_MAXCNT_Pos

#define TWIM_RXD_MAXCNT_MAXCNT_Pos   (0UL)

Position of MAXCNT field.

Definition at line 10976 of file nrf52_bitfields.h.

◆ TWIM_RXD_PTR_PTR_Msk

#define TWIM_RXD_PTR_PTR_Msk   (0xFFFFFFFFUL << TWIM_RXD_PTR_PTR_Pos)

Bit mask of PTR field.

Definition at line 10970 of file nrf52_bitfields.h.

◆ TWIM_RXD_PTR_PTR_Pos

#define TWIM_RXD_PTR_PTR_Pos   (0UL)

Position of PTR field.

Definition at line 10969 of file nrf52_bitfields.h.

◆ TWIM_SHORTS_LASTRX_STARTTX_Disabled

#define TWIM_SHORTS_LASTRX_STARTTX_Disabled   (0UL)

Disable shortcut

Definition at line 10755 of file nrf52_bitfields.h.

◆ TWIM_SHORTS_LASTRX_STARTTX_Enabled

#define TWIM_SHORTS_LASTRX_STARTTX_Enabled   (1UL)

Enable shortcut

Definition at line 10756 of file nrf52_bitfields.h.

◆ TWIM_SHORTS_LASTRX_STARTTX_Msk

#define TWIM_SHORTS_LASTRX_STARTTX_Msk   (0x1UL << TWIM_SHORTS_LASTRX_STARTTX_Pos)

Bit mask of LASTRX_STARTTX field.

Definition at line 10754 of file nrf52_bitfields.h.

◆ TWIM_SHORTS_LASTRX_STARTTX_Pos

#define TWIM_SHORTS_LASTRX_STARTTX_Pos   (10UL)

Position of LASTRX_STARTTX field.

Definition at line 10753 of file nrf52_bitfields.h.

◆ TWIM_SHORTS_LASTRX_STOP_Disabled

#define TWIM_SHORTS_LASTRX_STOP_Disabled   (0UL)

Disable shortcut

Definition at line 10749 of file nrf52_bitfields.h.

◆ TWIM_SHORTS_LASTRX_STOP_Enabled

#define TWIM_SHORTS_LASTRX_STOP_Enabled   (1UL)

Enable shortcut

Definition at line 10750 of file nrf52_bitfields.h.

◆ TWIM_SHORTS_LASTRX_STOP_Msk

#define TWIM_SHORTS_LASTRX_STOP_Msk   (0x1UL << TWIM_SHORTS_LASTRX_STOP_Pos)

Bit mask of LASTRX_STOP field.

Definition at line 10748 of file nrf52_bitfields.h.

◆ TWIM_SHORTS_LASTRX_STOP_Pos

#define TWIM_SHORTS_LASTRX_STOP_Pos   (12UL)

Position of LASTRX_STOP field.

Definition at line 10747 of file nrf52_bitfields.h.

◆ TWIM_SHORTS_LASTTX_STARTRX_Disabled

#define TWIM_SHORTS_LASTTX_STARTRX_Disabled   (0UL)

Disable shortcut

Definition at line 10773 of file nrf52_bitfields.h.

◆ TWIM_SHORTS_LASTTX_STARTRX_Enabled

#define TWIM_SHORTS_LASTTX_STARTRX_Enabled   (1UL)

Enable shortcut

Definition at line 10774 of file nrf52_bitfields.h.

◆ TWIM_SHORTS_LASTTX_STARTRX_Msk

#define TWIM_SHORTS_LASTTX_STARTRX_Msk   (0x1UL << TWIM_SHORTS_LASTTX_STARTRX_Pos)

Bit mask of LASTTX_STARTRX field.

Definition at line 10772 of file nrf52_bitfields.h.

◆ TWIM_SHORTS_LASTTX_STARTRX_Pos

#define TWIM_SHORTS_LASTTX_STARTRX_Pos   (7UL)

Position of LASTTX_STARTRX field.

Definition at line 10771 of file nrf52_bitfields.h.

◆ TWIM_SHORTS_LASTTX_STOP_Disabled

#define TWIM_SHORTS_LASTTX_STOP_Disabled   (0UL)

Disable shortcut

Definition at line 10761 of file nrf52_bitfields.h.

◆ TWIM_SHORTS_LASTTX_STOP_Enabled

#define TWIM_SHORTS_LASTTX_STOP_Enabled   (1UL)

Enable shortcut

Definition at line 10762 of file nrf52_bitfields.h.

◆ TWIM_SHORTS_LASTTX_STOP_Msk

#define TWIM_SHORTS_LASTTX_STOP_Msk   (0x1UL << TWIM_SHORTS_LASTTX_STOP_Pos)

Bit mask of LASTTX_STOP field.

Definition at line 10760 of file nrf52_bitfields.h.

◆ TWIM_SHORTS_LASTTX_STOP_Pos

#define TWIM_SHORTS_LASTTX_STOP_Pos   (9UL)

Position of LASTTX_STOP field.

Definition at line 10759 of file nrf52_bitfields.h.

◆ TWIM_SHORTS_LASTTX_SUSPEND_Disabled

#define TWIM_SHORTS_LASTTX_SUSPEND_Disabled   (0UL)

Disable shortcut

Definition at line 10767 of file nrf52_bitfields.h.

◆ TWIM_SHORTS_LASTTX_SUSPEND_Enabled

#define TWIM_SHORTS_LASTTX_SUSPEND_Enabled   (1UL)

Enable shortcut

Definition at line 10768 of file nrf52_bitfields.h.

◆ TWIM_SHORTS_LASTTX_SUSPEND_Msk

#define TWIM_SHORTS_LASTTX_SUSPEND_Msk   (0x1UL << TWIM_SHORTS_LASTTX_SUSPEND_Pos)

Bit mask of LASTTX_SUSPEND field.

Definition at line 10766 of file nrf52_bitfields.h.

◆ TWIM_SHORTS_LASTTX_SUSPEND_Pos

#define TWIM_SHORTS_LASTTX_SUSPEND_Pos   (8UL)

Position of LASTTX_SUSPEND field.

Definition at line 10765 of file nrf52_bitfields.h.

◆ TWIM_TXD_AMOUNT_AMOUNT_Msk

#define TWIM_TXD_AMOUNT_AMOUNT_Msk   (0xFFUL << TWIM_TXD_AMOUNT_AMOUNT_Pos)

Bit mask of AMOUNT field.

Definition at line 11014 of file nrf52_bitfields.h.

◆ TWIM_TXD_AMOUNT_AMOUNT_Pos

#define TWIM_TXD_AMOUNT_AMOUNT_Pos   (0UL)

Position of AMOUNT field.

Definition at line 11013 of file nrf52_bitfields.h.

◆ TWIM_TXD_LIST_LIST_ArrayList

#define TWIM_TXD_LIST_LIST_ArrayList   (1UL)

Use array list

Definition at line 11023 of file nrf52_bitfields.h.

◆ TWIM_TXD_LIST_LIST_Disabled

#define TWIM_TXD_LIST_LIST_Disabled   (0UL)

Disable EasyDMA list

Definition at line 11022 of file nrf52_bitfields.h.

◆ TWIM_TXD_LIST_LIST_Msk

#define TWIM_TXD_LIST_LIST_Msk   (0x7UL << TWIM_TXD_LIST_LIST_Pos)

Bit mask of LIST field.

Definition at line 11021 of file nrf52_bitfields.h.

◆ TWIM_TXD_LIST_LIST_Pos

#define TWIM_TXD_LIST_LIST_Pos   (0UL)

Position of LIST field.

Definition at line 11020 of file nrf52_bitfields.h.

◆ TWIM_TXD_MAXCNT_MAXCNT_Msk

#define TWIM_TXD_MAXCNT_MAXCNT_Msk   (0xFFUL << TWIM_TXD_MAXCNT_MAXCNT_Pos)

Bit mask of MAXCNT field.

Definition at line 11007 of file nrf52_bitfields.h.

◆ TWIM_TXD_MAXCNT_MAXCNT_Pos

#define TWIM_TXD_MAXCNT_MAXCNT_Pos   (0UL)

Position of MAXCNT field.

Definition at line 11006 of file nrf52_bitfields.h.

◆ TWIM_TXD_PTR_PTR_Msk

#define TWIM_TXD_PTR_PTR_Msk   (0xFFFFFFFFUL << TWIM_TXD_PTR_PTR_Pos)

Bit mask of PTR field.

Definition at line 11000 of file nrf52_bitfields.h.

◆ TWIM_TXD_PTR_PTR_Pos

#define TWIM_TXD_PTR_PTR_Pos   (0UL)

Position of PTR field.

Definition at line 10999 of file nrf52_bitfields.h.

◆ TWIS_ADDRESS_ADDRESS_Msk

#define TWIS_ADDRESS_ADDRESS_Msk   (0x7FUL << TWIS_ADDRESS_ADDRESS_Pos)

Bit mask of ADDRESS field.

Definition at line 11290 of file nrf52_bitfields.h.

◆ TWIS_ADDRESS_ADDRESS_Pos

#define TWIS_ADDRESS_ADDRESS_Pos   (0UL)

Position of ADDRESS field.

Definition at line 11289 of file nrf52_bitfields.h.

◆ TWIS_CONFIG_ADDRESS0_Disabled

#define TWIS_CONFIG_ADDRESS0_Disabled   (0UL)

Disabled

Definition at line 11304 of file nrf52_bitfields.h.

◆ TWIS_CONFIG_ADDRESS0_Enabled

#define TWIS_CONFIG_ADDRESS0_Enabled   (1UL)

Enabled

Definition at line 11305 of file nrf52_bitfields.h.

◆ TWIS_CONFIG_ADDRESS0_Msk

#define TWIS_CONFIG_ADDRESS0_Msk   (0x1UL << TWIS_CONFIG_ADDRESS0_Pos)

Bit mask of ADDRESS0 field.

Definition at line 11303 of file nrf52_bitfields.h.

◆ TWIS_CONFIG_ADDRESS0_Pos

#define TWIS_CONFIG_ADDRESS0_Pos   (0UL)

Position of ADDRESS0 field.

Definition at line 11302 of file nrf52_bitfields.h.

◆ TWIS_CONFIG_ADDRESS1_Disabled

#define TWIS_CONFIG_ADDRESS1_Disabled   (0UL)

Disabled

Definition at line 11298 of file nrf52_bitfields.h.

◆ TWIS_CONFIG_ADDRESS1_Enabled

#define TWIS_CONFIG_ADDRESS1_Enabled   (1UL)

Enabled

Definition at line 11299 of file nrf52_bitfields.h.

◆ TWIS_CONFIG_ADDRESS1_Msk

#define TWIS_CONFIG_ADDRESS1_Msk   (0x1UL << TWIS_CONFIG_ADDRESS1_Pos)

Bit mask of ADDRESS1 field.

Definition at line 11297 of file nrf52_bitfields.h.

◆ TWIS_CONFIG_ADDRESS1_Pos

#define TWIS_CONFIG_ADDRESS1_Pos   (1UL)

Position of ADDRESS1 field.

Definition at line 11296 of file nrf52_bitfields.h.

◆ TWIS_ENABLE_ENABLE_Disabled

#define TWIS_ENABLE_ENABLE_Disabled   (0UL)

Disable TWIS

Definition at line 11214 of file nrf52_bitfields.h.

◆ TWIS_ENABLE_ENABLE_Enabled

#define TWIS_ENABLE_ENABLE_Enabled   (9UL)

Enable TWIS

Definition at line 11215 of file nrf52_bitfields.h.

◆ TWIS_ENABLE_ENABLE_Msk

#define TWIS_ENABLE_ENABLE_Msk   (0xFUL << TWIS_ENABLE_ENABLE_Pos)

Bit mask of ENABLE field.

Definition at line 11213 of file nrf52_bitfields.h.

◆ TWIS_ENABLE_ENABLE_Pos

#define TWIS_ENABLE_ENABLE_Pos   (0UL)

Position of ENABLE field.

Definition at line 11212 of file nrf52_bitfields.h.

◆ TWIS_ERRORSRC_DNACK_Msk

#define TWIS_ERRORSRC_DNACK_Msk   (0x1UL << TWIS_ERRORSRC_DNACK_Pos)

Bit mask of DNACK field.

Definition at line 11191 of file nrf52_bitfields.h.

◆ TWIS_ERRORSRC_DNACK_NotReceived

#define TWIS_ERRORSRC_DNACK_NotReceived   (0UL)

Error did not occur

Definition at line 11192 of file nrf52_bitfields.h.

◆ TWIS_ERRORSRC_DNACK_Pos

#define TWIS_ERRORSRC_DNACK_Pos   (2UL)

Position of DNACK field.

Definition at line 11190 of file nrf52_bitfields.h.

◆ TWIS_ERRORSRC_DNACK_Received

#define TWIS_ERRORSRC_DNACK_Received   (1UL)

Error occurred

Definition at line 11193 of file nrf52_bitfields.h.

◆ TWIS_ERRORSRC_OVERFLOW_Detected

#define TWIS_ERRORSRC_OVERFLOW_Detected   (1UL)

Error occurred

Definition at line 11199 of file nrf52_bitfields.h.

◆ TWIS_ERRORSRC_OVERFLOW_Msk

#define TWIS_ERRORSRC_OVERFLOW_Msk   (0x1UL << TWIS_ERRORSRC_OVERFLOW_Pos)

Bit mask of OVERFLOW field.

Definition at line 11197 of file nrf52_bitfields.h.

◆ TWIS_ERRORSRC_OVERFLOW_NotDetected

#define TWIS_ERRORSRC_OVERFLOW_NotDetected   (0UL)

Error did not occur

Definition at line 11198 of file nrf52_bitfields.h.

◆ TWIS_ERRORSRC_OVERFLOW_Pos

#define TWIS_ERRORSRC_OVERFLOW_Pos   (0UL)

Position of OVERFLOW field.

Definition at line 11196 of file nrf52_bitfields.h.

◆ TWIS_ERRORSRC_OVERREAD_Detected

#define TWIS_ERRORSRC_OVERREAD_Detected   (1UL)

Error occurred

Definition at line 11187 of file nrf52_bitfields.h.

◆ TWIS_ERRORSRC_OVERREAD_Msk

#define TWIS_ERRORSRC_OVERREAD_Msk   (0x1UL << TWIS_ERRORSRC_OVERREAD_Pos)

Bit mask of OVERREAD field.

Definition at line 11185 of file nrf52_bitfields.h.

◆ TWIS_ERRORSRC_OVERREAD_NotDetected

#define TWIS_ERRORSRC_OVERREAD_NotDetected   (0UL)

Error did not occur

Definition at line 11186 of file nrf52_bitfields.h.

◆ TWIS_ERRORSRC_OVERREAD_Pos

#define TWIS_ERRORSRC_OVERREAD_Pos   (3UL)

Position of OVERREAD field.

Definition at line 11184 of file nrf52_bitfields.h.

◆ TWIS_INTEN_ERROR_Disabled

#define TWIS_INTEN_ERROR_Disabled   (0UL)

Disable

Definition at line 11081 of file nrf52_bitfields.h.

◆ TWIS_INTEN_ERROR_Enabled

#define TWIS_INTEN_ERROR_Enabled   (1UL)

Enable

Definition at line 11082 of file nrf52_bitfields.h.

◆ TWIS_INTEN_ERROR_Msk

#define TWIS_INTEN_ERROR_Msk   (0x1UL << TWIS_INTEN_ERROR_Pos)

Bit mask of ERROR field.

Definition at line 11080 of file nrf52_bitfields.h.

◆ TWIS_INTEN_ERROR_Pos

#define TWIS_INTEN_ERROR_Pos   (9UL)

Position of ERROR field.

Definition at line 11079 of file nrf52_bitfields.h.

◆ TWIS_INTEN_READ_Disabled

#define TWIS_INTEN_READ_Disabled   (0UL)

Disable

Definition at line 11057 of file nrf52_bitfields.h.

◆ TWIS_INTEN_READ_Enabled

#define TWIS_INTEN_READ_Enabled   (1UL)

Enable

Definition at line 11058 of file nrf52_bitfields.h.

◆ TWIS_INTEN_READ_Msk

#define TWIS_INTEN_READ_Msk   (0x1UL << TWIS_INTEN_READ_Pos)

Bit mask of READ field.

Definition at line 11056 of file nrf52_bitfields.h.

◆ TWIS_INTEN_READ_Pos

#define TWIS_INTEN_READ_Pos   (26UL)

Position of READ field.

Definition at line 11055 of file nrf52_bitfields.h.

◆ TWIS_INTEN_RXSTARTED_Disabled

#define TWIS_INTEN_RXSTARTED_Disabled   (0UL)

Disable

Definition at line 11075 of file nrf52_bitfields.h.

◆ TWIS_INTEN_RXSTARTED_Enabled

#define TWIS_INTEN_RXSTARTED_Enabled   (1UL)

Enable

Definition at line 11076 of file nrf52_bitfields.h.

◆ TWIS_INTEN_RXSTARTED_Msk

#define TWIS_INTEN_RXSTARTED_Msk   (0x1UL << TWIS_INTEN_RXSTARTED_Pos)

Bit mask of RXSTARTED field.

Definition at line 11074 of file nrf52_bitfields.h.

◆ TWIS_INTEN_RXSTARTED_Pos

#define TWIS_INTEN_RXSTARTED_Pos   (19UL)

Position of RXSTARTED field.

Definition at line 11073 of file nrf52_bitfields.h.

◆ TWIS_INTEN_STOPPED_Disabled

#define TWIS_INTEN_STOPPED_Disabled   (0UL)

Disable

Definition at line 11087 of file nrf52_bitfields.h.

◆ TWIS_INTEN_STOPPED_Enabled

#define TWIS_INTEN_STOPPED_Enabled   (1UL)

Enable

Definition at line 11088 of file nrf52_bitfields.h.

◆ TWIS_INTEN_STOPPED_Msk

#define TWIS_INTEN_STOPPED_Msk   (0x1UL << TWIS_INTEN_STOPPED_Pos)

Bit mask of STOPPED field.

Definition at line 11086 of file nrf52_bitfields.h.

◆ TWIS_INTEN_STOPPED_Pos

#define TWIS_INTEN_STOPPED_Pos   (1UL)

Position of STOPPED field.

Definition at line 11085 of file nrf52_bitfields.h.

◆ TWIS_INTEN_TXSTARTED_Disabled

#define TWIS_INTEN_TXSTARTED_Disabled   (0UL)

Disable

Definition at line 11069 of file nrf52_bitfields.h.

◆ TWIS_INTEN_TXSTARTED_Enabled

#define TWIS_INTEN_TXSTARTED_Enabled   (1UL)

Enable

Definition at line 11070 of file nrf52_bitfields.h.

◆ TWIS_INTEN_TXSTARTED_Msk

#define TWIS_INTEN_TXSTARTED_Msk   (0x1UL << TWIS_INTEN_TXSTARTED_Pos)

Bit mask of TXSTARTED field.

Definition at line 11068 of file nrf52_bitfields.h.

◆ TWIS_INTEN_TXSTARTED_Pos

#define TWIS_INTEN_TXSTARTED_Pos   (20UL)

Position of TXSTARTED field.

Definition at line 11067 of file nrf52_bitfields.h.

◆ TWIS_INTEN_WRITE_Disabled

#define TWIS_INTEN_WRITE_Disabled   (0UL)

Disable

Definition at line 11063 of file nrf52_bitfields.h.

◆ TWIS_INTEN_WRITE_Enabled

#define TWIS_INTEN_WRITE_Enabled   (1UL)

Enable

Definition at line 11064 of file nrf52_bitfields.h.

◆ TWIS_INTEN_WRITE_Msk

#define TWIS_INTEN_WRITE_Msk   (0x1UL << TWIS_INTEN_WRITE_Pos)

Bit mask of WRITE field.

Definition at line 11062 of file nrf52_bitfields.h.

◆ TWIS_INTEN_WRITE_Pos

#define TWIS_INTEN_WRITE_Pos   (25UL)

Position of WRITE field.

Definition at line 11061 of file nrf52_bitfields.h.

◆ TWIS_INTENCLR_ERROR_Clear

#define TWIS_INTENCLR_ERROR_Clear   (1UL)

Disable

Definition at line 11171 of file nrf52_bitfields.h.

◆ TWIS_INTENCLR_ERROR_Disabled

#define TWIS_INTENCLR_ERROR_Disabled   (0UL)

Read: Disabled

Definition at line 11169 of file nrf52_bitfields.h.

◆ TWIS_INTENCLR_ERROR_Enabled

#define TWIS_INTENCLR_ERROR_Enabled   (1UL)

Read: Enabled

Definition at line 11170 of file nrf52_bitfields.h.

◆ TWIS_INTENCLR_ERROR_Msk

#define TWIS_INTENCLR_ERROR_Msk   (0x1UL << TWIS_INTENCLR_ERROR_Pos)

Bit mask of ERROR field.

Definition at line 11168 of file nrf52_bitfields.h.

◆ TWIS_INTENCLR_ERROR_Pos

#define TWIS_INTENCLR_ERROR_Pos   (9UL)

Position of ERROR field.

Definition at line 11167 of file nrf52_bitfields.h.

◆ TWIS_INTENCLR_READ_Clear

#define TWIS_INTENCLR_READ_Clear   (1UL)

Disable

Definition at line 11143 of file nrf52_bitfields.h.

◆ TWIS_INTENCLR_READ_Disabled

#define TWIS_INTENCLR_READ_Disabled   (0UL)

Read: Disabled

Definition at line 11141 of file nrf52_bitfields.h.

◆ TWIS_INTENCLR_READ_Enabled

#define TWIS_INTENCLR_READ_Enabled   (1UL)

Read: Enabled

Definition at line 11142 of file nrf52_bitfields.h.

◆ TWIS_INTENCLR_READ_Msk

#define TWIS_INTENCLR_READ_Msk   (0x1UL << TWIS_INTENCLR_READ_Pos)

Bit mask of READ field.

Definition at line 11140 of file nrf52_bitfields.h.

◆ TWIS_INTENCLR_READ_Pos

#define TWIS_INTENCLR_READ_Pos   (26UL)

Position of READ field.

Definition at line 11139 of file nrf52_bitfields.h.

◆ TWIS_INTENCLR_RXSTARTED_Clear

#define TWIS_INTENCLR_RXSTARTED_Clear   (1UL)

Disable

Definition at line 11164 of file nrf52_bitfields.h.

◆ TWIS_INTENCLR_RXSTARTED_Disabled

#define TWIS_INTENCLR_RXSTARTED_Disabled   (0UL)

Read: Disabled

Definition at line 11162 of file nrf52_bitfields.h.

◆ TWIS_INTENCLR_RXSTARTED_Enabled

#define TWIS_INTENCLR_RXSTARTED_Enabled   (1UL)

Read: Enabled

Definition at line 11163 of file nrf52_bitfields.h.

◆ TWIS_INTENCLR_RXSTARTED_Msk

#define TWIS_INTENCLR_RXSTARTED_Msk   (0x1UL << TWIS_INTENCLR_RXSTARTED_Pos)

Bit mask of RXSTARTED field.

Definition at line 11161 of file nrf52_bitfields.h.

◆ TWIS_INTENCLR_RXSTARTED_Pos

#define TWIS_INTENCLR_RXSTARTED_Pos   (19UL)

Position of RXSTARTED field.

Definition at line 11160 of file nrf52_bitfields.h.

◆ TWIS_INTENCLR_STOPPED_Clear

#define TWIS_INTENCLR_STOPPED_Clear   (1UL)

Disable

Definition at line 11178 of file nrf52_bitfields.h.

◆ TWIS_INTENCLR_STOPPED_Disabled

#define TWIS_INTENCLR_STOPPED_Disabled   (0UL)

Read: Disabled

Definition at line 11176 of file nrf52_bitfields.h.

◆ TWIS_INTENCLR_STOPPED_Enabled

#define TWIS_INTENCLR_STOPPED_Enabled   (1UL)

Read: Enabled

Definition at line 11177 of file nrf52_bitfields.h.

◆ TWIS_INTENCLR_STOPPED_Msk

#define TWIS_INTENCLR_STOPPED_Msk   (0x1UL << TWIS_INTENCLR_STOPPED_Pos)

Bit mask of STOPPED field.

Definition at line 11175 of file nrf52_bitfields.h.

◆ TWIS_INTENCLR_STOPPED_Pos

#define TWIS_INTENCLR_STOPPED_Pos   (1UL)

Position of STOPPED field.

Definition at line 11174 of file nrf52_bitfields.h.

◆ TWIS_INTENCLR_TXSTARTED_Clear

#define TWIS_INTENCLR_TXSTARTED_Clear   (1UL)

Disable

Definition at line 11157 of file nrf52_bitfields.h.

◆ TWIS_INTENCLR_TXSTARTED_Disabled

#define TWIS_INTENCLR_TXSTARTED_Disabled   (0UL)

Read: Disabled

Definition at line 11155 of file nrf52_bitfields.h.

◆ TWIS_INTENCLR_TXSTARTED_Enabled

#define TWIS_INTENCLR_TXSTARTED_Enabled   (1UL)

Read: Enabled

Definition at line 11156 of file nrf52_bitfields.h.

◆ TWIS_INTENCLR_TXSTARTED_Msk

#define TWIS_INTENCLR_TXSTARTED_Msk   (0x1UL << TWIS_INTENCLR_TXSTARTED_Pos)

Bit mask of TXSTARTED field.

Definition at line 11154 of file nrf52_bitfields.h.

◆ TWIS_INTENCLR_TXSTARTED_Pos

#define TWIS_INTENCLR_TXSTARTED_Pos   (20UL)

Position of TXSTARTED field.

Definition at line 11153 of file nrf52_bitfields.h.

◆ TWIS_INTENCLR_WRITE_Clear

#define TWIS_INTENCLR_WRITE_Clear   (1UL)

Disable

Definition at line 11150 of file nrf52_bitfields.h.

◆ TWIS_INTENCLR_WRITE_Disabled

#define TWIS_INTENCLR_WRITE_Disabled   (0UL)

Read: Disabled

Definition at line 11148 of file nrf52_bitfields.h.

◆ TWIS_INTENCLR_WRITE_Enabled

#define TWIS_INTENCLR_WRITE_Enabled   (1UL)

Read: Enabled

Definition at line 11149 of file nrf52_bitfields.h.

◆ TWIS_INTENCLR_WRITE_Msk

#define TWIS_INTENCLR_WRITE_Msk   (0x1UL << TWIS_INTENCLR_WRITE_Pos)

Bit mask of WRITE field.

Definition at line 11147 of file nrf52_bitfields.h.

◆ TWIS_INTENCLR_WRITE_Pos

#define TWIS_INTENCLR_WRITE_Pos   (25UL)

Position of WRITE field.

Definition at line 11146 of file nrf52_bitfields.h.

◆ TWIS_INTENSET_ERROR_Disabled

#define TWIS_INTENSET_ERROR_Disabled   (0UL)

Read: Disabled

Definition at line 11124 of file nrf52_bitfields.h.

◆ TWIS_INTENSET_ERROR_Enabled

#define TWIS_INTENSET_ERROR_Enabled   (1UL)

Read: Enabled

Definition at line 11125 of file nrf52_bitfields.h.

◆ TWIS_INTENSET_ERROR_Msk

#define TWIS_INTENSET_ERROR_Msk   (0x1UL << TWIS_INTENSET_ERROR_Pos)

Bit mask of ERROR field.

Definition at line 11123 of file nrf52_bitfields.h.

◆ TWIS_INTENSET_ERROR_Pos

#define TWIS_INTENSET_ERROR_Pos   (9UL)

Position of ERROR field.

Definition at line 11122 of file nrf52_bitfields.h.

◆ TWIS_INTENSET_ERROR_Set

#define TWIS_INTENSET_ERROR_Set   (1UL)

Enable

Definition at line 11126 of file nrf52_bitfields.h.

◆ TWIS_INTENSET_READ_Disabled

#define TWIS_INTENSET_READ_Disabled   (0UL)

Read: Disabled

Definition at line 11096 of file nrf52_bitfields.h.

◆ TWIS_INTENSET_READ_Enabled

#define TWIS_INTENSET_READ_Enabled   (1UL)

Read: Enabled

Definition at line 11097 of file nrf52_bitfields.h.

◆ TWIS_INTENSET_READ_Msk

#define TWIS_INTENSET_READ_Msk   (0x1UL << TWIS_INTENSET_READ_Pos)

Bit mask of READ field.

Definition at line 11095 of file nrf52_bitfields.h.

◆ TWIS_INTENSET_READ_Pos

#define TWIS_INTENSET_READ_Pos   (26UL)

Position of READ field.

Definition at line 11094 of file nrf52_bitfields.h.

◆ TWIS_INTENSET_READ_Set

#define TWIS_INTENSET_READ_Set   (1UL)

Enable

Definition at line 11098 of file nrf52_bitfields.h.

◆ TWIS_INTENSET_RXSTARTED_Disabled

#define TWIS_INTENSET_RXSTARTED_Disabled   (0UL)

Read: Disabled

Definition at line 11117 of file nrf52_bitfields.h.

◆ TWIS_INTENSET_RXSTARTED_Enabled

#define TWIS_INTENSET_RXSTARTED_Enabled   (1UL)

Read: Enabled

Definition at line 11118 of file nrf52_bitfields.h.

◆ TWIS_INTENSET_RXSTARTED_Msk

#define TWIS_INTENSET_RXSTARTED_Msk   (0x1UL << TWIS_INTENSET_RXSTARTED_Pos)

Bit mask of RXSTARTED field.

Definition at line 11116 of file nrf52_bitfields.h.

◆ TWIS_INTENSET_RXSTARTED_Pos

#define TWIS_INTENSET_RXSTARTED_Pos   (19UL)

Position of RXSTARTED field.

Definition at line 11115 of file nrf52_bitfields.h.

◆ TWIS_INTENSET_RXSTARTED_Set

#define TWIS_INTENSET_RXSTARTED_Set   (1UL)

Enable

Definition at line 11119 of file nrf52_bitfields.h.

◆ TWIS_INTENSET_STOPPED_Disabled

#define TWIS_INTENSET_STOPPED_Disabled   (0UL)

Read: Disabled

Definition at line 11131 of file nrf52_bitfields.h.

◆ TWIS_INTENSET_STOPPED_Enabled

#define TWIS_INTENSET_STOPPED_Enabled   (1UL)

Read: Enabled

Definition at line 11132 of file nrf52_bitfields.h.

◆ TWIS_INTENSET_STOPPED_Msk

#define TWIS_INTENSET_STOPPED_Msk   (0x1UL << TWIS_INTENSET_STOPPED_Pos)

Bit mask of STOPPED field.

Definition at line 11130 of file nrf52_bitfields.h.

◆ TWIS_INTENSET_STOPPED_Pos

#define TWIS_INTENSET_STOPPED_Pos   (1UL)

Position of STOPPED field.

Definition at line 11129 of file nrf52_bitfields.h.

◆ TWIS_INTENSET_STOPPED_Set

#define TWIS_INTENSET_STOPPED_Set   (1UL)

Enable

Definition at line 11133 of file nrf52_bitfields.h.

◆ TWIS_INTENSET_TXSTARTED_Disabled

#define TWIS_INTENSET_TXSTARTED_Disabled   (0UL)

Read: Disabled

Definition at line 11110 of file nrf52_bitfields.h.

◆ TWIS_INTENSET_TXSTARTED_Enabled

#define TWIS_INTENSET_TXSTARTED_Enabled   (1UL)

Read: Enabled

Definition at line 11111 of file nrf52_bitfields.h.

◆ TWIS_INTENSET_TXSTARTED_Msk

#define TWIS_INTENSET_TXSTARTED_Msk   (0x1UL << TWIS_INTENSET_TXSTARTED_Pos)

Bit mask of TXSTARTED field.

Definition at line 11109 of file nrf52_bitfields.h.

◆ TWIS_INTENSET_TXSTARTED_Pos

#define TWIS_INTENSET_TXSTARTED_Pos   (20UL)

Position of TXSTARTED field.

Definition at line 11108 of file nrf52_bitfields.h.

◆ TWIS_INTENSET_TXSTARTED_Set

#define TWIS_INTENSET_TXSTARTED_Set   (1UL)

Enable

Definition at line 11112 of file nrf52_bitfields.h.

◆ TWIS_INTENSET_WRITE_Disabled

#define TWIS_INTENSET_WRITE_Disabled   (0UL)

Read: Disabled

Definition at line 11103 of file nrf52_bitfields.h.

◆ TWIS_INTENSET_WRITE_Enabled

#define TWIS_INTENSET_WRITE_Enabled   (1UL)

Read: Enabled

Definition at line 11104 of file nrf52_bitfields.h.

◆ TWIS_INTENSET_WRITE_Msk

#define TWIS_INTENSET_WRITE_Msk   (0x1UL << TWIS_INTENSET_WRITE_Pos)

Bit mask of WRITE field.

Definition at line 11102 of file nrf52_bitfields.h.

◆ TWIS_INTENSET_WRITE_Pos

#define TWIS_INTENSET_WRITE_Pos   (25UL)

Position of WRITE field.

Definition at line 11101 of file nrf52_bitfields.h.

◆ TWIS_INTENSET_WRITE_Set

#define TWIS_INTENSET_WRITE_Set   (1UL)

Enable

Definition at line 11105 of file nrf52_bitfields.h.

◆ TWIS_MATCH_MATCH_Msk

#define TWIS_MATCH_MATCH_Msk   (0x1UL << TWIS_MATCH_MATCH_Pos)

Bit mask of MATCH field.

Definition at line 11206 of file nrf52_bitfields.h.

◆ TWIS_MATCH_MATCH_Pos

#define TWIS_MATCH_MATCH_Pos   (0UL)

Position of MATCH field.

Definition at line 11205 of file nrf52_bitfields.h.

◆ TWIS_ORC_ORC_Msk

#define TWIS_ORC_ORC_Msk   (0xFFUL << TWIS_ORC_ORC_Pos)

Bit mask of ORC field.

Definition at line 11312 of file nrf52_bitfields.h.

◆ TWIS_ORC_ORC_Pos

#define TWIS_ORC_ORC_Pos   (0UL)

Position of ORC field.

Definition at line 11311 of file nrf52_bitfields.h.

◆ TWIS_PSEL_SCL_CONNECT_Connected

#define TWIS_PSEL_SCL_CONNECT_Connected   (0UL)

Connect

Definition at line 11223 of file nrf52_bitfields.h.

◆ TWIS_PSEL_SCL_CONNECT_Disconnected

#define TWIS_PSEL_SCL_CONNECT_Disconnected   (1UL)

Disconnect

Definition at line 11224 of file nrf52_bitfields.h.

◆ TWIS_PSEL_SCL_CONNECT_Msk

#define TWIS_PSEL_SCL_CONNECT_Msk   (0x1UL << TWIS_PSEL_SCL_CONNECT_Pos)

Bit mask of CONNECT field.

Definition at line 11222 of file nrf52_bitfields.h.

◆ TWIS_PSEL_SCL_CONNECT_Pos

#define TWIS_PSEL_SCL_CONNECT_Pos   (31UL)

Position of CONNECT field.

Definition at line 11221 of file nrf52_bitfields.h.

◆ TWIS_PSEL_SCL_PIN_Msk

#define TWIS_PSEL_SCL_PIN_Msk   (0x1FUL << TWIS_PSEL_SCL_PIN_Pos)

Bit mask of PIN field.

Definition at line 11228 of file nrf52_bitfields.h.

◆ TWIS_PSEL_SCL_PIN_Pos

#define TWIS_PSEL_SCL_PIN_Pos   (0UL)

Position of PIN field.

Definition at line 11227 of file nrf52_bitfields.h.

◆ TWIS_PSEL_SDA_CONNECT_Connected

#define TWIS_PSEL_SDA_CONNECT_Connected   (0UL)

Connect

Definition at line 11236 of file nrf52_bitfields.h.

◆ TWIS_PSEL_SDA_CONNECT_Disconnected

#define TWIS_PSEL_SDA_CONNECT_Disconnected   (1UL)

Disconnect

Definition at line 11237 of file nrf52_bitfields.h.

◆ TWIS_PSEL_SDA_CONNECT_Msk

#define TWIS_PSEL_SDA_CONNECT_Msk   (0x1UL << TWIS_PSEL_SDA_CONNECT_Pos)

Bit mask of CONNECT field.

Definition at line 11235 of file nrf52_bitfields.h.

◆ TWIS_PSEL_SDA_CONNECT_Pos

#define TWIS_PSEL_SDA_CONNECT_Pos   (31UL)

Position of CONNECT field.

Definition at line 11234 of file nrf52_bitfields.h.

◆ TWIS_PSEL_SDA_PIN_Msk

#define TWIS_PSEL_SDA_PIN_Msk   (0x1FUL << TWIS_PSEL_SDA_PIN_Pos)

Bit mask of PIN field.

Definition at line 11241 of file nrf52_bitfields.h.

◆ TWIS_PSEL_SDA_PIN_Pos

#define TWIS_PSEL_SDA_PIN_Pos   (0UL)

Position of PIN field.

Definition at line 11240 of file nrf52_bitfields.h.

◆ TWIS_RXD_AMOUNT_AMOUNT_Msk

#define TWIS_RXD_AMOUNT_AMOUNT_Msk   (0xFFUL << TWIS_RXD_AMOUNT_AMOUNT_Pos)

Bit mask of AMOUNT field.

Definition at line 11262 of file nrf52_bitfields.h.

◆ TWIS_RXD_AMOUNT_AMOUNT_Pos

#define TWIS_RXD_AMOUNT_AMOUNT_Pos   (0UL)

Position of AMOUNT field.

Definition at line 11261 of file nrf52_bitfields.h.

◆ TWIS_RXD_MAXCNT_MAXCNT_Msk

#define TWIS_RXD_MAXCNT_MAXCNT_Msk   (0xFFUL << TWIS_RXD_MAXCNT_MAXCNT_Pos)

Bit mask of MAXCNT field.

Definition at line 11255 of file nrf52_bitfields.h.

◆ TWIS_RXD_MAXCNT_MAXCNT_Pos

#define TWIS_RXD_MAXCNT_MAXCNT_Pos   (0UL)

Position of MAXCNT field.

Definition at line 11254 of file nrf52_bitfields.h.

◆ TWIS_RXD_PTR_PTR_Msk

#define TWIS_RXD_PTR_PTR_Msk   (0xFFFFFFFFUL << TWIS_RXD_PTR_PTR_Pos)

Bit mask of PTR field.

Definition at line 11248 of file nrf52_bitfields.h.

◆ TWIS_RXD_PTR_PTR_Pos

#define TWIS_RXD_PTR_PTR_Pos   (0UL)

Position of PTR field.

Definition at line 11247 of file nrf52_bitfields.h.

◆ TWIS_SHORTS_READ_SUSPEND_Disabled

#define TWIS_SHORTS_READ_SUSPEND_Disabled   (0UL)

Disable shortcut

Definition at line 11042 of file nrf52_bitfields.h.

◆ TWIS_SHORTS_READ_SUSPEND_Enabled

#define TWIS_SHORTS_READ_SUSPEND_Enabled   (1UL)

Enable shortcut

Definition at line 11043 of file nrf52_bitfields.h.

◆ TWIS_SHORTS_READ_SUSPEND_Msk

#define TWIS_SHORTS_READ_SUSPEND_Msk   (0x1UL << TWIS_SHORTS_READ_SUSPEND_Pos)

Bit mask of READ_SUSPEND field.

Definition at line 11041 of file nrf52_bitfields.h.

◆ TWIS_SHORTS_READ_SUSPEND_Pos

#define TWIS_SHORTS_READ_SUSPEND_Pos   (14UL)

Position of READ_SUSPEND field.

Definition at line 11040 of file nrf52_bitfields.h.

◆ TWIS_SHORTS_WRITE_SUSPEND_Disabled

#define TWIS_SHORTS_WRITE_SUSPEND_Disabled   (0UL)

Disable shortcut

Definition at line 11048 of file nrf52_bitfields.h.

◆ TWIS_SHORTS_WRITE_SUSPEND_Enabled

#define TWIS_SHORTS_WRITE_SUSPEND_Enabled   (1UL)

Enable shortcut

Definition at line 11049 of file nrf52_bitfields.h.

◆ TWIS_SHORTS_WRITE_SUSPEND_Msk

#define TWIS_SHORTS_WRITE_SUSPEND_Msk   (0x1UL << TWIS_SHORTS_WRITE_SUSPEND_Pos)

Bit mask of WRITE_SUSPEND field.

Definition at line 11047 of file nrf52_bitfields.h.

◆ TWIS_SHORTS_WRITE_SUSPEND_Pos

#define TWIS_SHORTS_WRITE_SUSPEND_Pos   (13UL)

Position of WRITE_SUSPEND field.

Definition at line 11046 of file nrf52_bitfields.h.

◆ TWIS_TXD_AMOUNT_AMOUNT_Msk

#define TWIS_TXD_AMOUNT_AMOUNT_Msk   (0xFFUL << TWIS_TXD_AMOUNT_AMOUNT_Pos)

Bit mask of AMOUNT field.

Definition at line 11283 of file nrf52_bitfields.h.

◆ TWIS_TXD_AMOUNT_AMOUNT_Pos

#define TWIS_TXD_AMOUNT_AMOUNT_Pos   (0UL)

Position of AMOUNT field.

Definition at line 11282 of file nrf52_bitfields.h.

◆ TWIS_TXD_MAXCNT_MAXCNT_Msk

#define TWIS_TXD_MAXCNT_MAXCNT_Msk   (0xFFUL << TWIS_TXD_MAXCNT_MAXCNT_Pos)

Bit mask of MAXCNT field.

Definition at line 11276 of file nrf52_bitfields.h.

◆ TWIS_TXD_MAXCNT_MAXCNT_Pos

#define TWIS_TXD_MAXCNT_MAXCNT_Pos   (0UL)

Position of MAXCNT field.

Definition at line 11275 of file nrf52_bitfields.h.

◆ TWIS_TXD_PTR_PTR_Msk

#define TWIS_TXD_PTR_PTR_Msk   (0xFFFFFFFFUL << TWIS_TXD_PTR_PTR_Pos)

Bit mask of PTR field.

Definition at line 11269 of file nrf52_bitfields.h.

◆ TWIS_TXD_PTR_PTR_Pos

#define TWIS_TXD_PTR_PTR_Pos   (0UL)

Position of PTR field.

Definition at line 11268 of file nrf52_bitfields.h.

◆ UART_BAUDRATE_BAUDRATE_Baud115200

#define UART_BAUDRATE_BAUDRATE_Baud115200   (0x01D7E000UL)

115200 baud (actual rate: 115942)

Definition at line 11521 of file nrf52_bitfields.h.

◆ UART_BAUDRATE_BAUDRATE_Baud1200

#define UART_BAUDRATE_BAUDRATE_Baud1200   (0x0004F000UL)

1200 baud (actual rate: 1205)

Definition at line 11511 of file nrf52_bitfields.h.

◆ UART_BAUDRATE_BAUDRATE_Baud14400

#define UART_BAUDRATE_BAUDRATE_Baud14400   (0x003B0000UL)

14400 baud (actual rate: 14414)

Definition at line 11515 of file nrf52_bitfields.h.

◆ UART_BAUDRATE_BAUDRATE_Baud19200

#define UART_BAUDRATE_BAUDRATE_Baud19200   (0x004EA000UL)

19200 baud (actual rate: 19208)

Definition at line 11516 of file nrf52_bitfields.h.

◆ UART_BAUDRATE_BAUDRATE_Baud1M

#define UART_BAUDRATE_BAUDRATE_Baud1M   (0x10000000UL)

1Mega baud

Definition at line 11526 of file nrf52_bitfields.h.

◆ UART_BAUDRATE_BAUDRATE_Baud230400

#define UART_BAUDRATE_BAUDRATE_Baud230400   (0x03AFB000UL)

230400 baud (actual rate: 231884)

Definition at line 11522 of file nrf52_bitfields.h.

◆ UART_BAUDRATE_BAUDRATE_Baud2400

#define UART_BAUDRATE_BAUDRATE_Baud2400   (0x0009D000UL)

2400 baud (actual rate: 2396)

Definition at line 11512 of file nrf52_bitfields.h.

◆ UART_BAUDRATE_BAUDRATE_Baud250000

#define UART_BAUDRATE_BAUDRATE_Baud250000   (0x04000000UL)

250000 baud

Definition at line 11523 of file nrf52_bitfields.h.

◆ UART_BAUDRATE_BAUDRATE_Baud28800

#define UART_BAUDRATE_BAUDRATE_Baud28800   (0x0075F000UL)

28800 baud (actual rate: 28829)

Definition at line 11517 of file nrf52_bitfields.h.

◆ UART_BAUDRATE_BAUDRATE_Baud38400

#define UART_BAUDRATE_BAUDRATE_Baud38400   (0x009D5000UL)

38400 baud (actual rate: 38462)

Definition at line 11518 of file nrf52_bitfields.h.

◆ UART_BAUDRATE_BAUDRATE_Baud460800

#define UART_BAUDRATE_BAUDRATE_Baud460800   (0x075F7000UL)

460800 baud (actual rate: 470588)

Definition at line 11524 of file nrf52_bitfields.h.

◆ UART_BAUDRATE_BAUDRATE_Baud4800

#define UART_BAUDRATE_BAUDRATE_Baud4800   (0x0013B000UL)

4800 baud (actual rate: 4808)

Definition at line 11513 of file nrf52_bitfields.h.

◆ UART_BAUDRATE_BAUDRATE_Baud57600

#define UART_BAUDRATE_BAUDRATE_Baud57600   (0x00EBF000UL)

57600 baud (actual rate: 57762)

Definition at line 11519 of file nrf52_bitfields.h.

◆ UART_BAUDRATE_BAUDRATE_Baud76800

#define UART_BAUDRATE_BAUDRATE_Baud76800   (0x013A9000UL)

76800 baud (actual rate: 76923)

Definition at line 11520 of file nrf52_bitfields.h.

◆ UART_BAUDRATE_BAUDRATE_Baud921600

#define UART_BAUDRATE_BAUDRATE_Baud921600   (0x0EBED000UL)

921600 baud (actual rate: 941176)

Definition at line 11525 of file nrf52_bitfields.h.

◆ UART_BAUDRATE_BAUDRATE_Baud9600

#define UART_BAUDRATE_BAUDRATE_Baud9600   (0x00275000UL)

9600 baud (actual rate: 9598)

Definition at line 11514 of file nrf52_bitfields.h.

◆ UART_BAUDRATE_BAUDRATE_Msk

#define UART_BAUDRATE_BAUDRATE_Msk   (0xFFFFFFFFUL << UART_BAUDRATE_BAUDRATE_Pos)

Bit mask of BAUDRATE field.

Definition at line 11510 of file nrf52_bitfields.h.

◆ UART_BAUDRATE_BAUDRATE_Pos

#define UART_BAUDRATE_BAUDRATE_Pos   (0UL)

Position of BAUDRATE field.

Definition at line 11509 of file nrf52_bitfields.h.

◆ UART_CONFIG_HWFC_Disabled

#define UART_CONFIG_HWFC_Disabled   (0UL)

Disabled

Definition at line 11540 of file nrf52_bitfields.h.

◆ UART_CONFIG_HWFC_Enabled

#define UART_CONFIG_HWFC_Enabled   (1UL)

Enabled

Definition at line 11541 of file nrf52_bitfields.h.

◆ UART_CONFIG_HWFC_Msk

#define UART_CONFIG_HWFC_Msk   (0x1UL << UART_CONFIG_HWFC_Pos)

Bit mask of HWFC field.

Definition at line 11539 of file nrf52_bitfields.h.

◆ UART_CONFIG_HWFC_Pos

#define UART_CONFIG_HWFC_Pos   (0UL)

Position of HWFC field.

Definition at line 11538 of file nrf52_bitfields.h.

◆ UART_CONFIG_PARITY_Excluded

#define UART_CONFIG_PARITY_Excluded   (0x0UL)

Exclude parity bit

Definition at line 11534 of file nrf52_bitfields.h.

◆ UART_CONFIG_PARITY_Included

#define UART_CONFIG_PARITY_Included   (0x7UL)

Include parity bit

Definition at line 11535 of file nrf52_bitfields.h.

◆ UART_CONFIG_PARITY_Msk

#define UART_CONFIG_PARITY_Msk   (0x7UL << UART_CONFIG_PARITY_Pos)

Bit mask of PARITY field.

Definition at line 11533 of file nrf52_bitfields.h.

◆ UART_CONFIG_PARITY_Pos

#define UART_CONFIG_PARITY_Pos   (1UL)

Position of PARITY field.

Definition at line 11532 of file nrf52_bitfields.h.

◆ UART_ENABLE_ENABLE_Disabled

#define UART_ENABLE_ENABLE_Disabled   (0UL)

Disable UART

Definition at line 11456 of file nrf52_bitfields.h.

◆ UART_ENABLE_ENABLE_Enabled

#define UART_ENABLE_ENABLE_Enabled   (4UL)

Enable UART

Definition at line 11457 of file nrf52_bitfields.h.

◆ UART_ENABLE_ENABLE_Msk

#define UART_ENABLE_ENABLE_Msk   (0xFUL << UART_ENABLE_ENABLE_Pos)

Bit mask of ENABLE field.

Definition at line 11455 of file nrf52_bitfields.h.

◆ UART_ENABLE_ENABLE_Pos

#define UART_ENABLE_ENABLE_Pos   (0UL)

Position of ENABLE field.

Definition at line 11454 of file nrf52_bitfields.h.

◆ UART_ERRORSRC_BREAK_Msk

#define UART_ERRORSRC_BREAK_Msk   (0x1UL << UART_ERRORSRC_BREAK_Pos)

Bit mask of BREAK field.

Definition at line 11428 of file nrf52_bitfields.h.

◆ UART_ERRORSRC_BREAK_NotPresent

#define UART_ERRORSRC_BREAK_NotPresent   (0UL)

Read: error not present

Definition at line 11429 of file nrf52_bitfields.h.

◆ UART_ERRORSRC_BREAK_Pos

#define UART_ERRORSRC_BREAK_Pos   (3UL)

Position of BREAK field.

Definition at line 11427 of file nrf52_bitfields.h.

◆ UART_ERRORSRC_BREAK_Present

#define UART_ERRORSRC_BREAK_Present   (1UL)

Read: error present

Definition at line 11430 of file nrf52_bitfields.h.

◆ UART_ERRORSRC_FRAMING_Msk

#define UART_ERRORSRC_FRAMING_Msk   (0x1UL << UART_ERRORSRC_FRAMING_Pos)

Bit mask of FRAMING field.

Definition at line 11434 of file nrf52_bitfields.h.

◆ UART_ERRORSRC_FRAMING_NotPresent

#define UART_ERRORSRC_FRAMING_NotPresent   (0UL)

Read: error not present

Definition at line 11435 of file nrf52_bitfields.h.

◆ UART_ERRORSRC_FRAMING_Pos

#define UART_ERRORSRC_FRAMING_Pos   (2UL)

Position of FRAMING field.

Definition at line 11433 of file nrf52_bitfields.h.

◆ UART_ERRORSRC_FRAMING_Present

#define UART_ERRORSRC_FRAMING_Present   (1UL)

Read: error present

Definition at line 11436 of file nrf52_bitfields.h.

◆ UART_ERRORSRC_OVERRUN_Msk

#define UART_ERRORSRC_OVERRUN_Msk   (0x1UL << UART_ERRORSRC_OVERRUN_Pos)

Bit mask of OVERRUN field.

Definition at line 11446 of file nrf52_bitfields.h.

◆ UART_ERRORSRC_OVERRUN_NotPresent

#define UART_ERRORSRC_OVERRUN_NotPresent   (0UL)

Read: error not present

Definition at line 11447 of file nrf52_bitfields.h.

◆ UART_ERRORSRC_OVERRUN_Pos

#define UART_ERRORSRC_OVERRUN_Pos   (0UL)

Position of OVERRUN field.

Definition at line 11445 of file nrf52_bitfields.h.

◆ UART_ERRORSRC_OVERRUN_Present

#define UART_ERRORSRC_OVERRUN_Present   (1UL)

Read: error present

Definition at line 11448 of file nrf52_bitfields.h.

◆ UART_ERRORSRC_PARITY_Msk

#define UART_ERRORSRC_PARITY_Msk   (0x1UL << UART_ERRORSRC_PARITY_Pos)

Bit mask of PARITY field.

Definition at line 11440 of file nrf52_bitfields.h.

◆ UART_ERRORSRC_PARITY_NotPresent

#define UART_ERRORSRC_PARITY_NotPresent   (0UL)

Read: error not present

Definition at line 11441 of file nrf52_bitfields.h.

◆ UART_ERRORSRC_PARITY_Pos

#define UART_ERRORSRC_PARITY_Pos   (1UL)

Position of PARITY field.

Definition at line 11439 of file nrf52_bitfields.h.

◆ UART_ERRORSRC_PARITY_Present

#define UART_ERRORSRC_PARITY_Present   (1UL)

Read: error present

Definition at line 11442 of file nrf52_bitfields.h.

◆ UART_INTENCLR_CTS_Clear

#define UART_INTENCLR_CTS_Clear   (1UL)

Disable

Definition at line 11421 of file nrf52_bitfields.h.

◆ UART_INTENCLR_CTS_Disabled

#define UART_INTENCLR_CTS_Disabled   (0UL)

Read: Disabled

Definition at line 11419 of file nrf52_bitfields.h.

◆ UART_INTENCLR_CTS_Enabled

#define UART_INTENCLR_CTS_Enabled   (1UL)

Read: Enabled

Definition at line 11420 of file nrf52_bitfields.h.

◆ UART_INTENCLR_CTS_Msk

#define UART_INTENCLR_CTS_Msk   (0x1UL << UART_INTENCLR_CTS_Pos)

Bit mask of CTS field.

Definition at line 11418 of file nrf52_bitfields.h.

◆ UART_INTENCLR_CTS_Pos

#define UART_INTENCLR_CTS_Pos   (0UL)

Position of CTS field.

Definition at line 11417 of file nrf52_bitfields.h.

◆ UART_INTENCLR_ERROR_Clear

#define UART_INTENCLR_ERROR_Clear   (1UL)

Disable

Definition at line 11393 of file nrf52_bitfields.h.

◆ UART_INTENCLR_ERROR_Disabled

#define UART_INTENCLR_ERROR_Disabled   (0UL)

Read: Disabled

Definition at line 11391 of file nrf52_bitfields.h.

◆ UART_INTENCLR_ERROR_Enabled

#define UART_INTENCLR_ERROR_Enabled   (1UL)

Read: Enabled

Definition at line 11392 of file nrf52_bitfields.h.

◆ UART_INTENCLR_ERROR_Msk

#define UART_INTENCLR_ERROR_Msk   (0x1UL << UART_INTENCLR_ERROR_Pos)

Bit mask of ERROR field.

Definition at line 11390 of file nrf52_bitfields.h.

◆ UART_INTENCLR_ERROR_Pos

#define UART_INTENCLR_ERROR_Pos   (9UL)

Position of ERROR field.

Definition at line 11389 of file nrf52_bitfields.h.

◆ UART_INTENCLR_NCTS_Clear

#define UART_INTENCLR_NCTS_Clear   (1UL)

Disable

Definition at line 11414 of file nrf52_bitfields.h.

◆ UART_INTENCLR_NCTS_Disabled

#define UART_INTENCLR_NCTS_Disabled   (0UL)

Read: Disabled

Definition at line 11412 of file nrf52_bitfields.h.

◆ UART_INTENCLR_NCTS_Enabled

#define UART_INTENCLR_NCTS_Enabled   (1UL)

Read: Enabled

Definition at line 11413 of file nrf52_bitfields.h.

◆ UART_INTENCLR_NCTS_Msk

#define UART_INTENCLR_NCTS_Msk   (0x1UL << UART_INTENCLR_NCTS_Pos)

Bit mask of NCTS field.

Definition at line 11411 of file nrf52_bitfields.h.

◆ UART_INTENCLR_NCTS_Pos

#define UART_INTENCLR_NCTS_Pos   (1UL)

Position of NCTS field.

Definition at line 11410 of file nrf52_bitfields.h.

◆ UART_INTENCLR_RXDRDY_Clear

#define UART_INTENCLR_RXDRDY_Clear   (1UL)

Disable

Definition at line 11407 of file nrf52_bitfields.h.

◆ UART_INTENCLR_RXDRDY_Disabled

#define UART_INTENCLR_RXDRDY_Disabled   (0UL)

Read: Disabled

Definition at line 11405 of file nrf52_bitfields.h.

◆ UART_INTENCLR_RXDRDY_Enabled

#define UART_INTENCLR_RXDRDY_Enabled   (1UL)

Read: Enabled

Definition at line 11406 of file nrf52_bitfields.h.

◆ UART_INTENCLR_RXDRDY_Msk

#define UART_INTENCLR_RXDRDY_Msk   (0x1UL << UART_INTENCLR_RXDRDY_Pos)

Bit mask of RXDRDY field.

Definition at line 11404 of file nrf52_bitfields.h.

◆ UART_INTENCLR_RXDRDY_Pos

#define UART_INTENCLR_RXDRDY_Pos   (2UL)

Position of RXDRDY field.

Definition at line 11403 of file nrf52_bitfields.h.

◆ UART_INTENCLR_RXTO_Clear

#define UART_INTENCLR_RXTO_Clear   (1UL)

Disable

Definition at line 11386 of file nrf52_bitfields.h.

◆ UART_INTENCLR_RXTO_Disabled

#define UART_INTENCLR_RXTO_Disabled   (0UL)

Read: Disabled

Definition at line 11384 of file nrf52_bitfields.h.

◆ UART_INTENCLR_RXTO_Enabled

#define UART_INTENCLR_RXTO_Enabled   (1UL)

Read: Enabled

Definition at line 11385 of file nrf52_bitfields.h.

◆ UART_INTENCLR_RXTO_Msk

#define UART_INTENCLR_RXTO_Msk   (0x1UL << UART_INTENCLR_RXTO_Pos)

Bit mask of RXTO field.

Definition at line 11383 of file nrf52_bitfields.h.

◆ UART_INTENCLR_RXTO_Pos

#define UART_INTENCLR_RXTO_Pos   (17UL)

Position of RXTO field.

Definition at line 11382 of file nrf52_bitfields.h.

◆ UART_INTENCLR_TXDRDY_Clear

#define UART_INTENCLR_TXDRDY_Clear   (1UL)

Disable

Definition at line 11400 of file nrf52_bitfields.h.

◆ UART_INTENCLR_TXDRDY_Disabled

#define UART_INTENCLR_TXDRDY_Disabled   (0UL)

Read: Disabled

Definition at line 11398 of file nrf52_bitfields.h.

◆ UART_INTENCLR_TXDRDY_Enabled

#define UART_INTENCLR_TXDRDY_Enabled   (1UL)

Read: Enabled

Definition at line 11399 of file nrf52_bitfields.h.

◆ UART_INTENCLR_TXDRDY_Msk

#define UART_INTENCLR_TXDRDY_Msk   (0x1UL << UART_INTENCLR_TXDRDY_Pos)

Bit mask of TXDRDY field.

Definition at line 11397 of file nrf52_bitfields.h.

◆ UART_INTENCLR_TXDRDY_Pos

#define UART_INTENCLR_TXDRDY_Pos   (7UL)

Position of TXDRDY field.

Definition at line 11396 of file nrf52_bitfields.h.

◆ UART_INTENSET_CTS_Disabled

#define UART_INTENSET_CTS_Disabled   (0UL)

Read: Disabled

Definition at line 11374 of file nrf52_bitfields.h.

◆ UART_INTENSET_CTS_Enabled

#define UART_INTENSET_CTS_Enabled   (1UL)

Read: Enabled

Definition at line 11375 of file nrf52_bitfields.h.

◆ UART_INTENSET_CTS_Msk

#define UART_INTENSET_CTS_Msk   (0x1UL << UART_INTENSET_CTS_Pos)

Bit mask of CTS field.

Definition at line 11373 of file nrf52_bitfields.h.

◆ UART_INTENSET_CTS_Pos

#define UART_INTENSET_CTS_Pos   (0UL)

Position of CTS field.

Definition at line 11372 of file nrf52_bitfields.h.

◆ UART_INTENSET_CTS_Set

#define UART_INTENSET_CTS_Set   (1UL)

Enable

Definition at line 11376 of file nrf52_bitfields.h.

◆ UART_INTENSET_ERROR_Disabled

#define UART_INTENSET_ERROR_Disabled   (0UL)

Read: Disabled

Definition at line 11346 of file nrf52_bitfields.h.

◆ UART_INTENSET_ERROR_Enabled

#define UART_INTENSET_ERROR_Enabled   (1UL)

Read: Enabled

Definition at line 11347 of file nrf52_bitfields.h.

◆ UART_INTENSET_ERROR_Msk

#define UART_INTENSET_ERROR_Msk   (0x1UL << UART_INTENSET_ERROR_Pos)

Bit mask of ERROR field.

Definition at line 11345 of file nrf52_bitfields.h.

◆ UART_INTENSET_ERROR_Pos

#define UART_INTENSET_ERROR_Pos   (9UL)

Position of ERROR field.

Definition at line 11344 of file nrf52_bitfields.h.

◆ UART_INTENSET_ERROR_Set

#define UART_INTENSET_ERROR_Set   (1UL)

Enable

Definition at line 11348 of file nrf52_bitfields.h.

◆ UART_INTENSET_NCTS_Disabled

#define UART_INTENSET_NCTS_Disabled   (0UL)

Read: Disabled

Definition at line 11367 of file nrf52_bitfields.h.

◆ UART_INTENSET_NCTS_Enabled

#define UART_INTENSET_NCTS_Enabled   (1UL)

Read: Enabled

Definition at line 11368 of file nrf52_bitfields.h.

◆ UART_INTENSET_NCTS_Msk

#define UART_INTENSET_NCTS_Msk   (0x1UL << UART_INTENSET_NCTS_Pos)

Bit mask of NCTS field.

Definition at line 11366 of file nrf52_bitfields.h.

◆ UART_INTENSET_NCTS_Pos

#define UART_INTENSET_NCTS_Pos   (1UL)

Position of NCTS field.

Definition at line 11365 of file nrf52_bitfields.h.

◆ UART_INTENSET_NCTS_Set

#define UART_INTENSET_NCTS_Set   (1UL)

Enable

Definition at line 11369 of file nrf52_bitfields.h.

◆ UART_INTENSET_RXDRDY_Disabled

#define UART_INTENSET_RXDRDY_Disabled   (0UL)

Read: Disabled

Definition at line 11360 of file nrf52_bitfields.h.

◆ UART_INTENSET_RXDRDY_Enabled

#define UART_INTENSET_RXDRDY_Enabled   (1UL)

Read: Enabled

Definition at line 11361 of file nrf52_bitfields.h.

◆ UART_INTENSET_RXDRDY_Msk

#define UART_INTENSET_RXDRDY_Msk   (0x1UL << UART_INTENSET_RXDRDY_Pos)

Bit mask of RXDRDY field.

Definition at line 11359 of file nrf52_bitfields.h.

◆ UART_INTENSET_RXDRDY_Pos

#define UART_INTENSET_RXDRDY_Pos   (2UL)

Position of RXDRDY field.

Definition at line 11358 of file nrf52_bitfields.h.

◆ UART_INTENSET_RXDRDY_Set

#define UART_INTENSET_RXDRDY_Set   (1UL)

Enable

Definition at line 11362 of file nrf52_bitfields.h.

◆ UART_INTENSET_RXTO_Disabled

#define UART_INTENSET_RXTO_Disabled   (0UL)

Read: Disabled

Definition at line 11339 of file nrf52_bitfields.h.

◆ UART_INTENSET_RXTO_Enabled

#define UART_INTENSET_RXTO_Enabled   (1UL)

Read: Enabled

Definition at line 11340 of file nrf52_bitfields.h.

◆ UART_INTENSET_RXTO_Msk

#define UART_INTENSET_RXTO_Msk   (0x1UL << UART_INTENSET_RXTO_Pos)

Bit mask of RXTO field.

Definition at line 11338 of file nrf52_bitfields.h.

◆ UART_INTENSET_RXTO_Pos

#define UART_INTENSET_RXTO_Pos   (17UL)

Position of RXTO field.

Definition at line 11337 of file nrf52_bitfields.h.

◆ UART_INTENSET_RXTO_Set

#define UART_INTENSET_RXTO_Set   (1UL)

Enable

Definition at line 11341 of file nrf52_bitfields.h.

◆ UART_INTENSET_TXDRDY_Disabled

#define UART_INTENSET_TXDRDY_Disabled   (0UL)

Read: Disabled

Definition at line 11353 of file nrf52_bitfields.h.

◆ UART_INTENSET_TXDRDY_Enabled

#define UART_INTENSET_TXDRDY_Enabled   (1UL)

Read: Enabled

Definition at line 11354 of file nrf52_bitfields.h.

◆ UART_INTENSET_TXDRDY_Msk

#define UART_INTENSET_TXDRDY_Msk   (0x1UL << UART_INTENSET_TXDRDY_Pos)

Bit mask of TXDRDY field.

Definition at line 11352 of file nrf52_bitfields.h.

◆ UART_INTENSET_TXDRDY_Pos

#define UART_INTENSET_TXDRDY_Pos   (7UL)

Position of TXDRDY field.

Definition at line 11351 of file nrf52_bitfields.h.

◆ UART_INTENSET_TXDRDY_Set

#define UART_INTENSET_TXDRDY_Set   (1UL)

Enable

Definition at line 11355 of file nrf52_bitfields.h.

◆ UART_PSELCTS_PSELCTS_Disconnected

#define UART_PSELCTS_PSELCTS_Disconnected   (0xFFFFFFFFUL)

Disconnect

Definition at line 11481 of file nrf52_bitfields.h.

◆ UART_PSELCTS_PSELCTS_Msk

#define UART_PSELCTS_PSELCTS_Msk   (0xFFFFFFFFUL << UART_PSELCTS_PSELCTS_Pos)

Bit mask of PSELCTS field.

Definition at line 11480 of file nrf52_bitfields.h.

◆ UART_PSELCTS_PSELCTS_Pos

#define UART_PSELCTS_PSELCTS_Pos   (0UL)

Position of PSELCTS field.

Definition at line 11479 of file nrf52_bitfields.h.

◆ UART_PSELRTS_PSELRTS_Disconnected

#define UART_PSELRTS_PSELRTS_Disconnected   (0xFFFFFFFFUL)

Disconnect

Definition at line 11465 of file nrf52_bitfields.h.

◆ UART_PSELRTS_PSELRTS_Msk

#define UART_PSELRTS_PSELRTS_Msk   (0xFFFFFFFFUL << UART_PSELRTS_PSELRTS_Pos)

Bit mask of PSELRTS field.

Definition at line 11464 of file nrf52_bitfields.h.

◆ UART_PSELRTS_PSELRTS_Pos

#define UART_PSELRTS_PSELRTS_Pos   (0UL)

Position of PSELRTS field.

Definition at line 11463 of file nrf52_bitfields.h.

◆ UART_PSELRXD_PSELRXD_Disconnected

#define UART_PSELRXD_PSELRXD_Disconnected   (0xFFFFFFFFUL)

Disconnect

Definition at line 11489 of file nrf52_bitfields.h.

◆ UART_PSELRXD_PSELRXD_Msk

#define UART_PSELRXD_PSELRXD_Msk   (0xFFFFFFFFUL << UART_PSELRXD_PSELRXD_Pos)

Bit mask of PSELRXD field.

Definition at line 11488 of file nrf52_bitfields.h.

◆ UART_PSELRXD_PSELRXD_Pos

#define UART_PSELRXD_PSELRXD_Pos   (0UL)

Position of PSELRXD field.

Definition at line 11487 of file nrf52_bitfields.h.

◆ UART_PSELTXD_PSELTXD_Disconnected

#define UART_PSELTXD_PSELTXD_Disconnected   (0xFFFFFFFFUL)

Disconnect

Definition at line 11473 of file nrf52_bitfields.h.

◆ UART_PSELTXD_PSELTXD_Msk

#define UART_PSELTXD_PSELTXD_Msk   (0xFFFFFFFFUL << UART_PSELTXD_PSELTXD_Pos)

Bit mask of PSELTXD field.

Definition at line 11472 of file nrf52_bitfields.h.

◆ UART_PSELTXD_PSELTXD_Pos

#define UART_PSELTXD_PSELTXD_Pos   (0UL)

Position of PSELTXD field.

Definition at line 11471 of file nrf52_bitfields.h.

◆ UART_RXD_RXD_Msk

#define UART_RXD_RXD_Msk   (0xFFUL << UART_RXD_RXD_Pos)

Bit mask of RXD field.

Definition at line 11496 of file nrf52_bitfields.h.

◆ UART_RXD_RXD_Pos

#define UART_RXD_RXD_Pos   (0UL)

Position of RXD field.

Definition at line 11495 of file nrf52_bitfields.h.

◆ UART_SHORTS_CTS_STARTRX_Disabled

#define UART_SHORTS_CTS_STARTRX_Disabled   (0UL)

Disable shortcut

Definition at line 11330 of file nrf52_bitfields.h.

◆ UART_SHORTS_CTS_STARTRX_Enabled

#define UART_SHORTS_CTS_STARTRX_Enabled   (1UL)

Enable shortcut

Definition at line 11331 of file nrf52_bitfields.h.

◆ UART_SHORTS_CTS_STARTRX_Msk

#define UART_SHORTS_CTS_STARTRX_Msk   (0x1UL << UART_SHORTS_CTS_STARTRX_Pos)

Bit mask of CTS_STARTRX field.

Definition at line 11329 of file nrf52_bitfields.h.

◆ UART_SHORTS_CTS_STARTRX_Pos

#define UART_SHORTS_CTS_STARTRX_Pos   (3UL)

Position of CTS_STARTRX field.

Definition at line 11328 of file nrf52_bitfields.h.

◆ UART_SHORTS_NCTS_STOPRX_Disabled

#define UART_SHORTS_NCTS_STOPRX_Disabled   (0UL)

Disable shortcut

Definition at line 11324 of file nrf52_bitfields.h.

◆ UART_SHORTS_NCTS_STOPRX_Enabled

#define UART_SHORTS_NCTS_STOPRX_Enabled   (1UL)

Enable shortcut

Definition at line 11325 of file nrf52_bitfields.h.

◆ UART_SHORTS_NCTS_STOPRX_Msk

#define UART_SHORTS_NCTS_STOPRX_Msk   (0x1UL << UART_SHORTS_NCTS_STOPRX_Pos)

Bit mask of NCTS_STOPRX field.

Definition at line 11323 of file nrf52_bitfields.h.

◆ UART_SHORTS_NCTS_STOPRX_Pos

#define UART_SHORTS_NCTS_STOPRX_Pos   (4UL)

Position of NCTS_STOPRX field.

Definition at line 11322 of file nrf52_bitfields.h.

◆ UART_TXD_TXD_Msk

#define UART_TXD_TXD_Msk   (0xFFUL << UART_TXD_TXD_Pos)

Bit mask of TXD field.

Definition at line 11503 of file nrf52_bitfields.h.

◆ UART_TXD_TXD_Pos

#define UART_TXD_TXD_Pos   (0UL)

Position of TXD field.

Definition at line 11502 of file nrf52_bitfields.h.

◆ UARTE_BAUDRATE_BAUDRATE_Baud115200

#define UARTE_BAUDRATE_BAUDRATE_Baud115200   (0x01D60000UL)

115200 baud (actual rate: 115108)

Definition at line 11855 of file nrf52_bitfields.h.

◆ UARTE_BAUDRATE_BAUDRATE_Baud1200

#define UARTE_BAUDRATE_BAUDRATE_Baud1200   (0x0004F000UL)

1200 baud (actual rate: 1205)

Definition at line 11845 of file nrf52_bitfields.h.

◆ UARTE_BAUDRATE_BAUDRATE_Baud14400

#define UARTE_BAUDRATE_BAUDRATE_Baud14400   (0x003AF000UL)

14400 baud (actual rate: 14401)

Definition at line 11849 of file nrf52_bitfields.h.

◆ UARTE_BAUDRATE_BAUDRATE_Baud19200

#define UARTE_BAUDRATE_BAUDRATE_Baud19200   (0x004EA000UL)

19200 baud (actual rate: 19208)

Definition at line 11850 of file nrf52_bitfields.h.

◆ UARTE_BAUDRATE_BAUDRATE_Baud1M

#define UARTE_BAUDRATE_BAUDRATE_Baud1M   (0x10000000UL)

1Mega baud

Definition at line 11860 of file nrf52_bitfields.h.

◆ UARTE_BAUDRATE_BAUDRATE_Baud230400

#define UARTE_BAUDRATE_BAUDRATE_Baud230400   (0x03B00000UL)

230400 baud (actual rate: 231884)

Definition at line 11856 of file nrf52_bitfields.h.

◆ UARTE_BAUDRATE_BAUDRATE_Baud2400

#define UARTE_BAUDRATE_BAUDRATE_Baud2400   (0x0009D000UL)

2400 baud (actual rate: 2396)

Definition at line 11846 of file nrf52_bitfields.h.

◆ UARTE_BAUDRATE_BAUDRATE_Baud250000

#define UARTE_BAUDRATE_BAUDRATE_Baud250000   (0x04000000UL)

250000 baud

Definition at line 11857 of file nrf52_bitfields.h.

◆ UARTE_BAUDRATE_BAUDRATE_Baud28800

#define UARTE_BAUDRATE_BAUDRATE_Baud28800   (0x0075C000UL)

28800 baud (actual rate: 28777)

Definition at line 11851 of file nrf52_bitfields.h.

◆ UARTE_BAUDRATE_BAUDRATE_Baud38400

#define UARTE_BAUDRATE_BAUDRATE_Baud38400   (0x009D0000UL)

38400 baud (actual rate: 38369)

Definition at line 11852 of file nrf52_bitfields.h.

◆ UARTE_BAUDRATE_BAUDRATE_Baud460800

#define UARTE_BAUDRATE_BAUDRATE_Baud460800   (0x07400000UL)

460800 baud (actual rate: 457143)

Definition at line 11858 of file nrf52_bitfields.h.

◆ UARTE_BAUDRATE_BAUDRATE_Baud4800

#define UARTE_BAUDRATE_BAUDRATE_Baud4800   (0x0013B000UL)

4800 baud (actual rate: 4808)

Definition at line 11847 of file nrf52_bitfields.h.

◆ UARTE_BAUDRATE_BAUDRATE_Baud57600

#define UARTE_BAUDRATE_BAUDRATE_Baud57600   (0x00EB0000UL)

57600 baud (actual rate: 57554)

Definition at line 11853 of file nrf52_bitfields.h.

◆ UARTE_BAUDRATE_BAUDRATE_Baud76800

#define UARTE_BAUDRATE_BAUDRATE_Baud76800   (0x013A9000UL)

76800 baud (actual rate: 76923)

Definition at line 11854 of file nrf52_bitfields.h.

◆ UARTE_BAUDRATE_BAUDRATE_Baud921600

#define UARTE_BAUDRATE_BAUDRATE_Baud921600   (0x0F000000UL)

921600 baud (actual rate: 941176)

Definition at line 11859 of file nrf52_bitfields.h.

◆ UARTE_BAUDRATE_BAUDRATE_Baud9600

#define UARTE_BAUDRATE_BAUDRATE_Baud9600   (0x00275000UL)

9600 baud (actual rate: 9598)

Definition at line 11848 of file nrf52_bitfields.h.

◆ UARTE_BAUDRATE_BAUDRATE_Msk

#define UARTE_BAUDRATE_BAUDRATE_Msk   (0xFFFFFFFFUL << UARTE_BAUDRATE_BAUDRATE_Pos)

Bit mask of BAUDRATE field.

Definition at line 11844 of file nrf52_bitfields.h.

◆ UARTE_BAUDRATE_BAUDRATE_Pos

#define UARTE_BAUDRATE_BAUDRATE_Pos   (0UL)

Position of BAUDRATE field.

Definition at line 11843 of file nrf52_bitfields.h.

◆ UARTE_CONFIG_HWFC_Disabled

#define UARTE_CONFIG_HWFC_Disabled   (0UL)

Disabled

Definition at line 11916 of file nrf52_bitfields.h.

◆ UARTE_CONFIG_HWFC_Enabled

#define UARTE_CONFIG_HWFC_Enabled   (1UL)

Enabled

Definition at line 11917 of file nrf52_bitfields.h.

◆ UARTE_CONFIG_HWFC_Msk

#define UARTE_CONFIG_HWFC_Msk   (0x1UL << UARTE_CONFIG_HWFC_Pos)

Bit mask of HWFC field.

Definition at line 11915 of file nrf52_bitfields.h.

◆ UARTE_CONFIG_HWFC_Pos

#define UARTE_CONFIG_HWFC_Pos   (0UL)

Position of HWFC field.

Definition at line 11914 of file nrf52_bitfields.h.

◆ UARTE_CONFIG_PARITY_Excluded

#define UARTE_CONFIG_PARITY_Excluded   (0x0UL)

Exclude parity bit

Definition at line 11910 of file nrf52_bitfields.h.

◆ UARTE_CONFIG_PARITY_Included

#define UARTE_CONFIG_PARITY_Included   (0x7UL)

Include parity bit

Definition at line 11911 of file nrf52_bitfields.h.

◆ UARTE_CONFIG_PARITY_Msk

#define UARTE_CONFIG_PARITY_Msk   (0x7UL << UARTE_CONFIG_PARITY_Pos)

Bit mask of PARITY field.

Definition at line 11909 of file nrf52_bitfields.h.

◆ UARTE_CONFIG_PARITY_Pos

#define UARTE_CONFIG_PARITY_Pos   (1UL)

Position of PARITY field.

Definition at line 11908 of file nrf52_bitfields.h.

◆ UARTE_ENABLE_ENABLE_Disabled

#define UARTE_ENABLE_ENABLE_Disabled   (0UL)

Disable UARTE

Definition at line 11784 of file nrf52_bitfields.h.

◆ UARTE_ENABLE_ENABLE_Enabled

#define UARTE_ENABLE_ENABLE_Enabled   (8UL)

Enable UARTE

Definition at line 11785 of file nrf52_bitfields.h.

◆ UARTE_ENABLE_ENABLE_Msk

#define UARTE_ENABLE_ENABLE_Msk   (0xFUL << UARTE_ENABLE_ENABLE_Pos)

Bit mask of ENABLE field.

Definition at line 11783 of file nrf52_bitfields.h.

◆ UARTE_ENABLE_ENABLE_Pos

#define UARTE_ENABLE_ENABLE_Pos   (0UL)

Position of ENABLE field.

Definition at line 11782 of file nrf52_bitfields.h.

◆ UARTE_ERRORSRC_BREAK_Msk

#define UARTE_ERRORSRC_BREAK_Msk   (0x1UL << UARTE_ERRORSRC_BREAK_Pos)

Bit mask of BREAK field.

Definition at line 11756 of file nrf52_bitfields.h.

◆ UARTE_ERRORSRC_BREAK_NotPresent

#define UARTE_ERRORSRC_BREAK_NotPresent   (0UL)

Read: error not present

Definition at line 11757 of file nrf52_bitfields.h.

◆ UARTE_ERRORSRC_BREAK_Pos

#define UARTE_ERRORSRC_BREAK_Pos   (3UL)

Position of BREAK field.

Definition at line 11755 of file nrf52_bitfields.h.

◆ UARTE_ERRORSRC_BREAK_Present

#define UARTE_ERRORSRC_BREAK_Present   (1UL)

Read: error present

Definition at line 11758 of file nrf52_bitfields.h.

◆ UARTE_ERRORSRC_FRAMING_Msk

#define UARTE_ERRORSRC_FRAMING_Msk   (0x1UL << UARTE_ERRORSRC_FRAMING_Pos)

Bit mask of FRAMING field.

Definition at line 11762 of file nrf52_bitfields.h.

◆ UARTE_ERRORSRC_FRAMING_NotPresent

#define UARTE_ERRORSRC_FRAMING_NotPresent   (0UL)

Read: error not present

Definition at line 11763 of file nrf52_bitfields.h.

◆ UARTE_ERRORSRC_FRAMING_Pos

#define UARTE_ERRORSRC_FRAMING_Pos   (2UL)

Position of FRAMING field.

Definition at line 11761 of file nrf52_bitfields.h.

◆ UARTE_ERRORSRC_FRAMING_Present

#define UARTE_ERRORSRC_FRAMING_Present   (1UL)

Read: error present

Definition at line 11764 of file nrf52_bitfields.h.

◆ UARTE_ERRORSRC_OVERRUN_Msk

#define UARTE_ERRORSRC_OVERRUN_Msk   (0x1UL << UARTE_ERRORSRC_OVERRUN_Pos)

Bit mask of OVERRUN field.

Definition at line 11774 of file nrf52_bitfields.h.

◆ UARTE_ERRORSRC_OVERRUN_NotPresent

#define UARTE_ERRORSRC_OVERRUN_NotPresent   (0UL)

Read: error not present

Definition at line 11775 of file nrf52_bitfields.h.

◆ UARTE_ERRORSRC_OVERRUN_Pos

#define UARTE_ERRORSRC_OVERRUN_Pos   (0UL)

Position of OVERRUN field.

Definition at line 11773 of file nrf52_bitfields.h.

◆ UARTE_ERRORSRC_OVERRUN_Present

#define UARTE_ERRORSRC_OVERRUN_Present   (1UL)

Read: error present

Definition at line 11776 of file nrf52_bitfields.h.

◆ UARTE_ERRORSRC_PARITY_Msk

#define UARTE_ERRORSRC_PARITY_Msk   (0x1UL << UARTE_ERRORSRC_PARITY_Pos)

Bit mask of PARITY field.

Definition at line 11768 of file nrf52_bitfields.h.

◆ UARTE_ERRORSRC_PARITY_NotPresent

#define UARTE_ERRORSRC_PARITY_NotPresent   (0UL)

Read: error not present

Definition at line 11769 of file nrf52_bitfields.h.

◆ UARTE_ERRORSRC_PARITY_Pos

#define UARTE_ERRORSRC_PARITY_Pos   (1UL)

Position of PARITY field.

Definition at line 11767 of file nrf52_bitfields.h.

◆ UARTE_ERRORSRC_PARITY_Present

#define UARTE_ERRORSRC_PARITY_Present   (1UL)

Read: error present

Definition at line 11770 of file nrf52_bitfields.h.

◆ UARTE_INTEN_CTS_Disabled

#define UARTE_INTEN_CTS_Disabled   (0UL)

Disable

Definition at line 11616 of file nrf52_bitfields.h.

◆ UARTE_INTEN_CTS_Enabled

#define UARTE_INTEN_CTS_Enabled   (1UL)

Enable

Definition at line 11617 of file nrf52_bitfields.h.

◆ UARTE_INTEN_CTS_Msk

#define UARTE_INTEN_CTS_Msk   (0x1UL << UARTE_INTEN_CTS_Pos)

Bit mask of CTS field.

Definition at line 11615 of file nrf52_bitfields.h.

◆ UARTE_INTEN_CTS_Pos

#define UARTE_INTEN_CTS_Pos   (0UL)

Position of CTS field.

Definition at line 11614 of file nrf52_bitfields.h.

◆ UARTE_INTEN_ENDRX_Disabled

#define UARTE_INTEN_ENDRX_Disabled   (0UL)

Disable

Definition at line 11604 of file nrf52_bitfields.h.

◆ UARTE_INTEN_ENDRX_Enabled

#define UARTE_INTEN_ENDRX_Enabled   (1UL)

Enable

Definition at line 11605 of file nrf52_bitfields.h.

◆ UARTE_INTEN_ENDRX_Msk

#define UARTE_INTEN_ENDRX_Msk   (0x1UL << UARTE_INTEN_ENDRX_Pos)

Bit mask of ENDRX field.

Definition at line 11603 of file nrf52_bitfields.h.

◆ UARTE_INTEN_ENDRX_Pos

#define UARTE_INTEN_ENDRX_Pos   (4UL)

Position of ENDRX field.

Definition at line 11602 of file nrf52_bitfields.h.

◆ UARTE_INTEN_ENDTX_Disabled

#define UARTE_INTEN_ENDTX_Disabled   (0UL)

Disable

Definition at line 11598 of file nrf52_bitfields.h.

◆ UARTE_INTEN_ENDTX_Enabled

#define UARTE_INTEN_ENDTX_Enabled   (1UL)

Enable

Definition at line 11599 of file nrf52_bitfields.h.

◆ UARTE_INTEN_ENDTX_Msk

#define UARTE_INTEN_ENDTX_Msk   (0x1UL << UARTE_INTEN_ENDTX_Pos)

Bit mask of ENDTX field.

Definition at line 11597 of file nrf52_bitfields.h.

◆ UARTE_INTEN_ENDTX_Pos

#define UARTE_INTEN_ENDTX_Pos   (8UL)

Position of ENDTX field.

Definition at line 11596 of file nrf52_bitfields.h.

◆ UARTE_INTEN_ERROR_Disabled

#define UARTE_INTEN_ERROR_Disabled   (0UL)

Disable

Definition at line 11592 of file nrf52_bitfields.h.

◆ UARTE_INTEN_ERROR_Enabled

#define UARTE_INTEN_ERROR_Enabled   (1UL)

Enable

Definition at line 11593 of file nrf52_bitfields.h.

◆ UARTE_INTEN_ERROR_Msk

#define UARTE_INTEN_ERROR_Msk   (0x1UL << UARTE_INTEN_ERROR_Pos)

Bit mask of ERROR field.

Definition at line 11591 of file nrf52_bitfields.h.

◆ UARTE_INTEN_ERROR_Pos

#define UARTE_INTEN_ERROR_Pos   (9UL)

Position of ERROR field.

Definition at line 11590 of file nrf52_bitfields.h.

◆ UARTE_INTEN_NCTS_Disabled

#define UARTE_INTEN_NCTS_Disabled   (0UL)

Disable

Definition at line 11610 of file nrf52_bitfields.h.

◆ UARTE_INTEN_NCTS_Enabled

#define UARTE_INTEN_NCTS_Enabled   (1UL)

Enable

Definition at line 11611 of file nrf52_bitfields.h.

◆ UARTE_INTEN_NCTS_Msk

#define UARTE_INTEN_NCTS_Msk   (0x1UL << UARTE_INTEN_NCTS_Pos)

Bit mask of NCTS field.

Definition at line 11609 of file nrf52_bitfields.h.

◆ UARTE_INTEN_NCTS_Pos

#define UARTE_INTEN_NCTS_Pos   (1UL)

Position of NCTS field.

Definition at line 11608 of file nrf52_bitfields.h.

◆ UARTE_INTEN_RXSTARTED_Disabled

#define UARTE_INTEN_RXSTARTED_Disabled   (0UL)

Disable

Definition at line 11580 of file nrf52_bitfields.h.

◆ UARTE_INTEN_RXSTARTED_Enabled

#define UARTE_INTEN_RXSTARTED_Enabled   (1UL)

Enable

Definition at line 11581 of file nrf52_bitfields.h.

◆ UARTE_INTEN_RXSTARTED_Msk

#define UARTE_INTEN_RXSTARTED_Msk   (0x1UL << UARTE_INTEN_RXSTARTED_Pos)

Bit mask of RXSTARTED field.

Definition at line 11579 of file nrf52_bitfields.h.

◆ UARTE_INTEN_RXSTARTED_Pos

#define UARTE_INTEN_RXSTARTED_Pos   (19UL)

Position of RXSTARTED field.

Definition at line 11578 of file nrf52_bitfields.h.

◆ UARTE_INTEN_RXTO_Disabled

#define UARTE_INTEN_RXTO_Disabled   (0UL)

Disable

Definition at line 11586 of file nrf52_bitfields.h.

◆ UARTE_INTEN_RXTO_Enabled

#define UARTE_INTEN_RXTO_Enabled   (1UL)

Enable

Definition at line 11587 of file nrf52_bitfields.h.

◆ UARTE_INTEN_RXTO_Msk

#define UARTE_INTEN_RXTO_Msk   (0x1UL << UARTE_INTEN_RXTO_Pos)

Bit mask of RXTO field.

Definition at line 11585 of file nrf52_bitfields.h.

◆ UARTE_INTEN_RXTO_Pos

#define UARTE_INTEN_RXTO_Pos   (17UL)

Position of RXTO field.

Definition at line 11584 of file nrf52_bitfields.h.

◆ UARTE_INTEN_TXSTARTED_Disabled

#define UARTE_INTEN_TXSTARTED_Disabled   (0UL)

Disable

Definition at line 11574 of file nrf52_bitfields.h.

◆ UARTE_INTEN_TXSTARTED_Enabled

#define UARTE_INTEN_TXSTARTED_Enabled   (1UL)

Enable

Definition at line 11575 of file nrf52_bitfields.h.

◆ UARTE_INTEN_TXSTARTED_Msk

#define UARTE_INTEN_TXSTARTED_Msk   (0x1UL << UARTE_INTEN_TXSTARTED_Pos)

Bit mask of TXSTARTED field.

Definition at line 11573 of file nrf52_bitfields.h.

◆ UARTE_INTEN_TXSTARTED_Pos

#define UARTE_INTEN_TXSTARTED_Pos   (20UL)

Position of TXSTARTED field.

Definition at line 11572 of file nrf52_bitfields.h.

◆ UARTE_INTEN_TXSTOPPED_Disabled

#define UARTE_INTEN_TXSTOPPED_Disabled   (0UL)

Disable

Definition at line 11568 of file nrf52_bitfields.h.

◆ UARTE_INTEN_TXSTOPPED_Enabled

#define UARTE_INTEN_TXSTOPPED_Enabled   (1UL)

Enable

Definition at line 11569 of file nrf52_bitfields.h.

◆ UARTE_INTEN_TXSTOPPED_Msk

#define UARTE_INTEN_TXSTOPPED_Msk   (0x1UL << UARTE_INTEN_TXSTOPPED_Pos)

Bit mask of TXSTOPPED field.

Definition at line 11567 of file nrf52_bitfields.h.

◆ UARTE_INTEN_TXSTOPPED_Pos

#define UARTE_INTEN_TXSTOPPED_Pos   (22UL)

Position of TXSTOPPED field.

Definition at line 11566 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_CTS_Clear

#define UARTE_INTENCLR_CTS_Clear   (1UL)

Disable

Definition at line 11749 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_CTS_Disabled

#define UARTE_INTENCLR_CTS_Disabled   (0UL)

Read: Disabled

Definition at line 11747 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_CTS_Enabled

#define UARTE_INTENCLR_CTS_Enabled   (1UL)

Read: Enabled

Definition at line 11748 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_CTS_Msk

#define UARTE_INTENCLR_CTS_Msk   (0x1UL << UARTE_INTENCLR_CTS_Pos)

Bit mask of CTS field.

Definition at line 11746 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_CTS_Pos

#define UARTE_INTENCLR_CTS_Pos   (0UL)

Position of CTS field.

Definition at line 11745 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_ENDRX_Clear

#define UARTE_INTENCLR_ENDRX_Clear   (1UL)

Disable

Definition at line 11735 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_ENDRX_Disabled

#define UARTE_INTENCLR_ENDRX_Disabled   (0UL)

Read: Disabled

Definition at line 11733 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_ENDRX_Enabled

#define UARTE_INTENCLR_ENDRX_Enabled   (1UL)

Read: Enabled

Definition at line 11734 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_ENDRX_Msk

#define UARTE_INTENCLR_ENDRX_Msk   (0x1UL << UARTE_INTENCLR_ENDRX_Pos)

Bit mask of ENDRX field.

Definition at line 11732 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_ENDRX_Pos

#define UARTE_INTENCLR_ENDRX_Pos   (4UL)

Position of ENDRX field.

Definition at line 11731 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_ENDTX_Clear

#define UARTE_INTENCLR_ENDTX_Clear   (1UL)

Disable

Definition at line 11728 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_ENDTX_Disabled

#define UARTE_INTENCLR_ENDTX_Disabled   (0UL)

Read: Disabled

Definition at line 11726 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_ENDTX_Enabled

#define UARTE_INTENCLR_ENDTX_Enabled   (1UL)

Read: Enabled

Definition at line 11727 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_ENDTX_Msk

#define UARTE_INTENCLR_ENDTX_Msk   (0x1UL << UARTE_INTENCLR_ENDTX_Pos)

Bit mask of ENDTX field.

Definition at line 11725 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_ENDTX_Pos

#define UARTE_INTENCLR_ENDTX_Pos   (8UL)

Position of ENDTX field.

Definition at line 11724 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_ERROR_Clear

#define UARTE_INTENCLR_ERROR_Clear   (1UL)

Disable

Definition at line 11721 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_ERROR_Disabled

#define UARTE_INTENCLR_ERROR_Disabled   (0UL)

Read: Disabled

Definition at line 11719 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_ERROR_Enabled

#define UARTE_INTENCLR_ERROR_Enabled   (1UL)

Read: Enabled

Definition at line 11720 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_ERROR_Msk

#define UARTE_INTENCLR_ERROR_Msk   (0x1UL << UARTE_INTENCLR_ERROR_Pos)

Bit mask of ERROR field.

Definition at line 11718 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_ERROR_Pos

#define UARTE_INTENCLR_ERROR_Pos   (9UL)

Position of ERROR field.

Definition at line 11717 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_NCTS_Clear

#define UARTE_INTENCLR_NCTS_Clear   (1UL)

Disable

Definition at line 11742 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_NCTS_Disabled

#define UARTE_INTENCLR_NCTS_Disabled   (0UL)

Read: Disabled

Definition at line 11740 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_NCTS_Enabled

#define UARTE_INTENCLR_NCTS_Enabled   (1UL)

Read: Enabled

Definition at line 11741 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_NCTS_Msk

#define UARTE_INTENCLR_NCTS_Msk   (0x1UL << UARTE_INTENCLR_NCTS_Pos)

Bit mask of NCTS field.

Definition at line 11739 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_NCTS_Pos

#define UARTE_INTENCLR_NCTS_Pos   (1UL)

Position of NCTS field.

Definition at line 11738 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_RXSTARTED_Clear

#define UARTE_INTENCLR_RXSTARTED_Clear   (1UL)

Disable

Definition at line 11707 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_RXSTARTED_Disabled

#define UARTE_INTENCLR_RXSTARTED_Disabled   (0UL)

Read: Disabled

Definition at line 11705 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_RXSTARTED_Enabled

#define UARTE_INTENCLR_RXSTARTED_Enabled   (1UL)

Read: Enabled

Definition at line 11706 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_RXSTARTED_Msk

#define UARTE_INTENCLR_RXSTARTED_Msk   (0x1UL << UARTE_INTENCLR_RXSTARTED_Pos)

Bit mask of RXSTARTED field.

Definition at line 11704 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_RXSTARTED_Pos

#define UARTE_INTENCLR_RXSTARTED_Pos   (19UL)

Position of RXSTARTED field.

Definition at line 11703 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_RXTO_Clear

#define UARTE_INTENCLR_RXTO_Clear   (1UL)

Disable

Definition at line 11714 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_RXTO_Disabled

#define UARTE_INTENCLR_RXTO_Disabled   (0UL)

Read: Disabled

Definition at line 11712 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_RXTO_Enabled

#define UARTE_INTENCLR_RXTO_Enabled   (1UL)

Read: Enabled

Definition at line 11713 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_RXTO_Msk

#define UARTE_INTENCLR_RXTO_Msk   (0x1UL << UARTE_INTENCLR_RXTO_Pos)

Bit mask of RXTO field.

Definition at line 11711 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_RXTO_Pos

#define UARTE_INTENCLR_RXTO_Pos   (17UL)

Position of RXTO field.

Definition at line 11710 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_TXSTARTED_Clear

#define UARTE_INTENCLR_TXSTARTED_Clear   (1UL)

Disable

Definition at line 11700 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_TXSTARTED_Disabled

#define UARTE_INTENCLR_TXSTARTED_Disabled   (0UL)

Read: Disabled

Definition at line 11698 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_TXSTARTED_Enabled

#define UARTE_INTENCLR_TXSTARTED_Enabled   (1UL)

Read: Enabled

Definition at line 11699 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_TXSTARTED_Msk

#define UARTE_INTENCLR_TXSTARTED_Msk   (0x1UL << UARTE_INTENCLR_TXSTARTED_Pos)

Bit mask of TXSTARTED field.

Definition at line 11697 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_TXSTARTED_Pos

#define UARTE_INTENCLR_TXSTARTED_Pos   (20UL)

Position of TXSTARTED field.

Definition at line 11696 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_TXSTOPPED_Clear

#define UARTE_INTENCLR_TXSTOPPED_Clear   (1UL)

Disable

Definition at line 11693 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_TXSTOPPED_Disabled

#define UARTE_INTENCLR_TXSTOPPED_Disabled   (0UL)

Read: Disabled

Definition at line 11691 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_TXSTOPPED_Enabled

#define UARTE_INTENCLR_TXSTOPPED_Enabled   (1UL)

Read: Enabled

Definition at line 11692 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_TXSTOPPED_Msk

#define UARTE_INTENCLR_TXSTOPPED_Msk   (0x1UL << UARTE_INTENCLR_TXSTOPPED_Pos)

Bit mask of TXSTOPPED field.

Definition at line 11690 of file nrf52_bitfields.h.

◆ UARTE_INTENCLR_TXSTOPPED_Pos

#define UARTE_INTENCLR_TXSTOPPED_Pos   (22UL)

Position of TXSTOPPED field.

Definition at line 11689 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_CTS_Disabled

#define UARTE_INTENSET_CTS_Disabled   (0UL)

Read: Disabled

Definition at line 11681 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_CTS_Enabled

#define UARTE_INTENSET_CTS_Enabled   (1UL)

Read: Enabled

Definition at line 11682 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_CTS_Msk

#define UARTE_INTENSET_CTS_Msk   (0x1UL << UARTE_INTENSET_CTS_Pos)

Bit mask of CTS field.

Definition at line 11680 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_CTS_Pos

#define UARTE_INTENSET_CTS_Pos   (0UL)

Position of CTS field.

Definition at line 11679 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_CTS_Set

#define UARTE_INTENSET_CTS_Set   (1UL)

Enable

Definition at line 11683 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_ENDRX_Disabled

#define UARTE_INTENSET_ENDRX_Disabled   (0UL)

Read: Disabled

Definition at line 11667 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_ENDRX_Enabled

#define UARTE_INTENSET_ENDRX_Enabled   (1UL)

Read: Enabled

Definition at line 11668 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_ENDRX_Msk

#define UARTE_INTENSET_ENDRX_Msk   (0x1UL << UARTE_INTENSET_ENDRX_Pos)

Bit mask of ENDRX field.

Definition at line 11666 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_ENDRX_Pos

#define UARTE_INTENSET_ENDRX_Pos   (4UL)

Position of ENDRX field.

Definition at line 11665 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_ENDRX_Set

#define UARTE_INTENSET_ENDRX_Set   (1UL)

Enable

Definition at line 11669 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_ENDTX_Disabled

#define UARTE_INTENSET_ENDTX_Disabled   (0UL)

Read: Disabled

Definition at line 11660 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_ENDTX_Enabled

#define UARTE_INTENSET_ENDTX_Enabled   (1UL)

Read: Enabled

Definition at line 11661 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_ENDTX_Msk

#define UARTE_INTENSET_ENDTX_Msk   (0x1UL << UARTE_INTENSET_ENDTX_Pos)

Bit mask of ENDTX field.

Definition at line 11659 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_ENDTX_Pos

#define UARTE_INTENSET_ENDTX_Pos   (8UL)

Position of ENDTX field.

Definition at line 11658 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_ENDTX_Set

#define UARTE_INTENSET_ENDTX_Set   (1UL)

Enable

Definition at line 11662 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_ERROR_Disabled

#define UARTE_INTENSET_ERROR_Disabled   (0UL)

Read: Disabled

Definition at line 11653 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_ERROR_Enabled

#define UARTE_INTENSET_ERROR_Enabled   (1UL)

Read: Enabled

Definition at line 11654 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_ERROR_Msk

#define UARTE_INTENSET_ERROR_Msk   (0x1UL << UARTE_INTENSET_ERROR_Pos)

Bit mask of ERROR field.

Definition at line 11652 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_ERROR_Pos

#define UARTE_INTENSET_ERROR_Pos   (9UL)

Position of ERROR field.

Definition at line 11651 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_ERROR_Set

#define UARTE_INTENSET_ERROR_Set   (1UL)

Enable

Definition at line 11655 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_NCTS_Disabled

#define UARTE_INTENSET_NCTS_Disabled   (0UL)

Read: Disabled

Definition at line 11674 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_NCTS_Enabled

#define UARTE_INTENSET_NCTS_Enabled   (1UL)

Read: Enabled

Definition at line 11675 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_NCTS_Msk

#define UARTE_INTENSET_NCTS_Msk   (0x1UL << UARTE_INTENSET_NCTS_Pos)

Bit mask of NCTS field.

Definition at line 11673 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_NCTS_Pos

#define UARTE_INTENSET_NCTS_Pos   (1UL)

Position of NCTS field.

Definition at line 11672 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_NCTS_Set

#define UARTE_INTENSET_NCTS_Set   (1UL)

Enable

Definition at line 11676 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_RXSTARTED_Disabled

#define UARTE_INTENSET_RXSTARTED_Disabled   (0UL)

Read: Disabled

Definition at line 11639 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_RXSTARTED_Enabled

#define UARTE_INTENSET_RXSTARTED_Enabled   (1UL)

Read: Enabled

Definition at line 11640 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_RXSTARTED_Msk

#define UARTE_INTENSET_RXSTARTED_Msk   (0x1UL << UARTE_INTENSET_RXSTARTED_Pos)

Bit mask of RXSTARTED field.

Definition at line 11638 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_RXSTARTED_Pos

#define UARTE_INTENSET_RXSTARTED_Pos   (19UL)

Position of RXSTARTED field.

Definition at line 11637 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_RXSTARTED_Set

#define UARTE_INTENSET_RXSTARTED_Set   (1UL)

Enable

Definition at line 11641 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_RXTO_Disabled

#define UARTE_INTENSET_RXTO_Disabled   (0UL)

Read: Disabled

Definition at line 11646 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_RXTO_Enabled

#define UARTE_INTENSET_RXTO_Enabled   (1UL)

Read: Enabled

Definition at line 11647 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_RXTO_Msk

#define UARTE_INTENSET_RXTO_Msk   (0x1UL << UARTE_INTENSET_RXTO_Pos)

Bit mask of RXTO field.

Definition at line 11645 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_RXTO_Pos

#define UARTE_INTENSET_RXTO_Pos   (17UL)

Position of RXTO field.

Definition at line 11644 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_RXTO_Set

#define UARTE_INTENSET_RXTO_Set   (1UL)

Enable

Definition at line 11648 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_TXSTARTED_Disabled

#define UARTE_INTENSET_TXSTARTED_Disabled   (0UL)

Read: Disabled

Definition at line 11632 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_TXSTARTED_Enabled

#define UARTE_INTENSET_TXSTARTED_Enabled   (1UL)

Read: Enabled

Definition at line 11633 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_TXSTARTED_Msk

#define UARTE_INTENSET_TXSTARTED_Msk   (0x1UL << UARTE_INTENSET_TXSTARTED_Pos)

Bit mask of TXSTARTED field.

Definition at line 11631 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_TXSTARTED_Pos

#define UARTE_INTENSET_TXSTARTED_Pos   (20UL)

Position of TXSTARTED field.

Definition at line 11630 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_TXSTARTED_Set

#define UARTE_INTENSET_TXSTARTED_Set   (1UL)

Enable

Definition at line 11634 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_TXSTOPPED_Disabled

#define UARTE_INTENSET_TXSTOPPED_Disabled   (0UL)

Read: Disabled

Definition at line 11625 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_TXSTOPPED_Enabled

#define UARTE_INTENSET_TXSTOPPED_Enabled   (1UL)

Read: Enabled

Definition at line 11626 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_TXSTOPPED_Msk

#define UARTE_INTENSET_TXSTOPPED_Msk   (0x1UL << UARTE_INTENSET_TXSTOPPED_Pos)

Bit mask of TXSTOPPED field.

Definition at line 11624 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_TXSTOPPED_Pos

#define UARTE_INTENSET_TXSTOPPED_Pos   (22UL)

Position of TXSTOPPED field.

Definition at line 11623 of file nrf52_bitfields.h.

◆ UARTE_INTENSET_TXSTOPPED_Set

#define UARTE_INTENSET_TXSTOPPED_Set   (1UL)

Enable

Definition at line 11627 of file nrf52_bitfields.h.

◆ UARTE_PSEL_CTS_CONNECT_Connected

#define UARTE_PSEL_CTS_CONNECT_Connected   (0UL)

Connect

Definition at line 11819 of file nrf52_bitfields.h.

◆ UARTE_PSEL_CTS_CONNECT_Disconnected

#define UARTE_PSEL_CTS_CONNECT_Disconnected   (1UL)

Disconnect

Definition at line 11820 of file nrf52_bitfields.h.

◆ UARTE_PSEL_CTS_CONNECT_Msk

#define UARTE_PSEL_CTS_CONNECT_Msk   (0x1UL << UARTE_PSEL_CTS_CONNECT_Pos)

Bit mask of CONNECT field.

Definition at line 11818 of file nrf52_bitfields.h.

◆ UARTE_PSEL_CTS_CONNECT_Pos

#define UARTE_PSEL_CTS_CONNECT_Pos   (31UL)

Position of CONNECT field.

Definition at line 11817 of file nrf52_bitfields.h.

◆ UARTE_PSEL_CTS_PIN_Msk

#define UARTE_PSEL_CTS_PIN_Msk   (0x1FUL << UARTE_PSEL_CTS_PIN_Pos)

Bit mask of PIN field.

Definition at line 11824 of file nrf52_bitfields.h.

◆ UARTE_PSEL_CTS_PIN_Pos

#define UARTE_PSEL_CTS_PIN_Pos   (0UL)

Position of PIN field.

Definition at line 11823 of file nrf52_bitfields.h.

◆ UARTE_PSEL_RTS_CONNECT_Connected

#define UARTE_PSEL_RTS_CONNECT_Connected   (0UL)

Connect

Definition at line 11793 of file nrf52_bitfields.h.

◆ UARTE_PSEL_RTS_CONNECT_Disconnected

#define UARTE_PSEL_RTS_CONNECT_Disconnected   (1UL)

Disconnect

Definition at line 11794 of file nrf52_bitfields.h.

◆ UARTE_PSEL_RTS_CONNECT_Msk

#define UARTE_PSEL_RTS_CONNECT_Msk   (0x1UL << UARTE_PSEL_RTS_CONNECT_Pos)

Bit mask of CONNECT field.

Definition at line 11792 of file nrf52_bitfields.h.

◆ UARTE_PSEL_RTS_CONNECT_Pos

#define UARTE_PSEL_RTS_CONNECT_Pos   (31UL)

Position of CONNECT field.

Definition at line 11791 of file nrf52_bitfields.h.

◆ UARTE_PSEL_RTS_PIN_Msk

#define UARTE_PSEL_RTS_PIN_Msk   (0x1FUL << UARTE_PSEL_RTS_PIN_Pos)

Bit mask of PIN field.

Definition at line 11798 of file nrf52_bitfields.h.

◆ UARTE_PSEL_RTS_PIN_Pos

#define UARTE_PSEL_RTS_PIN_Pos   (0UL)

Position of PIN field.

Definition at line 11797 of file nrf52_bitfields.h.

◆ UARTE_PSEL_RXD_CONNECT_Connected

#define UARTE_PSEL_RXD_CONNECT_Connected   (0UL)

Connect

Definition at line 11832 of file nrf52_bitfields.h.

◆ UARTE_PSEL_RXD_CONNECT_Disconnected

#define UARTE_PSEL_RXD_CONNECT_Disconnected   (1UL)

Disconnect

Definition at line 11833 of file nrf52_bitfields.h.

◆ UARTE_PSEL_RXD_CONNECT_Msk

#define UARTE_PSEL_RXD_CONNECT_Msk   (0x1UL << UARTE_PSEL_RXD_CONNECT_Pos)

Bit mask of CONNECT field.

Definition at line 11831 of file nrf52_bitfields.h.

◆ UARTE_PSEL_RXD_CONNECT_Pos

#define UARTE_PSEL_RXD_CONNECT_Pos   (31UL)

Position of CONNECT field.

Definition at line 11830 of file nrf52_bitfields.h.

◆ UARTE_PSEL_RXD_PIN_Msk

#define UARTE_PSEL_RXD_PIN_Msk   (0x1FUL << UARTE_PSEL_RXD_PIN_Pos)

Bit mask of PIN field.

Definition at line 11837 of file nrf52_bitfields.h.

◆ UARTE_PSEL_RXD_PIN_Pos

#define UARTE_PSEL_RXD_PIN_Pos   (0UL)

Position of PIN field.

Definition at line 11836 of file nrf52_bitfields.h.

◆ UARTE_PSEL_TXD_CONNECT_Connected

#define UARTE_PSEL_TXD_CONNECT_Connected   (0UL)

Connect

Definition at line 11806 of file nrf52_bitfields.h.

◆ UARTE_PSEL_TXD_CONNECT_Disconnected

#define UARTE_PSEL_TXD_CONNECT_Disconnected   (1UL)

Disconnect

Definition at line 11807 of file nrf52_bitfields.h.

◆ UARTE_PSEL_TXD_CONNECT_Msk

#define UARTE_PSEL_TXD_CONNECT_Msk   (0x1UL << UARTE_PSEL_TXD_CONNECT_Pos)

Bit mask of CONNECT field.

Definition at line 11805 of file nrf52_bitfields.h.

◆ UARTE_PSEL_TXD_CONNECT_Pos

#define UARTE_PSEL_TXD_CONNECT_Pos   (31UL)

Position of CONNECT field.

Definition at line 11804 of file nrf52_bitfields.h.

◆ UARTE_PSEL_TXD_PIN_Msk

#define UARTE_PSEL_TXD_PIN_Msk   (0x1FUL << UARTE_PSEL_TXD_PIN_Pos)

Bit mask of PIN field.

Definition at line 11811 of file nrf52_bitfields.h.

◆ UARTE_PSEL_TXD_PIN_Pos

#define UARTE_PSEL_TXD_PIN_Pos   (0UL)

Position of PIN field.

Definition at line 11810 of file nrf52_bitfields.h.

◆ UARTE_RXD_AMOUNT_AMOUNT_Msk

#define UARTE_RXD_AMOUNT_AMOUNT_Msk   (0xFFUL << UARTE_RXD_AMOUNT_AMOUNT_Pos)

Bit mask of AMOUNT field.

Definition at line 11881 of file nrf52_bitfields.h.

◆ UARTE_RXD_AMOUNT_AMOUNT_Pos

#define UARTE_RXD_AMOUNT_AMOUNT_Pos   (0UL)

Position of AMOUNT field.

Definition at line 11880 of file nrf52_bitfields.h.

◆ UARTE_RXD_MAXCNT_MAXCNT_Msk

#define UARTE_RXD_MAXCNT_MAXCNT_Msk   (0xFFUL << UARTE_RXD_MAXCNT_MAXCNT_Pos)

Bit mask of MAXCNT field.

Definition at line 11874 of file nrf52_bitfields.h.

◆ UARTE_RXD_MAXCNT_MAXCNT_Pos

#define UARTE_RXD_MAXCNT_MAXCNT_Pos   (0UL)

Position of MAXCNT field.

Definition at line 11873 of file nrf52_bitfields.h.

◆ UARTE_RXD_PTR_PTR_Msk

#define UARTE_RXD_PTR_PTR_Msk   (0xFFFFFFFFUL << UARTE_RXD_PTR_PTR_Pos)

Bit mask of PTR field.

Definition at line 11867 of file nrf52_bitfields.h.

◆ UARTE_RXD_PTR_PTR_Pos

#define UARTE_RXD_PTR_PTR_Pos   (0UL)

Position of PTR field.

Definition at line 11866 of file nrf52_bitfields.h.

◆ UARTE_SHORTS_ENDRX_STARTRX_Disabled

#define UARTE_SHORTS_ENDRX_STARTRX_Disabled   (0UL)

Disable shortcut

Definition at line 11559 of file nrf52_bitfields.h.

◆ UARTE_SHORTS_ENDRX_STARTRX_Enabled

#define UARTE_SHORTS_ENDRX_STARTRX_Enabled   (1UL)

Enable shortcut

Definition at line 11560 of file nrf52_bitfields.h.

◆ UARTE_SHORTS_ENDRX_STARTRX_Msk

#define UARTE_SHORTS_ENDRX_STARTRX_Msk   (0x1UL << UARTE_SHORTS_ENDRX_STARTRX_Pos)

Bit mask of ENDRX_STARTRX field.

Definition at line 11558 of file nrf52_bitfields.h.

◆ UARTE_SHORTS_ENDRX_STARTRX_Pos

#define UARTE_SHORTS_ENDRX_STARTRX_Pos   (5UL)

Position of ENDRX_STARTRX field.

Definition at line 11557 of file nrf52_bitfields.h.

◆ UARTE_SHORTS_ENDRX_STOPRX_Disabled

#define UARTE_SHORTS_ENDRX_STOPRX_Disabled   (0UL)

Disable shortcut

Definition at line 11553 of file nrf52_bitfields.h.

◆ UARTE_SHORTS_ENDRX_STOPRX_Enabled

#define UARTE_SHORTS_ENDRX_STOPRX_Enabled   (1UL)

Enable shortcut

Definition at line 11554 of file nrf52_bitfields.h.

◆ UARTE_SHORTS_ENDRX_STOPRX_Msk

#define UARTE_SHORTS_ENDRX_STOPRX_Msk   (0x1UL << UARTE_SHORTS_ENDRX_STOPRX_Pos)

Bit mask of ENDRX_STOPRX field.

Definition at line 11552 of file nrf52_bitfields.h.

◆ UARTE_SHORTS_ENDRX_STOPRX_Pos

#define UARTE_SHORTS_ENDRX_STOPRX_Pos   (6UL)

Position of ENDRX_STOPRX field.

Definition at line 11551 of file nrf52_bitfields.h.

◆ UARTE_TXD_AMOUNT_AMOUNT_Msk

#define UARTE_TXD_AMOUNT_AMOUNT_Msk   (0xFFUL << UARTE_TXD_AMOUNT_AMOUNT_Pos)

Bit mask of AMOUNT field.

Definition at line 11902 of file nrf52_bitfields.h.

◆ UARTE_TXD_AMOUNT_AMOUNT_Pos

#define UARTE_TXD_AMOUNT_AMOUNT_Pos   (0UL)

Position of AMOUNT field.

Definition at line 11901 of file nrf52_bitfields.h.

◆ UARTE_TXD_MAXCNT_MAXCNT_Msk

#define UARTE_TXD_MAXCNT_MAXCNT_Msk   (0xFFUL << UARTE_TXD_MAXCNT_MAXCNT_Pos)

Bit mask of MAXCNT field.

Definition at line 11895 of file nrf52_bitfields.h.

◆ UARTE_TXD_MAXCNT_MAXCNT_Pos

#define UARTE_TXD_MAXCNT_MAXCNT_Pos   (0UL)

Position of MAXCNT field.

Definition at line 11894 of file nrf52_bitfields.h.

◆ UARTE_TXD_PTR_PTR_Msk

#define UARTE_TXD_PTR_PTR_Msk   (0xFFFFFFFFUL << UARTE_TXD_PTR_PTR_Pos)

Bit mask of PTR field.

Definition at line 11888 of file nrf52_bitfields.h.

◆ UARTE_TXD_PTR_PTR_Pos

#define UARTE_TXD_PTR_PTR_Pos   (0UL)

Position of PTR field.

Definition at line 11887 of file nrf52_bitfields.h.

◆ UICR_APPROTECT_PALL_Disabled

#define UICR_APPROTECT_PALL_Disabled   (0xFFUL)

Disable

Definition at line 11964 of file nrf52_bitfields.h.

◆ UICR_APPROTECT_PALL_Enabled

#define UICR_APPROTECT_PALL_Enabled   (0x00UL)

Enable

Definition at line 11963 of file nrf52_bitfields.h.

◆ UICR_APPROTECT_PALL_Msk

#define UICR_APPROTECT_PALL_Msk   (0xFFUL << UICR_APPROTECT_PALL_Pos)

Bit mask of PALL field.

Definition at line 11962 of file nrf52_bitfields.h.

◆ UICR_APPROTECT_PALL_Pos

#define UICR_APPROTECT_PALL_Pos   (0UL)

Position of PALL field.

Definition at line 11961 of file nrf52_bitfields.h.

◆ UICR_CUSTOMER_CUSTOMER_Msk

#define UICR_CUSTOMER_CUSTOMER_Msk   (0xFFFFFFFFUL << UICR_CUSTOMER_CUSTOMER_Pos)

Bit mask of CUSTOMER field.

Definition at line 11942 of file nrf52_bitfields.h.

◆ UICR_CUSTOMER_CUSTOMER_Pos

#define UICR_CUSTOMER_CUSTOMER_Pos   (0UL)

Position of CUSTOMER field.

Definition at line 11941 of file nrf52_bitfields.h.

◆ UICR_NFCPINS_PROTECT_Disabled

#define UICR_NFCPINS_PROTECT_Disabled   (0UL)

Operation as GPIO pins. Same protection as normal GPIO pins

Definition at line 11972 of file nrf52_bitfields.h.

◆ UICR_NFCPINS_PROTECT_Msk

#define UICR_NFCPINS_PROTECT_Msk   (0x1UL << UICR_NFCPINS_PROTECT_Pos)

Bit mask of PROTECT field.

Definition at line 11971 of file nrf52_bitfields.h.

◆ UICR_NFCPINS_PROTECT_NFC

#define UICR_NFCPINS_PROTECT_NFC   (1UL)

Operation as NFC antenna pins. Configures the protection for NFC operation

Definition at line 11973 of file nrf52_bitfields.h.

◆ UICR_NFCPINS_PROTECT_Pos

#define UICR_NFCPINS_PROTECT_Pos   (0UL)

Position of PROTECT field.

Definition at line 11970 of file nrf52_bitfields.h.

◆ UICR_NRFFW_NRFFW_Msk

#define UICR_NRFFW_NRFFW_Msk   (0xFFFFFFFFUL << UICR_NRFFW_NRFFW_Pos)

Bit mask of NRFFW field.

Definition at line 11928 of file nrf52_bitfields.h.

◆ UICR_NRFFW_NRFFW_Pos

#define UICR_NRFFW_NRFFW_Pos   (0UL)

Position of NRFFW field.

Definition at line 11927 of file nrf52_bitfields.h.

◆ UICR_NRFHW_NRFHW_Msk

#define UICR_NRFHW_NRFHW_Msk   (0xFFFFFFFFUL << UICR_NRFHW_NRFHW_Pos)

Bit mask of NRFHW field.

Definition at line 11935 of file nrf52_bitfields.h.

◆ UICR_NRFHW_NRFHW_Pos

#define UICR_NRFHW_NRFHW_Pos   (0UL)

Position of NRFHW field.

Definition at line 11934 of file nrf52_bitfields.h.

◆ UICR_PSELRESET_CONNECT_Connected

#define UICR_PSELRESET_CONNECT_Connected   (0UL)

Connect

Definition at line 11950 of file nrf52_bitfields.h.

◆ UICR_PSELRESET_CONNECT_Disconnected

#define UICR_PSELRESET_CONNECT_Disconnected   (1UL)

Disconnect

Definition at line 11951 of file nrf52_bitfields.h.

◆ UICR_PSELRESET_CONNECT_Msk

#define UICR_PSELRESET_CONNECT_Msk   (0x1UL << UICR_PSELRESET_CONNECT_Pos)

Bit mask of CONNECT field.

Definition at line 11949 of file nrf52_bitfields.h.

◆ UICR_PSELRESET_CONNECT_Pos

#define UICR_PSELRESET_CONNECT_Pos   (31UL)

Position of CONNECT field.

Definition at line 11948 of file nrf52_bitfields.h.

◆ UICR_PSELRESET_PIN_Msk

#define UICR_PSELRESET_PIN_Msk   (0x1FUL << UICR_PSELRESET_PIN_Pos)

Bit mask of PIN field.

Definition at line 11955 of file nrf52_bitfields.h.

◆ UICR_PSELRESET_PIN_Pos

#define UICR_PSELRESET_PIN_Pos   (0UL)

Position of PIN field.

Definition at line 11954 of file nrf52_bitfields.h.

◆ WDT_CONFIG_HALT_Msk

#define WDT_CONFIG_HALT_Msk   (0x1UL << WDT_CONFIG_HALT_Pos)

Bit mask of HALT field.

Definition at line 12122 of file nrf52_bitfields.h.

◆ WDT_CONFIG_HALT_Pause

#define WDT_CONFIG_HALT_Pause   (0UL)

Pause watchdog while the CPU is halted by the debugger

Definition at line 12123 of file nrf52_bitfields.h.

◆ WDT_CONFIG_HALT_Pos

#define WDT_CONFIG_HALT_Pos   (3UL)

Position of HALT field.

Definition at line 12121 of file nrf52_bitfields.h.

◆ WDT_CONFIG_HALT_Run

#define WDT_CONFIG_HALT_Run   (1UL)

Keep the watchdog running while the CPU is halted by the debugger

Definition at line 12124 of file nrf52_bitfields.h.

◆ WDT_CONFIG_SLEEP_Msk

#define WDT_CONFIG_SLEEP_Msk   (0x1UL << WDT_CONFIG_SLEEP_Pos)

Bit mask of SLEEP field.

Definition at line 12128 of file nrf52_bitfields.h.

◆ WDT_CONFIG_SLEEP_Pause

#define WDT_CONFIG_SLEEP_Pause   (0UL)

Pause watchdog while the CPU is sleeping

Definition at line 12129 of file nrf52_bitfields.h.

◆ WDT_CONFIG_SLEEP_Pos

#define WDT_CONFIG_SLEEP_Pos   (0UL)

Position of SLEEP field.

Definition at line 12127 of file nrf52_bitfields.h.

◆ WDT_CONFIG_SLEEP_Run

#define WDT_CONFIG_SLEEP_Run   (1UL)

Keep the watchdog running while the CPU is sleeping

Definition at line 12130 of file nrf52_bitfields.h.

◆ WDT_CRV_CRV_Msk

#define WDT_CRV_CRV_Msk   (0xFFFFFFFFUL << WDT_CRV_CRV_Pos)

Bit mask of CRV field.

Definition at line 12064 of file nrf52_bitfields.h.

◆ WDT_CRV_CRV_Pos

#define WDT_CRV_CRV_Pos   (0UL)

Position of CRV field.

Definition at line 12063 of file nrf52_bitfields.h.

◆ WDT_INTENCLR_TIMEOUT_Clear

#define WDT_INTENCLR_TIMEOUT_Clear   (1UL)

Disable

Definition at line 11997 of file nrf52_bitfields.h.

◆ WDT_INTENCLR_TIMEOUT_Disabled

#define WDT_INTENCLR_TIMEOUT_Disabled   (0UL)

Read: Disabled

Definition at line 11995 of file nrf52_bitfields.h.

◆ WDT_INTENCLR_TIMEOUT_Enabled

#define WDT_INTENCLR_TIMEOUT_Enabled   (1UL)

Read: Enabled

Definition at line 11996 of file nrf52_bitfields.h.

◆ WDT_INTENCLR_TIMEOUT_Msk

#define WDT_INTENCLR_TIMEOUT_Msk   (0x1UL << WDT_INTENCLR_TIMEOUT_Pos)

Bit mask of TIMEOUT field.

Definition at line 11994 of file nrf52_bitfields.h.

◆ WDT_INTENCLR_TIMEOUT_Pos

#define WDT_INTENCLR_TIMEOUT_Pos   (0UL)

Position of TIMEOUT field.

Definition at line 11993 of file nrf52_bitfields.h.

◆ WDT_INTENSET_TIMEOUT_Disabled

#define WDT_INTENSET_TIMEOUT_Disabled   (0UL)

Read: Disabled

Definition at line 11985 of file nrf52_bitfields.h.

◆ WDT_INTENSET_TIMEOUT_Enabled

#define WDT_INTENSET_TIMEOUT_Enabled   (1UL)

Read: Enabled

Definition at line 11986 of file nrf52_bitfields.h.

◆ WDT_INTENSET_TIMEOUT_Msk

#define WDT_INTENSET_TIMEOUT_Msk   (0x1UL << WDT_INTENSET_TIMEOUT_Pos)

Bit mask of TIMEOUT field.

Definition at line 11984 of file nrf52_bitfields.h.

◆ WDT_INTENSET_TIMEOUT_Pos

#define WDT_INTENSET_TIMEOUT_Pos   (0UL)

Position of TIMEOUT field.

Definition at line 11983 of file nrf52_bitfields.h.

◆ WDT_INTENSET_TIMEOUT_Set

#define WDT_INTENSET_TIMEOUT_Set   (1UL)

Enable

Definition at line 11987 of file nrf52_bitfields.h.

◆ WDT_REQSTATUS_RR0_DisabledOrRequested

#define WDT_REQSTATUS_RR0_DisabledOrRequested   (0UL)

RR[0] register is not enabled, or are already requesting reload

Definition at line 12056 of file nrf52_bitfields.h.

◆ WDT_REQSTATUS_RR0_EnabledAndUnrequested

#define WDT_REQSTATUS_RR0_EnabledAndUnrequested   (1UL)

RR[0] register is enabled, and are not yet requesting reload

Definition at line 12057 of file nrf52_bitfields.h.

◆ WDT_REQSTATUS_RR0_Msk

#define WDT_REQSTATUS_RR0_Msk   (0x1UL << WDT_REQSTATUS_RR0_Pos)

Bit mask of RR0 field.

Definition at line 12055 of file nrf52_bitfields.h.

◆ WDT_REQSTATUS_RR0_Pos

#define WDT_REQSTATUS_RR0_Pos   (0UL)

Position of RR0 field.

Definition at line 12054 of file nrf52_bitfields.h.

◆ WDT_REQSTATUS_RR1_DisabledOrRequested

#define WDT_REQSTATUS_RR1_DisabledOrRequested   (0UL)

RR[1] register is not enabled, or are already requesting reload

Definition at line 12050 of file nrf52_bitfields.h.

◆ WDT_REQSTATUS_RR1_EnabledAndUnrequested

#define WDT_REQSTATUS_RR1_EnabledAndUnrequested   (1UL)

RR[1] register is enabled, and are not yet requesting reload

Definition at line 12051 of file nrf52_bitfields.h.

◆ WDT_REQSTATUS_RR1_Msk

#define WDT_REQSTATUS_RR1_Msk   (0x1UL << WDT_REQSTATUS_RR1_Pos)

Bit mask of RR1 field.

Definition at line 12049 of file nrf52_bitfields.h.

◆ WDT_REQSTATUS_RR1_Pos

#define WDT_REQSTATUS_RR1_Pos   (1UL)

Position of RR1 field.

Definition at line 12048 of file nrf52_bitfields.h.

◆ WDT_REQSTATUS_RR2_DisabledOrRequested

#define WDT_REQSTATUS_RR2_DisabledOrRequested   (0UL)

RR[2] register is not enabled, or are already requesting reload

Definition at line 12044 of file nrf52_bitfields.h.

◆ WDT_REQSTATUS_RR2_EnabledAndUnrequested

#define WDT_REQSTATUS_RR2_EnabledAndUnrequested   (1UL)

RR[2] register is enabled, and are not yet requesting reload

Definition at line 12045 of file nrf52_bitfields.h.

◆ WDT_REQSTATUS_RR2_Msk

#define WDT_REQSTATUS_RR2_Msk   (0x1UL << WDT_REQSTATUS_RR2_Pos)

Bit mask of RR2 field.

Definition at line 12043 of file nrf52_bitfields.h.

◆ WDT_REQSTATUS_RR2_Pos

#define WDT_REQSTATUS_RR2_Pos   (2UL)

Position of RR2 field.

Definition at line 12042 of file nrf52_bitfields.h.

◆ WDT_REQSTATUS_RR3_DisabledOrRequested

#define WDT_REQSTATUS_RR3_DisabledOrRequested   (0UL)

RR[3] register is not enabled, or are already requesting reload

Definition at line 12038 of file nrf52_bitfields.h.

◆ WDT_REQSTATUS_RR3_EnabledAndUnrequested

#define WDT_REQSTATUS_RR3_EnabledAndUnrequested   (1UL)

RR[3] register is enabled, and are not yet requesting reload

Definition at line 12039 of file nrf52_bitfields.h.

◆ WDT_REQSTATUS_RR3_Msk

#define WDT_REQSTATUS_RR3_Msk   (0x1UL << WDT_REQSTATUS_RR3_Pos)

Bit mask of RR3 field.

Definition at line 12037 of file nrf52_bitfields.h.

◆ WDT_REQSTATUS_RR3_Pos

#define WDT_REQSTATUS_RR3_Pos   (3UL)

Position of RR3 field.

Definition at line 12036 of file nrf52_bitfields.h.

◆ WDT_REQSTATUS_RR4_DisabledOrRequested

#define WDT_REQSTATUS_RR4_DisabledOrRequested   (0UL)

RR[4] register is not enabled, or are already requesting reload

Definition at line 12032 of file nrf52_bitfields.h.

◆ WDT_REQSTATUS_RR4_EnabledAndUnrequested

#define WDT_REQSTATUS_RR4_EnabledAndUnrequested   (1UL)

RR[4] register is enabled, and are not yet requesting reload

Definition at line 12033 of file nrf52_bitfields.h.

◆ WDT_REQSTATUS_RR4_Msk

#define WDT_REQSTATUS_RR4_Msk   (0x1UL << WDT_REQSTATUS_RR4_Pos)

Bit mask of RR4 field.

Definition at line 12031 of file nrf52_bitfields.h.

◆ WDT_REQSTATUS_RR4_Pos

#define WDT_REQSTATUS_RR4_Pos   (4UL)

Position of RR4 field.

Definition at line 12030 of file nrf52_bitfields.h.

◆ WDT_REQSTATUS_RR5_DisabledOrRequested

#define WDT_REQSTATUS_RR5_DisabledOrRequested   (0UL)

RR[5] register is not enabled, or are already requesting reload

Definition at line 12026 of file nrf52_bitfields.h.

◆ WDT_REQSTATUS_RR5_EnabledAndUnrequested

#define WDT_REQSTATUS_RR5_EnabledAndUnrequested   (1UL)

RR[5] register is enabled, and are not yet requesting reload

Definition at line 12027 of file nrf52_bitfields.h.

◆ WDT_REQSTATUS_RR5_Msk

#define WDT_REQSTATUS_RR5_Msk   (0x1UL << WDT_REQSTATUS_RR5_Pos)

Bit mask of RR5 field.

Definition at line 12025 of file nrf52_bitfields.h.

◆ WDT_REQSTATUS_RR5_Pos

#define WDT_REQSTATUS_RR5_Pos   (5UL)

Position of RR5 field.

Definition at line 12024 of file nrf52_bitfields.h.

◆ WDT_REQSTATUS_RR6_DisabledOrRequested

#define WDT_REQSTATUS_RR6_DisabledOrRequested   (0UL)

RR[6] register is not enabled, or are already requesting reload

Definition at line 12020 of file nrf52_bitfields.h.

◆ WDT_REQSTATUS_RR6_EnabledAndUnrequested

#define WDT_REQSTATUS_RR6_EnabledAndUnrequested   (1UL)

RR[6] register is enabled, and are not yet requesting reload

Definition at line 12021 of file nrf52_bitfields.h.

◆ WDT_REQSTATUS_RR6_Msk

#define WDT_REQSTATUS_RR6_Msk   (0x1UL << WDT_REQSTATUS_RR6_Pos)

Bit mask of RR6 field.

Definition at line 12019 of file nrf52_bitfields.h.

◆ WDT_REQSTATUS_RR6_Pos

#define WDT_REQSTATUS_RR6_Pos   (6UL)

Position of RR6 field.

Definition at line 12018 of file nrf52_bitfields.h.

◆ WDT_REQSTATUS_RR7_DisabledOrRequested

#define WDT_REQSTATUS_RR7_DisabledOrRequested   (0UL)

RR[7] register is not enabled, or are already requesting reload

Definition at line 12014 of file nrf52_bitfields.h.

◆ WDT_REQSTATUS_RR7_EnabledAndUnrequested

#define WDT_REQSTATUS_RR7_EnabledAndUnrequested   (1UL)

RR[7] register is enabled, and are not yet requesting reload

Definition at line 12015 of file nrf52_bitfields.h.

◆ WDT_REQSTATUS_RR7_Msk

#define WDT_REQSTATUS_RR7_Msk   (0x1UL << WDT_REQSTATUS_RR7_Pos)

Bit mask of RR7 field.

Definition at line 12013 of file nrf52_bitfields.h.

◆ WDT_REQSTATUS_RR7_Pos

#define WDT_REQSTATUS_RR7_Pos   (7UL)

Position of RR7 field.

Definition at line 12012 of file nrf52_bitfields.h.

◆ WDT_RR_RR_Msk

#define WDT_RR_RR_Msk   (0xFFFFFFFFUL << WDT_RR_RR_Pos)

Bit mask of RR field.

Definition at line 12137 of file nrf52_bitfields.h.

◆ WDT_RR_RR_Pos

#define WDT_RR_RR_Pos   (0UL)

Position of RR field.

Definition at line 12136 of file nrf52_bitfields.h.

◆ WDT_RR_RR_Reload

#define WDT_RR_RR_Reload   (0x6E524635UL)

Value to request a reload of the watchdog timer

Definition at line 12138 of file nrf52_bitfields.h.

◆ WDT_RREN_RR0_Disabled

#define WDT_RREN_RR0_Disabled   (0UL)

Disable RR[0] register

Definition at line 12114 of file nrf52_bitfields.h.

◆ WDT_RREN_RR0_Enabled

#define WDT_RREN_RR0_Enabled   (1UL)

Enable RR[0] register

Definition at line 12115 of file nrf52_bitfields.h.

◆ WDT_RREN_RR0_Msk

#define WDT_RREN_RR0_Msk   (0x1UL << WDT_RREN_RR0_Pos)

Bit mask of RR0 field.

Definition at line 12113 of file nrf52_bitfields.h.

◆ WDT_RREN_RR0_Pos

#define WDT_RREN_RR0_Pos   (0UL)

Position of RR0 field.

Definition at line 12112 of file nrf52_bitfields.h.

◆ WDT_RREN_RR1_Disabled

#define WDT_RREN_RR1_Disabled   (0UL)

Disable RR[1] register

Definition at line 12108 of file nrf52_bitfields.h.

◆ WDT_RREN_RR1_Enabled

#define WDT_RREN_RR1_Enabled   (1UL)

Enable RR[1] register

Definition at line 12109 of file nrf52_bitfields.h.

◆ WDT_RREN_RR1_Msk

#define WDT_RREN_RR1_Msk   (0x1UL << WDT_RREN_RR1_Pos)

Bit mask of RR1 field.

Definition at line 12107 of file nrf52_bitfields.h.

◆ WDT_RREN_RR1_Pos

#define WDT_RREN_RR1_Pos   (1UL)

Position of RR1 field.

Definition at line 12106 of file nrf52_bitfields.h.

◆ WDT_RREN_RR2_Disabled

#define WDT_RREN_RR2_Disabled   (0UL)

Disable RR[2] register

Definition at line 12102 of file nrf52_bitfields.h.

◆ WDT_RREN_RR2_Enabled

#define WDT_RREN_RR2_Enabled   (1UL)

Enable RR[2] register

Definition at line 12103 of file nrf52_bitfields.h.

◆ WDT_RREN_RR2_Msk

#define WDT_RREN_RR2_Msk   (0x1UL << WDT_RREN_RR2_Pos)

Bit mask of RR2 field.

Definition at line 12101 of file nrf52_bitfields.h.

◆ WDT_RREN_RR2_Pos

#define WDT_RREN_RR2_Pos   (2UL)

Position of RR2 field.

Definition at line 12100 of file nrf52_bitfields.h.

◆ WDT_RREN_RR3_Disabled

#define WDT_RREN_RR3_Disabled   (0UL)

Disable RR[3] register

Definition at line 12096 of file nrf52_bitfields.h.

◆ WDT_RREN_RR3_Enabled

#define WDT_RREN_RR3_Enabled   (1UL)

Enable RR[3] register

Definition at line 12097 of file nrf52_bitfields.h.

◆ WDT_RREN_RR3_Msk

#define WDT_RREN_RR3_Msk   (0x1UL << WDT_RREN_RR3_Pos)

Bit mask of RR3 field.

Definition at line 12095 of file nrf52_bitfields.h.

◆ WDT_RREN_RR3_Pos

#define WDT_RREN_RR3_Pos   (3UL)

Position of RR3 field.

Definition at line 12094 of file nrf52_bitfields.h.

◆ WDT_RREN_RR4_Disabled

#define WDT_RREN_RR4_Disabled   (0UL)

Disable RR[4] register

Definition at line 12090 of file nrf52_bitfields.h.

◆ WDT_RREN_RR4_Enabled

#define WDT_RREN_RR4_Enabled   (1UL)

Enable RR[4] register

Definition at line 12091 of file nrf52_bitfields.h.

◆ WDT_RREN_RR4_Msk

#define WDT_RREN_RR4_Msk   (0x1UL << WDT_RREN_RR4_Pos)

Bit mask of RR4 field.

Definition at line 12089 of file nrf52_bitfields.h.

◆ WDT_RREN_RR4_Pos

#define WDT_RREN_RR4_Pos   (4UL)

Position of RR4 field.

Definition at line 12088 of file nrf52_bitfields.h.

◆ WDT_RREN_RR5_Disabled

#define WDT_RREN_RR5_Disabled   (0UL)

Disable RR[5] register

Definition at line 12084 of file nrf52_bitfields.h.

◆ WDT_RREN_RR5_Enabled

#define WDT_RREN_RR5_Enabled   (1UL)

Enable RR[5] register

Definition at line 12085 of file nrf52_bitfields.h.

◆ WDT_RREN_RR5_Msk

#define WDT_RREN_RR5_Msk   (0x1UL << WDT_RREN_RR5_Pos)

Bit mask of RR5 field.

Definition at line 12083 of file nrf52_bitfields.h.

◆ WDT_RREN_RR5_Pos

#define WDT_RREN_RR5_Pos   (5UL)

Position of RR5 field.

Definition at line 12082 of file nrf52_bitfields.h.

◆ WDT_RREN_RR6_Disabled

#define WDT_RREN_RR6_Disabled   (0UL)

Disable RR[6] register

Definition at line 12078 of file nrf52_bitfields.h.

◆ WDT_RREN_RR6_Enabled

#define WDT_RREN_RR6_Enabled   (1UL)

Enable RR[6] register

Definition at line 12079 of file nrf52_bitfields.h.

◆ WDT_RREN_RR6_Msk

#define WDT_RREN_RR6_Msk   (0x1UL << WDT_RREN_RR6_Pos)

Bit mask of RR6 field.

Definition at line 12077 of file nrf52_bitfields.h.

◆ WDT_RREN_RR6_Pos

#define WDT_RREN_RR6_Pos   (6UL)

Position of RR6 field.

Definition at line 12076 of file nrf52_bitfields.h.

◆ WDT_RREN_RR7_Disabled

#define WDT_RREN_RR7_Disabled   (0UL)

Disable RR[7] register

Definition at line 12072 of file nrf52_bitfields.h.

◆ WDT_RREN_RR7_Enabled

#define WDT_RREN_RR7_Enabled   (1UL)

Enable RR[7] register

Definition at line 12073 of file nrf52_bitfields.h.

◆ WDT_RREN_RR7_Msk

#define WDT_RREN_RR7_Msk   (0x1UL << WDT_RREN_RR7_Pos)

Bit mask of RR7 field.

Definition at line 12071 of file nrf52_bitfields.h.

◆ WDT_RREN_RR7_Pos

#define WDT_RREN_RR7_Pos   (7UL)

Position of RR7 field.

Definition at line 12070 of file nrf52_bitfields.h.

◆ WDT_RUNSTATUS_RUNSTATUS_Msk

#define WDT_RUNSTATUS_RUNSTATUS_Msk   (0x1UL << WDT_RUNSTATUS_RUNSTATUS_Pos)

Bit mask of RUNSTATUS field.

Definition at line 12004 of file nrf52_bitfields.h.

◆ WDT_RUNSTATUS_RUNSTATUS_NotRunning

#define WDT_RUNSTATUS_RUNSTATUS_NotRunning   (0UL)

Watchdog not running

Definition at line 12005 of file nrf52_bitfields.h.

◆ WDT_RUNSTATUS_RUNSTATUS_Pos

#define WDT_RUNSTATUS_RUNSTATUS_Pos   (0UL)

Position of RUNSTATUS field.

Definition at line 12003 of file nrf52_bitfields.h.

◆ WDT_RUNSTATUS_RUNSTATUS_Running

#define WDT_RUNSTATUS_RUNSTATUS_Running   (1UL)

Watchdog is running

Definition at line 12006 of file nrf52_bitfields.h.

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